From 304a47c1bb1744809e2047e9a36508aef9f8c546 Mon Sep 17 00:00:00 2001 From: toggo9 <121191375+toggo9@users.noreply.github.com> Date: Wed, 7 May 2025 22:49:05 +0200 Subject: [PATCH 1/3] Add files via upload --- src/video/vid_et4000w32.c | 160 +++++++++++++++++++++++++++++++------- 1 file changed, 133 insertions(+), 27 deletions(-) diff --git a/src/video/vid_et4000w32.c b/src/video/vid_et4000w32.c index 246decb9c..c772ffdd9 100644 --- a/src/video/vid_et4000w32.c +++ b/src/video/vid_et4000w32.c @@ -43,8 +43,11 @@ #define BIOS_ROM_PATH_W32I_ISA "roms/video/et4000w32/ET4KW32I.VBI" #define BIOS_ROM_PATH_W32I_VLB "roms/video/et4000w32/tseng.u41.bin" #define BIOS_ROM_PATH_W32P_VIDEOMAGIC_REVB_VLB "roms/video/et4000w32/VideoMagic-BioS-HXIRTW32PWSRL.bin" +#define BIOS_ROM_PATH_W32P_IMASCAN_VLB "roms/video/et4000w32/tseng_et4000w32p-8.03.bin" +#define BIOS_ROM_PATH_W32P_MIROVIDEO20TD_VLB "roms/video/et4000w32/m27c256b-at-dip28-miro20td-675dada18e7fa701369657.bin" #define BIOS_ROM_PATH_W32P "roms/video/et4000w32/ET4K_W32.BIN" #define BIOS_ROM_PATH_W32P_REVC "roms/video/et4000w32/et4000w32pcardex.BIN" +#define BIOS_ROM_PATH_W32P_REVCD_ONBOARD "roms/video/et4000w32/vid.BIN" #define ACL_WRST 1 #define ACL_RDST 2 @@ -55,7 +58,10 @@ enum { ET4000W32, ET4000W32I, ET4000W32P_REVC, + ET4000W32P_REVCD_ONBOARD, ET4000W32P_VIDEOMAGIC_REVB, + ET4000W32P_IMASCAN_VLB, + ET4000W32P_MIROVIDEO20TD_VLB, ET4000W32P, ET4000W32P_CARDEX, ET4000W32P_DIAMOND @@ -178,7 +184,7 @@ et4000w32p_out(uint16_t addr, uint8_t val, void *priv) case 0x3c7: case 0x3c8: case 0x3c9: - if (et4000->type <= ET4000W32P_REVC) + if (et4000->type <= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) sdac_ramdac_out(addr, 0, val, svga->ramdac, svga); else stg_ramdac_out(addr, val, svga->ramdac, svga); @@ -302,13 +308,13 @@ et4000w32p_out(uint16_t addr, uint8_t val, void *priv) if (svga->hwcursor.cur_xsize == 128) { svga->hwcursor.xoff &= 0x7f; svga->hwcursor.yoff &= 0x7f; - if (et4000->type > ET4000W32P_REVC) { + if (et4000->type > ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) { if (svga->bpp == 24) { et4000->adjust_cursor = 2; } } } else { - if (et4000->type > ET4000W32P_REVC) { + if (et4000->type > ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) { if ((svga->bpp == 24) && et4000->adjust_cursor) { et4000->adjust_cursor = 0; } @@ -348,7 +354,7 @@ et4000w32p_in(uint16_t addr, void *priv) case 0x3c7: case 0x3c8: case 0x3c9: - if (et4000->type <= ET4000W32P_REVC) + if (et4000->type <= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) return sdac_ramdac_in(addr, 0, svga->ramdac, svga); else return stg_ramdac_in(addr, svga->ramdac, svga); @@ -503,8 +509,8 @@ et4000w32p_recalctimings(svga_t *svga) svga->hdisp >>= 1; svga->dots_per_clock >>= 1; } - if (et4000->type <= ET4000W32P_REVC) { - if (et4000->type == ET4000W32P_REVC) { + if (et4000->type <= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) { + if (et4000->type == ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) { if (svga->hdisp != 1024) et4000->adjust_cursor = 1; } else @@ -514,7 +520,7 @@ et4000w32p_recalctimings(svga_t *svga) case 24: svga->hdisp /= 3; svga->dots_per_clock /= 3; - if (et4000->type <= ET4000W32P_REVC) + if (et4000->type <= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) et4000->adjust_cursor = 2; if ((et4000->type == ET4000W32P_DIAMOND) && ((svga->hdisp == (640 / 2)) || (svga->hdisp == 1232))) { svga->hdisp = 640; @@ -548,7 +554,7 @@ et4000w32p_recalctimings(svga_t *svga) break; case 0x40: case 0x60: /* 256+ colours */ - if (et4000->type <= ET4000W32P_REVC) + if (et4000->type <= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) svga->clock /= 2; switch (svga->bpp) { @@ -729,13 +735,13 @@ et4000w32p_accel_write_fifo(et4000w32p_t *et4000, uint32_t addr, uint8_t val) et4000->acl.queued.dest_off = (et4000->acl.queued.dest_off & 0x00ff) | (val << 8); break; case 0x8e: - if (et4000->type >= ET4000W32P_REVC) + if (et4000->type >= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) et4000->acl.queued.pixel_depth = val & 0x30; else et4000->acl.queued.vbus = val & 0x03; break; case 0x8f: - if (et4000->type >= ET4000W32P_REVC) + if (et4000->type >= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) et4000->acl.queued.xy_dir = val & 0xb7; else et4000->acl.queued.xy_dir = val & 0x03; @@ -759,7 +765,7 @@ et4000w32p_accel_write_fifo(et4000w32p_t *et4000, uint32_t addr, uint8_t val) et4000->acl.queued.count_y = (et4000->acl.queued.count_y & 0x00ff) | (val << 8); break; case 0x9c: - if (et4000->type >= ET4000W32P_REVC) + if (et4000->type >= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) et4000->acl.queued.ctrl_routing = val & 0xdb; else et4000->acl.queued.ctrl_routing = val & 0xb7; @@ -785,7 +791,7 @@ et4000w32p_accel_write_fifo(et4000w32p_t *et4000, uint32_t addr, uint8_t val) case 0xa3: et4000->acl.queued.dest_addr = (et4000->acl.queued.dest_addr & 0x00ffffff) | (val << 24); et4000->acl.internal = et4000->acl.queued; - if (et4000->type >= ET4000W32P_REVC) { + if (et4000->type >= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) { et4000w32p_blit_start(et4000); et4000w32_log("Destination Address write and start XY Block, xcnt = %i, ycnt = %i\n", et4000->acl.x_count + 1, et4000->acl.y_count + 1); if (!(et4000->acl.queued.ctrl_routing & 0x43)) { @@ -849,7 +855,7 @@ et4000w32p_accel_write_fifo(et4000w32p_t *et4000, uint32_t addr, uint8_t val) static void et4000w32p_accel_write_mmu(et4000w32p_t *et4000, uint32_t addr, uint8_t val, uint8_t bank) { - if (et4000->type >= ET4000W32P_REVC) { + if (et4000->type >= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) { if (!(et4000->acl.status & ACL_XYST)) { et4000w32_log("XY MMU block not started\n"); return; @@ -1087,7 +1093,7 @@ et4000w32p_mmu_read(uint32_t addr, void *priv) case 0x8d: return et4000->acl.internal.dest_off >> 8; case 0x8e: - if (et4000->type >= ET4000W32P_REVC) + if (et4000->type >= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) return et4000->acl.internal.pixel_depth; return et4000->acl.internal.vbus; case 0x8f: @@ -2779,6 +2785,30 @@ et4000w32p_init(const device_t *info) rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32P_VIDEOMAGIC_REVB_VLB, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + et4000->svga.ramdac = device_add(&stg_ramdac_device); + et4000->svga.clock_gen = et4000->svga.ramdac; + et4000->svga.getclock = stg_getclock; + break; + + case ET4000W32P_IMASCAN_VLB: + /* ET4000/W32p Imascan RGB */ + et4000->rev = 5; + + rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32P_IMASCAN_VLB, 0xc0000, 0x8000, 0x7fff, 0, + MEM_MAPPING_EXTERNAL); + + et4000->svga.ramdac = device_add(&stg_ramdac_device); + et4000->svga.clock_gen = et4000->svga.ramdac; + et4000->svga.getclock = stg_getclock; + break; + + case ET4000W32P_MIROVIDEO20TD_VLB: + /* ET4000/W32p miroVIDEO 20TD LIVE! */ + et4000->rev = 5; + + rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32P_MIROVIDEO20TD_VLB, 0xc0000, 0x8000, 0x7fff, 0, + MEM_MAPPING_EXTERNAL); + et4000->svga.ramdac = device_add(&stg_ramdac_device); et4000->svga.clock_gen = et4000->svga.ramdac; et4000->svga.getclock = stg_getclock; @@ -2791,6 +2821,18 @@ et4000w32p_init(const device_t *info) rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32P_REVC, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + et4000->svga.ramdac = device_add(&tseng_ics5341_ramdac_device); + et4000->svga.clock_gen = et4000->svga.ramdac; + et4000->svga.getclock = sdac_getclock; + break; + + case ET4000W32P_REVCD_ONBOARD: + /* ET4000/W32p rev C */ + et4000->rev = 7; + + rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32P_REVCD_ONBOARD, 0xc0000, 0x8000, 0x7fff, 0, + MEM_MAPPING_EXTERNAL); + et4000->svga.ramdac = device_add(&tseng_ics5341_ramdac_device); et4000->svga.clock_gen = et4000->svga.ramdac; et4000->svga.getclock = sdac_getclock; @@ -2890,12 +2932,30 @@ et4000w32p_videomagic_revb_vlb_available(void) return rom_present(BIOS_ROM_PATH_W32P_VIDEOMAGIC_REVB_VLB); } +int +et4000w32p_imascan_vlb_available(void) +{ + return rom_present(BIOS_ROM_PATH_W32P_IMASCAN_VLB); +} + +int +et4000w32p_mirovideo20td_vlb_available(void) +{ + return rom_present(BIOS_ROM_PATH_W32P_MIROVIDEO20TD_VLB); +} + int et4000w32p_revc_available(void) { return rom_present(BIOS_ROM_PATH_W32P_REVC); } +int +et4000w32p_revcd_onboard_available(void) +{ + return rom_present(BIOS_ROM_PATH_W32P_REVCD_ONBOARD); +} + int et4000w32p_noncardex_available(void) { @@ -2943,19 +3003,23 @@ et4000w32p_force_redraw(void *priv) static const device_config_t et4000w32p_config[] = { // clang-format off { - .name = "memory", - .description = "Memory size", - .type = CONFIG_SELECTION, - .default_string = NULL, - .default_int = 2, - .file_filter = NULL, - .spinner = { 0 }, - .selection = { - { .description = "1 MB", .value = 1 }, - { .description = "2 MB", .value = 2 }, - { .description = "" } - }, - .bios = { { 0 } } + .name = "memory", + .description = "Memory size", + .type = CONFIG_SELECTION, + .default_int = 2, + .selection = { + { + .description = "1 MB", + .value = 1 + }, + { + .description = "2 MB", + .value = 2 + }, + { + .description = "" + } + } }, { .name = "", .description = "", .type = CONFIG_END } // clang-format on @@ -3017,6 +3081,34 @@ const device_t et4000w32i_vlb_device = { .config = et4000w32p_config }; +const device_t et4000w32p_imascan_vlb_device = { + .name = "Tseng Labs ET4000/w32p VLB (Imascan)", + .internal_name = "et4000w32p_imascan_vlb", + .flags = DEVICE_VLB, + .local = ET4000W32P_IMASCAN_VLB, + .init = et4000w32p_init, + .close = et4000w32p_close, + .reset = NULL, + .available = et4000w32p_imascan_vlb_available, + .speed_changed = et4000w32p_speed_changed, + .force_redraw = et4000w32p_force_redraw, + .config = et4000w32p_config +}; + +const device_t et4000w32p_mirovideo20td_vlb_device = { + .name = "Tseng Labs ET4000/w32p VLB (miroVIDEO 20TD LIVE!)", + .internal_name = "et4000w32p_mirovideo20td_vlb", + .flags = DEVICE_VLB, + .local = ET4000W32P_MIROVIDEO20TD_VLB, + .init = et4000w32p_init, + .close = et4000w32p_close, + .reset = NULL, + .available = et4000w32p_mirovideo20td_vlb_available, + .speed_changed = et4000w32p_speed_changed, + .force_redraw = et4000w32p_force_redraw, + .config = et4000w32p_config +}; + const device_t et4000w32p_videomagic_revb_vlb_device = { .name = "Tseng Labs ET4000/w32p Rev. B VLB (VideoMagic)", .internal_name = "et4000w32p_videomagic_revb_vlb", @@ -3073,6 +3165,20 @@ const device_t et4000w32p_revc_pci_device = { .config = et4000w32p_config }; +const device_t et4000w32p_revcd_onboard_pci_device = { + .name = "Tseng Labs ET4000/w32p Rev. C/D PCI (On-Board)", + .internal_name = "et4000w32p_revc_pci", + .flags = DEVICE_PCI, + .local = ET4000W32P_REVCD_ONBOARD, + .init = et4000w32p_init, + .close = et4000w32p_close, + .reset = NULL, + .available = et4000w32p_revcd_onboard_available, + .speed_changed = et4000w32p_speed_changed, + .force_redraw = et4000w32p_force_redraw, + .config = et4000w32p_config +}; + const device_t et4000w32p_noncardex_vlb_device = { .name = "Tseng Labs ET4000/w32p Rev. D VLB", .internal_name = "et4000w32p_nc_vlb", From 948f50667e2845976010020e0c83bc2a94015b61 Mon Sep 17 00:00:00 2001 From: toggo9 <121191375+toggo9@users.noreply.github.com> Date: Fri, 16 May 2025 18:18:23 +0200 Subject: [PATCH 2/3] the ZEOS Martin Board actually has VLB Slots. --- src/machine/machine_table.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index ffdf902a3..2e72dd1fa 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -6995,7 +6995,7 @@ const machine_t machines[] = { .min_multi = 0, .max_multi = 0 }, - .bus_flags = MACHINE_PS2, + .bus_flags = MACHINE_PS2_VLB, .flags = MACHINE_IDE | MACHINE_APM, .ram = { .min = 2048, From 34bd61fd1bdd6862a6abe7ff356742e96445d32e Mon Sep 17 00:00:00 2001 From: toggo9 <121191375+toggo9@users.noreply.github.com> Date: Fri, 16 May 2025 18:21:51 +0200 Subject: [PATCH 3/3] Correct the ET4000/W32p file. --- src/video/vid_et4000w32.c | 160 +++++++------------------------------- 1 file changed, 27 insertions(+), 133 deletions(-) diff --git a/src/video/vid_et4000w32.c b/src/video/vid_et4000w32.c index c772ffdd9..246decb9c 100644 --- a/src/video/vid_et4000w32.c +++ b/src/video/vid_et4000w32.c @@ -43,11 +43,8 @@ #define BIOS_ROM_PATH_W32I_ISA "roms/video/et4000w32/ET4KW32I.VBI" #define BIOS_ROM_PATH_W32I_VLB "roms/video/et4000w32/tseng.u41.bin" #define BIOS_ROM_PATH_W32P_VIDEOMAGIC_REVB_VLB "roms/video/et4000w32/VideoMagic-BioS-HXIRTW32PWSRL.bin" -#define BIOS_ROM_PATH_W32P_IMASCAN_VLB "roms/video/et4000w32/tseng_et4000w32p-8.03.bin" -#define BIOS_ROM_PATH_W32P_MIROVIDEO20TD_VLB "roms/video/et4000w32/m27c256b-at-dip28-miro20td-675dada18e7fa701369657.bin" #define BIOS_ROM_PATH_W32P "roms/video/et4000w32/ET4K_W32.BIN" #define BIOS_ROM_PATH_W32P_REVC "roms/video/et4000w32/et4000w32pcardex.BIN" -#define BIOS_ROM_PATH_W32P_REVCD_ONBOARD "roms/video/et4000w32/vid.BIN" #define ACL_WRST 1 #define ACL_RDST 2 @@ -58,10 +55,7 @@ enum { ET4000W32, ET4000W32I, ET4000W32P_REVC, - ET4000W32P_REVCD_ONBOARD, ET4000W32P_VIDEOMAGIC_REVB, - ET4000W32P_IMASCAN_VLB, - ET4000W32P_MIROVIDEO20TD_VLB, ET4000W32P, ET4000W32P_CARDEX, ET4000W32P_DIAMOND @@ -184,7 +178,7 @@ et4000w32p_out(uint16_t addr, uint8_t val, void *priv) case 0x3c7: case 0x3c8: case 0x3c9: - if (et4000->type <= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) + if (et4000->type <= ET4000W32P_REVC) sdac_ramdac_out(addr, 0, val, svga->ramdac, svga); else stg_ramdac_out(addr, val, svga->ramdac, svga); @@ -308,13 +302,13 @@ et4000w32p_out(uint16_t addr, uint8_t val, void *priv) if (svga->hwcursor.cur_xsize == 128) { svga->hwcursor.xoff &= 0x7f; svga->hwcursor.yoff &= 0x7f; - if (et4000->type > ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) { + if (et4000->type > ET4000W32P_REVC) { if (svga->bpp == 24) { et4000->adjust_cursor = 2; } } } else { - if (et4000->type > ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) { + if (et4000->type > ET4000W32P_REVC) { if ((svga->bpp == 24) && et4000->adjust_cursor) { et4000->adjust_cursor = 0; } @@ -354,7 +348,7 @@ et4000w32p_in(uint16_t addr, void *priv) case 0x3c7: case 0x3c8: case 0x3c9: - if (et4000->type <= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) + if (et4000->type <= ET4000W32P_REVC) return sdac_ramdac_in(addr, 0, svga->ramdac, svga); else return stg_ramdac_in(addr, svga->ramdac, svga); @@ -509,8 +503,8 @@ et4000w32p_recalctimings(svga_t *svga) svga->hdisp >>= 1; svga->dots_per_clock >>= 1; } - if (et4000->type <= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) { - if (et4000->type == ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) { + if (et4000->type <= ET4000W32P_REVC) { + if (et4000->type == ET4000W32P_REVC) { if (svga->hdisp != 1024) et4000->adjust_cursor = 1; } else @@ -520,7 +514,7 @@ et4000w32p_recalctimings(svga_t *svga) case 24: svga->hdisp /= 3; svga->dots_per_clock /= 3; - if (et4000->type <= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) + if (et4000->type <= ET4000W32P_REVC) et4000->adjust_cursor = 2; if ((et4000->type == ET4000W32P_DIAMOND) && ((svga->hdisp == (640 / 2)) || (svga->hdisp == 1232))) { svga->hdisp = 640; @@ -554,7 +548,7 @@ et4000w32p_recalctimings(svga_t *svga) break; case 0x40: case 0x60: /* 256+ colours */ - if (et4000->type <= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) + if (et4000->type <= ET4000W32P_REVC) svga->clock /= 2; switch (svga->bpp) { @@ -735,13 +729,13 @@ et4000w32p_accel_write_fifo(et4000w32p_t *et4000, uint32_t addr, uint8_t val) et4000->acl.queued.dest_off = (et4000->acl.queued.dest_off & 0x00ff) | (val << 8); break; case 0x8e: - if (et4000->type >= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) + if (et4000->type >= ET4000W32P_REVC) et4000->acl.queued.pixel_depth = val & 0x30; else et4000->acl.queued.vbus = val & 0x03; break; case 0x8f: - if (et4000->type >= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) + if (et4000->type >= ET4000W32P_REVC) et4000->acl.queued.xy_dir = val & 0xb7; else et4000->acl.queued.xy_dir = val & 0x03; @@ -765,7 +759,7 @@ et4000w32p_accel_write_fifo(et4000w32p_t *et4000, uint32_t addr, uint8_t val) et4000->acl.queued.count_y = (et4000->acl.queued.count_y & 0x00ff) | (val << 8); break; case 0x9c: - if (et4000->type >= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) + if (et4000->type >= ET4000W32P_REVC) et4000->acl.queued.ctrl_routing = val & 0xdb; else et4000->acl.queued.ctrl_routing = val & 0xb7; @@ -791,7 +785,7 @@ et4000w32p_accel_write_fifo(et4000w32p_t *et4000, uint32_t addr, uint8_t val) case 0xa3: et4000->acl.queued.dest_addr = (et4000->acl.queued.dest_addr & 0x00ffffff) | (val << 24); et4000->acl.internal = et4000->acl.queued; - if (et4000->type >= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) { + if (et4000->type >= ET4000W32P_REVC) { et4000w32p_blit_start(et4000); et4000w32_log("Destination Address write and start XY Block, xcnt = %i, ycnt = %i\n", et4000->acl.x_count + 1, et4000->acl.y_count + 1); if (!(et4000->acl.queued.ctrl_routing & 0x43)) { @@ -855,7 +849,7 @@ et4000w32p_accel_write_fifo(et4000w32p_t *et4000, uint32_t addr, uint8_t val) static void et4000w32p_accel_write_mmu(et4000w32p_t *et4000, uint32_t addr, uint8_t val, uint8_t bank) { - if (et4000->type >= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) { + if (et4000->type >= ET4000W32P_REVC) { if (!(et4000->acl.status & ACL_XYST)) { et4000w32_log("XY MMU block not started\n"); return; @@ -1093,7 +1087,7 @@ et4000w32p_mmu_read(uint32_t addr, void *priv) case 0x8d: return et4000->acl.internal.dest_off >> 8; case 0x8e: - if (et4000->type >= ET4000W32P_REVC && ET4000W32P_REVCD_ONBOARD) + if (et4000->type >= ET4000W32P_REVC) return et4000->acl.internal.pixel_depth; return et4000->acl.internal.vbus; case 0x8f: @@ -2785,30 +2779,6 @@ et4000w32p_init(const device_t *info) rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32P_VIDEOMAGIC_REVB_VLB, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - et4000->svga.ramdac = device_add(&stg_ramdac_device); - et4000->svga.clock_gen = et4000->svga.ramdac; - et4000->svga.getclock = stg_getclock; - break; - - case ET4000W32P_IMASCAN_VLB: - /* ET4000/W32p Imascan RGB */ - et4000->rev = 5; - - rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32P_IMASCAN_VLB, 0xc0000, 0x8000, 0x7fff, 0, - MEM_MAPPING_EXTERNAL); - - et4000->svga.ramdac = device_add(&stg_ramdac_device); - et4000->svga.clock_gen = et4000->svga.ramdac; - et4000->svga.getclock = stg_getclock; - break; - - case ET4000W32P_MIROVIDEO20TD_VLB: - /* ET4000/W32p miroVIDEO 20TD LIVE! */ - et4000->rev = 5; - - rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32P_MIROVIDEO20TD_VLB, 0xc0000, 0x8000, 0x7fff, 0, - MEM_MAPPING_EXTERNAL); - et4000->svga.ramdac = device_add(&stg_ramdac_device); et4000->svga.clock_gen = et4000->svga.ramdac; et4000->svga.getclock = stg_getclock; @@ -2821,18 +2791,6 @@ et4000w32p_init(const device_t *info) rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32P_REVC, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); - et4000->svga.ramdac = device_add(&tseng_ics5341_ramdac_device); - et4000->svga.clock_gen = et4000->svga.ramdac; - et4000->svga.getclock = sdac_getclock; - break; - - case ET4000W32P_REVCD_ONBOARD: - /* ET4000/W32p rev C */ - et4000->rev = 7; - - rom_init(&et4000->bios_rom, BIOS_ROM_PATH_W32P_REVCD_ONBOARD, 0xc0000, 0x8000, 0x7fff, 0, - MEM_MAPPING_EXTERNAL); - et4000->svga.ramdac = device_add(&tseng_ics5341_ramdac_device); et4000->svga.clock_gen = et4000->svga.ramdac; et4000->svga.getclock = sdac_getclock; @@ -2932,30 +2890,12 @@ et4000w32p_videomagic_revb_vlb_available(void) return rom_present(BIOS_ROM_PATH_W32P_VIDEOMAGIC_REVB_VLB); } -int -et4000w32p_imascan_vlb_available(void) -{ - return rom_present(BIOS_ROM_PATH_W32P_IMASCAN_VLB); -} - -int -et4000w32p_mirovideo20td_vlb_available(void) -{ - return rom_present(BIOS_ROM_PATH_W32P_MIROVIDEO20TD_VLB); -} - int et4000w32p_revc_available(void) { return rom_present(BIOS_ROM_PATH_W32P_REVC); } -int -et4000w32p_revcd_onboard_available(void) -{ - return rom_present(BIOS_ROM_PATH_W32P_REVCD_ONBOARD); -} - int et4000w32p_noncardex_available(void) { @@ -3003,23 +2943,19 @@ et4000w32p_force_redraw(void *priv) static const device_config_t et4000w32p_config[] = { // clang-format off { - .name = "memory", - .description = "Memory size", - .type = CONFIG_SELECTION, - .default_int = 2, - .selection = { - { - .description = "1 MB", - .value = 1 - }, - { - .description = "2 MB", - .value = 2 - }, - { - .description = "" - } - } + .name = "memory", + .description = "Memory size", + .type = CONFIG_SELECTION, + .default_string = NULL, + .default_int = 2, + .file_filter = NULL, + .spinner = { 0 }, + .selection = { + { .description = "1 MB", .value = 1 }, + { .description = "2 MB", .value = 2 }, + { .description = "" } + }, + .bios = { { 0 } } }, { .name = "", .description = "", .type = CONFIG_END } // clang-format on @@ -3081,34 +3017,6 @@ const device_t et4000w32i_vlb_device = { .config = et4000w32p_config }; -const device_t et4000w32p_imascan_vlb_device = { - .name = "Tseng Labs ET4000/w32p VLB (Imascan)", - .internal_name = "et4000w32p_imascan_vlb", - .flags = DEVICE_VLB, - .local = ET4000W32P_IMASCAN_VLB, - .init = et4000w32p_init, - .close = et4000w32p_close, - .reset = NULL, - .available = et4000w32p_imascan_vlb_available, - .speed_changed = et4000w32p_speed_changed, - .force_redraw = et4000w32p_force_redraw, - .config = et4000w32p_config -}; - -const device_t et4000w32p_mirovideo20td_vlb_device = { - .name = "Tseng Labs ET4000/w32p VLB (miroVIDEO 20TD LIVE!)", - .internal_name = "et4000w32p_mirovideo20td_vlb", - .flags = DEVICE_VLB, - .local = ET4000W32P_MIROVIDEO20TD_VLB, - .init = et4000w32p_init, - .close = et4000w32p_close, - .reset = NULL, - .available = et4000w32p_mirovideo20td_vlb_available, - .speed_changed = et4000w32p_speed_changed, - .force_redraw = et4000w32p_force_redraw, - .config = et4000w32p_config -}; - const device_t et4000w32p_videomagic_revb_vlb_device = { .name = "Tseng Labs ET4000/w32p Rev. B VLB (VideoMagic)", .internal_name = "et4000w32p_videomagic_revb_vlb", @@ -3165,20 +3073,6 @@ const device_t et4000w32p_revc_pci_device = { .config = et4000w32p_config }; -const device_t et4000w32p_revcd_onboard_pci_device = { - .name = "Tseng Labs ET4000/w32p Rev. C/D PCI (On-Board)", - .internal_name = "et4000w32p_revc_pci", - .flags = DEVICE_PCI, - .local = ET4000W32P_REVCD_ONBOARD, - .init = et4000w32p_init, - .close = et4000w32p_close, - .reset = NULL, - .available = et4000w32p_revcd_onboard_available, - .speed_changed = et4000w32p_speed_changed, - .force_redraw = et4000w32p_force_redraw, - .config = et4000w32p_config -}; - const device_t et4000w32p_noncardex_vlb_device = { .name = "Tseng Labs ET4000/w32p Rev. D VLB", .internal_name = "et4000w32p_nc_vlb",