From bd83fe26feb0a1007ea9b9b4539510ea6154d963 Mon Sep 17 00:00:00 2001
From: Panagiotis <58827426+tiseno100@users.noreply.github.com>
Date: Mon, 19 Oct 2020 10:45:50 +0300
Subject: [PATCH] Implemented Intel 82235 memory remapping capabilities

---
 src/chipset/intel_82335.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/chipset/intel_82335.c b/src/chipset/intel_82335.c
index f8b145bb8..07d84f8c5 100644
--- a/src/chipset/intel_82335.c
+++ b/src/chipset/intel_82335.c
@@ -53,6 +53,10 @@
 /* Lock status */
 #define LOCK_STATUS (dev->regs[0x22] & (0x80 << 8))
 
+/* Define Memory Remap Sizes */
+#define DEFINE_RC1_REMAP_SIZE ((dev->regs[0x24] & 0x02) ? 128 : 256)
+#define DEFINE_RC2_REMAP_SIZE ((dev->regs[0x26] & 0x02) ? 128 : 256)
+
 typedef struct
 {
 
@@ -83,7 +87,7 @@ static void
 intel_82335_write(uint16_t addr, uint16_t val, void *priv)
 {
     intel_82335_t *dev = (intel_82335_t *) priv;
-    uint32_t romsize = 0, base = 0, i = 0;
+    uint32_t romsize = 0, base = 0, i = 0, rc1_remap = 0, rc2_remap = 0;
 
     dev->regs[addr] = val;
 
@@ -115,6 +119,13 @@ intel_82335_write(uint16_t addr, uint16_t val, void *priv)
     /* System ROM shadow */
     mem_set_mem_state_both(0xe0000, 0x20000, (dev->regs[0x22] & 0x01) ? ENABLED_SHADOW : DISABLED_SHADOW);
     }
+    break;
+
+    case 0x24: /* Roll Compare (Just top remapping. Not followed according to datasheet!) */
+    case 0x26:
+    rc1_remap = (dev->regs[0x24] & 0x01) ? DEFINE_RC1_REMAP_SIZE : 0;
+    rc2_remap = (dev->regs[0x26] & 0x01) ? DEFINE_RC2_REMAP_SIZE : 0;
+    mem_remap_top(rc1_remap+rc2_remap);
     break;
 
 	case 0x2e: /* Extended Granularity (Enabled if Bit 0 in Register 2Ch is set) */