diff --git a/src/cpu/x86_ops_mov_ctrl.h b/src/cpu/x86_ops_mov_ctrl.h
index f4241feb1..b4f0c498a 100644
--- a/src/cpu/x86_ops_mov_ctrl.h
+++ b/src/cpu/x86_ops_mov_ctrl.h
@@ -184,7 +184,7 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
     fetch_ea_16(fetchdat);
     switch (cpu_reg) {
         case 0:
-            if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001)
+            if ((cpu_state.regs[cpu_rm].l ^ cr0) & (0x00000001 | WP_FLAG))
                 flushmmucache();
             else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) {
                 if (is_p6 || cpu_use_dynarec)
@@ -222,7 +222,7 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
             break;
         case 4:
             if (cpu_has_feature(CPU_FEATURE_CR4)) {
-                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PAE | CR4_PGE))
+                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PSE | CR4_PAE | CR4_PGE))
                     flushmmucache();
                 cr4 = cpu_state.regs[cpu_rm].l & cpu_CR4_mask;
                 break;
@@ -249,7 +249,7 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
     fetch_ea_32(fetchdat);
     switch (cpu_reg) {
         case 0:
-            if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001)
+            if ((cpu_state.regs[cpu_rm].l ^ cr0) & (0x00000001 | WP_FLAG))
                 flushmmucache();
             else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) {
                 if (is_p6 || cpu_use_dynarec)
@@ -287,7 +287,7 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
             break;
         case 4:
             if (cpu_has_feature(CPU_FEATURE_CR4)) {
-                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PAE | CR4_PGE))
+                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PSE | CR4_PAE | CR4_PGE))
                     flushmmucache();
                 cr4 = cpu_state.regs[cpu_rm].l & cpu_CR4_mask;
                 break;
diff --git a/src/cpu/x86_ops_mov_ctrl_2386.h b/src/cpu/x86_ops_mov_ctrl_2386.h
index 03a18caa7..13e08a145 100644
--- a/src/cpu/x86_ops_mov_ctrl_2386.h
+++ b/src/cpu/x86_ops_mov_ctrl_2386.h
@@ -180,7 +180,7 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
     fetch_ea_16(fetchdat);
     switch (cpu_reg) {
         case 0:
-            if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001)
+            if ((cpu_state.regs[cpu_rm].l ^ cr0) & (0x00000001 | WP_FLAG))
                 flushmmucache();
             else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) {
                 flushmmucache_nopc();
@@ -214,7 +214,7 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
             break;
         case 4:
             if (cpu_has_feature(CPU_FEATURE_CR4)) {
-                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PAE | CR4_PGE))
+                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PSE | CR4_PAE | CR4_PGE))
                     flushmmucache();
                 cr4 = cpu_state.regs[cpu_rm].l & cpu_CR4_mask;
                 break;
@@ -241,7 +241,7 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
     fetch_ea_32(fetchdat);
     switch (cpu_reg) {
         case 0:
-            if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001)
+            if ((cpu_state.regs[cpu_rm].l ^ cr0) & (0x00000001 | WP_FLAG))
                 flushmmucache();
             else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) {
                 flushmmucache_nopc();
@@ -275,7 +275,7 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
             break;
         case 4:
             if (cpu_has_feature(CPU_FEATURE_CR4)) {
-                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PAE | CR4_PGE))
+                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PSE | CR4_PAE | CR4_PGE))
                     flushmmucache();
                 cr4 = cpu_state.regs[cpu_rm].l & cpu_CR4_mask;
                 break;