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Implemented PIC IRQ latch and delay (per the datasheet), IBM PCjr now works without a workaround delay in cpu/808x.c which was therefore removed; also redid memory and I/O accesses in cpu/808x.c to fix word writes on 8086.

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This commit is contained in:
OBattler
2020-11-17 00:25:28 +01:00
parent 31c697e2a0
commit bf4b5b781f
4 changed files with 146 additions and 77 deletions
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45
src/mem/mem.c
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@@ -674,6 +674,27 @@ read_mem_b(uint32_t addr)
}
uint16_t
read_mem_w(uint32_t addr)
{
mem_mapping_t *map;
mem_logical_addr = addr;
if (addr & 1)
return read_mem_b(addr) | (read_mem_b(addr + 1) << 8);
map = read_mapping[addr >> MEM_GRANULARITY_BITS];
if (map && map->read_w)
return map->read_w(addr, map->p);
if (map && map->read_b)
return map->read_b(addr, map->p) | (map->read_b(addr + 1, map->p) << 8);
return 0xffff;
}
void
write_mem_b(uint32_t addr, uint8_t val)
{
@@ -686,6 +707,30 @@ write_mem_b(uint32_t addr, uint8_t val)
}
void
write_mem_w(uint32_t addr, uint16_t val)
{
mem_mapping_t *map;
mem_logical_addr = addr;
if (addr & 1) {
write_mem_b(addr, val);
write_mem_b(addr + 1, val >> 8);
return;
}
map = write_mapping[addr >> MEM_GRANULARITY_BITS];
if (map) {
if (map->write_w)
map->write_w(addr, val, map->p);
else if (map->write_b) {
map->write_b(addr, val, map->p);
map->write_b(addr + 1, val >> 8, map->p);
}
}
}
uint8_t
readmembl(uint32_t addr)
{