Fixed some bugs in cdrom.c;
Fixed (hopefully) pass through in the Windows CD-ROM IOCtl code; Fixed the legacy I/O address handling on the BT-958D, now it behaves correctly - legacy I/O address disabled by default, can be enabled in AutoSCSI (removed the setting from the device config struct); The BT-958D PCI-configured I/O space now correctly gets 32 ports and not 4.
This commit is contained in:
@@ -2569,8 +2569,8 @@ cdrom_readtoc_fallback:
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case GPCMD_READ_HEADER:
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case GPCMD_READ_HEADER:
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SCSIPhase = SCSI_PHASE_DATA_IN;
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SCSIPhase = SCSI_PHASE_DATA_IN;
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alloc_length = ((cdb[7] << 8) | cdb[8]) << 3;
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alloc_length = ((cdb[7] << 8) | cdb[8]);
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cdrom_buf_alloc(id, 65536);
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cdrom_buf_alloc(id, 8);
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if (cdrom_drives[id].handler->pass_through)
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if (cdrom_drives[id].handler->pass_through)
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{
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{
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@@ -2582,7 +2582,7 @@ cdrom_readtoc_fallback:
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}
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}
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else
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else
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{
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{
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cdrom[id].sector_len = (cdb[7] << 8) | cdb[8];
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cdrom[id].sector_len = 1;
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cdrom[id].sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4]<<8) | cdb[5];
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cdrom[id].sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4]<<8) | cdb[5];
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if (msf)
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if (msf)
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{
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{
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@@ -10,7 +10,7 @@
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* made by Adaptec, Inc. These controllers were designed for
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* made by Adaptec, Inc. These controllers were designed for
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* the ISA bus.
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* the ISA bus.
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*
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*
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* Version: @(#)scsi_aha154x.c 1.0.32 2017/10/22
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* Version: @(#)scsi_aha154x.c 1.0.33 2017/10/22
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*
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*
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* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
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* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
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* Original Buslogic version by SA1988 and Miran Grca.
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* Original Buslogic version by SA1988 and Miran Grca.
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@@ -500,7 +500,7 @@ aha_mca_write(int port, uint8_t val, void *priv)
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dev->pos_regs[port & 7] = val;
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dev->pos_regs[port & 7] = val;
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/* This is always necessary so that the old handler doesn't remain. */
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/* This is always necessary so that the old handler doesn't remain. */
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x54x_io_remove(dev, dev->Base);
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x54x_io_remove(dev, dev->Base, 4);
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/* Get the new assigned I/O base address. */
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/* Get the new assigned I/O base address. */
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dev->Base = (dev->pos_regs[3] & 7) << 8;
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dev->Base = (dev->pos_regs[3] & 7) << 8;
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@@ -569,7 +569,7 @@ aha_mca_write(int port, uint8_t val, void *priv)
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/* Initialize the device if fully configured. */
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/* Initialize the device if fully configured. */
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if (dev->pos_regs[2] & 0x01) {
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if (dev->pos_regs[2] & 0x01) {
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/* Card enabled; register (new) I/O handler. */
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/* Card enabled; register (new) I/O handler. */
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x54x_io_set(dev, dev->Base);
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x54x_io_set(dev, dev->Base, 4);
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/* Reset the device. */
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/* Reset the device. */
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x54x_reset_ctrl(dev, CTRL_HRST);
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x54x_reset_ctrl(dev, CTRL_HRST);
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@@ -858,7 +858,7 @@ aha_init(device_t *info)
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if (!(dev->bus & DEVICE_MCA)) {
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if (!(dev->bus & DEVICE_MCA)) {
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/* Register our address space. */
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/* Register our address space. */
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x54x_io_set(dev, dev->Base);
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x54x_io_set(dev, dev->Base, 4);
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/* Enable the memory. */
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/* Enable the memory. */
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if (dev->rom_addr != 0x000000) {
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if (dev->rom_addr != 0x000000) {
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@@ -11,7 +11,7 @@
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* 1 - BT-545S ISA;
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* 1 - BT-545S ISA;
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* 2 - BT-958D PCI
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* 2 - BT-958D PCI
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*
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*
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* Version: @(#)scsi_buslogic.c 1.0.25 2017/10/22
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* Version: @(#)scsi_buslogic.c 1.0.26 2017/10/22
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*
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*
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* Authors: TheCollector1995, <mariogplayer@gmail.com>
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* Authors: TheCollector1995, <mariogplayer@gmail.com>
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* Miran Grca, <mgrca8@gmail.com>
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* Miran Grca, <mgrca8@gmail.com>
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@@ -292,6 +292,8 @@ BuslogicAutoSCSIRamSetDefaults(x54x_t *dev, uint8_t safe)
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HALR->structured.autoSCSIData.cbInformation = 64;
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HALR->structured.autoSCSIData.cbInformation = 64;
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HALR->structured.autoSCSIData.uReserved1 = 6;
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HALR->structured.autoSCSIData.aHostAdaptertype[0] = ' ';
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HALR->structured.autoSCSIData.aHostAdaptertype[0] = ' ';
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HALR->structured.autoSCSIData.aHostAdaptertype[5] = ' ';
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HALR->structured.autoSCSIData.aHostAdaptertype[5] = ' ';
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switch (bl->chip) {
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switch (bl->chip) {
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@@ -385,6 +387,8 @@ BuslogicAutoSCSIRamSetDefaults(x54x_t *dev, uint8_t safe)
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HALR->structured.autoSCSIData.fCDROMBoot = safe ? 0 : 1;
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HALR->structured.autoSCSIData.fCDROMBoot = safe ? 0 : 1;
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HALR->structured.autoSCSIData.fMultiBoot = safe ? 0 : 1;
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HALR->structured.autoSCSIData.fMultiBoot = safe ? 0 : 1;
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HALR->structured.autoSCSIData.fAggressiveRoundRobinMode = safe ? 0 : 1; /* 1 = aggressive, 0 = strict */
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HALR->structured.autoSCSIData.fAggressiveRoundRobinMode = safe ? 0 : 1; /* 1 = aggressive, 0 = strict */
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HALR->structured.autoSCSIData.uHostAdapterIoPortAddress = 2; /* 0 = primary (330h), 1 = secondary (334h), 2 = disable, 3 = reserved */
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}
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}
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@@ -392,6 +396,8 @@ static void
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BuslogicInitializeAutoSCSIRam(x54x_t *dev)
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BuslogicInitializeAutoSCSIRam(x54x_t *dev)
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{
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{
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buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data;
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buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data;
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HALocalRAM *HALR = &bl->LocalRAM;
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FILE *f;
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FILE *f;
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f = nvr_fopen(BuslogicGetNVRFileName(bl), L"rb");
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f = nvr_fopen(BuslogicGetNVRFileName(bl), L"rb");
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@@ -400,6 +406,21 @@ BuslogicInitializeAutoSCSIRam(x54x_t *dev)
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fread(&(bl->LocalRAM.structured.autoSCSIData), 1, 64, f);
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fread(&(bl->LocalRAM.structured.autoSCSIData), 1, 64, f);
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fclose(f);
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fclose(f);
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f = NULL;
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f = NULL;
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if (bl->chip == CHIP_BUSLOGIC_PCI) {
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x54x_io_remove(dev, dev->Base, 4);
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switch(HALR->structured.autoSCSIData.uHostAdapterIoPortAddress) {
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case 0:
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dev->Base = 0x330;
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break;
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case 1:
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dev->Base = 0x334;
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break;
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default:
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dev->Base = 0;
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break;
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}
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x54x_io_set(dev, dev->Base, 4);
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}
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}
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}
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else
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else
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{
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{
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@@ -648,6 +669,8 @@ buslogic_cmds(void *p)
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x54x_t *dev = (x54x_t *)p;
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x54x_t *dev = (x54x_t *)p;
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buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data;
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buslogic_data_t *bl = (buslogic_data_t *) dev->ven_data;
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HALocalRAM *HALR = &bl->LocalRAM;
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FILE *f;
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FILE *f;
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uint16_t TargetsPresentMask = 0;
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uint16_t TargetsPresentMask = 0;
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uint8_t Offset;
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uint8_t Offset;
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@@ -759,7 +782,7 @@ buslogic_cmds(void *p)
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ReplyPI->IsaIOPort = 5;
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ReplyPI->IsaIOPort = 5;
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break;
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break;
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default:
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default:
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ReplyPI->IsaIOPort = 0xFF;
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ReplyPI->IsaIOPort = 6;
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break;
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break;
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}
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}
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ReplyPI->IRQ = dev->Irq;
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ReplyPI->IRQ = dev->Irq;
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@@ -874,6 +897,22 @@ buslogic_cmds(void *p)
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dev->Status |= STAT_INVCMD;
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dev->Status |= STAT_INVCMD;
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break;
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break;
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}
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}
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if ((bl->chip == CHIP_BUSLOGIC_PCI) && !(dev->Status & STAT_INVCMD)) {
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x54x_io_remove(dev, dev->Base, 4);
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switch(HALR->structured.autoSCSIData.uHostAdapterIoPortAddress) {
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case 0:
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dev->Base = 0x330;
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break;
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case 1:
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dev->Base = 0x334;
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break;
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default:
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dev->Base = 0;
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break;
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}
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x54x_io_set(dev, dev->Base, 4);
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}
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break;
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break;
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case 0x94:
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case 0x94:
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if ((bl->chip == CHIP_BUSLOGIC_ISA_542) || (bl->chip == CHIP_BUSLOGIC_MCA)) {
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if ((bl->chip == CHIP_BUSLOGIC_ISA_542) || (bl->chip == CHIP_BUSLOGIC_MCA)) {
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@@ -897,10 +936,10 @@ buslogic_cmds(void *p)
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case 0x95:
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case 0x95:
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if (bl->chip == CHIP_BUSLOGIC_PCI) {
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if (bl->chip == CHIP_BUSLOGIC_PCI) {
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if (dev->Base != 0)
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if (dev->Base != 0)
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x54x_io_remove(dev, dev->Base);
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x54x_io_remove(dev, dev->Base, 4);
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if (dev->CmdBuf[0] < 6) {
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if (dev->CmdBuf[0] < 6) {
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dev->Base = ((3 - (dev->CmdBuf[0] >> 1)) << 8) | ((dev->CmdBuf[0] & 1) ? 0x34 : 0x30);
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dev->Base = ((3 - (dev->CmdBuf[0] >> 1)) << 8) | ((dev->CmdBuf[0] & 1) ? 0x34 : 0x30);
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x54x_io_set(dev, dev->Base);
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x54x_io_set(dev, dev->Base, 4);
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} else
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} else
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dev->Base = 0;
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dev->Base = 0;
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dev->DataReplyLeft = 0;
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dev->DataReplyLeft = 0;
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@@ -1168,9 +1207,9 @@ BuslogicPCIWrite(int func, int addr, uint8_t val, void *p)
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case 0x04:
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case 0x04:
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valxor = (val & 0x27) ^ buslogic_pci_regs[addr];
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valxor = (val & 0x27) ^ buslogic_pci_regs[addr];
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if (valxor & PCI_COMMAND_IO) {
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if (valxor & PCI_COMMAND_IO) {
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x54x_io_remove(dev, bl->PCIBase);
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x54x_io_remove(dev, bl->PCIBase, 32);
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if ((bl->PCIBase != 0) && (val & PCI_COMMAND_IO)) {
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if ((bl->PCIBase != 0) && (val & PCI_COMMAND_IO)) {
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x54x_io_set(dev, bl->PCIBase);
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x54x_io_set(dev, bl->PCIBase, 32);
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}
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}
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}
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}
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if (valxor & PCI_COMMAND_MEM) {
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if (valxor & PCI_COMMAND_MEM) {
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@@ -1189,7 +1228,7 @@ BuslogicPCIWrite(int func, int addr, uint8_t val, void *p)
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case 0x11: case 0x12: case 0x13:
|
case 0x11: case 0x12: case 0x13:
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/* I/O Base set. */
|
/* I/O Base set. */
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/* First, remove the old I/O. */
|
/* First, remove the old I/O. */
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x54x_io_remove(dev, bl->PCIBase);
|
x54x_io_remove(dev, bl->PCIBase, 32);
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/* Then let's set the PCI regs. */
|
/* Then let's set the PCI regs. */
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buslogic_pci_bar[0].addr_regs[addr & 3] = val;
|
buslogic_pci_bar[0].addr_regs[addr & 3] = val;
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/* Then let's calculate the new I/O base. */
|
/* Then let's calculate the new I/O base. */
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||||||
@@ -1199,7 +1238,7 @@ BuslogicPCIWrite(int func, int addr, uint8_t val, void *p)
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/* We're done, so get out of the here. */
|
/* We're done, so get out of the here. */
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||||||
if (buslogic_pci_regs[4] & PCI_COMMAND_IO) {
|
if (buslogic_pci_regs[4] & PCI_COMMAND_IO) {
|
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if (bl->PCIBase != 0) {
|
if (bl->PCIBase != 0) {
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x54x_io_set(dev, bl->PCIBase);
|
x54x_io_set(dev, bl->PCIBase, 32);
|
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}
|
}
|
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}
|
}
|
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return;
|
return;
|
||||||
@@ -1292,7 +1331,7 @@ buslogic_mca_write(int port, uint8_t val, void *priv)
|
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dev->pos_regs[port & 7] = val;
|
dev->pos_regs[port & 7] = val;
|
||||||
|
|
||||||
/* This is always necessary so that the old handler doesn't remain. */
|
/* This is always necessary so that the old handler doesn't remain. */
|
||||||
x54x_io_remove(dev, dev->Base);
|
x54x_io_remove(dev, dev->Base, 4);
|
||||||
|
|
||||||
/* Get the new assigned I/O base address. */
|
/* Get the new assigned I/O base address. */
|
||||||
if (dev->pos_regs[3]) {
|
if (dev->pos_regs[3]) {
|
||||||
@@ -1383,7 +1422,7 @@ buslogic_mca_write(int port, uint8_t val, void *priv)
|
|||||||
/* Initialize the device if fully configured. */
|
/* Initialize the device if fully configured. */
|
||||||
if (dev->pos_regs[2] & 0x01) {
|
if (dev->pos_regs[2] & 0x01) {
|
||||||
/* Card enabled; register (new) I/O handler. */
|
/* Card enabled; register (new) I/O handler. */
|
||||||
x54x_io_set(dev, dev->Base);
|
x54x_io_set(dev, dev->Base, 4);
|
||||||
|
|
||||||
/* Reset the device. */
|
/* Reset the device. */
|
||||||
x54x_reset_ctrl(dev, CTRL_HRST);
|
x54x_reset_ctrl(dev, CTRL_HRST);
|
||||||
@@ -1436,11 +1475,14 @@ buslogic_init(device_t *info)
|
|||||||
bl = (buslogic_data_t *) dev->ven_data;
|
bl = (buslogic_data_t *) dev->ven_data;
|
||||||
|
|
||||||
dev->bus = info->flags;
|
dev->bus = info->flags;
|
||||||
|
if (!(info->flags & DEVICE_MCA) && !(info->flags & DEVICE_PCI)) {
|
||||||
dev->Base = device_get_config_hex16("base");
|
dev->Base = device_get_config_hex16("base");
|
||||||
if ((info->flags != DEVICE_MCA) && (info->flags != DEVICE_PCI)) {
|
|
||||||
dev->Irq = device_get_config_int("irq");
|
dev->Irq = device_get_config_int("irq");
|
||||||
dev->DmaChannel = device_get_config_int("dma");
|
dev->DmaChannel = device_get_config_int("dma");
|
||||||
}
|
}
|
||||||
|
else if (info->flags & DEVICE_PCI) {
|
||||||
|
dev->Base = 0;
|
||||||
|
}
|
||||||
dev->HostID = 7; /* default HA ID */
|
dev->HostID = 7; /* default HA ID */
|
||||||
dev->setup_info_len = sizeof(buslogic_setup_t);
|
dev->setup_info_len = sizeof(buslogic_setup_t);
|
||||||
dev->max_id = 7;
|
dev->max_id = 7;
|
||||||
@@ -1542,8 +1584,8 @@ buslogic_init(device_t *info)
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((dev->Base != 0) && !(dev->bus & DEVICE_MCA)) {
|
if ((dev->Base != 0) && !(dev->bus & DEVICE_MCA) && !(dev->bus & DEVICE_PCI)) {
|
||||||
x54x_io_set(dev, dev->Base);
|
x54x_io_set(dev, dev->Base, 4);
|
||||||
}
|
}
|
||||||
|
|
||||||
memset(bl->AutoSCSIROM, 0xff, 32768);
|
memset(bl->AutoSCSIROM, 0xff, 32768);
|
||||||
@@ -1713,35 +1755,6 @@ static device_config_t BT_ISA_Config[] = {
|
|||||||
|
|
||||||
|
|
||||||
static device_config_t BT958D_Config[] = {
|
static device_config_t BT958D_Config[] = {
|
||||||
{
|
|
||||||
"base", "Legacy Address", CONFIG_HEX16, "", 0x334,
|
|
||||||
{
|
|
||||||
{
|
|
||||||
"None", 0
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"0x330", 0x330
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"0x334", 0x334
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"0x230", 0x230
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"0x234", 0x234
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"0x130", 0x130
|
|
||||||
},
|
|
||||||
{
|
|
||||||
"0x134", 0x134
|
|
||||||
},
|
|
||||||
{
|
|
||||||
""
|
|
||||||
}
|
|
||||||
},
|
|
||||||
},
|
|
||||||
{
|
{
|
||||||
"bios", "Enable BIOS", CONFIG_BINARY, "", 0
|
"bios", "Enable BIOS", CONFIG_BINARY, "", 0
|
||||||
},
|
},
|
||||||
|
|||||||
@@ -11,7 +11,7 @@
|
|||||||
* series of SCSI Host Adapters made by Mylex.
|
* series of SCSI Host Adapters made by Mylex.
|
||||||
* These controllers were designed for various buses.
|
* These controllers were designed for various buses.
|
||||||
*
|
*
|
||||||
* Version: @(#)scsi_x54x.c 1.0.3 2017/10/19
|
* Version: @(#)scsi_x54x.c 1.0.4 2017/10/22
|
||||||
*
|
*
|
||||||
* Authors: TheCollector1995, <mariogplayer@gmail.com>
|
* Authors: TheCollector1995, <mariogplayer@gmail.com>
|
||||||
* Miran Grca, <mgrca8@gmail.com>
|
* Miran Grca, <mgrca8@gmail.com>
|
||||||
@@ -1861,7 +1861,7 @@ x54x_writel(uint32_t port, uint32_t val, void *priv)
|
|||||||
|
|
||||||
|
|
||||||
void
|
void
|
||||||
x54x_io_set(x54x_t *dev, uint32_t base)
|
x54x_io_set(x54x_t *dev, uint32_t base, uint8_t len)
|
||||||
{
|
{
|
||||||
int bit32 = 0;
|
int bit32 = 0;
|
||||||
|
|
||||||
@@ -1872,12 +1872,12 @@ x54x_io_set(x54x_t *dev, uint32_t base)
|
|||||||
|
|
||||||
if (bit32) {
|
if (bit32) {
|
||||||
x54x_log("x54x: [PCI] Setting I/O handler at %04X\n", base);
|
x54x_log("x54x: [PCI] Setting I/O handler at %04X\n", base);
|
||||||
io_sethandler(base, 4,
|
io_sethandler(base, len,
|
||||||
x54x_in, x54x_inw, x54x_inl,
|
x54x_in, x54x_inw, x54x_inl,
|
||||||
x54x_out, x54x_outw, x54x_outl, dev);
|
x54x_out, x54x_outw, x54x_outl, dev);
|
||||||
} else {
|
} else {
|
||||||
x54x_log("x54x: [ISA] Setting I/O handler at %04X\n", base);
|
x54x_log("x54x: [ISA] Setting I/O handler at %04X\n", base);
|
||||||
io_sethandler(base, 4,
|
io_sethandler(base, len,
|
||||||
x54x_in, x54x_inw, NULL,
|
x54x_in, x54x_inw, NULL,
|
||||||
x54x_out, x54x_outw, NULL, dev);
|
x54x_out, x54x_outw, NULL, dev);
|
||||||
}
|
}
|
||||||
@@ -1885,7 +1885,7 @@ x54x_io_set(x54x_t *dev, uint32_t base)
|
|||||||
|
|
||||||
|
|
||||||
void
|
void
|
||||||
x54x_io_remove(x54x_t *dev, uint32_t base)
|
x54x_io_remove(x54x_t *dev, uint32_t base, uint8_t len)
|
||||||
{
|
{
|
||||||
int bit32 = 0;
|
int bit32 = 0;
|
||||||
|
|
||||||
@@ -1897,11 +1897,11 @@ x54x_io_remove(x54x_t *dev, uint32_t base)
|
|||||||
x54x_log("x54x: Removing I/O handler at %04X\n", base);
|
x54x_log("x54x: Removing I/O handler at %04X\n", base);
|
||||||
|
|
||||||
if (bit32) {
|
if (bit32) {
|
||||||
io_removehandler(base, 4,
|
io_removehandler(base, len,
|
||||||
x54x_in, x54x_inw, x54x_inl,
|
x54x_in, x54x_inw, x54x_inl,
|
||||||
x54x_out, x54x_outw, x54x_outl, dev);
|
x54x_out, x54x_outw, x54x_outl, dev);
|
||||||
} else {
|
} else {
|
||||||
io_removehandler(base, 4,
|
io_removehandler(base, len,
|
||||||
x54x_in, x54x_inw, NULL,
|
x54x_in, x54x_inw, NULL,
|
||||||
x54x_out, x54x_outw, NULL, dev);
|
x54x_out, x54x_outw, NULL, dev);
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -11,7 +11,7 @@
|
|||||||
* of SCSI Host Adapters made by Mylex.
|
* of SCSI Host Adapters made by Mylex.
|
||||||
* These controllers were designed for various buses.
|
* These controllers were designed for various buses.
|
||||||
*
|
*
|
||||||
* Version: @(#)scsi_x54x.h 1.0.1 2017/10/16
|
* Version: @(#)scsi_x54x.h 1.0.2 2017/10/22
|
||||||
*
|
*
|
||||||
* Authors: TheCollector1995, <mariogplayer@gmail.com>
|
* Authors: TheCollector1995, <mariogplayer@gmail.com>
|
||||||
* Miran Grca, <mgrca8@gmail.com>
|
* Miran Grca, <mgrca8@gmail.com>
|
||||||
@@ -500,8 +500,8 @@ extern void x54x_buf_alloc(uint8_t id, uint8_t lun, int length);
|
|||||||
extern void x54x_buf_free(uint8_t id, uint8_t lun);
|
extern void x54x_buf_free(uint8_t id, uint8_t lun);
|
||||||
extern uint8_t x54x_mbo_process(x54x_t *dev);
|
extern uint8_t x54x_mbo_process(x54x_t *dev);
|
||||||
extern void x54x_wait_for_poll(void);
|
extern void x54x_wait_for_poll(void);
|
||||||
extern void x54x_io_set(x54x_t *dev, uint32_t base);
|
extern void x54x_io_set(x54x_t *dev, uint32_t base, uint8_t len);
|
||||||
extern void x54x_io_remove(x54x_t *dev, uint32_t base);
|
extern void x54x_io_remove(x54x_t *dev, uint32_t base, uint8_t len);
|
||||||
extern void x54x_mem_init(x54x_t *dev, uint32_t addr);
|
extern void x54x_mem_init(x54x_t *dev, uint32_t addr);
|
||||||
extern void x54x_mem_enable(x54x_t *dev);
|
extern void x54x_mem_enable(x54x_t *dev);
|
||||||
extern void x54x_mem_set_addr(x54x_t *dev, uint32_t base);
|
extern void x54x_mem_set_addr(x54x_t *dev, uint32_t base);
|
||||||
|
|||||||
@@ -659,8 +659,8 @@ static int ioctl_get_block_length(uint8_t id, const UCHAR *cdb, int number_of_bl
|
|||||||
{
|
{
|
||||||
switch (cdb[0])
|
switch (cdb[0])
|
||||||
{
|
{
|
||||||
case 0x25:
|
case 0x25: /* READ CAPACITY */
|
||||||
/* READ CAPACITY */
|
case 0x44: /* READ HEADER */
|
||||||
return 8;
|
return 8;
|
||||||
case 0x42: /* READ SUBCHANNEL */
|
case 0x42: /* READ SUBCHANNEL */
|
||||||
case 0x43: /* READ TOC */
|
case 0x43: /* READ TOC */
|
||||||
@@ -668,6 +668,8 @@ static int ioctl_get_block_length(uint8_t id, const UCHAR *cdb, int number_of_bl
|
|||||||
case 0x52: /* READ TRACK INFORMATION */
|
case 0x52: /* READ TRACK INFORMATION */
|
||||||
case 0x5A: /* MODE SENSE (10) */
|
case 0x5A: /* MODE SENSE (10) */
|
||||||
return ((uint16_t) cdb[8]) + (((uint16_t) cdb[7]) << 8);
|
return ((uint16_t) cdb[8]) + (((uint16_t) cdb[7]) << 8);
|
||||||
|
case 0xAD: /* READ DVD STRUCTURE */
|
||||||
|
return (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]);
|
||||||
default:
|
default:
|
||||||
return 65534;
|
return 65534;
|
||||||
}
|
}
|
||||||
@@ -675,8 +677,8 @@ static int ioctl_get_block_length(uint8_t id, const UCHAR *cdb, int number_of_bl
|
|||||||
|
|
||||||
switch (cdb[0])
|
switch (cdb[0])
|
||||||
{
|
{
|
||||||
case 0x25:
|
case 0x25: /* READ CAPACITY */
|
||||||
/* READ CAPACITY */
|
case 0x44: /* READ HEADER */
|
||||||
return 8;
|
return 8;
|
||||||
case 0x42: /* READ SUBCHANNEL */
|
case 0x42: /* READ SUBCHANNEL */
|
||||||
case 0x43: /* READ TOC */
|
case 0x43: /* READ TOC */
|
||||||
@@ -684,6 +686,8 @@ static int ioctl_get_block_length(uint8_t id, const UCHAR *cdb, int number_of_bl
|
|||||||
case 0x52: /* READ TRACK INFORMATION */
|
case 0x52: /* READ TRACK INFORMATION */
|
||||||
case 0x5A: /* MODE SENSE (10) */
|
case 0x5A: /* MODE SENSE (10) */
|
||||||
return ((uint16_t) cdb[8]) + (((uint16_t) cdb[7]) << 8);
|
return ((uint16_t) cdb[8]) + (((uint16_t) cdb[7]) << 8);
|
||||||
|
case 0xAD: /* READ DVD STRUCTURE */
|
||||||
|
return (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]);
|
||||||
case 0x08:
|
case 0x08:
|
||||||
case 0x28:
|
case 0x28:
|
||||||
case 0xa8:
|
case 0xa8:
|
||||||
@@ -967,18 +971,12 @@ static int ioctl_pass_through(uint8_t id, uint8_t *in_cdb, uint8_t *b, uint32_t
|
|||||||
|
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
|
|
||||||
int block_length = 0;
|
|
||||||
|
|
||||||
int temp_block_length = 0;
|
int temp_block_length = 0;
|
||||||
int temp_pos = 0;
|
|
||||||
|
|
||||||
int blocks_at_once = 0;
|
|
||||||
int buffer_pos = 0;
|
int buffer_pos = 0;
|
||||||
|
|
||||||
int transferred_blocks = 0;
|
|
||||||
|
|
||||||
uint32_t temp_len = 0;
|
uint32_t temp_len = 0;
|
||||||
int chunk = 0;
|
|
||||||
|
int i = 0;
|
||||||
|
|
||||||
if (in_cdb[0] == 0x43)
|
if (in_cdb[0] == 0x43)
|
||||||
{
|
{
|
||||||
@@ -990,59 +988,27 @@ static int ioctl_pass_through(uint8_t id, uint8_t *in_cdb, uint8_t *b, uint32_t
|
|||||||
|
|
||||||
memcpy((void *) cdb, in_cdb, 12);
|
memcpy((void *) cdb, in_cdb, 12);
|
||||||
|
|
||||||
|
temp_len = 0;
|
||||||
temp_block_length = ioctl_get_block_length(id, cdb, cdrom[id].requested_blocks, 0);
|
temp_block_length = ioctl_get_block_length(id, cdb, cdrom[id].requested_blocks, 0);
|
||||||
*len = 0;
|
if (temp_block_length != -1) {
|
||||||
if (temp_block_length != -1)
|
cdrom_ioctl[id].actual_requested_blocks = 1;
|
||||||
{
|
if ((cdb[0] == 0x08) || (cdb[0] == 0x28) || (cdb[0] == 0xA8) || (cdb[0] == 0xB9) || (cdb[0] == 0xBE)) {
|
||||||
if (temp_block_length > 65534)
|
|
||||||
{
|
|
||||||
block_length = temp_block_length / cdrom[id].requested_blocks;
|
|
||||||
blocks_at_once = 32768 / block_length;
|
|
||||||
cdrom_ioctl_log("CD-ROM %i: ioctl_pass_through(): Expected transfer length %i is bigger than 65534, splitting the transfer into chunks of %i blocks...\n", id, temp_block_length, blocks_at_once);
|
|
||||||
|
|
||||||
buffer_pos = 0;
|
buffer_pos = 0;
|
||||||
temp_pos = cdrom[id].sector_pos;
|
|
||||||
transferred_blocks = 0;
|
|
||||||
temp_len = 0;
|
temp_len = 0;
|
||||||
|
|
||||||
split_block_read_iterate:
|
for (i = 0; i < cdrom[id].requested_blocks; i++)
|
||||||
chunk = (cdrom[id].requested_blocks - transferred_blocks);
|
|
||||||
if (chunk < blocks_at_once)
|
|
||||||
{
|
{
|
||||||
cdrom_ioctl_log("CD-ROM %i: ioctl_pass_through(): The remaining chunk (%i blocks) is less than a complete split block\n", id, chunk);
|
cdrom_ioctl_log("CD-ROM %i: ioctl_pass_through(): Transferring block...\n", id, cdrom_ioctl[id].actual_requested_blocks);
|
||||||
cdrom_ioctl[id].actual_requested_blocks = chunk;
|
cdrom_update_cdb((uint8_t *) cdb, cdrom[id].sector_pos + i, 1);
|
||||||
|
ret = SCSICommand(id, cdb, b + buffer_pos, &temp_len, 0);
|
||||||
|
buffer_pos += temp_len;
|
||||||
}
|
}
|
||||||
else
|
*len = buffer_pos;
|
||||||
{
|
} else {
|
||||||
cdrom_ioctl_log("CD-ROM %i: ioctl_pass_through(): The remaining chunk (%i blocks) is more or equal than a complete split block\n", id, chunk);
|
|
||||||
cdrom_ioctl[id].actual_requested_blocks = blocks_at_once;
|
|
||||||
}
|
|
||||||
cdrom_ioctl_log("CD-ROM %i: ioctl_pass_through(): Transferring %i blocks...\n", id, cdrom_ioctl[id].actual_requested_blocks);
|
|
||||||
cdrom_update_cdb((uint8_t *) cdb, temp_pos, cdrom_ioctl[id].actual_requested_blocks);
|
|
||||||
ret = SCSICommand(id, cdb, buf + buffer_pos, &temp_len, 0);
|
|
||||||
*len += temp_len;
|
|
||||||
transferred_blocks += cdrom_ioctl[id].actual_requested_blocks;
|
|
||||||
if (ret && (transferred_blocks < cdrom[id].requested_blocks))
|
|
||||||
{
|
|
||||||
/* Return value was successful and there are still more blocks left to transfer. */
|
|
||||||
temp_pos += cdrom_ioctl[id].actual_requested_blocks;
|
|
||||||
buffer_pos += (cdrom_ioctl[id].actual_requested_blocks * block_length);
|
|
||||||
goto split_block_read_iterate;
|
|
||||||
}
|
|
||||||
cdrom_ioctl_log("CD-ROM %i: ioctl_pass_through(): Split transfer done\n", id);
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
cdrom_ioctl_log("CD-ROM %i: ioctl_pass_through(): Expected transfer length %i is smaller than 65534, transferring all at once...\n", id, temp_block_length);
|
cdrom_ioctl_log("CD-ROM %i: ioctl_pass_through(): Expected transfer length %i is smaller than 65534, transferring all at once...\n", id, temp_block_length);
|
||||||
cdrom_ioctl[id].actual_requested_blocks = cdrom[id].requested_blocks;
|
ret = SCSICommand(id, cdb, b, len, 0);
|
||||||
ret = SCSICommand(id, cdb, buf, len, 0);
|
|
||||||
cdrom_ioctl_log("CD-ROM %i: ioctl_pass_through(): Single transfer done\n", id);
|
cdrom_ioctl_log("CD-ROM %i: ioctl_pass_through(): Single transfer done\n", id);
|
||||||
}
|
}
|
||||||
memcpy(b, buf, *len);
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
cdrom_ioctl_log("CD-ROM %i: ioctl_pass_through(): Expected transfer length %i is -1, this indicates an illegal mode\n", id, temp_block_length);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
cdrom_ioctl_log("IOCTL DATA: %02X %02X %02X %02X %02X %02X %02X %02X\n", b[0], b[1], b[2], b[3], b[4], b[5], b[6], b[7]);
|
cdrom_ioctl_log("IOCTL DATA: %02X %02X %02X %02X %02X %02X %02X %02X\n", b[0], b[1], b[2], b[3], b[4], b[5], b[6], b[7]);
|
||||||
|
|||||||
Reference in New Issue
Block a user