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Merge branch 'master' of https://github.com/86Box/86Box

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# Conflicts:
#	src/machine/machine_table.c
#	src/win/Makefile.mingw
This commit is contained in:
RichardG867
2020-07-06 18:47:50 -03:00
parent 11114c97d2 82f2b203c5
commit c1dd844747
13 changed files with 403 additions and 22 deletions
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175
src/chipset/opti283.c Normal file
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@@ -0,0 +1,175 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the OPTi 82C283 chipset.
*
*
*
* Authors: Tiseno100
*
* Copyright 2020 Tiseno100
*
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/keyboard.h>
#include <86box/mem.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/port_92.h>
#include <86box/chipset.h>
typedef struct
{
uint8_t index,
regs[256];
} opti283_t;
static void opti283_shadow_recalc(opti283_t *dev)
{
uint32_t base;
uint32_t shflags, i = 0;
shadowbios = 0;
shadowbios_write = 0;
/* F0000 - FFFFF segmentation */
if(!(dev->regs[0x11] & 0x80)){
shadowbios = 1;
shadowbios_write = 0;
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED);
} else {
shadowbios = 0;
shadowbios_write = 1;
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL);
}
/* C0000 - CFFFF segmentation */
for(i = 4; i < 8; i++){
base = 0xc0000 + ((i-4) << 14);
if((dev->regs[0x13] & (1 << i)) & (dev->regs[0x11] & 0x10)){
shflags = MEM_READ_INTERNAL;
shflags |= (!(dev->regs[0x11] & 0x01)) ? MEM_WRITE_INTERNAL : MEM_WRITE_DISABLED;
mem_set_mem_state_both(base, 0x4000, shflags);
} else {
mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
}
}
/* D0000 - DFFFF segmentation */
for(i = 0; i < 4; i++){
base = 0xd0000 + (i << 14);
if((dev->regs[0x12] & (1 << i)) & (dev->regs[0x11] & 0x20)){
shflags = MEM_READ_INTERNAL;
shflags |= (!(dev->regs[0x11] & 0x02)) ? MEM_WRITE_INTERNAL : MEM_WRITE_DISABLED;
mem_set_mem_state(base, 0x4000, shflags);
} else mem_set_mem_state(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
}
/* E0000 - EFFFF segmentation */
for(i = 4; i < 8; i++){
base = 0xe0000 + ((i-4) << 14);
if((dev->regs[0x12] & (1 << i)) & (dev->regs[0x11] & 0x40)){
shflags = MEM_READ_INTERNAL;
shflags |= (!(dev->regs[0x11] & 0x04)) ? MEM_WRITE_INTERNAL : MEM_WRITE_DISABLED;
mem_set_mem_state(base, 0x4000, shflags);
} else mem_set_mem_state(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
}
}
static void
opti283_write(uint16_t addr, uint8_t val, void *priv)
{
opti283_t *dev = (opti283_t *) priv;
switch (addr) {
case 0x22:
dev->index = val;
break;
case 0x24:
/*pclog("OPTi 283: dev->regs[%02x] = %02x\n", dev->index, val);*/
dev->regs[dev->index] = val;
switch(dev->index){
case 0x10:
cpu_update_waitstates();
case 0x11:
case 0x12:
case 0x13:
opti283_shadow_recalc(dev);
break;
}
break;
}
}
static uint8_t
opti283_read(uint16_t addr, void *priv)
{
uint8_t ret = 0xff;
opti283_t *dev = (opti283_t *) priv;
switch (addr) {
case 0x24:
ret = dev->regs[dev->index];
break;
}
return ret;
}
static void
opti283_close(void *priv)
{
opti283_t *dev = (opti283_t *) priv;
free(dev);
}
static void *
opti283_init(const device_t *info)
{
opti283_t *dev = (opti283_t *) malloc(sizeof(opti283_t));
memset(dev, 0, sizeof(opti283_t));
io_sethandler(0x022, 0x0001, opti283_read, NULL, NULL, opti283_write, NULL, NULL, dev);
io_sethandler(0x024, 0x0001, opti283_read, NULL, NULL, opti283_write, NULL, NULL, dev);
dev->regs[0x10] = 0x3f;
dev->regs[0x11] = 0xf0;
opti283_shadow_recalc(dev);
return dev;
}
const device_t opti283_device = {
"OPTi 82C283",
0,
0,
opti283_init, opti283_close, NULL,
NULL, NULL, NULL,
NULL
};

145
src/chipset/opti291.c Normal file
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@@ -0,0 +1,145 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the OPTi 82C291 chipset.
* Authors: plant/nerd73
*
* Copyright 2020 plant/nerd73.
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/keyboard.h>
#include <86box/mem.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/port_92.h>
#include <86box/chipset.h>
typedef struct
{
uint8_t index,
regs[256];
} opti291_t;
static void opti291_recalc(opti291_t *dev)
{
uint32_t base;
uint32_t i, shflags, write = 0;
for (i = 0; i < 4; i++) {
base = 0xe0000 + (i << 14);
shflags = (dev->regs[0x24] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
shflags |= (dev->regs[0x24] & (1 << (i))) ? write : MEM_WRITE_EXTANY;
write = (dev->regs[0x27] & 0x40) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
mem_set_mem_state(base, 0x4000, shflags);
}
for (i = 0; i < 4; i++) {
base = 0xd0000 + (i << 14);
shflags = (dev->regs[0x25] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
shflags |= (dev->regs[0x25] & (1 << (i))) ? write : MEM_WRITE_EXTANY;
write = (dev->regs[0x27] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
mem_set_mem_state(base, 0x4000, shflags);
}
for (i = 0; i < 4; i++) {
base = 0xc0000 + (i << 14);
shflags = (dev->regs[0x26] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY;
shflags |= (dev->regs[0x26] & (1 << i)) ? write : MEM_WRITE_EXTANY;
write = (dev->regs[0x27] & 0x10) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
mem_set_mem_state(base, 0x4000, shflags);
}
flushmmucache();
}
static void
opti291_write(uint16_t addr, uint8_t val, void *priv)
{
opti291_t *dev = (opti291_t *) priv;
switch (addr) {
case 0x22:
dev->index = val;
break;
case 0x24:
pclog("OPTi 291: dev->regs[%02x] = %02x\n", dev->index, val);
dev->regs[dev->index] = val;
switch(dev->index){
case 0x21:
cpu_update_waitstates();
break;
case 0x24:
case 0x25:
case 0x26:
case 0x27:
opti291_recalc(dev);
break;
}
break;
}
}
static uint8_t
opti291_read(uint16_t addr, void *priv)
{
uint8_t ret = 0xff;
opti291_t *dev = (opti291_t *) priv;
switch (addr) {
case 0x24:
ret = dev->regs[dev->index];
break;
}
return ret;
}
static void
opti291_close(void *priv)
{
opti291_t *dev = (opti291_t *) priv;
free(dev);
}
static void *
opti291_init(const device_t *info)
{
opti291_t *dev = (opti291_t *) malloc(sizeof(opti291_t));
memset(dev, 0, sizeof(opti291_t));
io_sethandler(0x022, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev);
io_sethandler(0x024, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev);
opti291_recalc(dev);
return dev;
}
const device_t opti291_device = {
"OPTi 82C291",
0,
0,
opti291_init, opti291_close, NULL,
NULL, NULL, NULL,
NULL
};

8
src/codegen_new/codegen_backend_x86.c
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@@ -304,12 +304,20 @@ void codegen_backend_init()
block_write_data = NULL;
cpu_state.old_fp_control = 0;
#ifndef _MSC_VER
asm(
"fstcw %0\n"
"stmxcsr %1\n"
: "=m" (cpu_state.old_fp_control2),
"=m" (cpu_state.old_fp_control)
);
#else
__asm
{
fstcw cpu_state.old_fp_control2
stmxcsr cpu_state.old_fp_control
}
#endif
cpu_state.trunc_fp_control = cpu_state.old_fp_control | 0x6000;
}

6
src/cpu/cpu.c
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@@ -369,8 +369,8 @@ cpu_set(void)
is8086 = (cpu_s->cpu_type > CPU_8088);
is286 = (cpu_s->cpu_type >= CPU_286);
is386 = (cpu_s->cpu_type >= CPU_386SX);
israpidcad = (cpu_s->cpu_type == CPU_RAPIDCAD);
isibm486 = (cpu_s->cpu_type == CPU_IBM486SLC) || (cpu_s->cpu_type == CPU_IBM486BL);
israpidcad = (cpu_s->cpu_type == CPU_RAPIDCAD);
isibm486 = (cpu_s->cpu_type == CPU_IBM386SLC) || (cpu_s->cpu_type == CPU_IBM486SLC) || (cpu_s->cpu_type == CPU_IBM486BL);
is486 = (cpu_s->cpu_type >= CPU_i486SX) || (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC || cpu_s->cpu_type == CPU_RAPIDCAD);
is486sx = (cpu_s->cpu_type >= CPU_i486SX) && (cpu_s->cpu_type < CPU_i486SX2);
is486sx2 = (cpu_s->cpu_type >= CPU_i486SX2) && (cpu_s->cpu_type < CPU_i486DX);
@@ -628,6 +628,7 @@ cpu_set(void)
#else
x86_setopcodes(ops_386, ops_ibm486_0f);
#endif
cpu_features = CPU_FEATURE_MSR;
case CPU_386SX:
timing_rr = 2; /*register dest - register src*/
timing_rm = 6; /*register dest - memory src*/
@@ -665,6 +666,7 @@ cpu_set(void)
#else
x86_setopcodes(ops_386, ops_ibm486_0f);
#endif
cpu_features = CPU_FEATURE_MSR;
case CPU_386DX:
if (fpu_type == FPU_287) /*In case we get Deskpro 386 emulation*/
{

4
src/cpu/cpu.h
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@@ -296,10 +296,10 @@ typedef struct {
#ifdef USE_NEW_DYNAREC
uint32_t old_fp_control, new_fp_control;
#if defined i386 || defined __i386 || defined __i386__ || defined _X86_
#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86
uint16_t old_fp_control2, new_fp_control2;
#endif
#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined __amd64__
#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 || defined __amd64__ || defined _M_X64
uint32_t trunc_fp_control;
#endif
#endif

2
src/include/86box/chipset.h
View File

@@ -60,6 +60,8 @@ extern const device_t slc90e66_device;
extern const device_t ioapic_device;
/* OPTi */
extern const device_t opti283_device;
extern const device_t opti291_device;
extern const device_t opti493_device;
extern const device_t opti495_device;
extern const device_t opti802g_device;

4
src/include/86box/machine.h
View File

@@ -240,6 +240,8 @@ extern int machine_at_adi386sx_init(const machine_t *);
extern int machine_at_commodore_sl386sx_init(const machine_t *);
extern int machine_at_wd76c10_init(const machine_t *);
extern int machine_at_awardsx_init(const machine_t *);
#ifdef EMU_DEVICE_H
extern const device_t *at_ama932j_get_device(void);
extern const device_t *at_commodore_sl386sx_get_device(void);
@@ -252,6 +254,8 @@ extern int machine_at_asus386_init(const machine_t *);
extern int machine_at_ecs386_init(const machine_t *);
extern int machine_at_micronics386_init(const machine_t *);
extern int machine_at_rycleopardlx_init(const machine_t *);
extern int machine_at_pb410a_init(const machine_t *);
extern int machine_at_acera1g_init(const machine_t *);

18
src/machine/m_at_286_386sx.c
View File

@@ -515,3 +515,21 @@ machine_at_commodore_sl386sx_init(const machine_t *model)
return ret;
}
int
machine_at_awardsx_init(const machine_t *model)
{
int ret;
ret = bios_load_linear(L"roms/machines/awardsx/Unknown 386SX OPTi291 - Award (original).BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_init(model);
device_add(&opti291_device);
device_add(&fdc_at_device);
return ret;
}

19
src/machine/m_at_386dx_486.c
View File

@@ -102,6 +102,25 @@ machine_at_ecs386_init(const machine_t *model)
return ret;
}
int
machine_at_rycleopardlx_init(const machine_t *model)
{
int ret;
ret = bios_load_linear(L"roms/machines/rycleopardlx/486-RYC-Leopard-LX.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&opti283_device);
device_add(&keyboard_at_ami_device);
device_add(&fdc_at_device);
return ret;
}
int
machine_at_pb410a_init(const machine_t *model)

2
src/machine/machine_table.c
View File

@@ -173,6 +173,7 @@ const machine_t machines[] = {
{ "[SCAT] KMX-C-02", "kmxc02", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512,16384, 512, 127, machine_at_kmxc02_init, NULL },
{ "[Intel 82335] Shuttle 386SX", "shuttle386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_shuttle386sx_init, NULL },
{ "[Intel 82335] ADI 386SX", "adi386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_adi386sx_init, NULL },
{ "[OPTi 291] DTK Award 386SX", "awardsx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_awardsx_init, NULL },
/* 386SX machines which utilize the MCA bus */
{ "[MCA] IBM PS/2 model 55SX", "ibmps2_m55sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"IBM",cpus_IBM486SLC},{"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL },
@@ -197,6 +198,7 @@ const machine_t machines[] = {
{ "[ACC 2168] Packard Bell PB410A", "pb410a", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO, 4, 36, 1, 127, machine_at_pb410a_init, NULL },
/* 486 machines */
{ "[OPTi 283] RYC Leopard LX", "rycleopardlx", MACHINE_TYPE_486, {{"IBM", cpus_IBM486SLC}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 1, 16, 1, 127, machine_at_rycleopardlx_init, NULL },
{ "[OPTi 495] Award 486 clone", "award486", MACHINE_TYPE_486, {{"Intel", cpus_i486S1}, {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_opti495_init, NULL },
{ "[OPTi 495] MR 486 clone", "mr486", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_opti495_mr_init, NULL },
{ "[OPTi 495] Dataexpert SX495 (486)", "ami486", MACHINE_TYPE_486, {{"Intel", cpus_i486S1}, {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_opti495_ami_init, NULL },

23
src/video/vid_cl54xx.c
View File

@@ -702,7 +702,7 @@ gd54xx_in(uint16_t addr, void *p)
case 0x17:
ret = svga->gdcreg[0x17] & ~(7 << 3);
if (svga->crtc[0x27] <= CIRRUS_ID_CLGD5429) {
if (svga->crtc[0x27] == CIRRUS_ID_CLGD5428) {
if ((svga->crtc[0x27] == CIRRUS_ID_CLGD5428) || (svga->crtc[0x27] == CIRRUS_ID_CLGD5426)) {
if (gd54xx->vlb)
ret |= (CL_GD5428_SYSTEM_BUS_VESA << 3);
else if (gd54xx->mca)
@@ -3023,9 +3023,9 @@ static void
#endif
case CIRRUS_ID_CLGD5426:
if (info->local & 0x200) {
if (info->local & 0x200)
romfn = NULL;
} else
else
romfn = BIOS_GD5426_PATH;
break;
@@ -3082,15 +3082,18 @@ static void
vram = 1;
gd54xx->vram_size = 1 << 20;
} else {
if (id >= CIRRUS_ID_CLGD5420)
vram = device_get_config_int("memory");
else
vram = 0;
if (id >= CIRRUS_ID_CLGD5420) {
if ((id == CIRRUS_ID_CLGD5426) && (info->local & 0x200))
vram = 1;
else
vram = device_get_config_int("memory");
} else
vram = 0;
if (vram)
gd54xx->vram_size = vram << 20;
gd54xx->vram_size = vram << 20;
else
gd54xx->vram_size = 1 << 19;
gd54xx->vram_size = 1 << 19;
}
gd54xx->vram_mask = gd54xx->vram_size - 1;
@@ -3556,7 +3559,7 @@ const device_t gd5426_onboard_device =
NULL,
gd54xx_speed_changed,
gd54xx_force_redraw,
gd5428_config
NULL
};
const device_t gd5428_isa_device =

9
src/video/vid_paradise.c
View File

@@ -122,6 +122,7 @@ void paradise_out(uint16_t addr, uint8_t val, void *p)
{
svga->gdcreg[0xe] = val;
paradise_remap(paradise);
svga_recalctimings(svga);
return;
}
break;
@@ -251,9 +252,11 @@ void paradise_recalctimings(svga_t *svga)
if (paradise->type == WD90C30)
svga->interlace = (svga->crtc[0x2d] & 0x20);
svga->lowres = !(svga->gdcreg[0xe] & 0x01);
if (svga->bpp == 8 && !svga->lowres)
if (svga->gdcreg[0xe] & 0x01) {
svga->bpp = 8;
svga->lowres = 0;
svga->render = svga_render_8bpp_highres;
}
}
static void paradise_write(uint32_t addr, uint8_t val, void *p)
@@ -299,7 +302,7 @@ void *paradise_init(const device_t *info, uint32_t memsize)
switch(info->local) {
case PVGA1A:
svga_init(info, &paradise->svga, paradise, memsize, /*256kb*/
NULL,
paradise_recalctimings,
paradise_in, paradise_out,
NULL,
NULL);

2
src/win/Makefile.mingw
View File

@@ -583,7 +583,7 @@ CPUOBJ := cpu.o cpu_table.o \
CHIPSETOBJ := acc2168.o cs8230.o ali1429.o headland.o i82335.o \
intel_420ex.o intel_4x0.o intel_sio.o intel_piix.o ioapic.o \
neat.o opti495.o opti895.o opti5x7.o scamp.o scat.o \
sis_85c310.o sis_85c471.o sis_85c496.o $(STPCOBJ) \
sis_85c310.o sis_85c471.o sis_85c496.o opti283.o opti291.o $(STPCOBJ) \
via_apollo.o via_vpx.o via_vt82c586b.o via_vt82c596b.o wd76c10.o vl82c480.o \
amd640.o