claunia/86Box
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PCI and IRQ rework, pci.c rewritten from ground up, fixes numerous issues such as the bridge being added when the number of normal PCI devices equals the number of normal PCI slots, Windows 95 PCI operation on Intel 430NX, sharing of PCI IRQ's with non-PCI level-triggered devices, having both configuration mechanisms operating at the same time (ALi M1435), etc., and makes the code much more readable.

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This commit is contained in:
OBattler
2023-08-07 03:04:52 +02:00
parent cb24ee27cb
commit c30d5d90b7
66 changed files with 1824 additions and 1643 deletions
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32
src/include/86box/pic.h
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@@ -19,6 +19,13 @@
#ifndef EMU_PIC_H
#define EMU_PIC_H
typedef struct pic_latch {
uint8_t d;
uint8_t e;
uint8_t q;
uint8_t nq;
} pic_latch_t;
typedef struct pic {
uint8_t icw1;
uint8_t icw2;
@@ -38,8 +45,13 @@ typedef struct pic {
uint8_t special_mask_mode;
uint8_t auto_eoi_rotate;
uint8_t interrupt;
uint8_t lines;
uint8_t data_bus;
uint8_t irq_latch;
uint8_t has_slaves;
uint8_t flags;
uint8_t edge_lines;
uint8_t pad;
uint32_t lines[8];
uint32_t at;
struct pic *slaves[8];
} pic_t;
@@ -70,12 +82,22 @@ extern void pic2_init(void);
extern void pic_reset(void);
extern int picint_is_level(int irq);
extern void picint_common(uint16_t num, int level, int set);
extern void picint(uint16_t num);
extern void picintlevel(uint16_t num);
extern void picintc(uint16_t num);
extern void picint_common(uint16_t num, int level, int set, uint8_t *irq_state);
extern int picinterrupt(void);
#define PIC_IRQ_EDGE 0
#define PIC_IRQ_LEVEL 1
#define PIC_SLAVE_PENDING 0x01
#define PIC_FREEZE 0x02
#define PIC_MASTER_CLEAR 0x04
/* Legacy defines. */
#define picint(num) picint_common(num, PIC_IRQ_EDGE, 1, NULL)
#define picintlevel(num, irq_state) picint_common(num, PIC_IRQ_LEVEL, 1, irq_state)
#define picintc(num) picint_common(num, PIC_IRQ_EDGE, 0, NULL)
#define picintclevel(num, irq_state) picint_common(num, PIC_IRQ_LEVEL, 0, irq_state)
extern uint8_t pic_irq_ack(void);
#endif /*EMU_PIC_H*/