PCI and IRQ rework, pci.c rewritten from ground up, fixes numerous issues such as the bridge being added when the number of normal PCI devices equals the number of normal PCI slots, Windows 95 PCI operation on Intel 430NX, sharing of PCI IRQ's with non-PCI level-triggered devices, having both configuration mechanisms operating at the same time (ALi M1435), etc., and makes the code much more readable.

This commit is contained in:
OBattler
2023-08-07 03:04:52 +02:00
parent cb24ee27cb
commit c30d5d90b7
66 changed files with 1824 additions and 1643 deletions

View File

@@ -97,36 +97,45 @@ static uint8_t rtl8019as_pnp_rom[] = {
typedef struct nic_t {
dp8390_t *dp8390;
const char *name;
uint8_t pnp_csnsav;
uint8_t pci_slot;
uint8_t irq_state;
uint8_t pad;
/* RTL8019AS/RTL8029AS registers */
uint8_t config0;
uint8_t config2;
uint8_t config3;
uint8_t _9346cr;
uint8_t pci_regs[PCI_REGSIZE];
uint8_t eeprom[128]; /* for RTL8029AS */
uint8_t maclocal[6]; /* configured MAC (local) address */
/* POS registers, MCA boards only */
uint8_t pos_regs[8];
int board;
int is_pci;
int is_mca;
int is_8bit;
uint32_t base_address;
int base_irq;
int has_bios;
uint32_t base_address;
uint32_t bios_addr;
uint32_t bios_size;
uint32_t bios_mask;
int card; /* PCI card slot */
int has_bios;
int pad;
bar_t pci_bar[2];
uint8_t pci_regs[PCI_REGSIZE];
uint8_t eeprom[128]; /* for RTL8029AS */
rom_t bios_rom;
void *pnp_card;
uint8_t pnp_csnsav;
uint8_t maclocal[6]; /* configured MAC (local) address */
/* RTL8019AS/RTL8029AS registers */
uint8_t config0;
uint8_t config2;
uint8_t config3;
uint8_t _9346cr;
uint32_t pad0;
/* POS registers, MCA boards only */
uint8_t pos_regs[8];
} nic_t;
#ifdef ENABLE_NE2K_LOG
@@ -150,13 +159,13 @@ nelog(int lvl, const char *fmt, ...)
static void
nic_interrupt(void *priv, int set)
{
const nic_t *dev = (nic_t *) priv;
nic_t *dev = (nic_t *) priv;
if (dev->is_pci) {
if (set)
pci_set_irq(dev->card, PCI_INTA);
pci_set_irq(dev->pci_slot, PCI_INTA, &dev->irq_state);
else
pci_clear_irq(dev->card, PCI_INTA);
pci_clear_irq(dev->pci_slot, PCI_INTA, &dev->irq_state);
} else {
if (set)
picint(1 << dev->base_irq);
@@ -1087,8 +1096,7 @@ nic_init(const device_t *info)
mem_mapping_disable(&dev->bios_rom.mapping);
/* Add device to the PCI bus, keep its slot number. */
dev->card = pci_add_card(PCI_ADD_NORMAL,
nic_pci_read, nic_pci_write, dev);
pci_add_card(PCI_ADD_NORMAL, nic_pci_read, nic_pci_write, dev, &dev->pci_slot);
}
/* Initialize the RTL8029 EEPROM. */

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@@ -216,7 +216,8 @@ typedef struct {
uint32_t base_address;
int base_irq;
int dma_channel;
int card; /* PCI card slot */
uint8_t pci_slot; /* PCI card slot */
uint8_t irq_state;
int xmit_pos;
/** Register Address Pointer */
uint32_t u32RAP;
@@ -413,9 +414,9 @@ pcnet_do_irq(nic_t *dev, int issue)
{
if (dev->is_pci) {
if (issue)
pci_set_irq(dev->card, PCI_INTA);
pci_set_irq(dev->pci_slot, PCI_INTA, &dev->irq_state);
else
pci_clear_irq(dev->card, PCI_INTA);
pci_clear_irq(dev->pci_slot, PCI_INTA, &dev->irq_state);
} else {
if (issue)
picint(1 << dev->base_irq);
@@ -2995,8 +2996,7 @@ pcnet_init(const device_t *info)
pcnet_pci_regs[0x04] = 3;
/* Add device to the PCI bus, keep its slot number. */
dev->card = pci_add_card(PCI_ADD_NORMAL,
pcnet_pci_read, pcnet_pci_write, dev);
pci_add_card(PCI_ADD_NORMAL, pcnet_pci_read, pcnet_pci_write, dev, &dev->pci_slot);
} else if (dev->board == DEV_AM79C961) {
dev->dma_channel = -1;