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Reverted the PIT structure to Mainline, fixes NT 4.0;

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THe RTL8029/AS PCI IRQ field is now hardwired, makes it work on chipsets using the PIIX3 chip (mostly boards based on 430VX and 440FX);
Fixed S3 Trio64 rendering in NT 4.0.
This commit is contained in:
OBattler
2016-11-05 07:17:08 +01:00
parent 0e3990aa29
commit c376302ad3
3 changed files with 16 additions and 12 deletions
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12
src/vid_s3.c
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@@ -877,19 +877,19 @@ void s3_out(uint16_t addr, uint8_t val, void *p)
break;
case 0x58:
s3_update_linear_size(s3);
s3->linear_base &= ((s3->linear_size - 1) ^ 0xffffffff);
// s3->linear_base &= ((s3->linear_size - 1) ^ 0xffffffff);
s3_updatemapping(s3);
break;
case 0x59:
s3->linear_base &= 0x00ffffff;
s3->linear_base |= (((uint32_t) val) << 24);
s3->linear_base &= ((s3->linear_size - 1) ^ 0xffffffff);
// s3->linear_base &= ((s3->linear_size - 1) ^ 0xffffffff);
s3_updatemapping(s3);
break;
case 0x5a:
s3->linear_base &= 0xff00ffff;
s3->linear_base |= (((uint32_t) val) << 16);
s3->linear_base &= ((s3->linear_size - 1) ^ 0xffffffff);
// s3->linear_base &= ((s3->linear_size - 1) ^ 0xffffffff);
s3_updatemapping(s3);
break;
@@ -1146,7 +1146,7 @@ void s3_updatemapping(s3_t *s3)
lbase = s3->linear_base;
}
svga->linear_base = lbase;
svga->linear_base = lbase & ((s3->linear_size - 1) ^ 0xffffffff);
if (lbase == 0xa0000)
{
@@ -2181,8 +2181,8 @@ uint8_t s3_pci_read(int func, int addr, void *p)
case 0x10: return 0x00; /*Linear frame buffer address*/
case 0x11: return 0x00;
case 0x12: return (s3->linear_base >> 16) & 0xff;
case 0x13: return (s3->linear_base >> 24) & 0xff;
case 0x12: return ((s3->linear_base & ((s3->linear_size - 1) ^ 0xffffffff)) >> 16) & 0xff;
case 0x13: return ((s3->linear_base & ((s3->linear_size - 1) ^ 0xffffffff)) >> 24) & 0xff;
case 0x30: return s3->pci_regs[0x30] & 0x01; /*BIOS ROM address*/
case 0x31: return 0x00;