From c40aa61be419c6c6ed2365a2c69607964878b95a Mon Sep 17 00:00:00 2001 From: Cacodemon345 Date: Thu, 6 Mar 2025 02:09:23 +0600 Subject: [PATCH] Cyrix 6x86: Correctly initalize ARR3 on reset to avoid some SMM problems --- src/cpu/x86.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/cpu/x86.c b/src/cpu/x86.c index f1f5004d9..97ae19f3a 100644 --- a/src/cpu/x86.c +++ b/src/cpu/x86.c @@ -275,6 +275,8 @@ reset_common(int hard) ccr0 = ccr1 = ccr2 = ccr3 = ccr4 = ccr5 = ccr6 = ccr7 = 0; ccr4 = 0x85; + cyrix.arr[3].base = 0x30000; + cyrix.arr[3].size = 65536; if (hascache) cr0 = 1 << 30;