From c64c5bcbcdf509b55e54c5ac0c06b653c681dccb Mon Sep 17 00:00:00 2001
From: unreal9010 <84349460+unreal9010@users.noreply.github.com>
Date: Sat, 11 Jan 2025 23:04:17 +0100
Subject: [PATCH] Update m_at_slot1.c

---
 src/machine/m_at_slot1.c | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/src/machine/m_at_slot1.c b/src/machine/m_at_slot1.c
index 415998364..a3ff921e3 100644
--- a/src/machine/m_at_slot1.c
+++ b/src/machine/m_at_slot1.c
@@ -359,6 +359,37 @@ machine_at_bf6_init(const machine_t *model)
     return ret;
 }
 
+int
+machine_at_bx6_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/bx6/BX6_EG.BIN",
+                           0x000e0000, 131072, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init_ex(model, 2);
+
+    pci_init(PCI_CONFIG_TYPE_1);
+    pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
+    pci_register_slot(0x09, PCI_CARD_NORMAL,      4, 1, 2, 3);
+    pci_register_slot(0x0B, PCI_CARD_NORMAL,      3, 4, 1, 2);
+    pci_register_slot(0x0D, PCI_CARD_NORMAL,      2, 3, 4, 1);
+    pci_register_slot(0x0F, PCI_CARD_NORMAL,      1, 2, 3, 4);
+    pci_register_slot(0x01, PCI_CARD_AGPBRIDGE,   1, 2, 3, 4);
+    device_add(&i440bx_device);
+    device_add(&piix4e_device);
+    device_add(&keyboard_ps2_pci_device);
+    device_add(&w83977f_device);
+    device_add(&sst_flash_29ee010_device);
+    spd_register(SPD_TYPE_SDRAM, 0xF, 256);
+
+    return ret;
+}
+
 int
 machine_at_ax6bc_init(const machine_t *model)
 {