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Fixed (again) massive OS/2 S3 Trio64 driver spam and MIX + src_dat variable initialized properly + warning gone.

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This commit is contained in:
TC1995
2017-06-17 01:01:40 +02:00
parent 66ff71ca55
commit c68b460b53
1 changed files with 22 additions and 16 deletions
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22
src/VIDEO/vid_s3.c
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@@ -1444,7 +1444,6 @@ uint8_t s3_accel_read(uint32_t addr, void *p)
case 0xf: dest_dat = ~(src_dat | dest_dat); break; \ case 0xf: dest_dat = ~(src_dat | dest_dat); break; \
} }
#define WRITE(addr) if (s3->bpp == 0) \ #define WRITE(addr) if (s3->bpp == 0) \
{ \ { \
svga->vram[(addr) & s3->vram_mask] = dest_dat; \ svga->vram[(addr) & s3->vram_mask] = dest_dat; \
@@ -1660,6 +1659,15 @@ void s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
s3->accel.dest = s3->accel.cy * s3->width; s3->accel.dest = s3->accel.cy * s3->width;
} }
s3->status_9ae9 = 4; /*To avoid the spam from OS/2's drivers*/
if ((s3->accel.cmd & 0x100) && !cpu_input)
{
s3->status_9ae9 = 2; /*To avoid the spam from OS/2's drivers*/
return; /*Wait for data from CPU*/
}
if ((s3->accel.cmd & 0x100) && !cpu_input) return; /*Wait for data from CPU*/ if ((s3->accel.cmd & 0x100) && !cpu_input) return; /*Wait for data from CPU*/
frgd_mix = (s3->accel.frgd_mix >> 5) & 3; frgd_mix = (s3->accel.frgd_mix >> 5) & 3;
@@ -1749,16 +1757,16 @@ void s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3;
if (!cpu_input && frgd_mix == 3 && !vram_mask && !compare_mode && if (!cpu_input && frgd_mix == 3 && !vram_mask && !compare_mode &&
(s3->accel.cmd & 0xa0) == 0xa0 && (s3->accel.frgd_mix & 0xf) == 7) (s3->accel.cmd & 0xa0) == 0xa0 && (s3->accel.frgd_mix & 0xf) == 7 && (s3->accel.bkgd_mix & 0xf) == 7)
{ {
while (1) while (count-- && s3->accel.sy >= 0)
{ {
if (s3->accel.dx >= clip_l && s3->accel.dx <= clip_r && if (s3->accel.dx >= clip_l && s3->accel.dx <= clip_r &&
s3->accel.dy >= clip_t && s3->accel.dy <= clip_b) s3->accel.dy >= clip_t && s3->accel.dy <= clip_b)
{ {
READ(s3->accel.src + s3->accel.cx, src_dat); READ(s3->accel.src + s3->accel.cx, src_dat);
dest_dat = src_dat; dest_dat = src_dat;
WRITE(s3->accel.dest + s3->accel.dx); WRITE(s3->accel.dest + s3->accel.dx);
} }
@@ -1782,8 +1790,6 @@ void s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
if (s3->accel.sy < 0) if (s3->accel.sy < 0)
{ {
s3->accel.cur_x = s3->accel.cx;
s3->accel.cur_y = s3->accel.cy;
return; return;
} }
} }
@@ -1798,8 +1804,8 @@ void s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
{ {
if (vram_mask) if (vram_mask)
{ {
READ(s3->accel.src + s3->accel.cx, mix_dat) READ(s3->accel.src + s3->accel.cx, mix_dat)
mix_dat = mix_dat ? mix_mask : 0; mix_dat = mix_dat ? mix_mask : 0;
} }
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix)
{ {