Added a new machine: IBM PS/55 model 5551-V0,V1
This commit is contained in:
@@ -418,6 +418,50 @@ ps55_model_50t_read(uint16_t port)
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return 0xff;
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}
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static uint8_t
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ps55_model_50v_read(uint16_t port)
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{
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switch (port)
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{
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case 0x100:
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return ps2.planar_id & 0xff;
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case 0x101:
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return ps2.planar_id >> 8;
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case 0x102:
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return ps2.option[0];
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case 0x103:
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uint8_t val = 0xff;
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/*
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I/O 103h - Bit 7-4: Reserved
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Bit 3-0: Memory Card ID (Connector 3 or 1)
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Memory Card ID: 8h = 4 MB Memory Card IV Installed
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Fh = No Card Installed
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*/
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switch (mem_size / 1024)
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{
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case 4:
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if (ps2.option[1] & 0x04) val = 0xff;
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else val = 0xf8;
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break;
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case 8:
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default:
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if (ps2.option[1] & 0x04) val = 0xf8;
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else val = 0xf8;
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break;
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}
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return val;
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case 0x104:
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return ps2.option[2];
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case 0x105:
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return ps2.option[3];
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case 0x106:
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return ps2.subaddr_lo;
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case 0x107:
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return ps2.subaddr_hi;
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}
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return 0xff;
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}
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static void
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model_50_write(uint16_t port, uint8_t val)
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{
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@@ -716,7 +760,7 @@ model_80_write(uint16_t port, uint8_t val)
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}
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static void
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ps55_model_50t_write(uint16_t port, uint8_t val)//pcem55
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ps55_model_50tv_write(uint16_t port, uint8_t val)
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{
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ps2_mca_log(" Write SysBrd %04X %02X %04X:%04X\n", port, val, cs >> 4, cpu_state.pc);
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switch (port)
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@@ -1382,6 +1426,62 @@ mem_encoding_write_cached(uint16_t addr, uint8_t val, UNUSED(void *priv))
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}
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}
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static void
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mem_encoding_write_cached_ps55(uint16_t addr, uint8_t val, UNUSED(void *priv))
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{
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uint8_t old;
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switch (addr) {
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case 0xe0:
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ps2.mem_regs[0] = val;
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break;
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case 0xe1:
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ps2.mem_regs[1] = val;
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break;
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case 0xe2:
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old = ps2.mem_regs[2];
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ps2.mem_regs[2] = (ps2.mem_regs[2] & 0x80) | (val & ~0x88);
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if (val & 2) {
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ps2_mca_log("Clear latch - %i\n", ps2.pending_cache_miss);
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if (ps2.pending_cache_miss)
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ps2.mem_regs[2] |= 0x80;
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else
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ps2.mem_regs[2] &= ~0x80;
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ps2.pending_cache_miss = 0;
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}
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if ((val & 0x21) == 0x20 && (old & 0x21) != 0x20)
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ps2.pending_cache_miss = 1;
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if ((val & 0x21) == 0x01 && (old & 0x21) != 0x01)
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ps2_cache_clean();
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#if 1
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// FIXME: Look into this!!!
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if (val & 0x01)
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ram_mid_mapping.flags |= MEM_MAPPING_ROM_WS;
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else
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ram_mid_mapping.flags &= ~MEM_MAPPING_ROM_WS;
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#endif
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break;
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default:
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break;
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}
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ps2_mca_log("mem_encoding_write: addr=%02x val=%02x %04x:%04x %02x %02x\n", addr, val, CS, cpu_state.pc, ps2.mem_regs[1], ps2.mem_regs[2]);
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mem_encoding_update();
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if ((ps2.mem_regs[1] & 0x10) && (ps2.mem_regs[2] & 0x21) == 0x20) {
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mem_mapping_disable(&ram_low_mapping);
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mem_mapping_enable(&ps2.cache_mapping);
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flushmmucache();
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} else {
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mem_mapping_disable(&ps2.cache_mapping);
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mem_mapping_enable(&ram_low_mapping);
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flushmmucache();
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}
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if (ps2.option[2] & 1) /* reset memstate for E0000 - E0FFFh hole */
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{
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mem_set_mem_state(0xe0000, 0x1000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
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}
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}
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static void
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ps2_mca_board_model_70_type34_init(int is_type4, int slots)
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{
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@@ -1750,7 +1850,7 @@ ps55_mca_board_model_50t_init()
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device_add(&keyboard_ps2_mca_1_device);
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ps2.planar_read = ps55_model_50t_read;
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ps2.planar_write = ps55_model_50t_write;
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ps2.planar_write = ps55_model_50tv_write;
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device_add(&ps2_nvr_device);
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@@ -1790,6 +1890,51 @@ ps55_mca_board_model_50t_init()
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ps2.mb_vga = (vga_t *)device_add(&ps1vga_mca_device);
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}
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void
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ps55_mca_board_model_50v_init()
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{
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ps2_mca_board_common_init();
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//mem_remap_top(256);
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ps2.split_addr = mem_size * 1024;
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/* The slot 5 is reserved for the Integrated Fixed Disk II (an internal ESDI hard drive). */
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mca_init(5);
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device_add(&keyboard_ps2_mca_1_device);
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ps2.planar_read = ps55_model_50v_read;
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ps2.planar_write = ps55_model_50tv_write;
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device_add(&ps2_nvr_device);
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io_sethandler(0x00e0, 0x0002, mem_encoding_read_cached, NULL, NULL, mem_encoding_write_cached_ps55, NULL, NULL, NULL);
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ps2.mem_regs[1] = 2;
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ps2.option[2] &= 0xf2; /* Bit 3-2: -Cache IDs, Bit 1: Reserved
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Bit 0: Disable E0000-E0FFFh (4 KB) */
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mem_mapping_add(&ps2.split_mapping,
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(mem_size + 256) * 1024,
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256 * 1024,
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ps2_read_split_ram,
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ps2_read_split_ramw,
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ps2_read_split_raml,
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ps2_write_split_ram,
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ps2_write_split_ramw,
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ps2_write_split_raml,
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&ram[0xa0000],
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MEM_MAPPING_INTERNAL,
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NULL);
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mem_mapping_disable(&ps2.split_mapping);
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if (mem_size > 8192) {
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/* Only 8 MB supported on planar, create a memory expansion card for the rest */
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ps2_mca_mem_fffc_init(8);
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}
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if (gfxcard[0] == VID_INTERNAL)
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ps2.mb_vga = (vga_t *)device_add(&ps1vga_mca_device);
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}
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int
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machine_ps55_model_50t_init(const machine_t* model)
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{
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@@ -1814,3 +1959,28 @@ machine_ps55_model_50t_init(const machine_t* model)
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return ret;
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}
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int
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machine_ps55_model_50v_init(const machine_t* model)
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{
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int ret;
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ret = bios_load_interleaved("roms/machines/ibmps55_m50v/56F7416.BIN",
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"roms/machines/ibmps55_m50v/56F7417.BIN",
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0x000e0000, 131072, 0);
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if (bios_only || !ret)
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return ret;
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machine_ps2_common_init(model);
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/*
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* Planar ID
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* F1FFh - PS/55 model 5551-V0x, V1x
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* POST (P/N 38F6933) determination: FBxx -> 5 slots (ok), F1xx -> 5 slots (ok), others -> 8 (error)
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*/
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ps2.planar_id = 0xf1ff;
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ps55_mca_board_model_50v_init();
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return ret;
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}
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@@ -5508,6 +5508,46 @@ const machine_t machines[] = {
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.snd_device = NULL,
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.net_device = NULL
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},
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/* Has IBM PS/55 5551-V0x, V1x firmware. */
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{
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.name = "[MCA] IBM PS/55 model 5550-V0",
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.internal_name = "ibmps55_m50v",
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.type = MACHINE_TYPE_386DX,
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.chipset = MACHINE_CHIPSET_PROPRIETARY,
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.init = machine_ps55_model_50v_init,
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.p1_handler = NULL,
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.gpio_handler = NULL,
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.available_flag = MACHINE_AVAILABLE,
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.gpio_acpi_handler = NULL,
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.cpu = {
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.package = CPU_PKG_386DX | CPU_PKG_486BL,
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.block = CPU_BLOCK_NONE,
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.min_bus = 0,
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.max_bus = 0,
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.min_voltage = 0,
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.max_voltage = 0,
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.min_multi = 0,
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.max_multi = 0
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},
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.bus_flags = MACHINE_PS2_MCA,
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.flags = MACHINE_VIDEO | MACHINE_APM,
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.ram = {
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.min = 4096,
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.max = 16384,
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.step = 4096
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},
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.nvrmask = 63,
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.kbc_device = NULL,
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.kbc_p1 = 0xff,
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.gpio = 0xffffffff,
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.gpio_acpi = 0xffffffff,
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.device = NULL,
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.fdc_device = NULL,
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.sio_device = NULL,
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.vid_device = NULL,
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.snd_device = NULL,
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.net_device = NULL
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},
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/* 386DX/486 machines */
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/* Has AMIKey F KBC firmware. */
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