Change to logging - when logging is disabled, the logging functions are now #define'd to nothing, so the compiler ignores the lines that call them completely, seems to slightly speed up the emulator; note that the logging in vid_table.c has not been changed yet, because this file on my local tree currently contains other WIP changes.
This commit is contained in:
@@ -111,13 +111,11 @@ extern int dontprint;
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#ifdef ENABLE_386_LOG
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int x386_do_log = ENABLE_386_LOG;
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#endif
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static void
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x386_log(const char *fmt, ...)
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{
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#ifdef ENABLE_386_LOG
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va_list ap;
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if (x386_do_log) {
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@@ -125,8 +123,10 @@ x386_log(const char *fmt, ...)
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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#endif
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}
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#else
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#define x386_log(fmt, ...)
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#endif
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void exec386(int cycs)
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@@ -73,14 +73,12 @@ uint32_t *mod1seg[8];
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#ifdef ENABLE_386_DYNAREC_LOG
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int x386_dynarec_do_log = ENABLE_386_DYNAREC_LOG;
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#endif
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int x386_dynarec_do_log = ENABLE_386_DYNAREC_LOG;#endif
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void
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x386_dynarec_log(const char *fmt, ...)
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{
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#ifdef ENABLE_386_DYNAREC_LOG
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va_list ap;
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if (x386_dynarec_do_log) {
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@@ -88,8 +86,10 @@ x386_dynarec_log(const char *fmt, ...)
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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#endif
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}
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#else
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#define x86_dynarec_log (fmt, ...)
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#endif
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static __inline void fetch_ea_32_long(uint32_t rmdat)
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@@ -233,7 +233,9 @@ void x86_int(int num)
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cpu_state.abrt = 0;
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softresetx86();
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cpu_set_edx();
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#ifdef ENABLE_386_DYNAREC_LOG
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x386_dynarec_log("Triple fault in real mode - reset\n");
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#endif
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}
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else
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x86_int(8);
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@@ -326,9 +328,21 @@ int x86_int_sw_rm(int num)
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if (cpu_state.abrt) return 1;
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writememw(ss,((SP-2)&0xFFFF),flags); if (cpu_state.abrt) {x386_dynarec_log("abrt5\n"); return 1; }
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writememw(ss,((SP-2)&0xFFFF),flags);
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if (cpu_state.abrt) {
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#ifdef ENABLE_386_DYNAREC_LOG
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x386_dynarec_log("abrt5\n");
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#endif
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return 1;
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}
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writememw(ss,((SP-4)&0xFFFF),CS);
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writememw(ss,((SP-6)&0xFFFF),cpu_state.pc); if (cpu_state.abrt) {x386_dynarec_log("abrt6\n"); return 1; }
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writememw(ss,((SP-6)&0xFFFF),cpu_state.pc);
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if (cpu_state.abrt) {
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#ifdef ENABLE_386_DYNAREC_LOG
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x386_dynarec_log("abrt6\n");
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#endif
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return 1;
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}
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SP-=6;
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eflags &= ~VIF_FLAG;
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@@ -858,14 +872,18 @@ inrecomp=0;
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cpu_state.abrt = 0;
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CS = oldcs;
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cpu_state.pc = cpu_state.oldpc;
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#ifdef ENABLE_386_DYNAREC_LOG
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x386_dynarec_log("Double fault %i\n", ins);
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#endif
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pmodeint(8, 0);
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if (cpu_state.abrt)
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{
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cpu_state.abrt = 0;
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softresetx86();
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cpu_set_edx();
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#ifdef ENABLE_386_DYNAREC_LOG
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x386_dynarec_log("Triple fault - reset\n");
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#endif
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}
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}
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}
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@@ -8,7 +8,7 @@
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*
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* 286/386+ instruction handlers list.
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*
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* Version: @(#)386_ops.h 1.0.4 2018/09/19
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* Version: @(#)386_ops.h 1.0.5 2018/10/17
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*
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* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
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* Sarah Walker, <tommowalker@tommowalker.co.uk>
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@@ -176,7 +176,13 @@ static int internal_illegal(char *s)
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}
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#endif
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#ifdef ENABLE_386_DYNAREC_LOG
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extern void x386_dynarec_log(const char *fmt, ...);
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#else
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#ifndef x386_dynarec_log
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#define x386_dynarec_log(fmt, ...)
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#endif
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#endif
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#include "x86seg.h"
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#if defined(DEV_BRANCH) && defined(USE_AMD_K)
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@@ -18,7 +18,7 @@
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* 2 clocks - fetch opcode 1 2 clocks - execute
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* 2 clocks - fetch opcode 2 etc
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*
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* Version: @(#)808x.c 1.0.6 2018/09/20
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* Version: @(#)808x.c 1.0.7 2018/10/17
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*
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* Authors: Sarah Walker, <tommowalker@tommowalker.co.uk>
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* Miran Grca, <mgrca8@gmail.com>
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@@ -86,13 +86,11 @@ void writememll(uint32_t seg, uint32_t addr, uint32_t val);
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#ifdef ENABLE_808X_LOG
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int x808x_do_log = ENABLE_808X_LOG;
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#endif
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static void
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x808x_log(const char *fmt, ...)
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{
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#ifdef ENABLE_808X_LOG
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va_list ap;
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if (x808x_do_log) {
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@@ -100,8 +98,10 @@ x808x_log(const char *fmt, ...)
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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#endif
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}
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#else
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#define x808x_log(fmt, ...)
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#endif
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#undef readmemb
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@@ -8,7 +8,7 @@
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*
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* AMD SYSCALL and SYSRET CPU Instructions.
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*
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* Version: @(#)x86_ops_amd.h 1.0.3 2018/04/25
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* Version: @(#)x86_ops_amd.h 1.0.4 2018/10/17
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*
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* Author: Miran Grca, <mgrca8@gmail.com>
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* Copyright 2016-2018 Miran Grca.
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@@ -55,7 +55,7 @@ static int opSYSCALL(uint32_t fetchdat)
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{
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if (_cs.seg >= ldt.limit)
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{
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pclog("Bigger than LDT limit %04X %04X CS\n",AMD_SYSCALL_SB,ldt.limit);
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x386_dynarec_log("Bigger than LDT limit %04X %04X CS\n",AMD_SYSCALL_SB,ldt.limit);
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x86gpf(NULL, AMD_SYSCALL_SB & ~3);
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return 1;
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}
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@@ -65,7 +65,7 @@ static int opSYSCALL(uint32_t fetchdat)
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{
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if (_cs.seg >= gdt.limit)
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{
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pclog("Bigger than GDT limit %04X %04X CS\n",AMD_SYSCALL_SB,gdt.limit);
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x386_dynarec_log("Bigger than GDT limit %04X %04X CS\n",AMD_SYSCALL_SB,gdt.limit);
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x86gpf(NULL, AMD_SYSCALL_SB & ~3);
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return 1;
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}
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@@ -133,7 +133,7 @@ static int opSYSRET(uint32_t fetchdat)
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{
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if (_cs.seg >= ldt.limit)
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{
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pclog("Bigger than LDT limit %04X %04X CS\n",AMD_SYSRET_SB,ldt.limit);
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x386_dynarec_log("Bigger than LDT limit %04X %04X CS\n",AMD_SYSRET_SB,ldt.limit);
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x86gpf(NULL, AMD_SYSRET_SB & ~3);
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return 1;
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}
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@@ -143,7 +143,7 @@ static int opSYSRET(uint32_t fetchdat)
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{
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if (_cs.seg >= gdt.limit)
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{
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pclog("Bigger than GDT limit %04X %04X CS\n",AMD_SYSRET_SB,gdt.limit);
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x386_dynarec_log("Bigger than GDT limit %04X %04X CS\n",AMD_SYSRET_SB,gdt.limit);
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x86gpf(NULL, AMD_SYSRET_SB & ~3);
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return 1;
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}
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@@ -171,7 +171,7 @@ static int opBA_w_a16(uint32_t fetchdat)
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break;
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default:
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pclog("Bad 0F BA opcode %02X\n", rmdat & 0x38);
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x386_dynarec_log("Bad 0F BA opcode %02X\n", rmdat & 0x38);
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cpu_state.pc = cpu_state.oldpc;
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x86illegal();
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break;
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@@ -213,7 +213,7 @@ static int opBA_w_a32(uint32_t fetchdat)
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break;
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default:
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pclog("Bad 0F BA opcode %02X\n", rmdat & 0x38);
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x386_dynarec_log("Bad 0F BA opcode %02X\n", rmdat & 0x38);
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cpu_state.pc = cpu_state.oldpc;
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x86illegal();
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break;
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@@ -256,7 +256,7 @@ static int opBA_l_a16(uint32_t fetchdat)
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break;
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default:
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pclog("Bad 0F BA opcode %02X\n", rmdat & 0x38);
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x386_dynarec_log("Bad 0F BA opcode %02X\n", rmdat & 0x38);
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cpu_state.pc = cpu_state.oldpc;
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x86illegal();
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break;
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@@ -298,7 +298,7 @@ static int opBA_l_a32(uint32_t fetchdat)
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break;
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default:
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pclog("Bad 0F BA opcode %02X\n", rmdat & 0x38);
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x386_dynarec_log("Bad 0F BA opcode %02X\n", rmdat & 0x38);
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cpu_state.pc = cpu_state.oldpc;
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x86illegal();
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break;
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@@ -8,7 +8,7 @@
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*
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* x86 i686 (Pentium Pro/Pentium II) CPU Instructions.
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*
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* Version: @(#)x86_ops_i686.h 1.0.4 2018/04/25
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* Version: @(#)x86_ops_i686.h 1.0.5 2018/10/17
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*
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* Author: Miran Grca, <mgrca8@gmail.com>
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* Copyright 2016-2018 Miran Grca.
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@@ -40,18 +40,18 @@ static int opSYSENTER(uint32_t fetchdat)
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uint16_t sysenter_ss_seg_data[4];
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#ifdef SYSENTER_LOG
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pclog("SYSENTER called\n");
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x386_dynarec_log("SYSENTER called\n");
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#endif
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if (!(cr0 & 1)) return internal_illegal("SYSENTER: CPU not in protected mode");
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if (!(cs_msr & 0xFFFC)) return internal_illegal("SYSENTER: CS MSR is zero");
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#ifdef SYSENTER_LOG
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pclog("SYSENTER started:\n");
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pclog("CS (%04X): base=%08X, limit=%08X, access=%02X, seg=%04X, limit_low=%08X, limit_high=%08X, checked=%i\n", CS, _cs.base, _cs.limit, _cs.access, _cs.seg, _cs.limit_low, _cs.limit_high, _cs.checked);
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pclog("SS (%04X): base=%08X, limit=%08X, access=%02X, seg=%04X, limit_low=%08X, limit_high=%08X, checked=%i\n", SS, _ss.base, _ss.limit, _ss.access, _ss.seg, _ss.limit_low, _ss.limit_high, _ss.checked);
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pclog("Model specific registers: cs_msr=%04X, esp_msr=%08X, eip_msr=%08X\n", cs_msr, esp_msr, eip_msr);
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pclog("Other information: eip=%08X esp=%08X eflags=%04X flags=%04X use32=%04X stack32=%i\n", cpu_state.pc, ESP, eflags, flags, use32, stack32);
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x386_dynarec_log("SYSENTER started:\n");
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x386_dynarec_log("CS (%04X): base=%08X, limit=%08X, access=%02X, seg=%04X, limit_low=%08X, limit_high=%08X, checked=%i\n", CS, _cs.base, _cs.limit, _cs.access, _cs.seg, _cs.limit_low, _cs.limit_high, _cs.checked);
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x386_dynarec_log("SS (%04X): base=%08X, limit=%08X, access=%02X, seg=%04X, limit_low=%08X, limit_high=%08X, checked=%i\n", SS, _ss.base, _ss.limit, _ss.access, _ss.seg, _ss.limit_low, _ss.limit_high, _ss.checked);
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x386_dynarec_log("Model specific registers: cs_msr=%04X, esp_msr=%08X, eip_msr=%08X\n", cs_msr, esp_msr, eip_msr);
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x386_dynarec_log("Other information: eip=%08X esp=%08X eflags=%04X flags=%04X use32=%04X stack32=%i\n", cpu_state.pc, ESP, eflags, flags, use32, stack32);
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#endif
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if (cpu_state.abrt) return 1;
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@@ -83,11 +83,11 @@ static int opSYSENTER(uint32_t fetchdat)
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CPU_BLOCK_END();
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#ifdef SYSENTER_LOG
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pclog("SYSENTER completed:\n");
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pclog("CS (%04X): base=%08X, limit=%08X, access=%02X, seg=%04X, limit_low=%08X, limit_high=%08X, checked=%i\n", CS, _cs.base, _cs.limit, _cs.access, _cs.seg, _cs.limit_low, _cs.limit_high, _cs.checked);
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pclog("SS (%04X): base=%08X, limit=%08X, access=%02X, seg=%04X, limit_low=%08X, limit_high=%08X, checked=%i\n", SS, _ss.base, _ss.limit, _ss.access, _ss.seg, _ss.limit_low, _ss.limit_high, _ss.checked);
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pclog("Model specific registers: cs_msr=%04X, esp_msr=%08X, eip_msr=%08X\n", cs_msr, esp_msr, eip_msr);
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pclog("Other information: eip=%08X esp=%08X eflags=%04X flags=%04X use32=%04X stack32=%i\n", cpu_state.pc, ESP, eflags, flags, use32, stack32);
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x386_dynarec_log("SYSENTER completed:\n");
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x386_dynarec_log("CS (%04X): base=%08X, limit=%08X, access=%02X, seg=%04X, limit_low=%08X, limit_high=%08X, checked=%i\n", CS, _cs.base, _cs.limit, _cs.access, _cs.seg, _cs.limit_low, _cs.limit_high, _cs.checked);
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x386_dynarec_log("SS (%04X): base=%08X, limit=%08X, access=%02X, seg=%04X, limit_low=%08X, limit_high=%08X, checked=%i\n", SS, _ss.base, _ss.limit, _ss.access, _ss.seg, _ss.limit_low, _ss.limit_high, _ss.checked);
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x386_dynarec_log("Model specific registers: cs_msr=%04X, esp_msr=%08X, eip_msr=%08X\n", cs_msr, esp_msr, eip_msr);
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x386_dynarec_log("Other information: eip=%08X esp=%08X eflags=%04X flags=%04X use32=%04X stack32=%i\n", cpu_state.pc, ESP, eflags, flags, use32, stack32);
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#endif
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return 0;
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@@ -99,7 +99,7 @@ static int opSYSEXIT(uint32_t fetchdat)
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uint16_t sysexit_ss_seg_data[4];
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#ifdef SYSEXIT_LOG
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pclog("SYSEXIT called\n");
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x386_dynarec_log("SYSEXIT called\n");
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#endif
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if (!(cs_msr & 0xFFFC)) return internal_illegal("SYSEXIT: CS MSR is zero");
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@@ -107,11 +107,11 @@ static int opSYSEXIT(uint32_t fetchdat)
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if (CS & 3) return internal_illegal("SYSEXIT: CPL not 0");
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#ifdef SYSEXIT_LOG
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pclog("SYSEXIT start:\n");
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pclog("CS (%04X): base=%08X, limit=%08X, access=%02X, seg=%04X, limit_low=%08X, limit_high=%08X, checked=%i\n", CS, _cs.base, _cs.limit, _cs.access, _cs.seg, _cs.limit_low, _cs.limit_high, _cs.checked);
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pclog("SS (%04X): base=%08X, limit=%08X, access=%02X, seg=%04X, limit_low=%08X, limit_high=%08X, checked=%i\n", SS, _ss.base, _ss.limit, _ss.access, _ss.seg, _ss.limit_low, _ss.limit_high, _ss.checked);
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pclog("Model specific registers: cs_msr=%04X, esp_msr=%08X, eip_msr=%08X\n", cs_msr, esp_msr, eip_msr);
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pclog("Other information: eip=%08X esp=%08X eflags=%04X flags=%04X use32=%04X stack32=%i ECX=%08X EDX=%08X\n", cpu_state.pc, ESP, eflags, flags, use32, stack32, ECX, EDX);
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x386_dynarec_log("SYSEXIT start:\n");
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x386_dynarec_log("CS (%04X): base=%08X, limit=%08X, access=%02X, seg=%04X, limit_low=%08X, limit_high=%08X, checked=%i\n", CS, _cs.base, _cs.limit, _cs.access, _cs.seg, _cs.limit_low, _cs.limit_high, _cs.checked);
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x386_dynarec_log("SS (%04X): base=%08X, limit=%08X, access=%02X, seg=%04X, limit_low=%08X, limit_high=%08X, checked=%i\n", SS, _ss.base, _ss.limit, _ss.access, _ss.seg, _ss.limit_low, _ss.limit_high, _ss.checked);
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x386_dynarec_log("Model specific registers: cs_msr=%04X, esp_msr=%08X, eip_msr=%08X\n", cs_msr, esp_msr, eip_msr);
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x386_dynarec_log("Other information: eip=%08X esp=%08X eflags=%04X flags=%04X use32=%04X stack32=%i ECX=%08X EDX=%08X\n", cpu_state.pc, ESP, eflags, flags, use32, stack32, ECX, EDX);
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#endif
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if (cpu_state.abrt) return 1;
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@@ -141,11 +141,11 @@ static int opSYSEXIT(uint32_t fetchdat)
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CPU_BLOCK_END();
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#ifdef SYSEXIT_LOG
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pclog("SYSEXIT completed:\n");
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pclog("CS (%04X): base=%08X, limit=%08X, access=%02X, seg=%04X, limit_low=%08X, limit_high=%08X, checked=%i\n", CS, _cs.base, _cs.limit, _cs.access, _cs.seg, _cs.limit_low, _cs.limit_high, _cs.checked);
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pclog("SS (%04X): base=%08X, limit=%08X, access=%02X, seg=%04X, limit_low=%08X, limit_high=%08X, checked=%i\n", SS, _ss.base, _ss.limit, _ss.access, _ss.seg, _ss.limit_low, _ss.limit_high, _ss.checked);
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pclog("Model specific registers: cs_msr=%04X, esp_msr=%08X, eip_msr=%08X\n", cs_msr, esp_msr, eip_msr);
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pclog("Other information: eip=%08X esp=%08X eflags=%04X flags=%04X use32=%04X stack32=%i ECX=%08X EDX=%08X\n", cpu_state.pc, ESP, eflags, flags, use32, stack32, ECX, EDX);
|
||||
x386_dynarec_log("SYSEXIT completed:\n");
|
||||
x386_dynarec_log("CS (%04X): base=%08X, limit=%08X, access=%02X, seg=%04X, limit_low=%08X, limit_high=%08X, checked=%i\n", CS, _cs.base, _cs.limit, _cs.access, _cs.seg, _cs.limit_low, _cs.limit_high, _cs.checked);
|
||||
x386_dynarec_log("SS (%04X): base=%08X, limit=%08X, access=%02X, seg=%04X, limit_low=%08X, limit_high=%08X, checked=%i\n", SS, _ss.base, _ss.limit, _ss.access, _ss.seg, _ss.limit_low, _ss.limit_high, _ss.checked);
|
||||
x386_dynarec_log("Model specific registers: cs_msr=%04X, esp_msr=%08X, eip_msr=%08X\n", cs_msr, esp_msr, eip_msr);
|
||||
x386_dynarec_log("Other information: eip=%08X esp=%08X eflags=%04X flags=%04X use32=%04X stack32=%i ECX=%08X EDX=%08X\n", cpu_state.pc, ESP, eflags, flags, use32, stack32, ECX, EDX);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
@@ -169,7 +169,7 @@ static int opFXSAVESTOR_a16(uint32_t fetchdat)
|
||||
|
||||
if (cpu_state.eaaddr & 0xf)
|
||||
{
|
||||
pclog("Effective address %04X not on 16-byte boundary\n", cpu_state.eaaddr);
|
||||
x386_dynarec_log("Effective address %04X not on 16-byte boundary\n", cpu_state.eaaddr);
|
||||
x86gpf(NULL, 0);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
@@ -262,7 +262,7 @@ static int opFXSAVESTOR_a16(uint32_t fetchdat)
|
||||
|
||||
CLOCK_CYCLES((cr0 & 1) ? 34 : 44);
|
||||
|
||||
if(cpu_state.abrt) pclog("FXRSTOR: abrt != 0\n");
|
||||
if(cpu_state.abrt) x386_dynarec_log("FXRSTOR: abrt != 0\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -323,7 +323,7 @@ static int opFXSAVESTOR_a16(uint32_t fetchdat)
|
||||
|
||||
CLOCK_CYCLES((cr0 & 1) ? 56 : 67);
|
||||
|
||||
if(cpu_state.abrt) pclog("FXSAVE: abrt != 0\n");
|
||||
if(cpu_state.abrt) x386_dynarec_log("FXSAVE: abrt != 0\n");
|
||||
}
|
||||
|
||||
return cpu_state.abrt;
|
||||
@@ -347,7 +347,7 @@ static int opFXSAVESTOR_a32(uint32_t fetchdat)
|
||||
|
||||
if (cpu_state.eaaddr & 0xf)
|
||||
{
|
||||
pclog("Effective address %08X not on 16-byte boundary\n", cpu_state.eaaddr);
|
||||
x386_dynarec_log("Effective address %08X not on 16-byte boundary\n", cpu_state.eaaddr);
|
||||
x86gpf(NULL, 0);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
@@ -440,7 +440,7 @@ static int opFXSAVESTOR_a32(uint32_t fetchdat)
|
||||
|
||||
CLOCK_CYCLES((cr0 & 1) ? 34 : 44);
|
||||
|
||||
if(cpu_state.abrt) pclog("FXRSTOR: abrt != 0\n");
|
||||
if(cpu_state.abrt) x386_dynarec_log("FXRSTOR: abrt != 0\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
@@ -501,7 +501,7 @@ static int opFXSAVESTOR_a32(uint32_t fetchdat)
|
||||
|
||||
CLOCK_CYCLES((cr0 & 1) ? 56 : 67);
|
||||
|
||||
if(cpu_state.abrt) pclog("FXSAVE: abrt != 0\n");
|
||||
if(cpu_state.abrt) x386_dynarec_log("FXSAVE: abrt != 0\n");
|
||||
}
|
||||
|
||||
return cpu_state.abrt;
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
*
|
||||
* Miscellaneous x86 CPU Instructions.
|
||||
*
|
||||
* Version: @(#)x86_ops_misc.h 1.0.1 2018/04/12
|
||||
* Version: @(#)x86_ops_misc.h 1.0.2 2018/10/17
|
||||
*
|
||||
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
@@ -160,7 +160,7 @@ static int opF6_a16(uint32_t fetchdat)
|
||||
break;
|
||||
|
||||
default:
|
||||
pclog("Bad F6 opcode %02X\n", rmdat & 0x38);
|
||||
x386_dynarec_log("Bad F6 opcode %02X\n", rmdat & 0x38);
|
||||
x86illegal();
|
||||
}
|
||||
return 0;
|
||||
@@ -259,7 +259,7 @@ static int opF6_a32(uint32_t fetchdat)
|
||||
break;
|
||||
|
||||
default:
|
||||
pclog("Bad F6 opcode %02X\n", rmdat & 0x38);
|
||||
x386_dynarec_log("Bad F6 opcode %02X\n", rmdat & 0x38);
|
||||
x86illegal();
|
||||
}
|
||||
return 0;
|
||||
@@ -354,7 +354,7 @@ static int opF7_w_a16(uint32_t fetchdat)
|
||||
break;
|
||||
|
||||
default:
|
||||
pclog("Bad F7 opcode %02X\n", rmdat & 0x38);
|
||||
x386_dynarec_log("Bad F7 opcode %02X\n", rmdat & 0x38);
|
||||
x86illegal();
|
||||
}
|
||||
return 0;
|
||||
@@ -446,7 +446,7 @@ static int opF7_w_a32(uint32_t fetchdat)
|
||||
break;
|
||||
|
||||
default:
|
||||
pclog("Bad F7 opcode %02X\n", rmdat & 0x38);
|
||||
x386_dynarec_log("Bad F7 opcode %02X\n", rmdat & 0x38);
|
||||
x86illegal();
|
||||
}
|
||||
return 0;
|
||||
@@ -517,7 +517,7 @@ static int opF7_l_a16(uint32_t fetchdat)
|
||||
break;
|
||||
|
||||
default:
|
||||
pclog("Bad F7 opcode %02X\n", rmdat & 0x38);
|
||||
x386_dynarec_log("Bad F7 opcode %02X\n", rmdat & 0x38);
|
||||
x86illegal();
|
||||
}
|
||||
return 0;
|
||||
@@ -587,7 +587,7 @@ static int opF7_l_a32(uint32_t fetchdat)
|
||||
break;
|
||||
|
||||
default:
|
||||
pclog("Bad F7 opcode %02X\n", rmdat & 0x38);
|
||||
x386_dynarec_log("Bad F7 opcode %02X\n", rmdat & 0x38);
|
||||
x86illegal();
|
||||
}
|
||||
return 0;
|
||||
@@ -714,7 +714,7 @@ static int opCLTS(uint32_t fetchdat)
|
||||
{
|
||||
if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
|
||||
{
|
||||
pclog("Can't CLTS\n");
|
||||
x386_dynarec_log("Can't CLTS\n");
|
||||
x86gpf(NULL,0);
|
||||
return 1;
|
||||
}
|
||||
|
||||
@@ -52,7 +52,7 @@ static int opPSxxW_imm(uint32_t fetchdat)
|
||||
}
|
||||
break;
|
||||
default:
|
||||
pclog("Bad PSxxW (0F 71) instruction %02X\n", op);
|
||||
x386_dynarec_log("Bad PSxxW (0F 71) instruction %02X\n", op);
|
||||
cpu_state.pc = cpu_state.oldpc;
|
||||
x86illegal();
|
||||
return 0;
|
||||
@@ -223,7 +223,7 @@ static int opPSxxD_imm(uint32_t fetchdat)
|
||||
}
|
||||
break;
|
||||
default:
|
||||
pclog("Bad PSxxD (0F 72) instruction %02X\n", op);
|
||||
x386_dynarec_log("Bad PSxxD (0F 72) instruction %02X\n", op);
|
||||
cpu_state.pc = cpu_state.oldpc;
|
||||
x86illegal();
|
||||
return 0;
|
||||
@@ -375,7 +375,7 @@ static int opPSxxQ_imm(uint32_t fetchdat)
|
||||
cpu_state.MM[reg].q <<= shift;
|
||||
break;
|
||||
default:
|
||||
pclog("Bad PSxxQ (0F 73) instruction %02X\n", op);
|
||||
x386_dynarec_log("Bad PSxxQ (0F 73) instruction %02X\n", op);
|
||||
cpu_state.pc = cpu_state.oldpc;
|
||||
x86illegal();
|
||||
return 0;
|
||||
|
||||
@@ -2,7 +2,7 @@ static int opMOV_r_CRx_a16(uint32_t fetchdat)
|
||||
{
|
||||
if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
|
||||
{
|
||||
pclog("Can't load from CRx\n");
|
||||
x386_dynarec_log("Can't load from CRx\n");
|
||||
x86gpf(NULL, 0);
|
||||
return 1;
|
||||
}
|
||||
@@ -27,7 +27,7 @@ static int opMOV_r_CRx_a16(uint32_t fetchdat)
|
||||
break;
|
||||
}
|
||||
default:
|
||||
pclog("Bad read of CR%i %i\n",rmdat&7,cpu_reg);
|
||||
x386_dynarec_log("Bad read of CR%i %i\n",rmdat&7,cpu_reg);
|
||||
cpu_state.pc = cpu_state.oldpc;
|
||||
x86illegal();
|
||||
break;
|
||||
@@ -40,7 +40,7 @@ static int opMOV_r_CRx_a32(uint32_t fetchdat)
|
||||
{
|
||||
if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
|
||||
{
|
||||
pclog("Can't load from CRx\n");
|
||||
x386_dynarec_log("Can't load from CRx\n");
|
||||
x86gpf(NULL, 0);
|
||||
return 1;
|
||||
}
|
||||
@@ -65,7 +65,7 @@ static int opMOV_r_CRx_a32(uint32_t fetchdat)
|
||||
break;
|
||||
}
|
||||
default:
|
||||
pclog("Bad read of CR%i %i\n",rmdat&7,cpu_reg);
|
||||
x386_dynarec_log("Bad read of CR%i %i\n",rmdat&7,cpu_reg);
|
||||
cpu_state.pc = cpu_state.oldpc;
|
||||
x86illegal();
|
||||
break;
|
||||
@@ -79,7 +79,7 @@ static int opMOV_r_DRx_a16(uint32_t fetchdat)
|
||||
{
|
||||
if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
|
||||
{
|
||||
pclog("Can't load from DRx\n");
|
||||
x386_dynarec_log("Can't load from DRx\n");
|
||||
x86gpf(NULL, 0);
|
||||
return 1;
|
||||
}
|
||||
@@ -93,7 +93,7 @@ static int opMOV_r_DRx_a32(uint32_t fetchdat)
|
||||
{
|
||||
if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
|
||||
{
|
||||
pclog("Can't load from DRx\n");
|
||||
x386_dynarec_log("Can't load from DRx\n");
|
||||
x86gpf(NULL, 0);
|
||||
return 1;
|
||||
}
|
||||
@@ -110,7 +110,7 @@ static int opMOV_CRx_r_a16(uint32_t fetchdat)
|
||||
|
||||
if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
|
||||
{
|
||||
pclog("Can't load CRx\n");
|
||||
x386_dynarec_log("Can't load CRx\n");
|
||||
x86gpf(NULL,0);
|
||||
return 1;
|
||||
}
|
||||
@@ -151,7 +151,7 @@ static int opMOV_CRx_r_a16(uint32_t fetchdat)
|
||||
}
|
||||
|
||||
default:
|
||||
pclog("Bad load CR%i\n", cpu_reg);
|
||||
x386_dynarec_log("Bad load CR%i\n", cpu_reg);
|
||||
cpu_state.pc = cpu_state.oldpc;
|
||||
x86illegal();
|
||||
break;
|
||||
@@ -166,7 +166,7 @@ static int opMOV_CRx_r_a32(uint32_t fetchdat)
|
||||
|
||||
if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
|
||||
{
|
||||
pclog("Can't load CRx\n");
|
||||
x386_dynarec_log("Can't load CRx\n");
|
||||
x86gpf(NULL,0);
|
||||
return 1;
|
||||
}
|
||||
@@ -207,7 +207,7 @@ static int opMOV_CRx_r_a32(uint32_t fetchdat)
|
||||
}
|
||||
|
||||
default:
|
||||
pclog("Bad load CR%i\n", cpu_reg);
|
||||
x386_dynarec_log("Bad load CR%i\n", cpu_reg);
|
||||
cpu_state.pc = cpu_state.oldpc;
|
||||
x86illegal();
|
||||
break;
|
||||
@@ -221,7 +221,7 @@ static int opMOV_DRx_r_a16(uint32_t fetchdat)
|
||||
{
|
||||
if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
|
||||
{
|
||||
pclog("Can't load DRx\n");
|
||||
x386_dynarec_log("Can't load DRx\n");
|
||||
x86gpf(NULL, 0);
|
||||
return 1;
|
||||
}
|
||||
@@ -235,7 +235,7 @@ static int opMOV_DRx_r_a32(uint32_t fetchdat)
|
||||
{
|
||||
if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
|
||||
{
|
||||
pclog("Can't load DRx\n");
|
||||
x386_dynarec_log("Can't load DRx\n");
|
||||
x86gpf(NULL, 0);
|
||||
return 1;
|
||||
}
|
||||
@@ -250,7 +250,7 @@ static int opMOV_r_TRx_a16(uint32_t fetchdat)
|
||||
{
|
||||
if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
|
||||
{
|
||||
pclog("Can't load from TRx\n");
|
||||
x386_dynarec_log("Can't load from TRx\n");
|
||||
x86gpf(NULL, 0);
|
||||
return 1;
|
||||
}
|
||||
@@ -264,7 +264,7 @@ static int opMOV_r_TRx_a32(uint32_t fetchdat)
|
||||
{
|
||||
if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
|
||||
{
|
||||
pclog("Can't load from TRx\n");
|
||||
x386_dynarec_log("Can't load from TRx\n");
|
||||
x86gpf(NULL, 0);
|
||||
return 1;
|
||||
}
|
||||
@@ -279,7 +279,7 @@ static int opMOV_TRx_r_a16(uint32_t fetchdat)
|
||||
{
|
||||
if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
|
||||
{
|
||||
pclog("Can't load TRx\n");
|
||||
x386_dynarec_log("Can't load TRx\n");
|
||||
x86gpf(NULL, 0);
|
||||
return 1;
|
||||
}
|
||||
@@ -292,7 +292,7 @@ static int opMOV_TRx_r_a32(uint32_t fetchdat)
|
||||
{
|
||||
if ((CPL || (eflags&VM_FLAG)) && (cr0&1))
|
||||
{
|
||||
pclog("Can't load TRx\n");
|
||||
x386_dynarec_log("Can't load TRx\n");
|
||||
x86gpf(NULL, 0);
|
||||
return 1;
|
||||
}
|
||||
|
||||
@@ -4,7 +4,7 @@ static int opARPL_a16(uint32_t fetchdat)
|
||||
|
||||
NOTRM
|
||||
fetch_ea_16(fetchdat);
|
||||
/* pclog("ARPL_a16\n"); */
|
||||
/* x386_dynarec_log("ARPL_a16\n"); */
|
||||
temp_seg = geteaw(); if (cpu_state.abrt) return 1;
|
||||
|
||||
flags_rebuild();
|
||||
@@ -27,7 +27,7 @@ static int opARPL_a32(uint32_t fetchdat)
|
||||
|
||||
NOTRM
|
||||
fetch_ea_32(fetchdat);
|
||||
/* pclog("ARPL_a32\n"); */
|
||||
/* x386_dynarec_log("ARPL_a32\n"); */
|
||||
temp_seg = geteaw(); if (cpu_state.abrt) return 1;
|
||||
|
||||
flags_rebuild();
|
||||
@@ -159,7 +159,7 @@ static int op0F00_common(uint32_t fetchdat, int ea32)
|
||||
uint16_t desc, sel;
|
||||
uint8_t access;
|
||||
|
||||
/* pclog("op0F00 %02X %04X:%04X\n", rmdat & 0x38, CS, pc); */
|
||||
/* x386_dynarec_log("op0F00 %02X %04X:%04X\n", rmdat & 0x38, CS, pc); */
|
||||
switch (rmdat & 0x38)
|
||||
{
|
||||
case 0x00: /*SLDT*/
|
||||
@@ -175,7 +175,7 @@ static int op0F00_common(uint32_t fetchdat, int ea32)
|
||||
case 0x10: /*LLDT*/
|
||||
if ((CPL || eflags&VM_FLAG) && (cr0&1))
|
||||
{
|
||||
pclog("Invalid LLDT!\n");
|
||||
x386_dynarec_log("Invalid LLDT!\n");
|
||||
x86gpf(NULL,0);
|
||||
return 1;
|
||||
}
|
||||
@@ -201,7 +201,7 @@ static int op0F00_common(uint32_t fetchdat, int ea32)
|
||||
case 0x18: /*LTR*/
|
||||
if ((CPL || eflags&VM_FLAG) && (cr0&1))
|
||||
{
|
||||
pclog("Invalid LTR!\n");
|
||||
x386_dynarec_log("Invalid LTR!\n");
|
||||
x86gpf(NULL,0);
|
||||
break;
|
||||
}
|
||||
@@ -267,7 +267,7 @@ static int op0F00_common(uint32_t fetchdat, int ea32)
|
||||
break;
|
||||
|
||||
default:
|
||||
pclog("Bad 0F 00 opcode %02X\n", rmdat & 0x38);
|
||||
x386_dynarec_log("Bad 0F 00 opcode %02X\n", rmdat & 0x38);
|
||||
cpu_state.pc -= 3;
|
||||
x86illegal();
|
||||
break;
|
||||
@@ -296,7 +296,7 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286, int ea32)
|
||||
{
|
||||
uint32_t base;
|
||||
uint16_t limit, tempw;
|
||||
/* pclog("op0F01 %02X %04X:%04X\n", rmdat & 0x38, CS, pc); */
|
||||
/* x386_dynarec_log("op0F01 %02X %04X:%04X\n", rmdat & 0x38, CS, pc); */
|
||||
switch (rmdat & 0x38)
|
||||
{
|
||||
case 0x00: /*SGDT*/
|
||||
@@ -320,14 +320,14 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286, int ea32)
|
||||
case 0x10: /*LGDT*/
|
||||
if ((CPL || eflags&VM_FLAG) && (cr0&1))
|
||||
{
|
||||
pclog("Invalid LGDT!\n");
|
||||
x386_dynarec_log("Invalid LGDT!\n");
|
||||
x86gpf(NULL,0);
|
||||
break;
|
||||
}
|
||||
/* pclog("LGDT %08X:%08X\n", easeg, eaaddr); */
|
||||
/* x386_dynarec_log("LGDT %08X:%08X\n", easeg, eaaddr); */
|
||||
limit = geteaw();
|
||||
base = readmeml(0, easeg + cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1;
|
||||
/* pclog(" %08X %04X\n", base, limit); */
|
||||
/* x386_dynarec_log(" %08X %04X\n", base, limit); */
|
||||
gdt.limit = limit;
|
||||
gdt.base = base;
|
||||
if (!is32) gdt.base &= 0xffffff;
|
||||
@@ -337,14 +337,14 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286, int ea32)
|
||||
case 0x18: /*LIDT*/
|
||||
if ((CPL || eflags&VM_FLAG) && (cr0&1))
|
||||
{
|
||||
pclog("Invalid LIDT!\n");
|
||||
x386_dynarec_log("Invalid LIDT!\n");
|
||||
x86gpf(NULL,0);
|
||||
break;
|
||||
}
|
||||
/* pclog("LIDT %08X:%08X\n", easeg, eaaddr); */
|
||||
/* x386_dynarec_log("LIDT %08X:%08X\n", easeg, eaaddr); */
|
||||
limit = geteaw();
|
||||
base = readmeml(0, easeg + cpu_state.eaaddr + 2); if (cpu_state.abrt) return 1;
|
||||
/* pclog(" %08X %04X\n", base, limit); */
|
||||
/* x386_dynarec_log(" %08X %04X\n", base, limit); */
|
||||
idt.limit = limit;
|
||||
idt.base = base;
|
||||
if (!is32) idt.base &= 0xffffff;
|
||||
@@ -362,7 +362,7 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286, int ea32)
|
||||
case 0x30: /*LMSW*/
|
||||
if ((CPL || eflags&VM_FLAG) && (msw&1))
|
||||
{
|
||||
pclog("LMSW - ring not zero!\n");
|
||||
x386_dynarec_log("LMSW - ring not zero!\n");
|
||||
x86gpf(NULL, 0);
|
||||
break;
|
||||
}
|
||||
@@ -387,7 +387,7 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286, int ea32)
|
||||
{
|
||||
if ((CPL || eflags&VM_FLAG) && (cr0&1))
|
||||
{
|
||||
pclog("Invalid INVLPG!\n");
|
||||
x386_dynarec_log("Invalid INVLPG!\n");
|
||||
x86gpf(NULL, 0);
|
||||
break;
|
||||
}
|
||||
@@ -398,7 +398,7 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286, int ea32)
|
||||
}
|
||||
|
||||
default:
|
||||
pclog("Bad 0F 01 opcode %02X\n", rmdat & 0x38);
|
||||
x386_dynarec_log("Bad 0F 01 opcode %02X\n", rmdat & 0x38);
|
||||
cpu_state.pc -= 3;
|
||||
x86illegal();
|
||||
break;
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
*
|
||||
* x86 CPU segment emulation.
|
||||
*
|
||||
* Version: @(#)x86seg.c 1.0.7 2018/04/29
|
||||
* Version: @(#)x86seg.c 1.0.8 2018/10/17
|
||||
*
|
||||
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
@@ -63,13 +63,11 @@ void pmodeint(int num, int soft);
|
||||
|
||||
#ifdef ENABLE_X86SEG_LOG
|
||||
int x86seg_do_log = ENABLE_X86SEG_LOG;
|
||||
#endif
|
||||
|
||||
|
||||
static void
|
||||
x86seg_log(const char *fmt, ...)
|
||||
{
|
||||
#ifdef ENABLE_X86SEG_LOG
|
||||
va_list ap;
|
||||
|
||||
if (x86seg_do_log) {
|
||||
@@ -77,8 +75,10 @@ x86seg_log(const char *fmt, ...)
|
||||
pclog_ex(fmt, ap);
|
||||
va_end(ap);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#else
|
||||
#define x86seg_log(fmt, ...)
|
||||
#endif
|
||||
|
||||
|
||||
void x86abort(const char *format, ...)
|
||||
|
||||
@@ -19,13 +19,11 @@
|
||||
|
||||
#ifdef ENABLE_FPU_LOG
|
||||
int fpu_do_log = ENABLE_FPU_LOG;
|
||||
#endif
|
||||
|
||||
|
||||
static void
|
||||
fpu_log(const char *fmt, ...)
|
||||
{
|
||||
#ifdef ENABLE_FPU_LOG
|
||||
va_list ap;
|
||||
|
||||
if (fpu_log) {
|
||||
@@ -33,8 +31,10 @@ fpu_log(const char *fmt, ...)
|
||||
pclog_ex(fmt, ap);
|
||||
va_end(ap);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#else
|
||||
#define fpu_log(fmt, ...)
|
||||
#endif
|
||||
|
||||
|
||||
uint16_t x87_gettag()
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
*
|
||||
* x87 FPU instructions core.
|
||||
*
|
||||
* Version: @(#)x87_ops.h 1.0.6 2018/08/01
|
||||
* Version: @(#)x87_ops.h 1.0.7 2018/10/17
|
||||
*
|
||||
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* Sarah Walker, <tommowalker@tommowalker.co.uk>
|
||||
@@ -44,7 +44,13 @@
|
||||
# include <intrin.h>
|
||||
#endif
|
||||
|
||||
#define fplog 0
|
||||
#ifdef ENABLE_FPU_LOG
|
||||
extern void fpu_log(const char *fmt, ...);
|
||||
#else
|
||||
#ifndef fpu_log
|
||||
#define fpu_log(fmt, ...)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
static int rounding_modes[4] = {FE_TONEAREST, FE_DOWNWARD, FE_UPWARD, FE_TOWARDZERO};
|
||||
|
||||
@@ -66,7 +72,7 @@ static int rounding_modes[4] = {FE_TONEAREST, FE_DOWNWARD, FE_UPWARD, FE_TOWARDZ
|
||||
dst = src1 / (double)src2; \
|
||||
else \
|
||||
{ \
|
||||
x386_dynarec_log("FPU : divide by zero\n"); \
|
||||
fpu_log("FPU : divide by zero\n"); \
|
||||
picint(1 << 13); \
|
||||
} \
|
||||
return 1; \
|
||||
@@ -289,7 +295,7 @@ static __inline uint16_t x87_compare(double a, double b)
|
||||
{
|
||||
if (((a == INFINITY) || (a == -INFINITY)) && ((b == INFINITY) || (b == -INFINITY)))
|
||||
{
|
||||
/* x386_dynarec_log("Comparing infinity\n"); */
|
||||
/* fpu_log("Comparing infinity\n"); */
|
||||
#ifndef _MSC_VER
|
||||
__asm volatile ("" : : : "memory");
|
||||
|
||||
|
||||
@@ -111,7 +111,7 @@ static int opFADD(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FADD\n");
|
||||
fpu_log("FADD\n");
|
||||
ST(0) = ST(0) + ST(fetchdat & 7);
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
CLOCK_CYCLES(8);
|
||||
@@ -121,7 +121,7 @@ static int opFADDr(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FADD\n");
|
||||
fpu_log("FADD\n");
|
||||
ST(fetchdat & 7) = ST(fetchdat & 7) + ST(0);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] &= ~TAG_UINT64;
|
||||
CLOCK_CYCLES(8);
|
||||
@@ -131,7 +131,7 @@ static int opFADDP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FADDP\n");
|
||||
fpu_log("FADDP\n");
|
||||
ST(fetchdat & 7) = ST(fetchdat & 7) + ST(0);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] &= ~TAG_UINT64;
|
||||
x87_pop();
|
||||
@@ -143,7 +143,7 @@ static int opFCOM(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FCOM\n");
|
||||
fpu_log("FCOM\n");
|
||||
cpu_state.npxs &= ~(C0|C2|C3);
|
||||
if (ST(0) == ST(fetchdat & 7)) cpu_state.npxs |= C3;
|
||||
else if (ST(0) < ST(fetchdat & 7)) cpu_state.npxs |= C0;
|
||||
@@ -155,7 +155,7 @@ static int opFCOMP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FCOMP\n");
|
||||
fpu_log("FCOMP\n");
|
||||
cpu_state.npxs &= ~(C0|C2|C3);
|
||||
cpu_state.npxs |= x87_compare(ST(0), ST(fetchdat & 7));
|
||||
x87_pop();
|
||||
@@ -168,7 +168,7 @@ static int opFCOMPP(uint32_t fetchdat)
|
||||
uint64_t *p, *q;
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FCOMPP\n");
|
||||
fpu_log("FCOMPP\n");
|
||||
cpu_state.npxs &= ~(C0|C2|C3);
|
||||
p = (uint64_t *)&ST(0);
|
||||
q = (uint64_t *)&ST(1);
|
||||
@@ -186,7 +186,7 @@ static int opFUCOMPP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FUCOMPP\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FUCOMPP\n", easeg, cpu_state.eaaddr);
|
||||
cpu_state.npxs &= ~(C0|C2|C3);
|
||||
cpu_state.npxs |= x87_ucompare(ST(0), ST(1));
|
||||
x87_pop();
|
||||
@@ -199,7 +199,7 @@ static int opFCOMI(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FICOM\n");
|
||||
fpu_log("FICOM\n");
|
||||
flags_rebuild();
|
||||
flags &= ~(Z_FLAG | P_FLAG | C_FLAG);
|
||||
if (ST(0) == ST(fetchdat & 7)) flags |= Z_FLAG;
|
||||
@@ -211,7 +211,7 @@ static int opFCOMIP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FICOMP\n");
|
||||
fpu_log("FICOMP\n");
|
||||
flags_rebuild();
|
||||
flags &= ~(Z_FLAG | P_FLAG | C_FLAG);
|
||||
if (ST(0) == ST(fetchdat & 7)) flags |= Z_FLAG;
|
||||
@@ -225,7 +225,7 @@ static int opFDIV(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FDIV\n");
|
||||
fpu_log("FDIV\n");
|
||||
x87_div(ST(0), ST(0), ST(fetchdat & 7));
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
CLOCK_CYCLES(73);
|
||||
@@ -235,7 +235,7 @@ static int opFDIVr(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FDIV\n");
|
||||
fpu_log("FDIV\n");
|
||||
x87_div(ST(fetchdat & 7), ST(fetchdat & 7), ST(0));
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] &= ~TAG_UINT64;
|
||||
CLOCK_CYCLES(73);
|
||||
@@ -245,7 +245,7 @@ static int opFDIVP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FDIVP\n");
|
||||
fpu_log("FDIVP\n");
|
||||
x87_div(ST(fetchdat & 7), ST(fetchdat & 7), ST(0));
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] &= ~TAG_UINT64;
|
||||
x87_pop();
|
||||
@@ -257,7 +257,7 @@ static int opFDIVR(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FDIVR\n");
|
||||
fpu_log("FDIVR\n");
|
||||
x87_div(ST(0), ST(fetchdat&7), ST(0));
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
CLOCK_CYCLES(73);
|
||||
@@ -267,7 +267,7 @@ static int opFDIVRr(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FDIVR\n");
|
||||
fpu_log("FDIVR\n");
|
||||
x87_div(ST(fetchdat & 7), ST(0), ST(fetchdat & 7));
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] &= ~TAG_UINT64;
|
||||
CLOCK_CYCLES(73);
|
||||
@@ -277,7 +277,7 @@ static int opFDIVRP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FDIVR\n");
|
||||
fpu_log("FDIVR\n");
|
||||
x87_div(ST(fetchdat & 7), ST(0), ST(fetchdat & 7));
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] &= ~TAG_UINT64;
|
||||
x87_pop();
|
||||
@@ -289,7 +289,7 @@ static int opFMUL(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FMUL\n");
|
||||
fpu_log("FMUL\n");
|
||||
ST(0) = ST(0) * ST(fetchdat & 7);
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
CLOCK_CYCLES(16);
|
||||
@@ -299,7 +299,7 @@ static int opFMULr(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FMUL\n");
|
||||
fpu_log("FMUL\n");
|
||||
ST(fetchdat & 7) = ST(0) * ST(fetchdat & 7);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] &= ~TAG_UINT64;
|
||||
CLOCK_CYCLES(16);
|
||||
@@ -309,7 +309,7 @@ static int opFMULP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FMULP\n");
|
||||
fpu_log("FMULP\n");
|
||||
ST(fetchdat & 7) = ST(0) * ST(fetchdat & 7);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] &= ~TAG_UINT64;
|
||||
x87_pop();
|
||||
@@ -321,7 +321,7 @@ static int opFSUB(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FSUB\n");
|
||||
fpu_log("FSUB\n");
|
||||
ST(0) = ST(0) - ST(fetchdat & 7);
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
CLOCK_CYCLES(8);
|
||||
@@ -331,7 +331,7 @@ static int opFSUBr(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FSUB\n");
|
||||
fpu_log("FSUB\n");
|
||||
ST(fetchdat & 7) = ST(fetchdat & 7) - ST(0);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] &= ~TAG_UINT64;
|
||||
CLOCK_CYCLES(8);
|
||||
@@ -341,7 +341,7 @@ static int opFSUBP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FSUBP\n");
|
||||
fpu_log("FSUBP\n");
|
||||
ST(fetchdat & 7) = ST(fetchdat & 7) - ST(0);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] &= ~TAG_UINT64;
|
||||
x87_pop();
|
||||
@@ -353,7 +353,7 @@ static int opFSUBR(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FSUBR\n");
|
||||
fpu_log("FSUBR\n");
|
||||
ST(0) = ST(fetchdat & 7) - ST(0);
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
CLOCK_CYCLES(8);
|
||||
@@ -363,7 +363,7 @@ static int opFSUBRr(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FSUBR\n");
|
||||
fpu_log("FSUBR\n");
|
||||
ST(fetchdat & 7) = ST(0) - ST(fetchdat & 7);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] &= ~TAG_UINT64;
|
||||
CLOCK_CYCLES(8);
|
||||
@@ -373,7 +373,7 @@ static int opFSUBRP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FSUBRP\n");
|
||||
fpu_log("FSUBRP\n");
|
||||
ST(fetchdat & 7) = ST(0) - ST(fetchdat & 7);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] &= ~TAG_UINT64;
|
||||
x87_pop();
|
||||
@@ -385,7 +385,7 @@ static int opFUCOM(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FUCOM\n");
|
||||
fpu_log("FUCOM\n");
|
||||
cpu_state.npxs &= ~(C0|C2|C3);
|
||||
cpu_state.npxs |= x87_ucompare(ST(0), ST(fetchdat & 7));
|
||||
CLOCK_CYCLES(4);
|
||||
@@ -396,7 +396,7 @@ static int opFUCOMP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FUCOMP\n");
|
||||
fpu_log("FUCOMP\n");
|
||||
cpu_state.npxs &= ~(C0|C2|C3);
|
||||
cpu_state.npxs |= x87_ucompare(ST(0), ST(fetchdat & 7));
|
||||
x87_pop();
|
||||
@@ -408,7 +408,7 @@ static int opFUCOMI(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FUCOMI\n");
|
||||
fpu_log("FUCOMI\n");
|
||||
flags_rebuild();
|
||||
flags &= ~(Z_FLAG | P_FLAG | C_FLAG);
|
||||
if (ST(0) == ST(fetchdat & 7)) flags |= Z_FLAG;
|
||||
@@ -420,7 +420,7 @@ static int opFUCOMIP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x386_dynarec_log("FUCOMIP\n");
|
||||
fpu_log("FUCOMIP\n");
|
||||
flags_rebuild();
|
||||
flags &= ~(Z_FLAG | P_FLAG | C_FLAG);
|
||||
if (ST(0) == ST(fetchdat & 7)) flags |= Z_FLAG;
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
*
|
||||
* x87 FPU instructions core.
|
||||
*
|
||||
* Version: @(#)x87_ops_loadstore.h 1.0.0 2017/05/30
|
||||
* Version: @(#)x87_ops_loadstore.h 1.0.1 2017/10/17
|
||||
*
|
||||
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
@@ -21,9 +21,9 @@ static int opFILDiw_a16(uint32_t fetchdat)
|
||||
int16_t temp;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FILDw %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FILDw %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
temp = geteaw(); if (cpu_state.abrt) return 1;
|
||||
if (fplog) pclog(" %f\n", (double)temp);
|
||||
fpu_log(" %f\n", (double)temp);
|
||||
x87_push((double)temp);
|
||||
CLOCK_CYCLES(13);
|
||||
return 0;
|
||||
@@ -33,9 +33,9 @@ static int opFILDiw_a32(uint32_t fetchdat)
|
||||
int16_t temp;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FILDw %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FILDw %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
temp = geteaw(); if (cpu_state.abrt) return 1;
|
||||
if (fplog) pclog(" %f\n", (double)temp);
|
||||
fpu_log(" %f\n", (double)temp);
|
||||
x87_push((double)temp);
|
||||
CLOCK_CYCLES(13);
|
||||
return 0;
|
||||
@@ -46,7 +46,7 @@ static int opFISTiw_a16(uint32_t fetchdat)
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FISTw %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FISTw %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
temp64 = x87_fround(ST(0));
|
||||
/* if (temp64 > 32767 || temp64 < -32768)
|
||||
fatal("FISTw overflow %i\n", temp64);*/
|
||||
@@ -59,7 +59,7 @@ static int opFISTiw_a32(uint32_t fetchdat)
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FISTw %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FISTw %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
temp64 = x87_fround(ST(0));
|
||||
/* if (temp64 > 32767 || temp64 < -32768)
|
||||
fatal("FISTw overflow %i\n", temp64);*/
|
||||
@@ -73,7 +73,7 @@ static int opFISTPiw_a16(uint32_t fetchdat)
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FISTw %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FISTw %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
temp64 = x87_fround(ST(0));
|
||||
/* if (temp64 > 32767 || temp64 < -32768)
|
||||
fatal("FISTw overflow %i\n", temp64);*/
|
||||
@@ -87,7 +87,7 @@ static int opFISTPiw_a32(uint32_t fetchdat)
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FISTw %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FISTw %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
temp64 = x87_fround(ST(0));
|
||||
/* if (temp64 > 32767 || temp64 < -32768)
|
||||
fatal("FISTw overflow %i\n", temp64);*/
|
||||
@@ -102,9 +102,9 @@ static int opFILDiq_a16(uint32_t fetchdat)
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FILDl %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FILDl %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
temp64 = geteaq(); if (cpu_state.abrt) return 1;
|
||||
if (fplog) pclog(" %f %08X %08X\n", (double)temp64, readmeml(easeg,cpu_state.eaaddr), readmeml(easeg,cpu_state.eaaddr+4));
|
||||
fpu_log(" %f %08X %08X\n", (double)temp64, readmeml(easeg,cpu_state.eaaddr), readmeml(easeg,cpu_state.eaaddr+4));
|
||||
x87_push((double)temp64);
|
||||
cpu_state.MM[cpu_state.TOP].q = temp64;
|
||||
cpu_state.tag[cpu_state.TOP] |= TAG_UINT64;
|
||||
@@ -117,9 +117,9 @@ static int opFILDiq_a32(uint32_t fetchdat)
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FILDl %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FILDl %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
temp64 = geteaq(); if (cpu_state.abrt) return 1;
|
||||
if (fplog) pclog(" %f %08X %08X\n", (double)temp64, readmeml(easeg,cpu_state.eaaddr), readmeml(easeg,cpu_state.eaaddr+4));
|
||||
fpu_log(" %f %08X %08X\n", (double)temp64, readmeml(easeg,cpu_state.eaaddr), readmeml(easeg,cpu_state.eaaddr+4));
|
||||
x87_push((double)temp64);
|
||||
cpu_state.MM[cpu_state.TOP].q = temp64;
|
||||
cpu_state.tag[cpu_state.TOP] |= TAG_UINT64;
|
||||
@@ -134,7 +134,7 @@ static int FBSTP_a16(uint32_t fetchdat)
|
||||
int c;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FBSTP %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FBSTP %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
tempd = ST(0);
|
||||
if (tempd < 0.0)
|
||||
tempd = -tempd;
|
||||
@@ -160,7 +160,7 @@ static int FBSTP_a32(uint32_t fetchdat)
|
||||
int c;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FBSTP %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FBSTP %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
tempd = ST(0);
|
||||
if (tempd < 0.0)
|
||||
tempd = -tempd;
|
||||
@@ -186,7 +186,7 @@ static int FISTPiq_a16(uint32_t fetchdat)
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FISTPl %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FISTPl %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
if (cpu_state.tag[cpu_state.TOP] & TAG_UINT64)
|
||||
temp64 = cpu_state.MM[cpu_state.TOP].q;
|
||||
else
|
||||
@@ -201,7 +201,7 @@ static int FISTPiq_a32(uint32_t fetchdat)
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FISTPl %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FISTPl %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
if (cpu_state.tag[cpu_state.TOP] & TAG_UINT64)
|
||||
temp64 = cpu_state.MM[cpu_state.TOP].q;
|
||||
else
|
||||
@@ -217,9 +217,9 @@ static int opFILDil_a16(uint32_t fetchdat)
|
||||
int32_t templ;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FILDs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FILDs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
templ = geteal(); if (cpu_state.abrt) return 1;
|
||||
if (fplog) pclog(" %f %08X %i\n", (double)templ, templ, templ);
|
||||
fpu_log(" %f %08X %i\n", (double)templ, templ, templ);
|
||||
x87_push((double)templ);
|
||||
CLOCK_CYCLES(9);
|
||||
return 0;
|
||||
@@ -229,9 +229,9 @@ static int opFILDil_a32(uint32_t fetchdat)
|
||||
int32_t templ;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FILDs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FILDs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
templ = geteal(); if (cpu_state.abrt) return 1;
|
||||
if (fplog) pclog(" %f %08X %i\n", (double)templ, templ, templ);
|
||||
fpu_log(" %f %08X %i\n", (double)templ, templ, templ);
|
||||
x87_push((double)templ);
|
||||
CLOCK_CYCLES(9);
|
||||
return 0;
|
||||
@@ -242,7 +242,7 @@ static int opFISTil_a16(uint32_t fetchdat)
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FISTs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FISTs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
temp64 = x87_fround(ST(0));
|
||||
/* if (temp64 > 2147483647 || temp64 < -2147483647)
|
||||
fatal("FISTl out of range! %i\n", temp64);*/
|
||||
@@ -255,7 +255,7 @@ static int opFISTil_a32(uint32_t fetchdat)
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FISTs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FISTs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
temp64 = x87_fround(ST(0));
|
||||
/* if (temp64 > 2147483647 || temp64 < -2147483647)
|
||||
fatal("FISTl out of range! %i\n", temp64);*/
|
||||
@@ -269,7 +269,7 @@ static int opFISTPil_a16(uint32_t fetchdat)
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FISTs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FISTs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
temp64 = x87_fround(ST(0));
|
||||
/* if (temp64 > 2147483647 || temp64 < -2147483647)
|
||||
fatal("FISTl out of range! %i\n", temp64);*/
|
||||
@@ -283,7 +283,7 @@ static int opFISTPil_a32(uint32_t fetchdat)
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FISTs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FISTs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
temp64 = x87_fround(ST(0));
|
||||
/* if (temp64 > 2147483647 || temp64 < -2147483647)
|
||||
fatal("FISTl out of range! %i\n", temp64);*/
|
||||
@@ -298,9 +298,9 @@ static int opFLDe_a16(uint32_t fetchdat)
|
||||
double t;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FLDe %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FLDe %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
t=x87_ld80(); if (cpu_state.abrt) return 1;
|
||||
if (fplog) pclog(" %f\n", t);
|
||||
fpu_log(" %f\n", t);
|
||||
x87_push(t);
|
||||
CLOCK_CYCLES(6);
|
||||
return 0;
|
||||
@@ -310,9 +310,9 @@ static int opFLDe_a32(uint32_t fetchdat)
|
||||
double t;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FLDe %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FLDe %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
t=x87_ld80(); if (cpu_state.abrt) return 1;
|
||||
if (fplog) pclog(" %f\n", t);
|
||||
fpu_log(" %f\n", t);
|
||||
x87_push(t);
|
||||
CLOCK_CYCLES(6);
|
||||
return 0;
|
||||
@@ -322,7 +322,7 @@ static int opFSTPe_a16(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FSTPe %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FSTPe %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
x87_st80(ST(0)); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(6);
|
||||
@@ -332,7 +332,7 @@ static int opFSTPe_a32(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FSTPe %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FSTPe %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
x87_st80(ST(0)); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(6);
|
||||
@@ -344,9 +344,9 @@ static int opFLDd_a16(uint32_t fetchdat)
|
||||
x87_td t;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FLDd %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FLDd %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
t.i = geteaq(); if (cpu_state.abrt) return 1;
|
||||
if (fplog) pclog(" %f\n", t.d);
|
||||
fpu_log(" %f\n", t.d);
|
||||
x87_push(t.d);
|
||||
CLOCK_CYCLES(3);
|
||||
return 0;
|
||||
@@ -356,9 +356,9 @@ static int opFLDd_a32(uint32_t fetchdat)
|
||||
x87_td t;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FLDd %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FLDd %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
t.i = geteaq(); if (cpu_state.abrt) return 1;
|
||||
if (fplog) pclog(" %f\n", t.d);
|
||||
fpu_log(" %f\n", t.d);
|
||||
x87_push(t.d);
|
||||
CLOCK_CYCLES(3);
|
||||
return 0;
|
||||
@@ -369,7 +369,7 @@ static int opFSTd_a16(uint32_t fetchdat)
|
||||
x87_td t;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FSTd %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FSTd %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
t.d = ST(0);
|
||||
seteaq(t.i);
|
||||
CLOCK_CYCLES(8);
|
||||
@@ -380,7 +380,7 @@ static int opFSTd_a32(uint32_t fetchdat)
|
||||
x87_td t;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FSTd %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FSTd %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
t.d = ST(0);
|
||||
seteaq(t.i);
|
||||
CLOCK_CYCLES(8);
|
||||
@@ -393,7 +393,7 @@ static int opFSTPd_a16(uint32_t fetchdat)
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
|
||||
if (fplog) pclog("FSTd %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FSTd %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
t.d = ST(0);
|
||||
seteaq(t.i); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
@@ -406,7 +406,7 @@ static int opFSTPd_a32(uint32_t fetchdat)
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
CHECK_WRITE(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
|
||||
if (fplog) pclog("FSTd %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FSTd %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
t.d = ST(0);
|
||||
seteaq(t.i); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
@@ -419,9 +419,9 @@ static int opFLDs_a16(uint32_t fetchdat)
|
||||
x87_ts ts;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FLDs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FLDs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
ts.i = geteal(); if (cpu_state.abrt) return 1;
|
||||
if (fplog) pclog(" %f\n", ts.s);
|
||||
fpu_log(" %f\n", ts.s);
|
||||
x87_push((double)ts.s);
|
||||
CLOCK_CYCLES(3);
|
||||
return 0;
|
||||
@@ -431,9 +431,9 @@ static int opFLDs_a32(uint32_t fetchdat)
|
||||
x87_ts ts;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FLDs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FLDs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
ts.i = geteal(); if (cpu_state.abrt) return 1;
|
||||
if (fplog) pclog(" %f\n", ts.s);
|
||||
fpu_log(" %f\n", ts.s);
|
||||
x87_push((double)ts.s);
|
||||
CLOCK_CYCLES(3);
|
||||
return 0;
|
||||
@@ -444,7 +444,7 @@ static int opFSTs_a16(uint32_t fetchdat)
|
||||
x87_ts ts;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FSTs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FSTs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
ts.s = (float)ST(0);
|
||||
seteal(ts.i);
|
||||
CLOCK_CYCLES(7);
|
||||
@@ -455,7 +455,7 @@ static int opFSTs_a32(uint32_t fetchdat)
|
||||
x87_ts ts;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FSTs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FSTs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
ts.s = (float)ST(0);
|
||||
seteal(ts.i);
|
||||
CLOCK_CYCLES(7);
|
||||
@@ -467,7 +467,7 @@ static int opFSTPs_a16(uint32_t fetchdat)
|
||||
x87_ts ts;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FSTs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FSTs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
ts.s = (float)ST(0);
|
||||
seteal(ts.i); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
@@ -479,7 +479,7 @@ static int opFSTPs_a32(uint32_t fetchdat)
|
||||
x87_ts ts;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FSTs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FSTs %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
ts.s = (float)ST(0);
|
||||
seteal(ts.i); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
|
||||
@@ -2,7 +2,7 @@ static int opFSTSW_AX(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FSTSW\n");
|
||||
fpu_log("FSTSW\n");
|
||||
AX = cpu_state.npxs;
|
||||
CLOCK_CYCLES(3);
|
||||
return 0;
|
||||
@@ -48,7 +48,7 @@ static int opFFREE(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FFREE\n");
|
||||
fpu_log("FFREE\n");
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = 3;
|
||||
CLOCK_CYCLES(3);
|
||||
return 0;
|
||||
@@ -58,7 +58,7 @@ static int opFFREEP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FFREE\n");
|
||||
fpu_log("FFREE\n");
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = 3; if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(3);
|
||||
@@ -69,7 +69,7 @@ static int opFST(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FST\n");
|
||||
fpu_log("FST\n");
|
||||
ST(fetchdat & 7) = ST(0);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = cpu_state.tag[cpu_state.TOP & 7];
|
||||
CLOCK_CYCLES(3);
|
||||
@@ -80,7 +80,7 @@ static int opFSTP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FSTP\n");
|
||||
fpu_log("FSTP\n");
|
||||
ST(fetchdat & 7) = ST(0);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = cpu_state.tag[cpu_state.TOP & 7];
|
||||
x87_pop();
|
||||
@@ -135,7 +135,7 @@ static int FSTOR()
|
||||
cpu_state.ismmx = 1;
|
||||
|
||||
CLOCK_CYCLES((cr0 & 1) ? 34 : 44);
|
||||
if (fplog) pclog("FRSTOR %08X:%08X %i %i %04X\n", easeg, cpu_state.eaaddr, cpu_state.ismmx, cpu_state.TOP, x87_gettag());
|
||||
fpu_log("FRSTOR %08X:%08X %i %i %04X\n", easeg, cpu_state.eaaddr, cpu_state.ismmx, cpu_state.TOP, x87_gettag());
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
static int opFSTOR_a16(uint32_t fetchdat)
|
||||
@@ -158,7 +158,7 @@ static int FSAVE()
|
||||
uint64_t *p;
|
||||
|
||||
FP_ENTER();
|
||||
if (fplog) pclog("FSAVE %08X:%08X %i\n", easeg, cpu_state.eaaddr, cpu_state.ismmx);
|
||||
fpu_log("FSAVE %08X:%08X %i\n", easeg, cpu_state.eaaddr, cpu_state.ismmx);
|
||||
cpu_state.npxs = (cpu_state.npxs & ~(7 << 11)) | (cpu_state.TOP << 11);
|
||||
|
||||
switch ((cr0 & 1) | (cpu_state.op32 & 0x100))
|
||||
@@ -320,7 +320,7 @@ static int opFSTSW_a16(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FSTSW %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FSTSW %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
seteaw((cpu_state.npxs & 0xC7FF) | (cpu_state.TOP << 11));
|
||||
CLOCK_CYCLES(3);
|
||||
return cpu_state.abrt;
|
||||
@@ -329,7 +329,7 @@ static int opFSTSW_a32(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FSTSW %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FSTSW %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
seteaw((cpu_state.npxs & 0xC7FF) | (cpu_state.TOP << 11));
|
||||
CLOCK_CYCLES(3);
|
||||
return cpu_state.abrt;
|
||||
@@ -343,7 +343,7 @@ static int opFLD(uint32_t fetchdat)
|
||||
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FLD %f\n", ST(fetchdat & 7));
|
||||
fpu_log("FLD %f\n", ST(fetchdat & 7));
|
||||
old_tag = cpu_state.tag[(cpu_state.TOP + fetchdat) & 7];
|
||||
old_i64 = cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q;
|
||||
x87_push(ST(fetchdat&7));
|
||||
@@ -360,7 +360,7 @@ static int opFXCH(uint32_t fetchdat)
|
||||
uint64_t old_i64;
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FXCH\n");
|
||||
fpu_log("FXCH\n");
|
||||
td = ST(0);
|
||||
ST(0) = ST(fetchdat&7);
|
||||
ST(fetchdat&7) = td;
|
||||
@@ -379,7 +379,7 @@ static int opFCHS(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FCHS\n");
|
||||
fpu_log("FCHS\n");
|
||||
ST(0) = -ST(0);
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
CLOCK_CYCLES(6);
|
||||
@@ -390,7 +390,7 @@ static int opFABS(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FABS %f\n", ST(0));
|
||||
fpu_log("FABS %f\n", ST(0));
|
||||
ST(0) = fabs(ST(0));
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
CLOCK_CYCLES(3);
|
||||
@@ -401,7 +401,7 @@ static int opFTST(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FTST\n");
|
||||
fpu_log("FTST\n");
|
||||
cpu_state.npxs &= ~(C0|C2|C3);
|
||||
if (ST(0) == 0.0) cpu_state.npxs |= C3;
|
||||
else if (ST(0) < 0.0) cpu_state.npxs |= C0;
|
||||
@@ -413,7 +413,7 @@ static int opFXAM(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FXAM %i %f\n", cpu_state.tag[cpu_state.TOP&7], ST(0));
|
||||
fpu_log("FXAM %i %f\n", cpu_state.tag[cpu_state.TOP&7], ST(0));
|
||||
cpu_state.npxs &= ~(C0|C1|C2|C3);
|
||||
if (cpu_state.tag[cpu_state.TOP&7] == 3) cpu_state.npxs |= (C0|C3);
|
||||
else if (ST(0) == 0.0) cpu_state.npxs |= C3;
|
||||
@@ -427,7 +427,7 @@ static int opFLD1(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FLD1\n");
|
||||
fpu_log("FLD1\n");
|
||||
x87_push(1.0);
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
@@ -437,7 +437,7 @@ static int opFLDL2T(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FLDL2T\n");
|
||||
fpu_log("FLDL2T\n");
|
||||
x87_push(3.3219280948873623);
|
||||
CLOCK_CYCLES(8);
|
||||
return 0;
|
||||
@@ -447,7 +447,7 @@ static int opFLDL2E(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FLDL2E\n");
|
||||
fpu_log("FLDL2E\n");
|
||||
x87_push(1.4426950408889634);
|
||||
CLOCK_CYCLES(8);
|
||||
return 0;
|
||||
@@ -457,7 +457,7 @@ static int opFLDPI(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FLDPI\n");
|
||||
fpu_log("FLDPI\n");
|
||||
x87_push(3.141592653589793);
|
||||
CLOCK_CYCLES(8);
|
||||
return 0;
|
||||
@@ -467,7 +467,7 @@ static int opFLDEG2(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FLDEG2\n");
|
||||
fpu_log("FLDEG2\n");
|
||||
x87_push(0.3010299956639812);
|
||||
CLOCK_CYCLES(8);
|
||||
return 0;
|
||||
@@ -477,7 +477,7 @@ static int opFLDLN2(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FLDLN2\n");
|
||||
fpu_log("FLDLN2\n");
|
||||
x87_push_u64(0x3fe62e42fefa39f0ull);
|
||||
CLOCK_CYCLES(8);
|
||||
return 0;
|
||||
@@ -487,7 +487,7 @@ static int opFLDZ(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FLDZ\n");
|
||||
fpu_log("FLDZ\n");
|
||||
x87_push(0.0);
|
||||
cpu_state.tag[cpu_state.TOP&7] = 1;
|
||||
CLOCK_CYCLES(4);
|
||||
@@ -498,7 +498,7 @@ static int opF2XM1(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("F2XM1\n");
|
||||
fpu_log("F2XM1\n");
|
||||
ST(0) = pow(2.0, ST(0)) - 1.0;
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
CLOCK_CYCLES(200);
|
||||
@@ -509,7 +509,7 @@ static int opFYL2X(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FYL2X\n");
|
||||
fpu_log("FYL2X\n");
|
||||
ST(1) = ST(1) * (log(ST(0)) / log(2.0));
|
||||
cpu_state.tag[(cpu_state.TOP + 1) & 7] &= ~TAG_UINT64;
|
||||
x87_pop();
|
||||
@@ -521,7 +521,7 @@ static int opFYL2XP1(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FYL2XP1\n");
|
||||
fpu_log("FYL2XP1\n");
|
||||
ST(1) = ST(1) * (log1p(ST(0)) / log(2.0));
|
||||
cpu_state.tag[(cpu_state.TOP + 1) & 7] &= ~TAG_UINT64;
|
||||
x87_pop();
|
||||
@@ -533,7 +533,7 @@ static int opFPTAN(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FPTAN\n");
|
||||
fpu_log("FPTAN\n");
|
||||
ST(0) = tan(ST(0));
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
x87_push(1.0);
|
||||
@@ -546,7 +546,7 @@ static int opFPATAN(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FPATAN\n");
|
||||
fpu_log("FPATAN\n");
|
||||
ST(1) = atan2(ST(1), ST(0));
|
||||
cpu_state.tag[(cpu_state.TOP + 1) & 7] &= ~TAG_UINT64;
|
||||
x87_pop();
|
||||
@@ -558,7 +558,7 @@ static int opFDECSTP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FDECSTP\n");
|
||||
fpu_log("FDECSTP\n");
|
||||
cpu_state.TOP = (cpu_state.TOP - 1) & 7;
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
@@ -568,7 +568,7 @@ static int opFINCSTP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FDECSTP\n");
|
||||
fpu_log("FDECSTP\n");
|
||||
cpu_state.TOP = (cpu_state.TOP + 1) & 7;
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
@@ -579,11 +579,11 @@ static int opFPREM(uint32_t fetchdat)
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FPREM %f %f ", ST(0), ST(1));
|
||||
fpu_log("FPREM %f %f ", ST(0), ST(1));
|
||||
temp64 = (int64_t)(ST(0) / ST(1));
|
||||
ST(0) = ST(0) - (ST(1) * (double)temp64);
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
if (fplog) pclog("%f\n", ST(0));
|
||||
fpu_log("%f\n", ST(0));
|
||||
cpu_state.npxs &= ~(C0|C1|C2|C3);
|
||||
if (temp64 & 4) cpu_state.npxs|=C0;
|
||||
if (temp64 & 2) cpu_state.npxs|=C3;
|
||||
@@ -596,11 +596,11 @@ static int opFPREM1(uint32_t fetchdat)
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FPREM1 %f %f ", ST(0), ST(1));
|
||||
fpu_log("FPREM1 %f %f ", ST(0), ST(1));
|
||||
temp64 = (int64_t)(ST(0) / ST(1));
|
||||
ST(0) = ST(0) - (ST(1) * (double)temp64);
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
if (fplog) pclog("%f\n", ST(0));
|
||||
fpu_log("%f\n", ST(0));
|
||||
cpu_state.npxs &= ~(C0|C1|C2|C3);
|
||||
if (temp64 & 4) cpu_state.npxs|=C0;
|
||||
if (temp64 & 2) cpu_state.npxs|=C3;
|
||||
@@ -613,7 +613,7 @@ static int opFSQRT(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FSQRT\n");
|
||||
fpu_log("FSQRT\n");
|
||||
ST(0) = sqrt(ST(0));
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
CLOCK_CYCLES(83);
|
||||
@@ -625,7 +625,7 @@ static int opFSINCOS(uint32_t fetchdat)
|
||||
double td;
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FSINCOS\n");
|
||||
fpu_log("FSINCOS\n");
|
||||
td = ST(0);
|
||||
ST(0) = sin(td);
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
@@ -639,10 +639,10 @@ static int opFRNDINT(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FRNDINT %g ", ST(0));
|
||||
fpu_log("FRNDINT %g ", ST(0));
|
||||
ST(0) = (double)x87_fround(ST(0));
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
if (fplog) pclog("%g\n", ST(0));
|
||||
fpu_log("%g\n", ST(0));
|
||||
CLOCK_CYCLES(21);
|
||||
return 0;
|
||||
}
|
||||
@@ -652,7 +652,7 @@ static int opFSCALE(uint32_t fetchdat)
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FSCALE\n");
|
||||
fpu_log("FSCALE\n");
|
||||
temp64 = (int64_t)ST(1);
|
||||
ST(0) = ST(0) * pow(2.0, (double)temp64);
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
@@ -664,7 +664,7 @@ static int opFSIN(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FSIN\n");
|
||||
fpu_log("FSIN\n");
|
||||
ST(0) = sin(ST(0));
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
cpu_state.npxs &= ~C2;
|
||||
@@ -676,7 +676,7 @@ static int opFCOS(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
if (fplog) pclog("FCOS\n");
|
||||
fpu_log("FCOS\n");
|
||||
ST(0) = cos(ST(0));
|
||||
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
|
||||
cpu_state.npxs &= ~C2;
|
||||
@@ -688,7 +688,7 @@ static int opFCOS(uint32_t fetchdat)
|
||||
static int FLDENV()
|
||||
{
|
||||
FP_ENTER();
|
||||
if (fplog) pclog("FLDENV %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FLDENV %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
switch ((cr0 & 1) | (cpu_state.op32 & 0x100))
|
||||
{
|
||||
case 0x000: /*16-bit real mode*/
|
||||
@@ -732,7 +732,7 @@ static int opFLDCW_a16(uint32_t fetchdat)
|
||||
uint16_t tempw;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FLDCW %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FLDCW %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
tempw = geteaw();
|
||||
if (cpu_state.abrt) return 1;
|
||||
cpu_state.npxc = tempw;
|
||||
@@ -745,7 +745,7 @@ static int opFLDCW_a32(uint32_t fetchdat)
|
||||
uint16_t tempw;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FLDCW %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FLDCW %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
tempw = geteaw();
|
||||
if (cpu_state.abrt) return 1;
|
||||
cpu_state.npxc = tempw;
|
||||
@@ -757,7 +757,7 @@ static int opFLDCW_a32(uint32_t fetchdat)
|
||||
static int FSTENV()
|
||||
{
|
||||
FP_ENTER();
|
||||
if (fplog) pclog("FSTENV %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FSTENV %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
switch ((cr0 & 1) | (cpu_state.op32 & 0x100))
|
||||
{
|
||||
case 0x000: /*16-bit real mode*/
|
||||
@@ -817,7 +817,7 @@ static int opFSTCW_a16(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
if (fplog) pclog("FSTCW %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FSTCW %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
seteaw(cpu_state.npxc);
|
||||
CLOCK_CYCLES(3);
|
||||
return cpu_state.abrt;
|
||||
@@ -826,7 +826,7 @@ static int opFSTCW_a32(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
if (fplog) pclog("FSTCW %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
fpu_log("FSTCW %08X:%08X\n", easeg, cpu_state.eaaddr);
|
||||
seteaw(cpu_state.npxc);
|
||||
CLOCK_CYCLES(3);
|
||||
return cpu_state.abrt;
|
||||
@@ -837,7 +837,7 @@ static int opFSTCW_a32(uint32_t fetchdat)
|
||||
{ \
|
||||
FP_ENTER(); \
|
||||
cpu_state.pc++; \
|
||||
if (fplog) pclog("FCMOV %f\n", ST(fetchdat & 7)); \
|
||||
fpu_log("FCMOV %f\n", ST(fetchdat & 7)); \
|
||||
if (cond_ ## condition) \
|
||||
{ \
|
||||
cpu_state.tag[cpu_state.TOP] = cpu_state.tag[(cpu_state.TOP + fetchdat) & 7]; \
|
||||
|
||||
Reference in New Issue
Block a user