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Change to logging - when logging is disabled, the logging functions are now #define'd to nothing, so the compiler ignores the lines that call them completely, seems to slightly speed up the emulator; note that the logging in vid_table.c has not been changed yet, because this file on my local tree currently contains other WIP changes.

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This commit is contained in:
OBattler
2018-10-19 00:39:32 +02:00
parent d56df03a53
commit cfc626f111
78 changed files with 658 additions and 590 deletions
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94
src/cpu/x87_ops_misc.h
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@@ -2,7 +2,7 @@ static int opFSTSW_AX(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FSTSW\n");
fpu_log("FSTSW\n");
AX = cpu_state.npxs;
CLOCK_CYCLES(3);
return 0;
@@ -48,7 +48,7 @@ static int opFFREE(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FFREE\n");
fpu_log("FFREE\n");
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = 3;
CLOCK_CYCLES(3);
return 0;
@@ -58,7 +58,7 @@ static int opFFREEP(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FFREE\n");
fpu_log("FFREE\n");
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = 3; if (cpu_state.abrt) return 1;
x87_pop();
CLOCK_CYCLES(3);
@@ -69,7 +69,7 @@ static int opFST(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FST\n");
fpu_log("FST\n");
ST(fetchdat & 7) = ST(0);
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = cpu_state.tag[cpu_state.TOP & 7];
CLOCK_CYCLES(3);
@@ -80,7 +80,7 @@ static int opFSTP(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FSTP\n");
fpu_log("FSTP\n");
ST(fetchdat & 7) = ST(0);
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = cpu_state.tag[cpu_state.TOP & 7];
x87_pop();
@@ -135,7 +135,7 @@ static int FSTOR()
cpu_state.ismmx = 1;
CLOCK_CYCLES((cr0 & 1) ? 34 : 44);
if (fplog) pclog("FRSTOR %08X:%08X %i %i %04X\n", easeg, cpu_state.eaaddr, cpu_state.ismmx, cpu_state.TOP, x87_gettag());
fpu_log("FRSTOR %08X:%08X %i %i %04X\n", easeg, cpu_state.eaaddr, cpu_state.ismmx, cpu_state.TOP, x87_gettag());
return cpu_state.abrt;
}
static int opFSTOR_a16(uint32_t fetchdat)
@@ -158,7 +158,7 @@ static int FSAVE()
uint64_t *p;
FP_ENTER();
if (fplog) pclog("FSAVE %08X:%08X %i\n", easeg, cpu_state.eaaddr, cpu_state.ismmx);
fpu_log("FSAVE %08X:%08X %i\n", easeg, cpu_state.eaaddr, cpu_state.ismmx);
cpu_state.npxs = (cpu_state.npxs & ~(7 << 11)) | (cpu_state.TOP << 11);
switch ((cr0 & 1) | (cpu_state.op32 & 0x100))
@@ -320,7 +320,7 @@ static int opFSTSW_a16(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_16(fetchdat);
if (fplog) pclog("FSTSW %08X:%08X\n", easeg, cpu_state.eaaddr);
fpu_log("FSTSW %08X:%08X\n", easeg, cpu_state.eaaddr);
seteaw((cpu_state.npxs & 0xC7FF) | (cpu_state.TOP << 11));
CLOCK_CYCLES(3);
return cpu_state.abrt;
@@ -329,7 +329,7 @@ static int opFSTSW_a32(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_32(fetchdat);
if (fplog) pclog("FSTSW %08X:%08X\n", easeg, cpu_state.eaaddr);
fpu_log("FSTSW %08X:%08X\n", easeg, cpu_state.eaaddr);
seteaw((cpu_state.npxs & 0xC7FF) | (cpu_state.TOP << 11));
CLOCK_CYCLES(3);
return cpu_state.abrt;
@@ -343,7 +343,7 @@ static int opFLD(uint32_t fetchdat)
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FLD %f\n", ST(fetchdat & 7));
fpu_log("FLD %f\n", ST(fetchdat & 7));
old_tag = cpu_state.tag[(cpu_state.TOP + fetchdat) & 7];
old_i64 = cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q;
x87_push(ST(fetchdat&7));
@@ -360,7 +360,7 @@ static int opFXCH(uint32_t fetchdat)
uint64_t old_i64;
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FXCH\n");
fpu_log("FXCH\n");
td = ST(0);
ST(0) = ST(fetchdat&7);
ST(fetchdat&7) = td;
@@ -379,7 +379,7 @@ static int opFCHS(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FCHS\n");
fpu_log("FCHS\n");
ST(0) = -ST(0);
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
CLOCK_CYCLES(6);
@@ -390,7 +390,7 @@ static int opFABS(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FABS %f\n", ST(0));
fpu_log("FABS %f\n", ST(0));
ST(0) = fabs(ST(0));
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
CLOCK_CYCLES(3);
@@ -401,7 +401,7 @@ static int opFTST(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FTST\n");
fpu_log("FTST\n");
cpu_state.npxs &= ~(C0|C2|C3);
if (ST(0) == 0.0) cpu_state.npxs |= C3;
else if (ST(0) < 0.0) cpu_state.npxs |= C0;
@@ -413,7 +413,7 @@ static int opFXAM(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FXAM %i %f\n", cpu_state.tag[cpu_state.TOP&7], ST(0));
fpu_log("FXAM %i %f\n", cpu_state.tag[cpu_state.TOP&7], ST(0));
cpu_state.npxs &= ~(C0|C1|C2|C3);
if (cpu_state.tag[cpu_state.TOP&7] == 3) cpu_state.npxs |= (C0|C3);
else if (ST(0) == 0.0) cpu_state.npxs |= C3;
@@ -427,7 +427,7 @@ static int opFLD1(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FLD1\n");
fpu_log("FLD1\n");
x87_push(1.0);
CLOCK_CYCLES(4);
return 0;
@@ -437,7 +437,7 @@ static int opFLDL2T(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FLDL2T\n");
fpu_log("FLDL2T\n");
x87_push(3.3219280948873623);
CLOCK_CYCLES(8);
return 0;
@@ -447,7 +447,7 @@ static int opFLDL2E(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FLDL2E\n");
fpu_log("FLDL2E\n");
x87_push(1.4426950408889634);
CLOCK_CYCLES(8);
return 0;
@@ -457,7 +457,7 @@ static int opFLDPI(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FLDPI\n");
fpu_log("FLDPI\n");
x87_push(3.141592653589793);
CLOCK_CYCLES(8);
return 0;
@@ -467,7 +467,7 @@ static int opFLDEG2(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FLDEG2\n");
fpu_log("FLDEG2\n");
x87_push(0.3010299956639812);
CLOCK_CYCLES(8);
return 0;
@@ -477,7 +477,7 @@ static int opFLDLN2(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FLDLN2\n");
fpu_log("FLDLN2\n");
x87_push_u64(0x3fe62e42fefa39f0ull);
CLOCK_CYCLES(8);
return 0;
@@ -487,7 +487,7 @@ static int opFLDZ(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FLDZ\n");
fpu_log("FLDZ\n");
x87_push(0.0);
cpu_state.tag[cpu_state.TOP&7] = 1;
CLOCK_CYCLES(4);
@@ -498,7 +498,7 @@ static int opF2XM1(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("F2XM1\n");
fpu_log("F2XM1\n");
ST(0) = pow(2.0, ST(0)) - 1.0;
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
CLOCK_CYCLES(200);
@@ -509,7 +509,7 @@ static int opFYL2X(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FYL2X\n");
fpu_log("FYL2X\n");
ST(1) = ST(1) * (log(ST(0)) / log(2.0));
cpu_state.tag[(cpu_state.TOP + 1) & 7] &= ~TAG_UINT64;
x87_pop();
@@ -521,7 +521,7 @@ static int opFYL2XP1(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FYL2XP1\n");
fpu_log("FYL2XP1\n");
ST(1) = ST(1) * (log1p(ST(0)) / log(2.0));
cpu_state.tag[(cpu_state.TOP + 1) & 7] &= ~TAG_UINT64;
x87_pop();
@@ -533,7 +533,7 @@ static int opFPTAN(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FPTAN\n");
fpu_log("FPTAN\n");
ST(0) = tan(ST(0));
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
x87_push(1.0);
@@ -546,7 +546,7 @@ static int opFPATAN(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FPATAN\n");
fpu_log("FPATAN\n");
ST(1) = atan2(ST(1), ST(0));
cpu_state.tag[(cpu_state.TOP + 1) & 7] &= ~TAG_UINT64;
x87_pop();
@@ -558,7 +558,7 @@ static int opFDECSTP(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FDECSTP\n");
fpu_log("FDECSTP\n");
cpu_state.TOP = (cpu_state.TOP - 1) & 7;
CLOCK_CYCLES(4);
return 0;
@@ -568,7 +568,7 @@ static int opFINCSTP(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FDECSTP\n");
fpu_log("FDECSTP\n");
cpu_state.TOP = (cpu_state.TOP + 1) & 7;
CLOCK_CYCLES(4);
return 0;
@@ -579,11 +579,11 @@ static int opFPREM(uint32_t fetchdat)
int64_t temp64;
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FPREM %f %f ", ST(0), ST(1));
fpu_log("FPREM %f %f ", ST(0), ST(1));
temp64 = (int64_t)(ST(0) / ST(1));
ST(0) = ST(0) - (ST(1) * (double)temp64);
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
if (fplog) pclog("%f\n", ST(0));
fpu_log("%f\n", ST(0));
cpu_state.npxs &= ~(C0|C1|C2|C3);
if (temp64 & 4) cpu_state.npxs|=C0;
if (temp64 & 2) cpu_state.npxs|=C3;
@@ -596,11 +596,11 @@ static int opFPREM1(uint32_t fetchdat)
int64_t temp64;
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FPREM1 %f %f ", ST(0), ST(1));
fpu_log("FPREM1 %f %f ", ST(0), ST(1));
temp64 = (int64_t)(ST(0) / ST(1));
ST(0) = ST(0) - (ST(1) * (double)temp64);
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
if (fplog) pclog("%f\n", ST(0));
fpu_log("%f\n", ST(0));
cpu_state.npxs &= ~(C0|C1|C2|C3);
if (temp64 & 4) cpu_state.npxs|=C0;
if (temp64 & 2) cpu_state.npxs|=C3;
@@ -613,7 +613,7 @@ static int opFSQRT(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FSQRT\n");
fpu_log("FSQRT\n");
ST(0) = sqrt(ST(0));
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
CLOCK_CYCLES(83);
@@ -625,7 +625,7 @@ static int opFSINCOS(uint32_t fetchdat)
double td;
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FSINCOS\n");
fpu_log("FSINCOS\n");
td = ST(0);
ST(0) = sin(td);
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
@@ -639,10 +639,10 @@ static int opFRNDINT(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FRNDINT %g ", ST(0));
fpu_log("FRNDINT %g ", ST(0));
ST(0) = (double)x87_fround(ST(0));
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
if (fplog) pclog("%g\n", ST(0));
fpu_log("%g\n", ST(0));
CLOCK_CYCLES(21);
return 0;
}
@@ -652,7 +652,7 @@ static int opFSCALE(uint32_t fetchdat)
int64_t temp64;
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FSCALE\n");
fpu_log("FSCALE\n");
temp64 = (int64_t)ST(1);
ST(0) = ST(0) * pow(2.0, (double)temp64);
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
@@ -664,7 +664,7 @@ static int opFSIN(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FSIN\n");
fpu_log("FSIN\n");
ST(0) = sin(ST(0));
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
cpu_state.npxs &= ~C2;
@@ -676,7 +676,7 @@ static int opFCOS(uint32_t fetchdat)
{
FP_ENTER();
cpu_state.pc++;
if (fplog) pclog("FCOS\n");
fpu_log("FCOS\n");
ST(0) = cos(ST(0));
cpu_state.tag[cpu_state.TOP] &= ~TAG_UINT64;
cpu_state.npxs &= ~C2;
@@ -688,7 +688,7 @@ static int opFCOS(uint32_t fetchdat)
static int FLDENV()
{
FP_ENTER();
if (fplog) pclog("FLDENV %08X:%08X\n", easeg, cpu_state.eaaddr);
fpu_log("FLDENV %08X:%08X\n", easeg, cpu_state.eaaddr);
switch ((cr0 & 1) | (cpu_state.op32 & 0x100))
{
case 0x000: /*16-bit real mode*/
@@ -732,7 +732,7 @@ static int opFLDCW_a16(uint32_t fetchdat)
uint16_t tempw;
FP_ENTER();
fetch_ea_16(fetchdat);
if (fplog) pclog("FLDCW %08X:%08X\n", easeg, cpu_state.eaaddr);
fpu_log("FLDCW %08X:%08X\n", easeg, cpu_state.eaaddr);
tempw = geteaw();
if (cpu_state.abrt) return 1;
cpu_state.npxc = tempw;
@@ -745,7 +745,7 @@ static int opFLDCW_a32(uint32_t fetchdat)
uint16_t tempw;
FP_ENTER();
fetch_ea_32(fetchdat);
if (fplog) pclog("FLDCW %08X:%08X\n", easeg, cpu_state.eaaddr);
fpu_log("FLDCW %08X:%08X\n", easeg, cpu_state.eaaddr);
tempw = geteaw();
if (cpu_state.abrt) return 1;
cpu_state.npxc = tempw;
@@ -757,7 +757,7 @@ static int opFLDCW_a32(uint32_t fetchdat)
static int FSTENV()
{
FP_ENTER();
if (fplog) pclog("FSTENV %08X:%08X\n", easeg, cpu_state.eaaddr);
fpu_log("FSTENV %08X:%08X\n", easeg, cpu_state.eaaddr);
switch ((cr0 & 1) | (cpu_state.op32 & 0x100))
{
case 0x000: /*16-bit real mode*/
@@ -817,7 +817,7 @@ static int opFSTCW_a16(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_16(fetchdat);
if (fplog) pclog("FSTCW %08X:%08X\n", easeg, cpu_state.eaaddr);
fpu_log("FSTCW %08X:%08X\n", easeg, cpu_state.eaaddr);
seteaw(cpu_state.npxc);
CLOCK_CYCLES(3);
return cpu_state.abrt;
@@ -826,7 +826,7 @@ static int opFSTCW_a32(uint32_t fetchdat)
{
FP_ENTER();
fetch_ea_32(fetchdat);
if (fplog) pclog("FSTCW %08X:%08X\n", easeg, cpu_state.eaaddr);
fpu_log("FSTCW %08X:%08X\n", easeg, cpu_state.eaaddr);
seteaw(cpu_state.npxc);
CLOCK_CYCLES(3);
return cpu_state.abrt;
@@ -837,7 +837,7 @@ static int opFSTCW_a32(uint32_t fetchdat)
{ \
FP_ENTER(); \
cpu_state.pc++; \
if (fplog) pclog("FCMOV %f\n", ST(fetchdat & 7)); \
fpu_log("FCMOV %f\n", ST(fetchdat & 7)); \
if (cond_ ## condition) \
{ \
cpu_state.tag[cpu_state.TOP] = cpu_state.tag[(cpu_state.TOP + fetchdat) & 7]; \