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General changes from the obattler_202406 branch

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Co-Authored-By: Miran Grča <oubattler@gmail.com>
This commit is contained in:
Jasmine Iwanek
2024-09-09 00:43:14 -04:00
parent 9d1b9b7d02
commit d00f80d3ce
57 changed files with 493 additions and 468 deletions
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2
src/sio/sio_82091aa.c
View File

@@ -78,7 +78,7 @@ lpt1_handler(i82091aa_t *dev)
}
if ((dev->regs[0x20] & 0x01) && lpt_port)
lpt1_init(lpt_port);
lpt1_setup(lpt_port);
lpt1_irq((dev->regs[0x20] & 0x08) ? LPT1_IRQ : LPT2_IRQ);
}

4
src/sio/sio_acc3221.c
View File

@@ -305,7 +305,7 @@ acc3221_lpt_handle(acc3221_t *dev)
lpt1_remove();
if (!(dev->regs[0xbe] & REG_BE_LPT1_DISABLE))
lpt1_init(dev->regs[0xbf] << 2);
lpt1_setup(dev->regs[0xbf] << 2);
}
static void
@@ -437,7 +437,7 @@ acc3221_reset(acc3221_t *dev)
serial_setup(dev->uart[1], COM2_ADDR, COM2_IRQ);
lpt1_remove();
lpt1_init(LPT1_ADDR);
lpt1_setup(LPT1_ADDR);
lpt1_irq(LPT1_IRQ);
fdc_reset(dev->fdc);

8
src/sio/sio_ali5123.c
View File

@@ -93,7 +93,7 @@ ali5123_lpt_handler(ali5123_t *dev)
if (global_enable && local_enable) {
ld_port = make_port(dev, 3) & 0xFFFC;
if ((ld_port >= 0x0100) && (ld_port <= 0x0FFC))
lpt1_init(ld_port);
lpt1_setup(ld_port);
}
lpt1_irq(lpt_irq);
}
@@ -133,8 +133,10 @@ ali5123_serial_handler(ali5123_t *dev, int uart)
}
static void
ali5123_reset(ali5123_t *dev)
ali5123_reset(void *priv)
{
ali5123_t *dev = (ali5123_t *) priv;
memset(dev->regs, 0, 48);
dev->regs[0x20] = 0x43;
@@ -490,7 +492,7 @@ const device_t ali5123_device = {
.local = 0x40,
.init = ali5123_init,
.close = ali5123_close,
.reset = NULL,
.reset = ali5123_reset,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,

4
src/sio/sio_f82c710.c
View File

@@ -104,7 +104,7 @@ f82c710_update_ports(upc_t *dev, int set)
if (dev->regs[0] & 8) {
lpt_addr = dev->regs[6] * 4;
lpt1_init(lpt_addr);
lpt1_setup(lpt_addr);
if ((lpt_addr == LPT1_ADDR) || (lpt_addr == LPT_MDA_ADDR))
lpt1_irq(LPT1_IRQ);
else if (lpt_addr == LPT2_ADDR)
@@ -215,7 +215,7 @@ f82c606_update_ports(upc_t *dev, int set)
}
if (dev->regs[0] & 8) {
lpt1_init(((uint16_t) dev->regs[6]) << 2);
lpt1_setup(((uint16_t) dev->regs[6]) << 2);
lpt1_irq(lpt1_int);
f82c710_log("LPT1 at %04X, IRQ %i\n", ((uint16_t) dev->regs[6]) << 2, lpt1_int);
}

2
src/sio/sio_fdc37c669.c
View File

@@ -107,7 +107,7 @@ fdc37c669_lpt_handler(fdc37c669_t *dev)
lpt_port_remove(dev->id);
if ((dev->regs[0x01] & 0x04) && (dev->regs[0x23] >= 0x40))
lpt_port_init(dev->id, ((uint16_t) (dev->regs[0x23] & mask)) << 2);
lpt_port_setup(dev->id, ((uint16_t) (dev->regs[0x23] & mask)) << 2);
}
static void

2
src/sio/sio_fdc37c67x.c
View File

@@ -134,7 +134,7 @@ fdc37c67x_lpt_handler(fdc37c67x_t *dev)
if (global_enable && local_enable) {
ld_port = make_port(dev, 3) & 0xFFFC;
if ((ld_port >= 0x0100) && (ld_port <= 0x0FFC))
lpt1_init(ld_port);
lpt1_setup(ld_port);
}
lpt1_irq(lpt_irq);
}

14
src/sio/sio_fdc37c6xx.c
View File

@@ -111,16 +111,16 @@ lpt1_handler(fdc37c6xx_t *dev)
lpt1_remove();
switch (dev->regs[1] & 3) {
case 1:
lpt1_init(LPT_MDA_ADDR);
lpt1_irq(7);
lpt1_setup(LPT_MDA_ADDR);
lpt1_irq(LPT_MDA_IRQ);
break;
case 2:
lpt1_init(LPT1_ADDR);
lpt1_irq(7 /*5*/);
lpt1_setup(LPT1_ADDR);
lpt1_irq(LPT1_IRQ /*LPT2_IRQ*/);
break;
case 3:
lpt1_init(LPT2_ADDR);
lpt1_irq(7 /*5*/);
lpt1_setup(LPT2_ADDR);
lpt1_irq(LPT1_IRQ /*LPT2_IRQ*/);
break;
default:
@@ -252,7 +252,7 @@ fdc37c6xx_reset(fdc37c6xx_t *dev)
serial_setup(dev->uart[1], COM2_ADDR, COM2_IRQ);
lpt1_remove();
lpt1_init(LPT1_ADDR);
lpt1_setup(LPT1_ADDR);
fdc_reset(dev->fdc);
fdc_remove(dev->fdc);

533
src/sio/sio_fdc37c93x.c
View File

@@ -35,24 +35,15 @@
#include <86box/machine.h>
#include <86box/nvr.h>
#include <86box/apm.h>
#include <86box/access_bus.h>
#include <86box/acpi.h>
#include <86box/sio.h>
#include <86box/plat_unused.h>
#define AB_RST 0x80
typedef struct access_bus_t {
uint8_t control;
uint8_t status;
uint8_t own_addr;
uint8_t data;
uint8_t clock;
uint16_t base;
} access_bus_t;
typedef struct fdc37c93x_t {
uint8_t chip_id;
uint8_t is_apm;
uint8_t is_compaq;
uint8_t has_nvr;
uint8_t tries;
uint8_t port_370;
@@ -61,51 +52,56 @@ typedef struct fdc37c93x_t {
uint8_t regs[48];
uint8_t ld_regs[11][256];
uint16_t superio_base;
uint16_t fdc_base;
uint16_t lpt_base;
uint16_t nvr_pri_base;
uint16_t nvr_sec_base;
uint16_t kbc_base;
uint16_t gpio_base; /* Set to EA */
uint16_t auxio_base;
uint16_t nvr_sec_base;
uint16_t uart_base[2];
int locked;
int cur_reg;
fdc_t *fdc;
serial_t *uart[2];
access_bus_t *access_bus;
nvr_t *nvr;
acpi_t *acpi;
void *kbc;
serial_t *uart[2];
} fdc37c93x_t;
static void fdc37c93x_write(uint16_t port, uint8_t val, void *priv);
static uint8_t fdc37c93x_read(uint16_t port, void *priv);
static uint16_t
make_port_superio(fdc37c93x_t *dev)
make_port_superio(const fdc37c93x_t *dev)
{
uint16_t r0 = dev->regs[0x26];
uint16_t r1 = dev->regs[0x27];
const uint16_t r0 = dev->regs[0x26];
const uint16_t r1 = dev->regs[0x27];
uint16_t p = (r1 << 8) + r0;
const uint16_t p = (r1 << 8) + r0;
return p;
}
static uint16_t
make_port(fdc37c93x_t *dev, uint8_t ld)
make_port(const fdc37c93x_t *dev, const uint8_t ld)
{
uint16_t r0 = dev->ld_regs[ld][0x60];
uint16_t r1 = dev->ld_regs[ld][0x61];
const uint16_t r0 = dev->ld_regs[ld][0x60];
const uint16_t r1 = dev->ld_regs[ld][0x61];
uint16_t p = (r0 << 8) + r1;
const uint16_t p = (r0 << 8) + r1;
return p;
}
static uint16_t
make_port_sec(fdc37c93x_t *dev, uint8_t ld)
make_port_sec(const fdc37c93x_t *dev, const uint8_t ld)
{
uint16_t r0 = dev->ld_regs[ld][0x62];
uint16_t r1 = dev->ld_regs[ld][0x63];
const uint16_t r0 = dev->ld_regs[ld][0x62];
const uint16_t r1 = dev->ld_regs[ld][0x63];
uint16_t p = (r0 << 8) + r1;
const uint16_t p = (r0 << 8) + r1;
return p;
}
@@ -150,66 +146,91 @@ fdc37c93x_gpio_write(uint16_t port, uint8_t val, void *priv)
static void
fdc37c93x_superio_handler(fdc37c93x_t *dev)
{
io_removehandler(dev->superio_base, 0x0002,
fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev);
dev->superio_base = make_port_superio(dev);
io_sethandler(dev->superio_base, 0x0002,
fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev);
if (!dev->is_compaq) {
if (dev->superio_base != 0x0000)
io_removehandler(dev->superio_base, 0x0002,
fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev);
dev->superio_base = make_port_superio(dev);
if (dev->superio_base != 0x0000)
io_sethandler(dev->superio_base, 0x0002,
fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev);
}
}
static void
fdc37c93x_fdc_handler(fdc37c93x_t *dev)
{
uint16_t ld_port = 0;
uint8_t global_enable = !!(dev->regs[0x22] & (1 << 0));
uint8_t local_enable = !!dev->ld_regs[0][0x30];
const uint8_t global_enable = !!(dev->regs[0x22] & (1 << 0));
const uint8_t local_enable = !!dev->ld_regs[0][0x30];
const uint16_t old_base = dev->fdc_base;
fdc_remove(dev->fdc);
if (global_enable && local_enable) {
ld_port = make_port(dev, 0) & 0xFFF8;
if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8))
fdc_set_base(dev->fdc, ld_port);
dev->fdc_base = 0x0000;
if (global_enable && local_enable)
dev->fdc_base = make_port(dev, 0) & 0xfff8;
if (dev->fdc_base != old_base) {
if ((old_base >= 0x0100) && (old_base <= 0x0ff8))
fdc_remove(dev->fdc);
if ((dev->fdc_base >= 0x0100) && (dev->fdc_base <= 0x0ff8))
fdc_set_base(dev->fdc, dev->fdc_base);
}
}
static void
fdc37c93x_lpt_handler(fdc37c93x_t *dev)
{
uint16_t ld_port = 0;
uint8_t global_enable = !!(dev->regs[0x22] & (1 << 3));
uint8_t local_enable = !!dev->ld_regs[3][0x30];
uint8_t lpt_irq = dev->ld_regs[3][0x70];
const uint8_t global_enable = !!(dev->regs[0x22] & (1 << 3));
const uint8_t local_enable = !!dev->ld_regs[3][0x30];
uint8_t lpt_irq = dev->ld_regs[3][0x70];
const uint16_t old_base = dev->lpt_base;
if (lpt_irq > 15)
lpt_irq = 0xff;
lpt1_remove();
if (global_enable && local_enable) {
ld_port = make_port(dev, 3) & 0xFFFC;
if ((ld_port >= 0x0100) && (ld_port <= 0x0FFC))
lpt1_init(ld_port);
dev->lpt_base = 0x0000;
if (global_enable && local_enable)
dev->lpt_base = make_port(dev, 3) & 0xfffc;
if (dev->lpt_base != old_base) {
if ((old_base >= 0x0100) && (old_base <= 0x0ffc))
lpt1_remove();
if ((dev->lpt_base >= 0x0100) && (dev->lpt_base <= 0x0ffc))
lpt1_setup(dev->lpt_base);
}
lpt1_irq(lpt_irq);
}
static void
fdc37c93x_serial_handler(fdc37c93x_t *dev, int uart)
fdc37c93x_serial_handler(fdc37c93x_t *dev, const int uart)
{
uint16_t ld_port = 0;
uint8_t uart_no = 4 + uart;
uint8_t global_enable = !!(dev->regs[0x22] & (1 << uart_no));
uint8_t local_enable = !!dev->ld_regs[uart_no][0x30];
const uint8_t uart_no = 4 + uart;
const uint8_t global_enable = !!(dev->regs[0x22] & (1 << uart_no));
const uint8_t local_enable = !!dev->ld_regs[uart_no][0x30];
const uint16_t old_base = dev->uart_base[uart];
serial_remove(dev->uart[uart]);
if (global_enable && local_enable) {
ld_port = make_port(dev, uart_no) & 0xFFF8;
if ((ld_port >= 0x0100) && (ld_port <= 0x0FF8))
serial_setup(dev->uart[uart], ld_port, dev->ld_regs[uart_no][0x70]);
dev->uart_base[uart] = 0x0000;
if (global_enable && local_enable)
dev->uart_base[uart] = make_port(dev, uart_no) & 0xfff8;
if (dev->uart_base[uart] != old_base) {
if ((old_base >= 0x0100) && (old_base <= 0x0ff8))
serial_remove(dev->uart[uart]);
if ((dev->uart_base[uart] >= 0x0100) && (dev->uart_base[uart] <= 0x0ff8))
serial_setup(dev->uart[uart], dev->uart_base[uart], dev->ld_regs[uart_no][0x70]);
}
serial_irq(dev->uart[uart], dev->ld_regs[uart_no][0x70]);
}
static void
fdc37c93x_nvr_pri_handler(fdc37c93x_t *dev)
fdc37c93x_nvr_pri_handler(const fdc37c93x_t *dev)
{
uint8_t local_enable = !!dev->ld_regs[6][0x30];
@@ -224,18 +245,24 @@ fdc37c93x_nvr_pri_handler(fdc37c93x_t *dev)
static void
fdc37c93x_nvr_sec_handler(fdc37c93x_t *dev)
{
uint16_t ld_port = 0;
uint8_t local_enable = !!dev->ld_regs[6][0x30];
uint8_t local_enable = !!dev->ld_regs[6][0x30];
const uint16_t old_base = dev->nvr_sec_base;
local_enable &= (((dev->ld_regs[6][0xf0] & 0xe0) == 0x80) ||
((dev->ld_regs[6][0xf0] & 0xe0) == 0xe0));
nvr_at_sec_handler(0, dev->nvr_sec_base, dev->nvr);
if (local_enable) {
dev->nvr_sec_base = ld_port = make_port_sec(dev, 6) & 0xFFFE;
dev->nvr_sec_base = 0x0000;
if (local_enable)
dev->nvr_sec_base = make_port_sec(dev, 6) & 0xfffe;
if (dev->nvr_sec_base != old_base) {
if ((old_base > 0x0000) && (old_base <= 0x0ffe))
nvr_at_sec_handler(0, dev->nvr_sec_base, dev->nvr);
/* Datasheet erratum: First it says minimum address is 0x0100, but later implies that it's 0x0000
and that default is 0x0070, same as (unrelocatable) primary NVR. */
if (ld_port <= 0x0FFE)
if ((dev->nvr_sec_base > 0x0000) && (dev->nvr_sec_base <= 0x0ffe))
nvr_at_sec_handler(1, dev->nvr_sec_base, dev->nvr);
}
}
@@ -243,22 +270,32 @@ fdc37c93x_nvr_sec_handler(fdc37c93x_t *dev)
static void
fdc37c93x_kbc_handler(fdc37c93x_t *dev)
{
uint8_t local_enable = !!dev->ld_regs[7][0x30];
const uint8_t local_enable = !!dev->ld_regs[7][0x30];
const uint16_t old_base = dev->kbc_base;
kbc_at_handler(local_enable, dev->kbc);
dev->kbc_base = local_enable ? 0x0060 : 0x0000;
if (dev->kbc_base != old_base)
kbc_at_handler(local_enable, dev->kbc);
}
static void
fdc37c93x_auxio_handler(fdc37c93x_t *dev)
{
uint16_t ld_port = 0;
uint8_t local_enable = !!dev->ld_regs[8][0x30];
const uint8_t local_enable = !!dev->ld_regs[8][0x30];
const uint16_t old_base = dev->auxio_base;
io_removehandler(dev->auxio_base, 0x0001,
fdc37c93x_auxio_read, NULL, NULL, fdc37c93x_auxio_write, NULL, NULL, dev);
if (local_enable) {
dev->auxio_base = ld_port = make_port(dev, 8);
if ((ld_port >= 0x0100) && (ld_port <= 0x0FFF))
if (local_enable)
dev->auxio_base = make_port(dev, 8);
else
dev->auxio_base = 0x0000;
if (dev->auxio_base != old_base) {
if ((old_base >= 0x0100) && (old_base <= 0x0fff))
io_removehandler(old_base, 0x0001,
fdc37c93x_auxio_read, NULL, NULL, fdc37c93x_auxio_write, NULL, NULL, dev);
if ((dev->auxio_base >= 0x0100) && (dev->auxio_base <= 0x0fff))
io_sethandler(dev->auxio_base, 0x0001,
fdc37c93x_auxio_read, NULL, NULL, fdc37c93x_auxio_write, NULL, NULL, dev);
}
@@ -267,113 +304,55 @@ fdc37c93x_auxio_handler(fdc37c93x_t *dev)
static void
fdc37c93x_gpio_handler(fdc37c93x_t *dev)
{
uint16_t ld_port = 0;
uint8_t local_enable;
const uint8_t local_enable = !dev->locked && !!(dev->regs[0x03] & 0x80);
const uint16_t old_base = dev->gpio_base;
local_enable = !!(dev->regs[0x03] & 0x80);
dev->gpio_base = 0x0000;
io_removehandler(dev->gpio_base, 0x0002,
fdc37c93x_gpio_read, NULL, NULL, fdc37c93x_gpio_write, NULL, NULL, dev);
if (local_enable) {
switch (dev->regs[0x03] & 0x03) {
case 0:
ld_port = 0xe0;
break;
case 1:
ld_port = 0xe2;
break;
case 2:
ld_port = 0xe4;
break;
case 3:
ld_port = 0xea; /* Default */
break;
if (local_enable) switch (dev->regs[0x03] & 0x03) {
default:
break;
case 0:
dev->gpio_base = 0x00e0;
break;
case 1:
dev->gpio_base = 0x00e2;
break;
case 2:
dev->gpio_base = 0x00e4;
break;
case 3:
dev->gpio_base = 0x00ea; /* Default */
break;
}
default:
break;
}
dev->gpio_base = ld_port;
if (ld_port > 0x0000)
if (dev->gpio_base != old_base) {
if (old_base != 0x0000)
io_removehandler(old_base, 0x0002,
fdc37c93x_gpio_read, NULL, NULL, fdc37c93x_gpio_write, NULL, NULL, dev);
if (dev->gpio_base > 0x0000)
io_sethandler(dev->gpio_base, 0x0002,
fdc37c93x_gpio_read, NULL, NULL, fdc37c93x_gpio_write, NULL, NULL, dev);
}
}
static uint8_t
fdc37c93x_access_bus_read(uint16_t port, void *priv)
{
const access_bus_t *dev = (access_bus_t *) priv;
uint8_t ret = 0xff;
switch (port & 3) {
case 0:
ret = (dev->status & 0xBF);
break;
case 1:
ret = (dev->own_addr & 0x7F);
break;
case 2:
ret = dev->data;
break;
case 3:
ret = (dev->clock & 0x87);
break;
default:
break;
}
return ret;
}
static void
fdc37c93x_access_bus_write(uint16_t port, uint8_t val, void *priv)
{
access_bus_t *dev = (access_bus_t *) priv;
switch (port & 3) {
case 0:
dev->control = (val & 0xCF);
break;
case 1:
dev->own_addr = (val & 0x7F);
break;
case 2:
dev->data = val;
break;
case 3:
dev->clock &= 0x80;
dev->clock |= (val & 0x07);
break;
default:
break;
}
}
static void
fdc37c93x_access_bus_handler(fdc37c93x_t *dev)
{
uint16_t ld_port = 0;
uint8_t global_enable = !!(dev->regs[0x22] & (1 << 6));
uint8_t local_enable = !!dev->ld_regs[9][0x30];
const uint8_t global_enable = !!(dev->regs[0x22] & (1 << 6));
const uint8_t local_enable = !!dev->ld_regs[9][0x30];
const uint16_t ld_port = dev->access_bus->base = make_port(dev, 9);
io_removehandler(dev->access_bus->base, 0x0004,
fdc37c93x_access_bus_read, NULL, NULL, fdc37c93x_access_bus_write, NULL, NULL, dev->access_bus);
if (global_enable && local_enable) {
dev->access_bus->base = ld_port = make_port(dev, 9);
if ((ld_port >= 0x0100) && (ld_port <= 0x0FFC))
io_sethandler(dev->access_bus->base, 0x0004,
fdc37c93x_access_bus_read, NULL, NULL, fdc37c93x_access_bus_write, NULL, NULL, dev->access_bus);
}
access_bus_handler(dev->access_bus, global_enable && local_enable, ld_port);
}
static void
fdc37c93x_acpi_handler(fdc37c93x_t *dev)
{
uint16_t ld_port = 0;
uint8_t local_enable = !!dev->ld_regs[0x0a][0x30];
uint8_t sci_irq = dev->ld_regs[0x0a][0x70];
uint16_t ld_port;
const uint8_t local_enable = !!dev->ld_regs[0x0a][0x30];
const uint8_t sci_irq = dev->ld_regs[0x0a][0x70];
acpi_update_io_mapping(dev->acpi, 0x0000, local_enable);
if (local_enable) {
@@ -392,41 +371,49 @@ fdc37c93x_acpi_handler(fdc37c93x_t *dev)
acpi_set_irq_line(dev->acpi, sci_irq);
}
static void
fdc37c93x_state_change(fdc37c93x_t *dev, const uint8_t locked)
{
dev->locked = locked;
fdc_3f1_enable(dev->fdc, !locked);
fdc37c93x_gpio_handler(dev);
}
static void
fdc37c93x_write(uint16_t port, uint8_t val, void *priv)
{
fdc37c93x_t *dev = (fdc37c93x_t *) priv;
uint8_t index = (port & 1) ? 0 : 1;
uint8_t valxor = 0x00;
uint8_t keep = 0x00;
uint8_t valxor;
/* Compaq Presario 4500: Unlock at FB, Register at EA, Data at EB, Lock at F9. */
if ((port == 0xea) || (port == 0xf9) || (port == 0xfb))
if (port == 0xea)
index = 1;
else if (port == 0xeb)
index = 0;
if (index) {
if ((val == 0x55) && !dev->locked) {
if (port == 0xfb) {
fdc37c93x_state_change(dev, 1);
dev->tries = 0;
return;
} else if (port == 0xf9) {
fdc37c93x_state_change(dev, 0);
return;
} else if (index) {
if ((!dev->is_compaq) && (val == 0x55) && !dev->locked) {
if (dev->tries) {
dev->locked = 1;
fdc_3f1_enable(dev->fdc, 0);
fdc37c93x_state_change(dev, 1);
dev->tries = 0;
} else
dev->tries++;
} else {
if (dev->locked) {
if (val == 0xaa) {
dev->locked = 0;
fdc_3f1_enable(dev->fdc, 1);
return;
}
dev->cur_reg = val;
} else {
if (dev->tries)
dev->tries = 0;
} else if (dev->locked) {
if ((!dev->is_compaq) && (val == 0xaa)) {
fdc37c93x_state_change(dev, 0);
return;
}
}
dev->cur_reg = val;
} else if ((!dev->is_compaq) && dev->tries)
dev->tries = 0;
return;
} else {
if (dev->locked) {
@@ -436,6 +423,8 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv)
return;
dev->regs[dev->cur_reg] = val;
} else {
uint8_t keep = 0x00;
valxor = val ^ dev->ld_regs[dev->regs[7]][dev->cur_reg];
if (((dev->cur_reg & 0xF0) == 0x70) && (dev->regs[7] < 4))
return;
@@ -479,9 +468,11 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv)
if (dev->cur_reg < 48) {
switch (dev->cur_reg) {
case 0x02:
if (val == 0x02)
fdc37c93x_state_change(dev, 0);
break;
case 0x03:
if (valxor & 0x83)
fdc37c93x_gpio_handler(dev);
dev->regs[0x03] &= 0x83;
break;
case 0x22:
@@ -788,91 +779,95 @@ fdc37c93x_read(uint16_t port, void *priv)
static void
fdc37c93x_reset(fdc37c93x_t *dev)
{
memset(dev->regs, 0, 48);
memset(dev->regs, 0x00, sizeof(dev->regs));
dev->regs[0x03] = 0x03;
dev->regs[0x20] = dev->chip_id;
dev->regs[0x21] = 0x01;
dev->regs[0x22] = 0x39;
dev->regs[0x24] = 0x04;
if (dev->chip_id != 0x02) {
dev->regs[0x26] = dev->port_370 ? 0x70 : 0xF0;
dev->regs[0x27] = 0x03;
}
dev->regs[0x26] = dev->port_370 ? 0x70 : 0xf0;
dev->regs[0x27] = 0x03;
for (uint8_t i = 0; i < 11; i++)
memset(dev->ld_regs[i], 0, 256);
memset(dev->ld_regs, 0x00, sizeof(dev->ld_regs));
/* Logical device 0: FDD */
dev->ld_regs[0][0x30] = 0;
dev->ld_regs[0][0x60] = 3;
dev->ld_regs[0][0x61] = 0xF0;
dev->ld_regs[0][0x70] = 6;
dev->ld_regs[0][0x74] = 2;
dev->ld_regs[0][0xF0] = 0xE;
dev->ld_regs[0][0xF2] = 0xFF;
dev->ld_regs[0x00][0x30] = 0x00;
dev->ld_regs[0x00][0x60] = 0x03;
dev->ld_regs[0x00][0x61] = 0xf0;
dev->ld_regs[0x00][0x70] = 0x06;
dev->ld_regs[0x00][0x74] = 0x02;
dev->ld_regs[0x00][0xf0] = 0x0e;
dev->ld_regs[0x00][0xf2] = 0xff;
/* Logical device 1: IDE1 */
dev->ld_regs[1][0x30] = 0;
dev->ld_regs[1][0x60] = 1;
dev->ld_regs[1][0x61] = 0xF0;
dev->ld_regs[1][0x62] = 3;
dev->ld_regs[1][0x63] = 0xF6;
dev->ld_regs[1][0x70] = 0xE;
dev->ld_regs[1][0xF0] = 0xC;
dev->ld_regs[0x01][0x30] = 0x00;
dev->ld_regs[0x01][0x60] = 0x01;
dev->ld_regs[0x01][0x61] = 0xf0;
dev->ld_regs[0x01][0x62] = 0x03;
dev->ld_regs[0x01][0x63] = 0xf6;
dev->ld_regs[0x01][0x70] = 0x0e;
dev->ld_regs[0x01][0xf0] = 0x0c;
/* Logical device 2: IDE2 */
dev->ld_regs[2][0x30] = 0;
dev->ld_regs[2][0x60] = 1;
dev->ld_regs[2][0x61] = 0x70;
dev->ld_regs[2][0x62] = 3;
dev->ld_regs[2][0x63] = 0x76;
dev->ld_regs[2][0x70] = 0xF;
dev->ld_regs[0x02][0x30] = 0x00;
dev->ld_regs[0x02][0x60] = 0x01;
dev->ld_regs[0x02][0x61] = 0x70;
dev->ld_regs[0x02][0x62] = 0x03;
dev->ld_regs[0x02][0x63] = 0x76;
dev->ld_regs[0x02][0x70] = 0x0f;
/* Logical device 3: Parallel Port */
dev->ld_regs[3][0x30] = 0;
dev->ld_regs[3][0x60] = 3;
dev->ld_regs[3][0x61] = 0x78;
dev->ld_regs[3][0x70] = 7;
dev->ld_regs[3][0x74] = 4;
dev->ld_regs[3][0xF0] = 0x3C;
dev->ld_regs[0x03][0x30] = 0x00;
dev->ld_regs[0x03][0x60] = 0x03;
dev->ld_regs[0x03][0x61] = 0x78;
dev->ld_regs[0x03][0x70] = 0x07;
dev->ld_regs[0x03][0x74] = 0x04;
dev->ld_regs[0x03][0xf0] = 0x3c;
/* Logical device 4: Serial Port 1 */
dev->ld_regs[4][0x30] = 0;
dev->ld_regs[4][0x60] = 3;
dev->ld_regs[4][0x61] = 0xf8;
dev->ld_regs[4][0x70] = 4;
dev->ld_regs[4][0xF0] = 3;
serial_setup(dev->uart[0], COM1_ADDR, dev->ld_regs[4][0x70]);
dev->ld_regs[0x04][0x30] = 0x00;
dev->ld_regs[0x04][0x60] = 0x03;
dev->ld_regs[0x04][0x61] = 0xf8;
dev->ld_regs[0x04][0x70] = 0x04;
dev->ld_regs[0x04][0xf0] = 0x03;
serial_irq(dev->uart[0], dev->ld_regs[4][0x70]);
/* Logical device 5: Serial Port 2 */
dev->ld_regs[5][0x30] = 0;
dev->ld_regs[5][0x60] = 2;
dev->ld_regs[5][0x61] = 0xf8;
dev->ld_regs[5][0x70] = 3;
dev->ld_regs[5][0x74] = 4;
dev->ld_regs[5][0xF1] = 2;
dev->ld_regs[5][0xF2] = 3;
serial_setup(dev->uart[1], COM2_ADDR, dev->ld_regs[5][0x70]);
dev->ld_regs[0x05][0x30] = 0x00;
dev->ld_regs[0x05][0x60] = 0x02;
dev->ld_regs[0x05][0x61] = 0xf8;
dev->ld_regs[0x05][0x70] = 0x03;
dev->ld_regs[0x05][0x74] = 0x04;
dev->ld_regs[0x05][0xf1] = 0x02;
dev->ld_regs[0x05][0xf2] = 0x03;
serial_irq(dev->uart[1], dev->ld_regs[5][0x70]);
/* Logical device 6: RTC */
dev->ld_regs[6][0x30] = 0;
dev->ld_regs[6][0x60] = 0x70;
if (dev->chip_id != 0x02)
dev->ld_regs[6][0x63] = (dev->has_nvr) ? 0x70 : 0x00;
dev->ld_regs[6][0xF0] = 0;
dev->ld_regs[6][0xF4] = 3;
dev->ld_regs[0x06][0x30] = 0x00;
dev->ld_regs[0x06][0x63] = (dev->has_nvr) ? 0x70 : 0x00;
dev->ld_regs[0x06][0xf0] = 0x00;
dev->ld_regs[0x06][0xf4] = 0x03;
/* Logical device 7: Keyboard */
dev->ld_regs[7][0x30] = 0;
dev->ld_regs[7][0x61] = 0x60;
dev->ld_regs[7][0x70] = 1;
dev->ld_regs[0x07][0x30] = 0x00;
dev->ld_regs[0x07][0x61] = 0x60;
dev->ld_regs[0x07][0x70] = 0x01;
/* Logical device 8: Auxiliary I/O */
dev->ld_regs[0x08][0x30] = 0x00;
dev->ld_regs[0x08][0x60] = 0x00;
dev->ld_regs[0x08][0x61] = 0x00;
/* Logical device 9: ACCESS.bus */
dev->ld_regs[0x09][0x30] = 0x00;
dev->ld_regs[0x09][0x60] = 0x00;
dev->ld_regs[0x09][0x61] = 0x00;
/* Logical device A: ACPI */
dev->ld_regs[0x0a][0x30] = 0x00;
dev->ld_regs[0x0a][0x60] = 0x00;
dev->ld_regs[0x0a][0x61] = 0x00;
fdc37c93x_gpio_handler(dev);
fdc37c93x_lpt_handler(dev);
@@ -907,36 +902,6 @@ fdc37c93x_reset(fdc37c93x_t *dev)
dev->locked = 0;
}
static void
access_bus_close(void *priv)
{
access_bus_t *dev = (access_bus_t *) priv;
free(dev);
}
static void *
access_bus_init(UNUSED(const device_t *info))
{
access_bus_t *dev = (access_bus_t *) calloc(1, sizeof(access_bus_t));
return dev;
}
static const device_t access_bus_device = {
.name = "SMC FDC37C932FR ACCESS.bus",
.internal_name = "access_bus",
.flags = 0,
.local = 0x03,
.init = access_bus_init,
.close = access_bus_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
static void
fdc37c93x_close(void *priv)
{
@@ -948,19 +913,18 @@ fdc37c93x_close(void *priv)
static void *
fdc37c93x_init(const device_t *info)
{
int is_compaq;
fdc37c93x_t *dev = (fdc37c93x_t *) calloc(1, sizeof(fdc37c93x_t));
dev->fdc = device_add(&fdc_at_smc_device);
dev->uart[0] = device_add_inst(&ns16550_device, 1);
dev->uart[1] = device_add_inst(&ns16550_device, 2);
dev->uart[0] = device_add_inst(&ns16550_device, 1);
dev->uart[1] = device_add_inst(&ns16550_device, 2);
dev->chip_id = info->local & 0xff;
dev->is_apm = (info->local >> 8) & 0x01;
is_compaq = (info->local >> 8) & 0x02;
dev->has_nvr = !((info->local >> 8) & 0x04);
dev->port_370 = ((info->local >> 8) & 0x08);
dev->chip_id = info->local & 0xff;
dev->is_apm = (info->local >> 8) & 0x01;
dev->is_compaq = (info->local >> 8) & 0x02;
dev->has_nvr = !((info->local >> 8) & 0x04);
dev->port_370 = ((info->local >> 8) & 0x08);
dev->gpio_regs[0] = 0xff;
#if 0
@@ -981,7 +945,7 @@ fdc37c93x_init(const device_t *info)
if (dev->is_apm)
dev->acpi = device_add(&acpi_smc_device);
if (is_compaq) {
if (dev->is_compaq) {
io_sethandler(0x0ea, 0x0002,
fdc37c93x_read, NULL, NULL, fdc37c93x_write, NULL, NULL, dev);
io_sethandler(0x0f9, 0x0001,
@@ -992,6 +956,16 @@ fdc37c93x_init(const device_t *info)
dev->kbc = device_add(&keyboard_ps2_ami_pci_device);
/* Set the defaults here so the ports can be removed by fdc37c93x_reset(). */
dev->fdc_base = 0x03f0;
dev->lpt_base = 0x0378;
dev->uart_base[0] = 0x03f8;
dev->uart_base[1] = 0x02f8;
dev->nvr_pri_base = 0x0070;
dev->nvr_sec_base = 0x0070;
dev->kbc_base = 0x0060;
dev->gpio_base = 0x00ea;
fdc37c93x_reset(dev);
if (dev->chip_id == 0x02) {
@@ -1115,4 +1089,3 @@ const device_t fdc37c935_no_nvr_device = {
.force_redraw = NULL,
.config = NULL
};

2
src/sio/sio_fdc37m60x.c
View File

@@ -216,7 +216,7 @@ fdc37m60x_lpt_handler(fdc37m60x_t *dev)
lpt1_remove();
if (ENABLED(3) || (POWER_CONTROL & 0x08)) {
lpt1_init(BASE_ADDRESS(3));
lpt1_setup(BASE_ADDRESS(3));
lpt1_irq(IRQ(3) & 0xf);
fdc37m60x_log("SMC60x-LPT: BASE %04x IRQ %d\n", BASE_ADDRESS(3), IRQ(3) & 0xf);
}

2
src/sio/sio_it86x1f.c
View File

@@ -294,7 +294,7 @@ it8661f_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *pri
if (config->activate && (config->io[0].base != ISAPNP_IO_DISABLED)) {
it86x1f_log("IT86x1F: LPT enabled at port %04X IRQ %d\n", config->io[0].base, config->irq[0].irq);
lpt1_init(config->io[0].base);
lpt1_setup(config->io[0].base);
} else {
it86x1f_log("IT86x1F: LPT disabled\n");
}

26
src/sio/sio_pc87306.c
View File

@@ -154,7 +154,7 @@ lpt1_handler(pc87306_t *dev)
lpt_irq = (dev->regs[0x1b] & 0x20) ? 7 : 5;
if (lpt_port)
lpt1_init(lpt_port);
lpt1_setup(lpt_port);
lpt1_irq(lpt_irq);
}
@@ -303,26 +303,26 @@ pc87306_write(uint16_t port, uint8_t val, void *priv)
}
break;
case 0x02:
if (valxor & 1) {
if (valxor & 0x01) {
lpt1_remove();
serial_remove(dev->uart[0]);
serial_remove(dev->uart[1]);
serial_remove(dev->uart[0x00]);
serial_remove(dev->uart[0x01]);
fdc_remove(dev->fdc);
if (!(val & 1)) {
if (dev->regs[0] & 1)
if (dev->regs[0x00] & 0x01)
lpt1_handler(dev);
if (dev->regs[0] & 2)
if (dev->regs[0x00] & 0x02)
serial_handler(dev, 0);
if (dev->regs[0] & 4)
if (dev->regs[0x00] & 0x04)
serial_handler(dev, 1);
if (dev->regs[0] & 8)
fdc_set_base(dev->fdc, (dev->regs[0] & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
if (dev->regs[0x00] & 0x08)
fdc_set_base(dev->fdc, (dev->regs[0x00] & 0x20) ? FDC_SECONDARY_ADDR : FDC_PRIMARY_ADDR);
}
}
if (valxor & 8) {
if (valxor & 0x08) {
lpt1_remove();
if ((dev->regs[0] & 1) && !(dev->regs[2] & 1))
if ((dev->regs[0x00] & 1) && !(dev->regs[0x02] & 1))
lpt1_handler(dev);
}
break;
@@ -359,7 +359,7 @@ pc87306_write(uint16_t port, uint8_t val, void *priv)
lpt1_handler(dev);
}
break;
case 0x1B:
case 0x1b:
if (valxor & 0x70) {
lpt1_remove();
if (!(val & 0x40))
@@ -368,7 +368,7 @@ pc87306_write(uint16_t port, uint8_t val, void *priv)
lpt1_handler(dev);
}
break;
case 0x1C:
case 0x1c:
if (valxor) {
serial_remove(dev->uart[0]);
serial_remove(dev->uart[1]);

2
src/sio/sio_pc87307.c
View File

@@ -200,7 +200,7 @@ lpt1_handler(pc87307_t *dev)
irq = (dev->ld_regs[0x04][0x40] & 0x0f);
if (active && (addr <= 0xfffc)) {
lpt1_init(addr);
lpt1_setup(addr);
lpt1_irq(irq);
}
}

2
src/sio/sio_pc87309.c
View File

@@ -137,7 +137,7 @@ lpt1_handler(pc87309_t *dev)
irq = (dev->ld_regs[0x01][0x40] & 0x0f);
if (active) {
lpt1_init(addr);
lpt1_setup(addr);
lpt1_irq(irq);
}
}

2
src/sio/sio_pc87310.c
View File

@@ -106,7 +106,7 @@ lpt1_handler(pc87310_t *dev)
}
if (lpt_port)
lpt1_init(lpt_port);
lpt1_setup(lpt_port);
lpt1_irq(lpt_irq);
}

2
src/sio/sio_pc87311.c
View File

@@ -220,7 +220,7 @@ pc87311_lpt_handler(pc87311_t *dev)
default:
break;
}
lpt1_init(dev->base);
lpt1_setup(dev->base);
lpt1_irq(dev->irq);
pc87311_log("PC87311-LPT: BASE %04x IRQ %01x\n", dev->base, dev->irq);
}

2
src/sio/sio_pc87332.c
View File

@@ -77,7 +77,7 @@ lpt1_handler(pc87332_t *dev)
}
if (lpt_port)
lpt1_init(lpt_port);
lpt1_setup(lpt_port);
lpt1_irq(lpt_irq);
}

2
src/sio/sio_prime3b.c
View File

@@ -176,7 +176,7 @@ prime3b_lpt_handler(prime3b_t *dev)
{
uint16_t lpt_base = (ASR & 2) ? LPT_MDA_ADDR : (!(ASR & 1) ? LPT1_ADDR : LPT2_ADDR);
lpt1_remove();
lpt1_init(lpt_base);
lpt1_setup(lpt_base);
lpt1_irq(LPT1_IRQ);
prime3b_log("Prime3B-LPT: Enabled with base %03x\n", lpt_base);
}

2
src/sio/sio_prime3c.c
View File

@@ -241,7 +241,7 @@ prime3c_lpt_handler(prime3c_t *dev)
lpt1_remove();
if (!(FUNCTION_SELECT & 0x03)) {
lpt1_init(LPT_BASE_ADDRESS << 2);
lpt1_setup(LPT_BASE_ADDRESS << 2);
lpt1_irq(FDC_LPT_IRQ & 0xf);
prime3c_log("Prime3C-LPT: BASE %04x IRQ %02x\n", LPT_BASE_ADDRESS << 2, FDC_LPT_IRQ & 0xf);
}

10
src/sio/sio_um8663f.c
View File

@@ -106,12 +106,12 @@ um8663f_lpt_handler(um8663f_t *dev)
if (dev->regs[0] & 0x08) {
switch ((dev->regs[1] >> 3) & 0x01) {
case 0x01:
lpt1_init(LPT1_ADDR);
lpt1_irq(7);
lpt1_setup(LPT1_ADDR);
lpt1_irq(LPT1_IRQ);
break;
case 0x00:
lpt1_init(LPT2_ADDR);
lpt1_irq(5);
lpt1_setup(LPT2_ADDR);
lpt1_irq(LPT2_IRQ);
break;
default:
@@ -231,7 +231,7 @@ um8663f_reset(void *priv)
serial_setup(dev->uart[1], COM2_ADDR, COM2_IRQ);
lpt1_remove();
lpt1_init(LPT1_ADDR);
lpt1_setup(LPT1_ADDR);
fdc_reset(dev->fdc);
fdc_remove(dev->fdc);

2
src/sio/sio_um8669f.c
View File

@@ -207,7 +207,7 @@ um8669f_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *pri
if (config->activate && (config->io[0].base != ISAPNP_IO_DISABLED)) {
um8669f_log("UM8669F: LPT enabled at port %04X IRQ %d\n", config->io[0].base, config->irq[0].irq);
lpt1_init(config->io[0].base);
lpt1_setup(config->io[0].base);
} else {
um8669f_log("UM8669F: LPT disabled\n");
}

2
src/sio/sio_vt82c686.c
View File

@@ -86,7 +86,7 @@ vt82c686_lpt_handler(vt82c686_t *dev)
lpt1_remove();
if (((dev->regs[0x02] & 0x03) != 0x03) && !(dev->regs[0x0f] & 0x11) && (io_base >= 0x100) && (io_base <= io_mask))
lpt1_init(io_base);
lpt1_setup(io_base);
if (dev->lpt_irq) {
lpt1_irq(dev->lpt_irq);

4
src/sio/sio_w83787f.c
View File

@@ -197,7 +197,7 @@ w83787f_lpt_handler(w83787f_t *dev)
lpt1_remove();
if (enable) {
lpt1_init(addr);
lpt1_setup(addr);
lpt1_irq(irq);
}
}
@@ -378,7 +378,7 @@ w83787f_reset(w83787f_t *dev)
uint16_t hefere = dev->reg_init & 0x0100;
lpt1_remove();
lpt1_init(LPT1_ADDR);
lpt1_setup(LPT1_ADDR);
lpt1_irq(LPT1_IRQ);
memset(dev->regs, 0, 0x2A);

2
src/sio/sio_w83877f.c
View File

@@ -168,7 +168,7 @@ w83877f_lpt_handler(w83877f_t *dev)
lpt1_remove();
if (!(dev->regs[4] & 0x80) && (dev->regs[0x23] & 0xc0))
lpt1_init(make_port(dev, 0x23));
lpt1_setup(make_port(dev, 0x23));
lpt_irq = 0xff;

4
src/sio/sio_w83977f.c
View File

@@ -112,14 +112,14 @@ w83977f_lpt_handler(w83977f_t *dev)
lpt2_remove();
if ((dev->dev_regs[1][0x00] & 0x01) && (dev->regs[0x22] & 0x08) && (io_base >= 0x100) && (io_base <= io_mask))
lpt2_init(io_base);
lpt2_setup(io_base);
lpt2_irq(dev->dev_regs[1][0x40] & 0x0f);
} else {
lpt1_remove();
if ((dev->dev_regs[1][0x00] & 0x01) && (dev->regs[0x22] & 0x08) && (io_base >= 0x100) && (io_base <= io_mask))
lpt1_init(io_base);
lpt1_setup(io_base);
lpt1_irq(dev->dev_regs[1][0x40] & 0x0f);
}