Finished the headland fixes, now EMS works again.
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OBattler
@@ -126,7 +126,7 @@ get_addr(headland_t *dev, uint32_t addr, headland_mr_t *mr)
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else
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addr |= (mr->mr & 0x180) << 12;
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}
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} else if (((mr == NULL) || !mr->valid) && ((dev->cr[0] & 4) == 0) && (mem_size >= 1024) && (addr >= 0x100000))
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} else if (((mr == NULL) || ((mr != NULL) && !mr->valid)) && ((dev->cr[0] & 4) == 0) && (mem_size >= 1024) && (addr >= 0x100000))
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addr -= 0x60000;
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return addr;
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@@ -134,31 +134,42 @@ get_addr(headland_t *dev, uint32_t addr, headland_mr_t *mr)
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static void
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set_global_EMS_state(headland_t *dev, int state)
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hl_ems_disable(headland_t *dev, uint8_t mar, uint32_t base_addr, uint8_t indx)
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{
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mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], ram + base_addr);
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mem_mapping_disable(&dev->ems_mapping[mar & 0x3f]);
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if (indx < 24) {
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mem_set_mem_state(base_addr, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
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mem_mapping_enable(&dev->upper_mapping[indx]);
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} else
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mem_set_mem_state(base_addr, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
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}
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static void
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hl_ems_update(headland_t *dev, uint8_t mar)
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{
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uint32_t base_addr, virt_addr;
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int i;
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uint8_t indx = mar & 0x1f;
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for (i = 0; i < 32; i++) {
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base_addr = (i + 16) << 14;
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if (i >= 24)
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base_addr += 0x20000;
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if ((state & 2) && (dev->ems_mr[((state & 1) << 5) | i].mr & 0x200)) {
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virt_addr = get_addr(dev, base_addr, &dev->ems_mr[((state & 1) << 5) | i]);
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if (i < 24)
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mem_mapping_disable(&dev->upper_mapping[i]);
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mem_mapping_disable(&dev->ems_mapping[(((state ^ 1) & 1) << 5) | i]);
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mem_mapping_enable(&dev->ems_mapping[((state & 1) << 5) | i]);
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base_addr = (indx + 16) << 14;
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if (indx >= 24)
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base_addr += 0x20000;
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/* Do not disable unless the MAR at the correct context is locally disabled or
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EMS is globally disabled. */
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if (!(dev->cr[0] & 2) || !(dev->ems_mr[(mar & 0x1f) | ((dev->cr[0] & 1) << 5)].mr & 0x200))
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hl_ems_disable(dev, mar, base_addr, indx);
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if ((dev->cr[0] & 2) && ((dev->cr[0] & 1) == ((mar & 0x20) >> 5))) {
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if (dev->ems_mr[mar & 0x3f].mr & 0x200) {
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mem_set_mem_state(base_addr, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
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virt_addr = get_addr(dev, base_addr, &dev->ems_mr[mar & 0x3f]);
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if (indx < 24)
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mem_mapping_disable(&dev->upper_mapping[indx]);
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if (virt_addr < ((uint32_t)mem_size << 10))
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mem_mapping_set_exec(&dev->ems_mapping[((state & 1) << 5) | i], ram + virt_addr);
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mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], ram + virt_addr);
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else
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mem_mapping_set_exec(&dev->ems_mapping[((state & 1) << 5) | i], NULL);
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} else {
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mem_mapping_set_exec(&dev->ems_mapping[((state & 1) << 5) | i], ram + base_addr);
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mem_mapping_disable(&dev->ems_mapping[(((state ^ 1) & 1) << 5) | i]);
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mem_mapping_disable(&dev->ems_mapping[((state & 1) << 5) | i]);
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if (i < 24)
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mem_mapping_enable(&dev->upper_mapping[i]);
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mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], NULL);
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mem_mapping_enable(&dev->ems_mapping[mar & 0x3f]);
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}
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}
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@@ -166,6 +177,16 @@ set_global_EMS_state(headland_t *dev, int state)
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}
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static void
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set_global_EMS_state(headland_t *dev, int state)
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{
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int i;
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for (i = 0; i < 64; i++)
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hl_ems_update(dev, i);
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}
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static void
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memmap_state_update(headland_t *dev)
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{
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@@ -176,7 +197,7 @@ memmap_state_update(headland_t *dev)
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addr = get_addr(dev, 0x40000 + (i << 14), NULL);
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mem_mapping_set_exec(&dev->upper_mapping[i], addr < ((uint32_t)mem_size << 10) ? ram + addr : NULL);
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}
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mem_set_mem_state(0xA0000, 0x40000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
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// mem_set_mem_state(0xA0000, 0x40000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
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if (mem_size > 640) {
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if ((dev->cr[0] & 4) == 0) {
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mem_mapping_set_addr(&dev->mid_mapping, 0x100000, mem_size > 1024 ? 0x60000 : (mem_size - 640) << 10);
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@@ -203,8 +224,7 @@ static void
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hl_write(uint16_t addr, uint8_t val, void *priv)
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{
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headland_t *dev = (headland_t *)priv;
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uint32_t base_addr, virt_addr;
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uint8_t old_val, indx;
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uint8_t old_val;
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switch(addr) {
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case 0x0022:
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@@ -232,21 +252,7 @@ hl_write(uint16_t addr, uint8_t val, void *priv)
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case 0x01ec:
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dev->ems_mr[dev->ems_mar & 0x3f].mr = val | 0xff00;
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indx = dev->ems_mar & 0x1f;
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base_addr = (indx + 16) << 14;
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if (indx >= 24)
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base_addr += 0x20000;
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if ((dev->cr[0] & 2) && ((dev->cr[0] & 1) == ((dev->ems_mar & 0x20) >> 5))) {
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virt_addr = get_addr(dev, base_addr, &dev->ems_mr[dev->ems_mar & 0x3F]);
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if (indx < 24)
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mem_mapping_disable(&dev->upper_mapping[indx]);
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if (virt_addr < ((uint32_t)mem_size << 10))
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mem_mapping_set_exec(&dev->ems_mapping[dev->ems_mar & 0x3f], ram + virt_addr);
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else
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mem_mapping_set_exec(&dev->ems_mapping[dev->ems_mar & 0x3f], NULL);
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mem_mapping_enable(&dev->ems_mapping[dev->ems_mar & 0x3f]);
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flushmmucache();
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}
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hl_ems_update(dev, dev->ems_mar & 0x3f);
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if (dev->ems_mar & 0x80)
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dev->ems_mar++;
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break;
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@@ -314,34 +320,11 @@ static void
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hl_writew(uint16_t addr, uint16_t val, void *priv)
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{
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headland_t *dev = (headland_t *)priv;
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uint32_t base_addr, virt_addr;
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uint8_t indx;
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switch(addr) {
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case 0x01ec:
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dev->ems_mr[dev->ems_mar & 0x3f].mr = val;
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indx = dev->ems_mar & 0x1f;
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base_addr = (indx + 16) << 14;
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if (indx >= 24)
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base_addr += 0x20000;
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if ((dev->cr[0] & 2) && (dev->cr[0] & 1) == ((dev->ems_mar & 0x20) >> 5)) {
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if (val & 0x200) {
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virt_addr = get_addr(dev, base_addr, &dev->ems_mr[dev->ems_mar & 0x3f]);
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if (indx < 24)
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mem_mapping_disable(&dev->upper_mapping[indx]);
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if (virt_addr < ((uint32_t)mem_size << 10))
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mem_mapping_set_exec(&dev->ems_mapping[dev->ems_mar & 0x3f], ram + virt_addr);
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else
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mem_mapping_set_exec(&dev->ems_mapping[dev->ems_mar & 0x3f], NULL);
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mem_mapping_enable(&dev->ems_mapping[dev->ems_mar & 0x3f]);
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} else {
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mem_mapping_set_exec(&dev->ems_mapping[dev->ems_mar & 0x3f], ram + base_addr);
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mem_mapping_disable(&dev->ems_mapping[dev->ems_mar & 0x3f]);
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if (indx < 24)
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mem_mapping_enable(&dev->upper_mapping[indx]);
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}
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flushmmucache();
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}
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hl_ems_update(dev, dev->ems_mar & 0x3f);
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if (dev->ems_mar & 0x80)
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dev->ems_mar++;
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break;
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@@ -550,10 +533,12 @@ headland_init(const device_t *info)
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} else
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dev->cr[4] = 0x00;
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io_sethandler(0x01ec, 1,
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io_sethandler(0x01ec, 4,
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hl_read,hl_readw,NULL, hl_write,hl_writew,NULL, dev);
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io_sethandler(0x01ed, 3, hl_read,NULL,NULL, hl_write,NULL,NULL, dev);
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dev->null_mr.valid = 0;
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dev->null_mr.mr = 0xff;
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dev->null_mr.headland = dev;
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for (i = 0; i < 64; i++) {
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dev->ems_mr[i].valid = 1;
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@@ -604,7 +589,8 @@ headland_init(const device_t *info)
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mem_read_b, mem_read_w, mem_read_l,
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mem_write_b, mem_write_w, mem_write_l,
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ram + (((i & 31) + ((i & 31) >= 24 ? 24 : 16)) << 14),
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0, &dev->ems_mr[i]);
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MEM_MAPPING_INTERNAL, &dev->ems_mr[i]);
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mem_mapping_disable(&dev->ems_mapping[i]);
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}
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memmap_state_update(dev);
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