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Finished the great internal machine reorganization and added the FIC PO-6000.

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This commit is contained in:
OBattler
2025-08-13 23:43:51 +02:00
parent 6646747528
commit d2c8dab342
46 changed files with 8739 additions and 7957 deletions
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491
src/machine/m_at_socket7_3v.c
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@@ -8,11 +8,9 @@
*
* Implementation of Socket 7 (Single Voltage) machines.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2020 Miran Grca.
* Copyright 2016-2025 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
@@ -43,75 +41,7 @@
#include <86box/plat_unused.h>
#include <86box/sound.h>
static void
machine_at_thor_gpio_init(void)
{
uint32_t gpio = 0xffffe1cf;
/* Register 0x0078 (Undocumented): */
/* Bit 5: 0 = Multiplier. */
/* Bit 4: 0 = Multiplier. */
/* 1.5: 0, 0. */
/* 3.0: 0, 1. */
/* 2.0: 1, 0. */
/* 2.5: 1, 1. */
/* Bit 1: 0 = Error beep, 1 = No error. */
if (cpu_dmulti <= 1.5)
gpio |= 0xffff0000;
else if ((cpu_dmulti > 1.5) && (cpu_dmulti <= 2.0))
gpio |= 0xffff0020;
else if ((cpu_dmulti > 2.0) && (cpu_dmulti <= 2.5))
gpio |= 0xffff0030;
else if (cpu_dmulti > 2.5)
gpio |= 0xffff0010;
/* Register 0x0079: */
/* Bit 7: 0 = Clear password, 1 = Keep password. */
/* Bit 6: 0 = NVRAM cleared by jumper, 1 = NVRAM normal. */
/* Bit 5: 0 = CMOS Setup disabled, 1 = CMOS Setup enabled. */
/* Bit 4: External CPU clock (Switch 8). */
/* Bit 3: External CPU clock (Switch 7). */
/* 50 MHz: Switch 7 = Off, Switch 8 = Off. */
/* 60 MHz: Switch 7 = On, Switch 8 = Off. */
/* 66 MHz: Switch 7 = Off, Switch 8 = On. */
/* Bit 2: 0 = On-board audio absent, 1 = On-board audio present. */
/* Bit 1: 0 = Soft-off capable power supply present, 1 = Soft-off capable power supply absent. */
/* Bit 0: 0 = Reserved. */
/* NOTE: A bit is read as 1 if switch is off, and as 0 if switch is on. */
if (cpu_busspeed <= 50000000)
gpio |= 0xffff0000;
else if ((cpu_busspeed > 50000000) && (cpu_busspeed <= 60000000))
gpio |= 0xffff0800;
else if (cpu_busspeed > 60000000)
gpio |= 0xffff1000;
machine_set_gpio_default(gpio);
}
static void
machine_at_thor_common_init(const machine_t *model, int has_video)
{
machine_at_common_init_ex(model, 2);
machine_at_thor_gpio_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_VIDEO, 4, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 3, 4, 2, 1);
pci_register_slot(0x10, PCI_CARD_NORMAL, 4, 3, 2, 1);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
if (has_video && (gfxcard[0] == VID_INTERNAL))
device_add(machine_get_vid_device(machine));
device_add(&i430fx_device);
device_add(&piix_device);
device_add_params(&pc87306_device, (void *) PCX730X_AMI);
device_add(&intel_flash_bxt_ami_device);
}
/* i430FX */
static void
machine_at_p54tp4xe_common_init(const machine_t *model)
{
@@ -192,6 +122,75 @@ machine_at_exp8551_init(const machine_t *model)
return ret;
}
static void
machine_at_thor_gpio_init(void)
{
uint32_t gpio = 0xffffe1cf;
/* Register 0x0078 (Undocumented): */
/* Bit 5: 0 = Multiplier. */
/* Bit 4: 0 = Multiplier. */
/* 1.5: 0, 0. */
/* 3.0: 0, 1. */
/* 2.0: 1, 0. */
/* 2.5: 1, 1. */
/* Bit 1: 0 = Error beep, 1 = No error. */
if (cpu_dmulti <= 1.5)
gpio |= 0xffff0000;
else if ((cpu_dmulti > 1.5) && (cpu_dmulti <= 2.0))
gpio |= 0xffff0020;
else if ((cpu_dmulti > 2.0) && (cpu_dmulti <= 2.5))
gpio |= 0xffff0030;
else if (cpu_dmulti > 2.5)
gpio |= 0xffff0010;
/* Register 0x0079: */
/* Bit 7: 0 = Clear password, 1 = Keep password. */
/* Bit 6: 0 = NVRAM cleared by jumper, 1 = NVRAM normal. */
/* Bit 5: 0 = CMOS Setup disabled, 1 = CMOS Setup enabled. */
/* Bit 4: External CPU clock (Switch 8). */
/* Bit 3: External CPU clock (Switch 7). */
/* 50 MHz: Switch 7 = Off, Switch 8 = Off. */
/* 60 MHz: Switch 7 = On, Switch 8 = Off. */
/* 66 MHz: Switch 7 = Off, Switch 8 = On. */
/* Bit 2: 0 = On-board audio absent, 1 = On-board audio present. */
/* Bit 1: 0 = Soft-off capable power supply present, 1 = Soft-off capable power supply absent. */
/* Bit 0: 0 = Reserved. */
/* NOTE: A bit is read as 1 if switch is off, and as 0 if switch is on. */
if (cpu_busspeed <= 50000000)
gpio |= 0xffff0000;
else if ((cpu_busspeed > 50000000) && (cpu_busspeed <= 60000000))
gpio |= 0xffff0800;
else if (cpu_busspeed > 60000000)
gpio |= 0xffff1000;
machine_set_gpio_default(gpio);
}
static void
machine_at_thor_common_init(const machine_t *model, int has_video)
{
machine_at_common_init_ex(model, 2);
machine_at_thor_gpio_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_VIDEO, 4, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 3, 4, 2, 1);
pci_register_slot(0x10, PCI_CARD_NORMAL, 4, 3, 2, 1);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
if (has_video && (gfxcard[0] == VID_INTERNAL))
device_add(machine_get_vid_device(machine));
device_add(&i430fx_device);
device_add(&piix_device);
device_add_params(&pc87306_device, (void *) PCX730X_AMI);
device_add(&intel_flash_bxt_ami_device);
}
int
machine_at_gw2katx_init(const machine_t *model)
{
@@ -209,6 +208,38 @@ machine_at_gw2katx_init(const machine_t *model)
return ret;
}
int
machine_at_vectra54_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/vectra54/GT0724.22",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_VIDEO, 0, 0, 0, 0);
pci_register_slot(0x06, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x07, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x08, PCI_CARD_NORMAL, 3, 4, 1, 2);
if (gfxcard[0] == VID_INTERNAL)
device_add(&s3_phoenix_trio64_onboard_pci_device);
device_add(&i430fx_device);
device_add(&piix_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37XXX2 | FDC37C93X_NORMAL));
device_add(&sst_flash_29ee010_device);
return ret;
}
int
machine_at_thor_init(const machine_t *model)
{
@@ -521,11 +552,11 @@ machine_at_fmb_init(const machine_t *model)
}
int
machine_at_acerm3a_init(const machine_t *model)
machine_at_acerv35n_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/acerm3a/r01-b3.bin",
ret = bios_load_linear("roms/machines/acerv35n/v35nd1s1.bin",
0x000e0000, 131072, 0);
if (bios_only || !ret)
@@ -536,15 +567,15 @@ machine_at_acerm3a_init(const machine_t *model)
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x10, PCI_CARD_VIDEO, 4, 0, 0, 0);
pci_register_slot(0x11, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
device_add(&i430hx_device);
device_add(&piix3_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37XXX5 | FDC37C93X_NORMAL));
/* The chip is not marked FR but the BIOS accesses register 06h of GPIO. */
device_add_params(&fdc37c93x_device, (void *) (FDC37XXX5 | FDC37C93X_FR));
device_add(&sst_flash_29ee010_device);
return ret;
@@ -651,7 +682,6 @@ const device_t d943_device = {
int
machine_at_d943_init(const machine_t *model)
{
int ret = 0;
const char* fn;
@@ -691,6 +721,7 @@ machine_at_d943_init(const machine_t *model)
return ret;
}
/* i430VX */
int
machine_at_gw2kma_init(const machine_t *model)
{
@@ -727,6 +758,110 @@ machine_at_gw2kma_init(const machine_t *model)
return ret;
}
/* SiS 5501 */
static const device_config_t c5sbm2_config[] = {
// clang-format off
{
.name = "bios",
.description = "BIOS Version",
.type = CONFIG_BIOS,
.default_string = "5sbm2",
.default_int = 0,
.file_filter = "",
.spinner = { 0 },
.bios = {
{ .name = "AwardBIOS v4.50GP - Revision 07/17/1995", .internal_name = "5sbm2_v450gp", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/5sbm2/5SBM0717.BIN", "" } },
{ .name = "AwardBIOS v4.50PG - Revision 03/26/1996", .internal_name = "5sbm2", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/5sbm2/5SBM0326.BIN", "" } },
{ .name = "AwardBIOS v4.51PG - Revision 2.2 (by Unicore Software)", .internal_name = "5sbm2_451pg", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/5sbm2/2A5ICC3A.BIN", "" } },
{ .files_no = 0 }
},
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
};
const device_t c5sbm2_device = {
.name = "Chaintech 5SBM/5SBM2 (M103)",
.internal_name = "5sbm2_device",
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = c5sbm2_config
};
int
machine_at_5sbm2_init(const machine_t *model)
{
int ret = 0;
const char* fn;
/* No ROMs available */
if (!device_available(model->device))
return ret;
device_context(model->device);
fn = device_get_bios_file(machine_get_device(machine), device_get_config_bios("bios"), 0);
ret = bios_load_linear(fn, 0x000e0000, 131072, 0);
device_context_restore();
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x11, PCI_CARD_NORMAL, 3, 4, 1, 2);
device_add(&kbc_at_ami_device);
device_add(&sis_550x_device);
device_add_params(&um866x_device, (void *) UM8663AF);
device_add(&sst_flash_29ee010_device);
return ret;
}
/* SiS 5511 */
int
machine_at_amis727_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/amis727/S727p.rom",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0xFE, 0xFF, 0, 0);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&sis_5511_device);
device_add(&kbc_ps2_intel_ami_pci_device);
device_add_params(&fdc37c6xx_device, (void *) FDC37C665);
device_add(&intel_flash_bxt_device);
return ret;
}
static const device_config_t ap5s_config[] = {
// clang-format off
{
@@ -798,169 +933,6 @@ machine_at_ap5s_init(const machine_t *model)
return ret;
}
int
machine_at_ms5124_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ms5124/AG77.ROM",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0xFE, 0xFF, 0, 0);
pci_register_slot(0x10, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x11, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 2, 3, 4, 1);
device_add(&sis_5511_device);
device_add(&kbc_ps2_ami_device);
device_add_params(&w837x7_device, (void *) (W83787F | W837X7_KEY_88));
device_add(&sst_flash_29ee010_device);
return ret;
}
int
machine_at_amis727_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/amis727/S727p.rom",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0xFE, 0xFF, 0, 0);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&sis_5511_device);
device_add(&kbc_ps2_intel_ami_pci_device);
device_add_params(&fdc37c6xx_device, (void *) FDC37C665);
device_add(&intel_flash_bxt_device);
return ret;
}
int
machine_at_vectra54_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/vectra54/GT0724.22",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_VIDEO, 0, 0, 0, 0);
pci_register_slot(0x06, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x07, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x08, PCI_CARD_NORMAL, 3, 4, 1, 2);
if (gfxcard[0] == VID_INTERNAL)
device_add(&s3_phoenix_trio64_onboard_pci_device);
device_add(&i430fx_device);
device_add(&piix_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37XXX2 | FDC37C93X_NORMAL));
device_add(&sst_flash_29ee010_device);
return ret;
}
static const device_config_t c5sbm2_config[] = {
// clang-format off
{
.name = "bios",
.description = "BIOS Version",
.type = CONFIG_BIOS,
.default_string = "5sbm2",
.default_int = 0,
.file_filter = "",
.spinner = { 0 },
.bios = {
{ .name = "AwardBIOS v4.50GP - Revision 07/17/1995", .internal_name = "5sbm2_v450gp", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/5sbm2/5SBM0717.BIN", "" } },
{ .name = "AwardBIOS v4.50PG - Revision 03/26/1996", .internal_name = "5sbm2", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/5sbm2/5SBM0326.BIN", "" } },
{ .name = "AwardBIOS v4.51PG - Revision 2.2 (by Unicore Software)", .internal_name = "5sbm2_451pg", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/5sbm2/2A5ICC3A.BIN", "" } },
{ .files_no = 0 }
},
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
};
const device_t c5sbm2_device = {
.name = "Chaintech 5SBM/5SBM2 (M103)",
.internal_name = "5sbm2_device",
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = c5sbm2_config
};
int
machine_at_5sbm2_init(const machine_t *model)
{
int ret = 0;
const char* fn;
/* No ROMs available */
if (!device_available(model->device))
return ret;
device_context(model->device);
fn = device_get_bios_file(machine_get_device(machine), device_get_config_bios("bios"), 0);
ret = bios_load_linear(fn, 0x000e0000, 131072, 0);
device_context_restore();
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x11, PCI_CARD_NORMAL, 3, 4, 1, 2);
device_add(&kbc_at_ami_device);
device_add(&sis_550x_device);
device_add_params(&um866x_device, (void *) UM8663AF);
device_add(&sst_flash_29ee010_device);
return ret;
}
int
machine_at_pc140_6260_init(const machine_t *model)
{
@@ -991,3 +963,32 @@ machine_at_pc140_6260_init(const machine_t *model)
return ret;
}
int
machine_at_ms5124_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ms5124/AG77.ROM",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0xFE, 0xFF, 0, 0);
pci_register_slot(0x10, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x11, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 2, 3, 4, 1);
device_add(&sis_5511_device);
device_add(&kbc_ps2_ami_device);
device_add_params(&w837x7_device, (void *) (W83787F | W837X7_KEY_88));
device_add(&sst_flash_29ee010_device);
return ret;
}