diff --git a/src/include/86box/video.h b/src/include/86box/video.h index 3830c1936..d5a352826 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -133,10 +133,15 @@ extern int readflash; /* Function handler pointers. */ extern void (*video_recalctimings)(void); -extern void * __cdecl (*video_copy)(void *_Dst, const void *_Src, size_t _Size); - extern void video_screenshot(uint32_t *buf, int start_x, int start_y, int row_len); + +#ifdef _WIN32 +extern void * __cdecl (*video_copy)(void *_Dst, const void *_Src, size_t _Size); extern void * __cdecl video_transform_copy(void *_Dst, const void *_Src, size_t _Size); +#else +extern void * (*video_copy)(void *__restrict _Dst, const void *__restrict _Src, size_t _Size); +extern void * video_transform_copy(void *__restrict _Dst, const void *__restrict _Src, size_t _Size); +#endif /* Table functions. */ diff --git a/src/video/vid_cl54xx.c b/src/video/vid_cl54xx.c index 4d0a4c088..4e2114551 100644 --- a/src/video/vid_cl54xx.c +++ b/src/video/vid_cl54xx.c @@ -212,7 +212,7 @@ typedef struct gd54xx_t uint8_t fc; /* Feature Connector */ - int card; + int card, id; uint8_t pos_regs[8]; @@ -3749,6 +3749,78 @@ gd5428_mca_feedb(void *p) return 1; } +static void +gd54xx_reset(void *priv) +{ + gd54xx_t *gd54xx = (gd54xx_t *) priv; + svga_t *svga = &gd54xx->svga; + + memset(svga->crtc, 0x00, sizeof(svga->crtc)); + memset(svga->seqregs, 0x00, sizeof(svga->seqregs)); + memset(svga->gdcreg, 0x00, sizeof(svga->gdcreg)); + svga->crtc[0] = 63; + svga->crtc[6] = 255; + svga->dispontime = 1000ull << 32; + svga->dispofftime = 1000ull << 32; + svga->bpp = 8; + + io_removehandler(0x03c0, 0x0020, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx); + io_sethandler(0x03c0, 0x0020, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx); + + mem_mapping_disable(&gd54xx->vgablt_mapping); + if (gd54xx->has_bios) + mem_mapping_disable(&gd54xx->bios_rom.mapping); + + memset(gd54xx->pci_regs, 0x00, 256); + + gd543x_recalc_mapping(gd54xx); + + mem_mapping_set_p(&svga->mapping, gd54xx); + mem_mapping_disable(&gd54xx->mmio_mapping); + mem_mapping_disable(&gd54xx->linear_mapping); + mem_mapping_disable(&gd54xx->aperture2_mapping); + mem_mapping_disable(&gd54xx->vgablt_mapping); + + svga->hwcursor.yoff = svga->hwcursor.xoff = 0; + + if (gd54xx->id >= CIRRUS_ID_CLGD5420) { + gd54xx->vclk_n[0] = 0x4a; + gd54xx->vclk_d[0] = 0x2b; + gd54xx->vclk_n[1] = 0x5b; + gd54xx->vclk_d[1] = 0x2f; + gd54xx->vclk_n[2] = 0x45; + gd54xx->vclk_d[2] = 0x30; + gd54xx->vclk_n[3] = 0x7e; + gd54xx->vclk_d[3] = 0x33; + } else { + gd54xx->vclk_n[0] = 0x66; + gd54xx->vclk_d[0] = 0x3b; + gd54xx->vclk_n[1] = 0x5b; + gd54xx->vclk_d[1] = 0x2f; + gd54xx->vclk_n[2] = 0x45; + gd54xx->vclk_d[2] = 0x2c; + gd54xx->vclk_n[3] = 0x7e; + gd54xx->vclk_d[3] = 0x33; + } + + svga->extra_banks[1] = 0x8000; + + gd54xx->pci_regs[PCI_REG_COMMAND] = 7; + + gd54xx->pci_regs[0x30] = 0x00; + gd54xx->pci_regs[0x32] = 0x0c; + gd54xx->pci_regs[0x33] = 0x00; + + svga->crtc[0x27] = gd54xx->id; + + svga->seqregs[6] = 0x0f; + if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429) + gd54xx->unlocked = 1; + else + gd54xx->unlocked = 0; +} + + static void *gd54xx_init(const device_t *info) { @@ -3767,8 +3839,9 @@ static void gd54xx->rev = 0; gd54xx->has_bios = 1; - switch (id) { - + gd54xx->id = id; + + switch (id) { case CIRRUS_ID_CLGD5401: romfn = BIOS_GD5401_PATH; break; @@ -3943,14 +4016,17 @@ static void gd5480_vgablt_write, gd5480_vgablt_writew, NULL, NULL, MEM_MAPPING_EXTERNAL, gd54xx); } + io_sethandler(0x03c0, 0x0020, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx); + + if (gd54xx->pci && id >= CIRRUS_ID_CLGD5430) + pci_add_card(PCI_ADD_VIDEO, cl_pci_read, cl_pci_write, gd54xx); + mem_mapping_set_p(&svga->mapping, gd54xx); mem_mapping_disable(&gd54xx->mmio_mapping); mem_mapping_disable(&gd54xx->linear_mapping); mem_mapping_disable(&gd54xx->aperture2_mapping); mem_mapping_disable(&gd54xx->vgablt_mapping); - io_sethandler(0x03c0, 0x0020, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx); - svga->hwcursor.yoff = svga->hwcursor.xoff = 0; if (id >= CIRRUS_ID_CLGD5420) { @@ -3975,15 +4051,12 @@ static void svga->extra_banks[1] = 0x8000; - if (gd54xx->pci && id >= CIRRUS_ID_CLGD5430) - pci_add_card(PCI_ADD_VIDEO, cl_pci_read, cl_pci_write, gd54xx); - gd54xx->pci_regs[PCI_REG_COMMAND] = 7; gd54xx->pci_regs[0x30] = 0x00; gd54xx->pci_regs[0x32] = 0x0c; gd54xx->pci_regs[0x33] = 0x00; - + svga->crtc[0x27] = id; svga->seqregs[6] = 0x0f; @@ -4282,7 +4355,7 @@ const device_t gd5401_isa_device = DEVICE_ISA, CIRRUS_ID_CLGD5401, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5401_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4295,7 +4368,7 @@ const device_t gd5402_isa_device = DEVICE_ISA, CIRRUS_ID_CLGD5402, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5402_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4308,7 +4381,7 @@ const device_t gd5402_onboard_device = DEVICE_AT | DEVICE_ISA, CIRRUS_ID_CLGD5402 | 0x200, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { NULL }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4321,7 +4394,7 @@ const device_t gd5420_isa_device = DEVICE_AT | DEVICE_ISA, CIRRUS_ID_CLGD5420, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5420_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4333,7 +4406,7 @@ const device_t gd5422_isa_device = { DEVICE_AT | DEVICE_ISA, CIRRUS_ID_CLGD5422, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5422_available }, /* Common BIOS between 5422 and 5424 */ gd54xx_speed_changed, gd54xx_force_redraw, @@ -4345,7 +4418,7 @@ const device_t gd5424_vlb_device = { DEVICE_VLB, CIRRUS_ID_CLGD5424, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5422_available }, /* Common BIOS between 5422 and 5424 */ gd54xx_speed_changed, gd54xx_force_redraw, @@ -4359,7 +4432,7 @@ const device_t gd5426_vlb_device = CIRRUS_ID_CLGD5426, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5426_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4373,7 +4446,7 @@ const device_t gd5426_onboard_device = CIRRUS_ID_CLGD5426 | 0x200, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { NULL }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4387,7 +4460,7 @@ const device_t gd5428_isa_device = CIRRUS_ID_CLGD5428, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5428_isa_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4401,7 +4474,7 @@ const device_t gd5428_vlb_device = CIRRUS_ID_CLGD5428, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5428_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4415,7 +4488,7 @@ const device_t gd5428_mca_device = CIRRUS_ID_CLGD5428, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5428_mca_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4429,7 +4502,7 @@ const device_t gd5428_onboard_device = CIRRUS_ID_CLGD5428, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5428_isa_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4443,7 +4516,7 @@ const device_t gd5429_isa_device = CIRRUS_ID_CLGD5429, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5429_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4457,7 +4530,7 @@ const device_t gd5429_vlb_device = CIRRUS_ID_CLGD5429, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5429_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4471,7 +4544,7 @@ const device_t gd5430_vlb_device = CIRRUS_ID_CLGD5430, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5430_vlb_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4485,7 +4558,7 @@ const device_t gd5430_pci_device = CIRRUS_ID_CLGD5430, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5430_pci_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4499,7 +4572,7 @@ const device_t gd5434_isa_device = CIRRUS_ID_CLGD5434, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5434_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4513,7 +4586,7 @@ const device_t gd5434_onboard_pci_device = CIRRUS_ID_CLGD5434 | 0x200, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { NULL }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4527,7 +4600,7 @@ const device_t gd5434_vlb_device = CIRRUS_ID_CLGD5434, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5434_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4541,7 +4614,7 @@ const device_t gd5434_pci_device = CIRRUS_ID_CLGD5434, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5434_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4555,7 +4628,7 @@ const device_t gd5436_pci_device = CIRRUS_ID_CLGD5436, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5436_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4569,7 +4642,7 @@ const device_t gd5440_onboard_pci_device = CIRRUS_ID_CLGD5440 | 0x600, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { NULL }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4583,7 +4656,7 @@ const device_t gd5440_pci_device = CIRRUS_ID_CLGD5440 | 0x400, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5440_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4597,7 +4670,7 @@ const device_t gd5446_pci_device = CIRRUS_ID_CLGD5446, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5446_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4611,7 +4684,7 @@ const device_t gd5446_stb_pci_device = CIRRUS_ID_CLGD5446 | 0x100, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5446_stb_available }, gd54xx_speed_changed, gd54xx_force_redraw, @@ -4625,7 +4698,7 @@ const device_t gd5480_pci_device = CIRRUS_ID_CLGD5480, gd54xx_init, gd54xx_close, - NULL, + gd54xx_reset, { gd5480_available }, gd54xx_speed_changed, gd54xx_force_redraw, diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c index 3eda354f8..01ff78f78 100644 --- a/src/video/vid_s3.c +++ b/src/video/vid_s3.c @@ -352,6 +352,8 @@ typedef struct s3_t uint8_t thread_run, serialport; void *i2c, *ddc; + + int vram; } s3_t; #define INT_VSY (1 << 0) @@ -6406,6 +6408,147 @@ static int vram_sizes[] = 3 /*8 MB*/ }; + +static void s3_reset(void *priv) +{ + s3_t *s3 = (s3_t *) priv; + svga_t *svga = &s3->svga; + + memset(svga->crtc, 0x00, sizeof(svga->crtc)); + svga->crtc[0] = 63; + svga->crtc[6] = 255; + svga->dispontime = 1000ull << 32; + svga->dispofftime = 1000ull << 32; + svga->bpp = 8; + + if (s3->pci) + svga->crtc[0x36] = 2 | (3 << 2) | (1 << 4); + else if (s3->vlb) + svga->crtc[0x36] = 1 | (3 << 2) | (1 << 4); + else + svga->crtc[0x36] = 3 | (1 << 4); + + if (s3->chip >= S3_86C928) + svga->crtc[0x36] |= (vram_sizes[s3->vram] << 5); + else + svga->crtc[0x36] |= ((s3->vram == 1) ? 0x00 : 0x20) | 0x80; + + svga->crtc[0x37] = 1 | (7 << 5); + + if (s3->chip >= S3_86C928) + svga->crtc[0x37] |= 0x04; + + s3_io_set(s3); + + memset(s3->pci_regs, 0x00, 256); + + s3->pci_regs[PCI_REG_COMMAND] = 7; + + s3->pci_regs[0x30] = 0x00; + s3->pci_regs[0x32] = 0x0c; + s3->pci_regs[0x33] = 0x00; + + switch(s3->card_type) { + case S3_MIROCRYSTAL8S_805: + case S3_MIROCRYSTAL10SD_805: + svga->crtc[0x5a] = 0x0a; + svga->getclock = sdac_getclock; + break; + + case S3_SPEA_MIRAGE_86C801: + case S3_SPEA_MIRAGE_86C805: + svga->crtc[0x5a] = 0x0a; + break; + + case S3_PHOENIX_86C801: + case S3_PHOENIX_86C805: + svga->crtc[0x5a] = 0x0a; + break; + + case S3_METHEUS_86C928: + svga->crtc[0x5a] = 0x0a; + break; + + case S3_PARADISE_BAHAMAS64: + case S3_PHOENIX_VISION864: + case S3_MIROCRYSTAL20SD_864: + svga->crtc[0x5a] = 0x0a; + break; + + case S3_DIAMOND_STEALTH64_964: + case S3_ELSAWIN2KPROX_964: + case S3_MIROCRYSTAL20SV_964: + svga->crtc[0x5a] = 0x0a; + break; + + case S3_ELSAWIN2KPROX: + case S3_SPEA_MERCURY_P64V: + case S3_MIROVIDEO40SV_ERGO_968: + case S3_PHOENIX_VISION968: + if (s3->pci) { + svga->crtc[0x53] = 0x18; + svga->crtc[0x58] = 0x10; + svga->crtc[0x59] = 0x70; + svga->crtc[0x5a] = 0x00; + svga->crtc[0x6c] = 1; + } else { + svga->crtc[0x53] = 0x00; + svga->crtc[0x59] = 0x00; + svga->crtc[0x5a] = 0x0a; + } + break; + + case S3_PHOENIX_VISION868: + if (s3->pci) { + svga->crtc[0x53] = 0x18; + svga->crtc[0x58] = 0x10; + svga->crtc[0x59] = 0x70; + svga->crtc[0x5a] = 0x00; + svga->crtc[0x6c] = 1; + } else { + svga->crtc[0x53] = 0x00; + svga->crtc[0x59] = 0x00; + svga->crtc[0x5a] = 0x0a; + } + break; + + case S3_PHOENIX_TRIO64: + case S3_PHOENIX_TRIO64_ONBOARD: + case S3_PHOENIX_TRIO64VPLUS: + case S3_PHOENIX_TRIO64VPLUS_ONBOARD: + case S3_DIAMOND_STEALTH64_764: + case S3_SPEA_MIRAGE_P64: + case S3_NUMBER9_9FX: + if (s3->card_type == S3_PHOENIX_TRIO64VPLUS || s3->card_type == S3_PHOENIX_TRIO64VPLUS_ONBOARD) + svga->crtc[0x53] = 0x08; + break; + + case S3_TRIO64V2_DX: + svga->crtc[0x53] = 0x08; + svga->crtc[0x59] = 0x70; + svga->crtc[0x5a] = 0x00; + svga->crtc[0x6c] = 1; + s3->pci_regs[0x05] = 0; + s3->pci_regs[0x06] = 0; + s3->pci_regs[0x07] = 2; + s3->pci_regs[0x3d] = 1; + s3->pci_regs[0x3e] = 4; + s3->pci_regs[0x3f] = 0xff; + break; + } + + if (s3->has_bios) { + if (s3->pci) + mem_mapping_disable(&s3->bios_rom.mapping); + } + + s3_updatemapping(s3); + + mem_mapping_disable(&s3->mmio_mapping); + mem_mapping_disable(&s3->new_mmio_mapping); +} + + static void *s3_init(const device_t *info) { const char *bios_fn; @@ -6637,6 +6780,7 @@ static void *s3_init(const device_t *info) else vram_size = 512 << 10; s3->vram_mask = vram_size - 1; + s3->vram = vram; s3->has_bios = (bios_fn != NULL); if (s3->has_bios) { @@ -7311,7 +7455,7 @@ const device_t s3_orchid_86c911_isa_device = S3_ORCHID_86C911, s3_init, s3_close, - NULL, + s3_reset, { s3_orchid_86c911_available }, s3_speed_changed, s3_force_redraw, @@ -7325,7 +7469,7 @@ const device_t s3_diamond_stealth_vram_isa_device = S3_DIAMOND_STEALTH_VRAM, s3_init, s3_close, - NULL, + s3_reset, { s3_diamond_stealth_vram_available }, s3_speed_changed, s3_force_redraw, @@ -7339,7 +7483,7 @@ const device_t s3_ami_86c924_isa_device = S3_AMI_86C924, s3_init, s3_close, - NULL, + s3_reset, { s3_ami_86c924_available }, s3_speed_changed, s3_force_redraw, @@ -7353,7 +7497,7 @@ const device_t s3_spea_mirage_86c801_isa_device = S3_SPEA_MIRAGE_86C801, s3_init, s3_close, - NULL, + s3_reset, { s3_spea_mirage_86c801_available }, s3_speed_changed, s3_force_redraw, @@ -7367,7 +7511,7 @@ const device_t s3_spea_mirage_86c805_vlb_device = S3_SPEA_MIRAGE_86C805, s3_init, s3_close, - NULL, + s3_reset, { s3_spea_mirage_86c805_available }, s3_speed_changed, s3_force_redraw, @@ -7381,7 +7525,7 @@ const device_t s3_mirocrystal_8s_805_vlb_device = S3_MIROCRYSTAL8S_805, s3_init, s3_close, - NULL, + s3_reset, { s3_mirocrystal_8s_805_available }, s3_speed_changed, s3_force_redraw, @@ -7396,7 +7540,7 @@ const device_t s3_mirocrystal_10sd_805_vlb_device = S3_MIROCRYSTAL10SD_805, s3_init, s3_close, - NULL, + s3_reset, { s3_mirocrystal_10sd_805_available }, s3_speed_changed, s3_force_redraw, @@ -7410,7 +7554,7 @@ const device_t s3_phoenix_86c801_isa_device = S3_PHOENIX_86C801, s3_init, s3_close, - NULL, + s3_reset, { s3_phoenix_86c80x_available }, s3_speed_changed, s3_force_redraw, @@ -7424,7 +7568,7 @@ const device_t s3_phoenix_86c805_vlb_device = S3_PHOENIX_86C805, s3_init, s3_close, - NULL, + s3_reset, { s3_phoenix_86c80x_available }, s3_speed_changed, s3_force_redraw, @@ -7438,7 +7582,7 @@ const device_t s3_metheus_86c928_isa_device = S3_METHEUS_86C928, s3_init, s3_close, - NULL, + s3_reset, { s3_metheus_86c928_available }, s3_speed_changed, s3_force_redraw, @@ -7452,7 +7596,7 @@ const device_t s3_metheus_86c928_vlb_device = S3_METHEUS_86C928, s3_init, s3_close, - NULL, + s3_reset, { s3_metheus_86c928_available }, s3_speed_changed, s3_force_redraw, @@ -7466,7 +7610,7 @@ const device_t s3_mirocrystal_20sd_864_vlb_device = S3_MIROCRYSTAL20SD_864, s3_init, s3_close, - NULL, + s3_reset, { s3_mirocrystal_20sd_864_vlb_available }, s3_speed_changed, s3_force_redraw, @@ -7480,7 +7624,7 @@ const device_t s3_bahamas64_vlb_device = S3_PARADISE_BAHAMAS64, s3_init, s3_close, - NULL, + s3_reset, { s3_bahamas64_available }, s3_speed_changed, s3_force_redraw, @@ -7494,7 +7638,7 @@ const device_t s3_bahamas64_pci_device = S3_PARADISE_BAHAMAS64, s3_init, s3_close, - NULL, + s3_reset, { s3_bahamas64_available }, s3_speed_changed, s3_force_redraw, @@ -7508,7 +7652,7 @@ const device_t s3_mirocrystal_20sv_964_vlb_device = S3_MIROCRYSTAL20SV_964, s3_init, s3_close, - NULL, + s3_reset, { s3_mirocrystal_20sv_964_vlb_available }, s3_speed_changed, s3_force_redraw, @@ -7522,7 +7666,7 @@ const device_t s3_mirocrystal_20sv_964_pci_device = S3_MIROCRYSTAL20SV_964, s3_init, s3_close, - NULL, + s3_reset, { s3_mirocrystal_20sv_964_pci_available }, s3_speed_changed, s3_force_redraw, @@ -7537,7 +7681,7 @@ const device_t s3_diamond_stealth64_964_vlb_device = S3_DIAMOND_STEALTH64_964, s3_init, s3_close, - NULL, + s3_reset, { s3_diamond_stealth64_964_available }, s3_speed_changed, s3_force_redraw, @@ -7551,7 +7695,7 @@ const device_t s3_diamond_stealth64_964_pci_device = S3_DIAMOND_STEALTH64_964, s3_init, s3_close, - NULL, + s3_reset, { s3_diamond_stealth64_964_available }, s3_speed_changed, s3_force_redraw, @@ -7565,7 +7709,7 @@ const device_t s3_phoenix_vision968_pci_device = S3_PHOENIX_VISION968, s3_init, s3_close, - NULL, + s3_reset, { s3_phoenix_vision968_available }, s3_speed_changed, s3_force_redraw, @@ -7579,7 +7723,7 @@ const device_t s3_phoenix_vision968_vlb_device = S3_PHOENIX_VISION968, s3_init, s3_close, - NULL, + s3_reset, { s3_phoenix_vision968_available }, s3_speed_changed, s3_force_redraw, @@ -7593,7 +7737,7 @@ const device_t s3_mirovideo_40sv_ergo_968_pci_device = S3_MIROVIDEO40SV_ERGO_968, s3_init, s3_close, - NULL, + s3_reset, { s3_mirovideo_40sv_ergo_968_pci_available }, s3_speed_changed, s3_force_redraw, @@ -7607,7 +7751,7 @@ const device_t s3_spea_mercury_p64v_pci_device = S3_SPEA_MERCURY_P64V, s3_init, s3_close, - NULL, + s3_reset, { s3_spea_mercury_p64v_pci_available }, s3_speed_changed, s3_force_redraw, @@ -7621,7 +7765,7 @@ const device_t s3_9fx_vlb_device = S3_NUMBER9_9FX, s3_init, s3_close, - NULL, + s3_reset, { s3_9fx_available }, s3_speed_changed, s3_force_redraw, @@ -7635,7 +7779,7 @@ const device_t s3_9fx_pci_device = S3_NUMBER9_9FX, s3_init, s3_close, - NULL, + s3_reset, { s3_9fx_available }, s3_speed_changed, s3_force_redraw, @@ -7649,7 +7793,7 @@ const device_t s3_phoenix_trio32_vlb_device = S3_PHOENIX_TRIO32, s3_init, s3_close, - NULL, + s3_reset, { s3_phoenix_trio32_available }, s3_speed_changed, s3_force_redraw, @@ -7663,7 +7807,7 @@ const device_t s3_phoenix_trio32_pci_device = S3_PHOENIX_TRIO32, s3_init, s3_close, - NULL, + s3_reset, { s3_phoenix_trio32_available }, s3_speed_changed, s3_force_redraw, @@ -7677,7 +7821,7 @@ const device_t s3_diamond_stealth_se_vlb_device = S3_DIAMOND_STEALTH_SE, s3_init, s3_close, - NULL, + s3_reset, { s3_diamond_stealth_se_available }, s3_speed_changed, s3_force_redraw, @@ -7691,7 +7835,7 @@ const device_t s3_diamond_stealth_se_pci_device = S3_DIAMOND_STEALTH_SE, s3_init, s3_close, - NULL, + s3_reset, { s3_diamond_stealth_se_available }, s3_speed_changed, s3_force_redraw, @@ -7706,7 +7850,7 @@ const device_t s3_phoenix_trio64_vlb_device = S3_PHOENIX_TRIO64, s3_init, s3_close, - NULL, + s3_reset, { s3_phoenix_trio64_available }, s3_speed_changed, s3_force_redraw, @@ -7720,7 +7864,7 @@ const device_t s3_phoenix_trio64_onboard_pci_device = S3_PHOENIX_TRIO64_ONBOARD, s3_init, s3_close, - NULL, + s3_reset, { NULL }, s3_speed_changed, s3_force_redraw, @@ -7734,7 +7878,7 @@ const device_t s3_phoenix_trio64_pci_device = S3_PHOENIX_TRIO64, s3_init, s3_close, - NULL, + s3_reset, { s3_phoenix_trio64_available }, s3_speed_changed, s3_force_redraw, @@ -7748,7 +7892,7 @@ const device_t s3_phoenix_trio64vplus_onboard_pci_device = S3_PHOENIX_TRIO64VPLUS_ONBOARD, s3_init, s3_close, - NULL, + s3_reset, { NULL }, s3_speed_changed, s3_force_redraw, @@ -7762,7 +7906,7 @@ const device_t s3_phoenix_trio64vplus_pci_device = S3_PHOENIX_TRIO64VPLUS, s3_init, s3_close, - NULL, + s3_reset, { s3_phoenix_trio64vplus_available }, s3_speed_changed, s3_force_redraw, @@ -7776,7 +7920,7 @@ const device_t s3_phoenix_vision864_vlb_device = S3_PHOENIX_VISION864, s3_init, s3_close, - NULL, + s3_reset, { s3_phoenix_vision864_available }, s3_speed_changed, s3_force_redraw, @@ -7790,7 +7934,7 @@ const device_t s3_phoenix_vision864_pci_device = S3_PHOENIX_VISION864, s3_init, s3_close, - NULL, + s3_reset, { s3_phoenix_vision864_available }, s3_speed_changed, s3_force_redraw, @@ -7804,7 +7948,7 @@ const device_t s3_phoenix_vision868_vlb_device = S3_PHOENIX_VISION868, s3_init, s3_close, - NULL, + s3_reset, { s3_phoenix_vision868_available }, s3_speed_changed, s3_force_redraw, @@ -7818,7 +7962,7 @@ const device_t s3_phoenix_vision868_pci_device = S3_PHOENIX_VISION868, s3_init, s3_close, - NULL, + s3_reset, { s3_phoenix_vision868_available }, s3_speed_changed, s3_force_redraw, @@ -7832,7 +7976,7 @@ const device_t s3_diamond_stealth64_vlb_device = S3_DIAMOND_STEALTH64_764, s3_init, s3_close, - NULL, + s3_reset, { s3_diamond_stealth64_764_available }, s3_speed_changed, s3_force_redraw, @@ -7846,7 +7990,7 @@ const device_t s3_diamond_stealth64_pci_device = S3_DIAMOND_STEALTH64_764, s3_init, s3_close, - NULL, + s3_reset, { s3_diamond_stealth64_764_available }, s3_speed_changed, s3_force_redraw, @@ -7860,7 +8004,7 @@ const device_t s3_spea_mirage_p64_vlb_device = S3_SPEA_MIRAGE_P64, s3_init, s3_close, - NULL, + s3_reset, { s3_spea_mirage_p64_vlb_available }, s3_speed_changed, s3_force_redraw, @@ -7874,7 +8018,7 @@ const device_t s3_elsa_winner2000_pro_x_964_pci_device = S3_ELSAWIN2KPROX_964, s3_init, s3_close, - NULL, + s3_reset, { s3_elsa_winner2000_pro_x_964_available }, s3_speed_changed, s3_force_redraw, @@ -7888,7 +8032,7 @@ const device_t s3_elsa_winner2000_pro_x_pci_device = S3_ELSAWIN2KPROX, s3_init, s3_close, - NULL, + s3_reset, { s3_elsa_winner2000_pro_x_available }, s3_speed_changed, s3_force_redraw, @@ -7902,7 +8046,7 @@ const device_t s3_trio64v2_dx_pci_device = S3_TRIO64V2_DX, s3_init, s3_close, - NULL, + s3_reset, { s3_trio64v2_dx_available }, s3_speed_changed, s3_force_redraw, diff --git a/src/video/vid_s3_virge.c b/src/video/vid_s3_virge.c index 43d26a559..c43a1c55a 100644 --- a/src/video/vid_s3_virge.c +++ b/src/video/vid_s3_virge.c @@ -301,7 +301,7 @@ typedef struct virge_t fifo_entry_t fifo[FIFO_SIZE]; volatile int fifo_read_idx, fifo_write_idx; - int virge_busy; + int virge_busy, local; uint8_t subsys_stat, subsys_cntl, advfunc_cntl; @@ -3785,6 +3785,86 @@ static void s3_virge_pci_write(int func, int addr, uint8_t val, void *p) } } +static void s3_virge_reset(void *priv) +{ + virge_t *virge = (virge_t *) priv; + svga_t *svga = &virge->svga; + + memset(svga->crtc, 0x00, sizeof(svga->crtc)); + svga->crtc[0] = 63; + svga->crtc[6] = 255; + svga->dispontime = 1000ull << 32; + svga->dispofftime = 1000ull << 32; + svga->bpp = 8; + + io_removehandler(0x03c0, 0x0020, s3_virge_in, NULL, NULL, s3_virge_out, NULL, NULL, virge); + io_sethandler(0x03c0, 0x0020, s3_virge_in, NULL, NULL, s3_virge_out, NULL, NULL, virge); + + memset(virge->pci_regs, 0x00, 256); + + virge->pci_regs[PCI_REG_COMMAND] = 3; + virge->pci_regs[0x05] = 0; + virge->pci_regs[0x06] = 0; + virge->pci_regs[0x07] = 2; + virge->pci_regs[0x32] = 0x0c; + virge->pci_regs[0x3d] = 1; + virge->pci_regs[0x3e] = 4; + virge->pci_regs[0x3f] = 0xff; + + switch(virge->local) { + case S3_VIRGE_325: + case S3_DIAMOND_STEALTH3D_2000: + virge->svga.crtc[0x59] = 0x70; + break; + case S3_DIAMOND_STEALTH3D_3000: + virge->svga.crtc[0x59] = 0x70; + break; + case S3_VIRGE_GX2: + case S3_DIAMOND_STEALTH3D_4000: + virge->svga.crtc[0x6c] = 1; + virge->svga.crtc[0x59] = 0x70; + break; + + case S3_TRIO_3D2X: + virge->svga.crtc[0x6c] = 1; + virge->svga.crtc[0x59] = 0x70; + break; + + default: + virge->svga.crtc[0x6c] = 1; + virge->svga.crtc[0x59] = 0x70; + break; + } + + if (virge->chip >= S3_VIRGEGX2) + virge->svga.crtc[0x36] = 2 | (0 << 2) | (1 << 4) | (0 << 5); + else { + switch (virge->memory_size) { + case 2: + virge->svga.crtc[0x36] = 2 | (0 << 2) | (1 << 4) | (4 << 5); + break; + case 8: + virge->svga.crtc[0x36] = 2 | (0 << 2) | (1 << 4) | (3 << 5); + break; + case 4: + virge->svga.crtc[0x36] = 2 | (0 << 2) | (1 << 4) | (0 << 5); + break; + } + } + + virge->svga.crtc[0x37] = 1 | (7 << 5); + virge->svga.crtc[0x53] = 8; + + mem_mapping_disable(&virge->bios_rom.mapping); + + memset(virge->dmabuffer, 0, 65536); + + s3_virge_updatemapping(virge); + + mem_mapping_disable(&virge->mmio_mapping); + mem_mapping_disable(&virge->new_mmio_mapping); +} + static void *s3_virge_init(const device_t *info) { const char *bios_fn; @@ -3990,6 +4070,8 @@ static void *s3_virge_init(const device_t *info) virge->render_thread = thread_create(render_thread, virge); timer_add(&virge->tri_timer, s3_virge_tri_timer, virge, 0); + + virge->local = info->local; return virge; } @@ -4119,7 +4201,7 @@ const device_t s3_virge_325_pci_device = S3_VIRGE_325, s3_virge_init, s3_virge_close, - NULL, + s3_virge_reset, { s3_virge_325_available }, s3_virge_speed_changed, s3_virge_force_redraw, @@ -4133,7 +4215,7 @@ const device_t s3_diamond_stealth_2000_pci_device = S3_DIAMOND_STEALTH3D_2000, s3_virge_init, s3_virge_close, - NULL, + s3_virge_reset, { s3_virge_325_diamond_available }, s3_virge_speed_changed, s3_virge_force_redraw, @@ -4147,7 +4229,7 @@ const device_t s3_diamond_stealth_3000_pci_device = S3_DIAMOND_STEALTH3D_3000, s3_virge_init, s3_virge_close, - NULL, + s3_virge_reset, { s3_virge_988_diamond_available }, s3_virge_speed_changed, s3_virge_force_redraw, @@ -4161,7 +4243,7 @@ const device_t s3_virge_375_pci_device = S3_VIRGE_DX, s3_virge_init, s3_virge_close, - NULL, + s3_virge_reset, { s3_virge_375_available }, s3_virge_speed_changed, s3_virge_force_redraw, @@ -4175,7 +4257,7 @@ const device_t s3_diamond_stealth_2000pro_pci_device = S3_DIAMOND_STEALTH3D_2000PRO, s3_virge_init, s3_virge_close, - NULL, + s3_virge_reset, { s3_virge_375_diamond_available }, s3_virge_speed_changed, s3_virge_force_redraw, @@ -4189,7 +4271,7 @@ const device_t s3_virge_385_pci_device = S3_VIRGE_GX, s3_virge_init, s3_virge_close, - NULL, + s3_virge_reset, { s3_virge_385_available }, s3_virge_speed_changed, s3_virge_force_redraw, @@ -4203,7 +4285,7 @@ const device_t s3_virge_357_pci_device = S3_VIRGE_GX2, s3_virge_init, s3_virge_close, - NULL, + s3_virge_reset, { s3_virge_357_available }, s3_virge_speed_changed, s3_virge_force_redraw, @@ -4217,7 +4299,7 @@ const device_t s3_virge_357_agp_device = S3_VIRGE_GX2, s3_virge_init, s3_virge_close, - NULL, + s3_virge_reset, { s3_virge_357_available }, s3_virge_speed_changed, s3_virge_force_redraw, @@ -4231,7 +4313,7 @@ const device_t s3_diamond_stealth_4000_pci_device = S3_DIAMOND_STEALTH3D_4000, s3_virge_init, s3_virge_close, - NULL, + s3_virge_reset, { s3_virge_357_diamond_available }, s3_virge_speed_changed, s3_virge_force_redraw, @@ -4245,7 +4327,7 @@ const device_t s3_diamond_stealth_4000_agp_device = S3_DIAMOND_STEALTH3D_4000, s3_virge_init, s3_virge_close, - NULL, + s3_virge_reset, { s3_virge_357_diamond_available }, s3_virge_speed_changed, s3_virge_force_redraw, @@ -4259,7 +4341,7 @@ const device_t s3_trio3d2x_pci_device = S3_TRIO_3D2X, s3_virge_init, s3_virge_close, - NULL, + s3_virge_reset, { s3_trio3d2x_available }, s3_virge_speed_changed, s3_virge_force_redraw, @@ -4273,7 +4355,7 @@ const device_t s3_trio3d2x_agp_device = S3_TRIO_3D2X, s3_virge_init, s3_virge_close, - NULL, + s3_virge_reset, { s3_trio3d2x_available }, s3_virge_speed_changed, s3_virge_force_redraw, diff --git a/src/video/video.c b/src/video/video.c index 332f8bbaf..5118b886f 100644 --- a/src/video/video.c +++ b/src/video/video.c @@ -114,7 +114,11 @@ static const video_timings_t *vid_timings; static uint32_t cga_2_table[16]; static uint8_t thread_run = 0; +#ifdef _WIN32 void * __cdecl (*video_copy)(void *_Dst, const void *_Src, size_t _Size) = memcpy; +#else +void * (*video_copy)(void *__restrict, const void *__restrict, size_t); +#endif PALETTE cgapal = { @@ -419,8 +423,13 @@ video_screenshot(uint32_t *buf, int start_x, int start_y, int row_len) } +#ifdef _WIN32 void * __cdecl video_transform_copy(void *_Dst, const void *_Src, size_t _Size) +#else +void * +video_transform_copy(void *__restrict _Dst, const void *__restrict _Src, size_t _Size) +#endif { int i; uint32_t *dest_ex = (uint32_t *) _Dst; diff --git a/src/vnc.c b/src/vnc.c index 363c6205d..440542652 100644 --- a/src/vnc.c +++ b/src/vnc.c @@ -183,7 +183,7 @@ vnc_blit(int x, int y, int w, int h) } if (screenshots) - video_screenshot((uint32_t *) rfb->frameBuffer, 0, 0, ROW_LENGTH); + video_screenshot((uint32_t *) rfb->frameBuffer, 0, 0, VNC_MAX_X); video_blit_complete();