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Merge branch 'master' of ssh://github.com/86Box/86Box

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This commit is contained in:
RichardG867
2022-08-18 17:23:47 -03:00
parent 48b372c60a 5ae9df6d07
commit d41bf191a5
46 changed files with 445 additions and 218 deletions
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2
src/cpu/386_common.c
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@@ -1897,6 +1897,8 @@ nmi_raise(void)
{
if (is486 && (cpu_fast_off_flags & 0x20000000))
cpu_fast_off_advance();
nmi = 1;
}

12
src/cpu/cpu.c
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@@ -1742,9 +1742,11 @@ cpu_CPUID(void)
break;
case 0x80000000:
EAX = 0x80000005;
EBX = ECX = EDX = 0;
break;
case 0x80000001:
EAX = CPUID + 0x100;
EBX = ECX = 0;
EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW;
break;
case 0x80000002: /* Processor name string */
@@ -1760,6 +1762,7 @@ cpu_CPUID(void)
EDX = 0x00000000;
break;
case 0x80000005: /*Cache information*/
EAX = 0;
EBX = 0x02800140; /*TLBs*/
ECX = 0x20020220; /*L1 data cache*/
EDX = 0x20020220; /*L1 instruction cache*/
@@ -1785,9 +1788,11 @@ cpu_CPUID(void)
break;
case 0x80000000:
EAX = 0x80000006;
EBX = ECX = EDX = 0;
break;
case 0x80000001:
EAX = CPUID + 0x100;
EBX = ECX = 0;
EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW;
break;
case 0x80000002: /* Processor name string */
@@ -1803,11 +1808,13 @@ cpu_CPUID(void)
EDX = 0x00000000;
break;
case 0x80000005: /* Cache information */
EAX = 0;
EBX = 0x02800140; /* TLBs */
ECX = 0x20020220; /*L1 data cache*/
EDX = 0x20020220; /*L1 instruction cache*/
break;
case 0x80000006: /* L2 Cache information */
EAX = EBX = EDX = 0;
ECX = 0x01004220;
break;
default:
@@ -1832,9 +1839,11 @@ cpu_CPUID(void)
break;
case 0x80000000:
EAX = 0x80000007;
EBX = ECX = EDX = 0;
break;
case 0x80000001:
EAX = CPUID + 0x100;
EBX = ECX = 0;
EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW;
break;
case 0x80000002: /* Processor name string */
@@ -1850,17 +1859,20 @@ cpu_CPUID(void)
EDX = 0x00000000;
break;
case 0x80000005: /* Cache information */
EAX = 0;
EBX = 0x02800140; /* TLBs */
ECX = 0x20020220; /* L1 data cache */
EDX = 0x20020220; /* L1 instruction cache */
break;
case 0x80000006: /* L2 Cache information */
EAX = EBX = EDX = 0;
if (cpu_s->cpu_type == CPU_K6_3P)
ECX = 0x01004220;
else
ECX = 0x00804220;
break;
case 0x80000007: /* PowerNow information */
EAX = EBX = ECX = 0;
EDX = 7;
break;
default:

9
src/cpu/x86_ops_bcd.h
View File

@@ -31,14 +31,7 @@ static int opAAD(uint32_t fetchdat)
static int opAAM(uint32_t fetchdat)
{
int base = getbytef();
if (base == 0) {
x86de(NULL, 0);
return 1;
}
if (!cpu_isintel) base = 10;
if (!base || !cpu_isintel) base = 10;
AH = AL / base;
AL %= base;
setznp16(AX);

4
src/cpu/x86seg.c
View File

@@ -168,8 +168,12 @@ x86_doabrt(int x86_abrt)
void
x86de(char *s, uint16_t error)
{
#ifdef BAD_CODE
cpu_state.abrt = ABRT_DE;
abrt_error = error;
#else
x86_int(0);
#endif
}