Refactored ESFM timers; removed 16-bit clipping from ESFMu
Co-authored-by: OBattler <oubattler@gmail.com>
This commit is contained in:
@@ -99,10 +99,7 @@ esfm_log(const char *fmt, ...)
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void
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esfm_generate_raw(esfm_drv_t *dev, int32_t *bufp)
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{
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ESFM_generate(&dev->opl, &dev->samples[0]);
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bufp[0] = dev->samples[0];
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bufp[1] = dev->samples[1];
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ESFM_generate(&dev->opl, bufp);
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}
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void
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@@ -270,75 +267,48 @@ esfm_drv_read(uint16_t port, void *priv)
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break;
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}
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esfm_log("esfm: [%04X:%08X] [R] %04X = %02X\n", CS, cpu_state.pc, port, ret);
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return ret;
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}
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static void
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esfm_drv_write_buffered(esfm_drv_t *dev, uint8_t val)
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{
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uint16_t p = dev->port;
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ESFM_write_reg_buffered_fast(&dev->opl, dev->opl.addr_latch, val);
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if (dev->opl.native_mode)
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{
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switch (dev->port & 0x5ff)
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{
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case 0x402: /* Timer 1 */
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dev->timer_count[0] = val;
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esfm_log("Timer 0 count now: %i\n", dev->timer_count[0]);
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break;
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case 0x403: /* Timer 2 */
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dev->timer_count[1] = val;
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esfm_log("Timer 1 count now: %i\n", dev->timer_count[1]);
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break;
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case 0x404: /* Timer control */
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if (val & CTRL_RESET) {
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esfm_log("Resetting timer status...\n");
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dev->status &= ~STAT_TMR_OVER;
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} else {
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dev->timer_ctrl = val;
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esfm_timer_control(dev, 0, val & CTRL_TMR1_START);
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esfm_timer_control(dev, 1, val & CTRL_TMR2_START);
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esfm_log("Status mask now %02X (val = %02X)\n", (val & ~CTRL_TMR_MASK) & CTRL_TMR_MASK, val);
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}
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break;
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default:
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break;
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}
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p -= 0x400;
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p &= 0x1ff;
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}
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else
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switch (p)
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{
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switch (dev->port & 0x1ff)
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{
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case 0x002: /* Timer 1 */
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dev->timer_count[0] = val;
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esfm_log("Timer 0 count now: %i\n", dev->timer_count[0]);
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break;
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case 0x002: /* Timer 1 */
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dev->timer_count[0] = val;
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esfm_log("Timer 0 count now: %i\n", dev->timer_count[0]);
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break;
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case 0x003: /* Timer 2 */
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dev->timer_count[1] = val;
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esfm_log("Timer 1 count now: %i\n", dev->timer_count[1]);
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break;
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case 0x003: /* Timer 2 */
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dev->timer_count[1] = val;
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esfm_log("Timer 1 count now: %i\n", dev->timer_count[1]);
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break;
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case 0x004: /* Timer control */
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if (val & CTRL_RESET) {
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esfm_log("Resetting timer status...\n");
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dev->status &= ~STAT_TMR_OVER;
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} else {
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dev->timer_ctrl = val;
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esfm_timer_control(dev, 0, val & CTRL_TMR1_START);
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esfm_timer_control(dev, 1, val & CTRL_TMR2_START);
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esfm_log("Status mask now %02X (val = %02X)\n", (val & ~CTRL_TMR_MASK) & CTRL_TMR_MASK, val);
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}
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break;
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case 0x004: /* Timer control */
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if (val & CTRL_RESET) {
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esfm_log("Resetting timer status...\n");
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dev->status &= ~STAT_TMR_OVER;
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} else {
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dev->timer_ctrl = val;
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esfm_timer_control(dev, 0, val & CTRL_TMR1_START);
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esfm_timer_control(dev, 1, val & CTRL_TMR2_START);
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esfm_log("Status mask now %02X (val = %02X)\n", (val & ~CTRL_TMR_MASK) & CTRL_TMR_MASK, val);
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}
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break;
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default:
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break;
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}
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default:
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break;
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}
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}
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@@ -347,8 +317,6 @@ esfm_drv_write(uint16_t port, uint8_t val, void *priv)
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{
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esfm_drv_t *dev = (esfm_drv_t *) priv;
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esfm_log("esfm: [%04X:%08X] [W] %04X = %02X\n", CS, cpu_state.pc, port, val);
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if (dev->flags & FLAG_CYCLES)
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cycles -= ((int) (isa_timing * 8));
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