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Moved the Intel i686 CPU's and related machines out of the Dev branch.

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This commit is contained in:
OBattler
2020-04-10 20:01:26 +02:00
parent d460927c7b
commit d75e901a83
20 changed files with 93 additions and 175 deletions
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8
src/cpu_common/386_ops.h
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@@ -190,9 +190,7 @@ extern void x386_dynarec_log(const char *fmt, ...);
#include "x86_ops_jump.h"
#include "x86_ops_misc.h"
#include "x87_ops.h"
#if defined(DEV_BRANCH) && defined(USE_I686)
# include "x86_ops_i686.h"
#endif
#include "x86_ops_i686.h"
#include "x86_ops_mmx.h"
#include "x86_ops_mmx_arith.h"
#include "x86_ops_mmx_cmp.h"
@@ -1174,8 +1172,6 @@ const OpFn OP_TABLE(c6x86mx_0f)[1024] =
};
#endif
#ifdef DEV_BRANCH
#ifdef USE_I686
const OpFn OP_TABLE(pentiumpro_0f)[1024] =
{
/*16-bit data, 16-bit addr*/
@@ -1448,8 +1444,6 @@ const OpFn OP_TABLE(pentium2d_0f)[1024] =
/*e0*/ ILLEGAL, opPSRAW_a32, opPSRAD_a32, ILLEGAL, ILLEGAL, opPMULHW_a32, ILLEGAL, ILLEGAL, opPSUBSB_a32, opPSUBSW_a32, NULL, opPOR_a32, opPADDSB_a32, opPADDSW_a32, NULL, opPXOR_a32,
/*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL,
};
#endif
#endif
const OpFn OP_TABLE(286)[1024] =
{

22
src/cpu_common/cpu.c
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@@ -186,7 +186,6 @@ uint64_t mtrr_fix16k_a000_msr = 0;
uint64_t mtrr_fix4k_msr[8] = {0, 0, 0, 0, 0, 0, 0, 0};
uint64_t mtrr_deftype_msr = 0;
#if defined(DEV_BRANCH) && defined(USE_I686)
uint16_t cs_msr = 0;
uint32_t esp_msr = 0;
uint32_t eip_msr = 0;
@@ -203,7 +202,6 @@ uint64_t ecx186_msr = 0;
uint64_t ecx187_msr = 0;
uint64_t ecx1e0_msr = 0;
uint64_t ecx570_msr = 0;
#endif
uint64_t ecx83_msr = 0; /* AMD K5 and K6 MSR's. */
uint64_t star = 0; /* AMD K6-2+. */
@@ -317,12 +315,8 @@ cpu_set(void)
is_k6 = (cpu_s->cpu_type == CPU_K6) || (cpu_s->cpu_type == CPU_K6_2) ||
(cpu_s->cpu_type == CPU_K6_2C) || (cpu_s->cpu_type == CPU_K6_3) ||
(cpu_s->cpu_type == CPU_K6_2P) || (cpu_s->cpu_type == CPU_K6_3P);
#if defined(DEV_BRANCH) && defined(USE_I686)
is_p6 = (cpu_s->cpu_type == CPU_PENTIUMPRO) || (cpu_s->cpu_type == CPU_PENTIUM2) ||
(cpu_s->cpu_type == CPU_PENTIUM2D);
#else
is_p6 = 0;
#endif
hasfpu = (cpu_s->cpu_type >= CPU_i486DX) || (cpu_s->cpu_type == CPU_RAPIDCAD);
hascache = (cpu_s->cpu_type >= CPU_486SLC) || (cpu_s->cpu_type == CPU_IBM386SLC || cpu_s->cpu_type == CPU_IBM486SLC || cpu_s->cpu_type == CPU_IBM486BL);
#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
@@ -1383,7 +1377,6 @@ cpu_set(void)
codegen_timing_set(&codegen_timing_k6);
break;
#if defined(DEV_BRANCH) && defined(USE_I686)
case CPU_PENTIUMPRO:
#ifdef USE_DYNAREC
x86_setopcodes(ops_386, ops_pentiumpro_0f, dynarec_ops_386, dynarec_ops_pentiumpro_0f);
@@ -1548,7 +1541,7 @@ cpu_set(void)
codegen_timing_set(&codegen_timing_p6);
#endif
break;
#endif
case CPU_CYRIX3S:
#ifdef USE_DYNAREC
x86_setopcodes(ops_386, ops_winchip2_0f, dynarec_ops_386, dynarec_ops_winchip2_0f);
@@ -2196,8 +2189,6 @@ cpu_CPUID(void)
break;
#endif
#ifdef DEV_BRANCH
#ifdef USE_I686
case CPU_PENTIUMPRO:
if (!EAX)
{
@@ -2266,8 +2257,7 @@ cpu_CPUID(void)
else
EAX = EBX = ECX = EDX = 0;
break;
#endif
#endif
case CPU_CYRIX3S:
switch (EAX)
{
@@ -2712,8 +2702,6 @@ void cpu_RDMSR()
break;
#endif
#ifdef DEV_BRANCH
#ifdef USE_I686
case CPU_PENTIUMPRO:
case CPU_PENTIUM2:
case CPU_PENTIUM2D:
@@ -2839,8 +2827,6 @@ i686_invalid_rdmsr:
break;
}
break;
#endif
#endif
}
}
@@ -3154,8 +3140,6 @@ void cpu_WRMSR()
break;
#endif
#ifdef DEV_BRANCH
#ifdef USE_I686
case CPU_PENTIUMPRO:
case CPU_PENTIUM2:
case CPU_PENTIUM2D:
@@ -3249,8 +3233,6 @@ i686_invalid_wrmsr:
break;
}
break;
#endif
#endif
}
}

6
src/cpu_common/cpu.h
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@@ -73,11 +73,9 @@ enum {
CPU_K6_2P,
CPU_K6_3P,
CPU_CYRIX3S,
#if defined(DEV_BRANCH) && defined(USE_I686)
CPU_PENTIUMPRO, /* 686 class CPUs */
CPU_PENTIUM2,
CPU_PENTIUM2D,
#endif
CPU_MAX /* Only really needed to close the enum in a way independent of the #ifdef's. */
};
@@ -145,12 +143,10 @@ extern CPU cpus_6x86[];
extern CPU cpus_6x86SS7[];
#endif
#endif
extern CPU cpus_Cyrix3[];
#if defined(DEV_BRANCH) && defined(USE_I686)
extern CPU cpus_Cyrix3[];
extern CPU cpus_PentiumPro[];
extern CPU cpus_PentiumII[];
extern CPU cpus_Celeron[];
#endif
#define C_FLAG 0x0001

5
src/cpu_common/cpu_table.c
View File

@@ -660,8 +660,6 @@ CPU cpus_K56_SS7[] = {
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
};
#ifdef DEV_BRANCH
#ifdef USE_I686
CPU cpus_PentiumPro[] = {
/*Intel Pentium Pro*/
{"Pentium Pro 50", CPU_PENTIUMPRO, 50000000, 1.0, 0x612, 0x612, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 4, 4, 3, 3, 6},
@@ -735,8 +733,7 @@ CPU cpus_Celeron[] = {
{"Celeron Mendocino 533", CPU_PENTIUM2D, 533333333, 5.5, 0x665, 0x665, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 48,48,17,17, 64},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
};
#endif
#endif
CPU cpus_Cyrix3[] = {
/*VIA Cyrix III (Samuel)*/
{"Cyrix III 66", CPU_CYRIX3S, 66666666, 1.0, 0x660, 0x660, 0, CPU_SUPPORTS_DYNAREC, 6, 6, 3, 3, 8}, /*66 MHz version*/

4
src/cpu_common/x86_ops.h
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@@ -93,11 +93,9 @@ extern const OpFn dynarec_ops_c6x86mx_0f[1024];
extern const OpFn dynarec_ops_k6_0f[1024];
extern const OpFn dynarec_ops_k62_0f[1024];
#if defined(DEV_BRANCH) && defined(USE_I686)
extern const OpFn dynarec_ops_pentiumpro_0f[1024];
extern const OpFn dynarec_ops_pentium2_0f[1024];
extern const OpFn dynarec_ops_pentium2d_0f[1024];
#endif
extern const OpFn dynarec_ops_fpu_287_d9_a16[256];
extern const OpFn dynarec_ops_fpu_287_d9_a32[256];
@@ -190,11 +188,9 @@ extern const OpFn ops_c6x86mx_0f[1024];
extern const OpFn ops_k6_0f[1024];
extern const OpFn ops_k62_0f[1024];
#if defined(DEV_BRANCH) && defined(USE_I686)
extern const OpFn ops_pentiumpro_0f[1024];
extern const OpFn ops_pentium2_0f[1024];
extern const OpFn ops_pentium2d_0f[1024];
#endif
extern const OpFn ops_fpu_287_d9_a16[256];
extern const OpFn ops_fpu_287_d9_a32[256];

2
src/cpu_common/x86_ops_mov.h
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@@ -688,7 +688,6 @@ static int opMOV_r_l_a32(uint32_t fetchdat)
return 0;
}
#if defined(USE_NEW_DYNAREC) || (defined(DEV_BRANCH) && (defined(USE_CYRIX_6X86) || defined(USE_I686)))
#define opCMOV(condition) \
static int opCMOV ## condition ## _w_a16(uint32_t fetchdat) \
{ \
@@ -783,4 +782,3 @@ opCMOV(L)
opCMOV(NL)
opCMOV(LE)
opCMOV(NLE)
#endif

6
src/cpu_common/x87_ops.h
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@@ -1064,7 +1064,6 @@ const OpFn OP_TABLE(fpu_da_a32)[256] =
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
};
#if defined(DEV_BRANCH) && (defined(USE_CYRIX_6X86) || defined(USE_I686))
const OpFn OP_TABLE(fpu_686_da_a16)[256] =
{
opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16,
@@ -1141,7 +1140,6 @@ const OpFn OP_TABLE(fpu_686_da_a32)[256] =
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
};
#endif
const OpFn OP_TABLE(fpu_287_db_a16)[256] =
{
@@ -1297,7 +1295,6 @@ const OpFn OP_TABLE(fpu_db_a32)[256] =
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
};
#if defined(DEV_BRANCH) && (defined(USE_CYRIX_6X86) || defined(USE_I686))
const OpFn OP_TABLE(fpu_686_db_a16)[256] =
{
opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16,
@@ -1374,7 +1371,6 @@ const OpFn OP_TABLE(fpu_686_db_a32)[256] =
opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
};
#endif
const OpFn OP_TABLE(fpu_287_dc_a16)[32] =
{
@@ -1870,7 +1866,6 @@ const OpFn OP_TABLE(fpu_df_a32)[256] =
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
};
#if defined(DEV_BRANCH) && (defined(USE_CYRIX_6X86) || defined(USE_I686))
const OpFn OP_TABLE(fpu_686_df_a16)[256] =
{
opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16,
@@ -1947,7 +1942,6 @@ const OpFn OP_TABLE(fpu_686_df_a32)[256] =
opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP,
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
};
#endif
const OpFn OP_TABLE(nofpu_a16)[256] =
{

4
src/cpu_common/x87_ops_arith.h
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@@ -203,7 +203,6 @@ static int opFUCOMPP(uint32_t fetchdat)
return 0;
}
#if defined(DEV_BRANCH) && (defined(USE_CYRIX_6X86) || defined(USE_I686))
static int opFCOMI(uint32_t fetchdat)
{
FP_ENTER();
@@ -228,7 +227,6 @@ static int opFCOMIP(uint32_t fetchdat)
return 0;
}
#endif
#endif
static int opFDIV(uint32_t fetchdat)
{
@@ -397,7 +395,6 @@ static int opFUCOMP(uint32_t fetchdat)
return 0;
}
#if defined(DEV_BRANCH) && (defined(USE_CYRIX_6X86) || defined(USE_I686))
static int opFUCOMI(uint32_t fetchdat)
{
FP_ENTER();
@@ -422,4 +419,3 @@ static int opFUCOMIP(uint32_t fetchdat)
return 0;
}
#endif
#endif

2
src/cpu_common/x87_ops_misc.h
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@@ -845,7 +845,7 @@ static int opFSTCW_a32(uint32_t fetchdat)
}
#endif
#if !defined(FPU_8087) && defined(DEV_BRANCH) && (defined(USE_CYRIX_6X86) || defined(USE_I686))
#ifndef FPU_8087
#define opFCMOV(condition) \
static int opFCMOV ## condition(uint32_t fetchdat) \
{ \