diff --git a/src/CPU/386.c b/src/CPU/386.c index 074fa9696..6bd69af85 100644 --- a/src/CPU/386.c +++ b/src/CPU/386.c @@ -28,13 +28,6 @@ uint32_t oldpc2; int trap; -uint16_t flags,eflags; -uint32_t oldds,oldss,olddslimit,oldsslimit,olddslimitw,oldsslimitw; - -x86seg gdt,ldt,idt,tr; -x86seg _cs,_ds,_es,_ss,_fs,_gs; -x86seg _oldds; - extern int cpl_override; @@ -47,8 +40,6 @@ uint16_t ea_rseg; int is486; int cgate32; -uint32_t cr2, cr3, cr4; -uint32_t dr[8]; uint8_t romext[32768]; diff --git a/src/CPU/386_common.h b/src/CPU/386_common.h index 6042cc151..a091a817d 100644 --- a/src/CPU/386_common.h +++ b/src/CPU/386_common.h @@ -1,21 +1,6 @@ -/* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. - * - * This file is part of the 86Box distribution. - * - * Common 386 CPU code. - * - * Version: @(#)386_common.h 1.0.0 2017/05/30 - * - * Author: Sarah Walker, - * Miran Grca, - * Copyright 2008-2017 Sarah Walker. - * Copyright 2016-2017 Miran Grca. - */ - +/* Copyright holders: Sarah Walker, Tenshi + see COPYING for more details +*/ extern uint16_t ea_rseg; #undef readmemb diff --git a/src/CPU/386_dynarec.c b/src/CPU/386_dynarec.c index 61db68737..1463f844e 100644 --- a/src/CPU/386_dynarec.c +++ b/src/CPU/386_dynarec.c @@ -21,8 +21,6 @@ #define CPU_BLOCK_END() cpu_block_end = 1 -uint32_t cpu_cur_status = 0; - int cpu_reps, cpu_reps_latched; int cpu_notreps, cpu_notreps_latched; @@ -1327,42 +1325,8 @@ void exec386_dynarec(int cycs) while (cycles_main > 0) { int cycles_start; - -#if 0 - switch(cpu_pci_speed) - { - case 16000000: - cycles += 640; - break; - case 20000000: - cycles += 800; - break; - case 25000000: - default: - cycles += 1000; - break; - case 27500000: - cycles += 1100; - break; - case 30000000: - cycles += 1200; - break; - case 333333333: - cycles += 1333; - break; - case 37500000: - cycles += 1500; - break; - case 40000000: - cycles += 1600; - break; - case 41666667: - cycles += 1666; - break; - } -#endif - cycles += cpu_cycle_period(); - + + cycles += cpu_cycle_period(); cycles_start = cycles; timer_start_period(cycles << TIMER_SHIFT); @@ -1441,7 +1405,7 @@ void exec386_dynarec(int cycs) and physical address. The physical address check will also catch any page faults at this stage*/ valid_block = (block->pc == cs + cpu_state.pc) && (block->_cs == cs) && - (block->phys == phys_addr) && (block->status == cpu_cur_status); + (block->use32 == use32) && (block->phys == phys_addr) && (block->stack32 == stack32); if (!valid_block) { uint64_t mask = (uint64_t)1 << ((phys_addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); @@ -1453,7 +1417,7 @@ void exec386_dynarec(int cycs) if (new_block) { valid_block = (new_block->pc == cs + cpu_state.pc) && (new_block->_cs == cs) && - (new_block->phys == phys_addr) && (new_block->status == cpu_cur_status); + (new_block->use32 == use32) && (new_block->phys == phys_addr) && (new_block->stack32 == stack32); if (valid_block) block = new_block; } diff --git a/src/CPU/386_ops.h b/src/CPU/386_ops.h index 0217c384d..4e5d78125 100644 --- a/src/CPU/386_ops.h +++ b/src/CPU/386_ops.h @@ -1,23 +1,6 @@ -/* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. - * - * This file is part of the 86Box distribution. - * - * 286/386+ instruction handlers list. - * - * Version: @(#)386_ops.h 1.0.0 2017/05/30 - * - * Author: Sarah Walker, - * leilei, - * Miran Grca, - * Copyright 2008-2017 Sarah Walker. - * Copyright 2016-2017 leilei. - * Copyright 2016-2017 Miran Grca. - */ - +/* Copyright holders: Sarah Walker, Tenshi, leilei + see COPYING for more details +*/ #include "x86_ops.h" diff --git a/src/CPU/808x.c b/src/CPU/808x.c index 32a52e955..5c48a4bb0 100644 --- a/src/CPU/808x.c +++ b/src/CPU/808x.c @@ -1,21 +1,6 @@ -/* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. - * - * This file is part of the 86Box distribution. - * - * 808x CPU emulation. - * - * Version: @(#)808x.c 1.0.0 2017/05/30 - * - * Author: Sarah Walker, - * Miran Grca, - * Copyright 2008-2017 Sarah Walker. - * Copyright 2016-2017 Miran Grca. - */ - +/* Copyright holders: Sarah Walker, Tenshi + see COPYING for more details +*/ /*SHR AX,1 4 clocks - fetch opcode @@ -567,7 +552,6 @@ void resetx86() resets++; ins = 0; use32=0; - cpu_cur_status = 0; stack32=0; cpu_state.pc=0; msw=0; @@ -605,7 +589,6 @@ void softresetx86() { use32=0; stack32=0; - cpu_cur_status = 0; cpu_state.pc=0; msw=0; cr0=0; diff --git a/src/CPU/codegen.h b/src/CPU/codegen.h index 5a076db8f..ad0b3f63a 100644 --- a/src/CPU/codegen.h +++ b/src/CPU/codegen.h @@ -35,9 +35,6 @@ typedef struct codeblock_t { - uint64_t page_mask, page_mask2; - uint64_t cmp; - /*Previous and next pointers, for the codeblock list associated with each physical page. Two sets of pointers, as a codeblock can be present in two pages.*/ @@ -48,19 +45,22 @@ typedef struct codeblock_t fails.*/ struct codeblock_t *parent, *left, *right; - int pnt; - int ins; - - int was_recompiled; - int TOP; - uint32_t pc; uint32_t _cs; uint32_t endpc; uint32_t phys, phys_2; - uint32_t status; + uint32_t use32; + int stack32; + int pnt; + int ins; + uint64_t page_mask, page_mask2; + + int was_recompiled; uint32_t flags; - + int TOP; + + uint64_t cmp; + uint8_t data[2048]; } codeblock_t; diff --git a/src/CPU/codegen_ops_x86-64.h b/src/CPU/codegen_ops_x86-64.h index c27b0f37e..8573ab495 100644 --- a/src/CPU/codegen_ops_x86-64.h +++ b/src/CPU/codegen_ops_x86-64.h @@ -866,10 +866,6 @@ static void CHECK_SEG_READ(x86seg *seg) return; if (seg->checked) return; - if ((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) - return; - if ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS)) - return; if (IS_32_ADDR(&seg->base)) { @@ -904,10 +900,6 @@ static void CHECK_SEG_WRITE(x86seg *seg) return; if (seg->checked) return; - if ((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) - return; - if ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS)) - return; if (IS_32_ADDR(&seg->base)) { @@ -934,11 +926,6 @@ static void CHECK_SEG_WRITE(x86seg *seg) } static void CHECK_SEG_LIMITS(x86seg *seg, int end_offset) { - if ((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) - return; - if ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS)) - return; - if (IS_32_ADDR(&seg->base)) { addbyte(0xb8 | REG_ESI); /*MOV ESI, &addr*/ @@ -975,13 +962,7 @@ static void CHECK_SEG_LIMITS(x86seg *seg, int end_offset) static void MEM_LOAD_ADDR_EA_B(x86seg *seg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ECX, ECX*/ - addbyte(0xc9); - } - else if (IS_32_ADDR(&seg->base)) + if (IS_32_ADDR(&seg->base)) { addbyte(0x8b); /*MOVL ECX, seg->base*/ addbyte(0x0c); @@ -1049,13 +1030,7 @@ static void MEM_LOAD_ADDR_EA_B(x86seg *seg) } static void MEM_LOAD_ADDR_EA_W(x86seg *seg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ECX, ECX*/ - addbyte(0xc9); - } - else if (IS_32_ADDR(&seg->base)) + if (IS_32_ADDR(&seg->base)) { addbyte(0x8b); /*MOVL ECX, seg->base*/ addbyte(0x0c); @@ -1139,13 +1114,7 @@ static void MEM_LOAD_ADDR_EA_W_OFFSET(x86seg *seg, int offset) } static void MEM_LOAD_ADDR_EA_L(x86seg *seg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ECX, ECX*/ - addbyte(0xc9); - } - else if (IS_32_ADDR(&seg->base)) + if (IS_32_ADDR(&seg->base)) { addbyte(0x8b); /*MOVL ECX, seg->base*/ addbyte(0x0c); @@ -1221,13 +1190,7 @@ static void MEM_LOAD_ADDR_EA_L(x86seg *seg) } static void MEM_LOAD_ADDR_EA_Q(x86seg *seg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ECX, ECX*/ - addbyte(0xc9); - } - else if (IS_32_ADDR(&seg->base)) + if (IS_32_ADDR(&seg->base)) { addbyte(0x8b); /*MOVL ECX, seg->base*/ addbyte(0x0c); @@ -1346,13 +1309,7 @@ static void MEM_STORE_ADDR_EA_B(x86seg *seg, int host_reg) addbyte(8); host_reg = 8; } - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ECX, ECX*/ - addbyte(0xc9); - } - else if (IS_32_ADDR(&seg->base)) + if (IS_32_ADDR(&seg->base)) { addbyte(0x8b); /*MOVL ECX, seg->base*/ addbyte(0x0c); @@ -1431,13 +1388,7 @@ static void MEM_STORE_ADDR_EA_B(x86seg *seg, int host_reg) } static void MEM_STORE_ADDR_EA_W(x86seg *seg, int host_reg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ECX, ECX*/ - addbyte(0xc9); - } - else if (IS_32_ADDR(&seg->base)) + if (IS_32_ADDR(&seg->base)) { addbyte(0x8b); /*MOVL ECX, seg->base*/ addbyte(0x0c); @@ -1527,13 +1478,7 @@ static void MEM_STORE_ADDR_EA_W(x86seg *seg, int host_reg) } static void MEM_STORE_ADDR_EA_L(x86seg *seg, int host_reg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ECX, ECX*/ - addbyte(0xc9); - } - else if (IS_32_ADDR(&seg->base)) + if (IS_32_ADDR(&seg->base)) { addbyte(0x8b); /*MOVL ECX, seg->base*/ addbyte(0x0c); @@ -1621,13 +1566,7 @@ static void MEM_STORE_ADDR_EA_L(x86seg *seg, int host_reg) } static void MEM_STORE_ADDR_EA_Q(x86seg *seg, int host_reg, int host_reg2) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ECX, ECX*/ - addbyte(0xc9); - } - else if (IS_32_ADDR(&seg->base)) + if (IS_32_ADDR(&seg->base)) { addbyte(0x8b); /*MOVL ECX, seg->base*/ addbyte(0x0c); @@ -5313,13 +5252,7 @@ static void MEM_CHECK_WRITE(x86seg *seg) CHECK_SEG_WRITE(seg); - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ESI, ESI*/ - addbyte(0xf6); - } - else if (IS_32_ADDR(&seg->base)) + if (IS_32_ADDR(&seg->base)) { addbyte(0x8b); /*MOV ESI, seg->base*/ addbyte(0x34); @@ -5366,16 +5299,12 @@ static void MEM_CHECK_WRITE(x86seg *seg) addbyte(0xc1); /*SHR EDI, 12*/ addbyte(0xef); addbyte(12); - if (!((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) && - !((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x83); /*CMP ESI, -1*/ - addbyte(0xfe); - addbyte(-1); - addbyte(0x74); /*JE slowpath*/ - jump3 = &codeblock[block_current].data[block_pos]; - addbyte(0); - } + addbyte(0x83); /*CMP ESI, -1*/ + addbyte(0xfe); + addbyte(-1); + addbyte(0x74); /*JE slowpath*/ + jump3 = &codeblock[block_current].data[block_pos]; + addbyte(0); if (IS_32_ADDR(writelookup2)) { addbyte(0x83); /*CMP writelookup2[RDI*8],-1*/ @@ -5399,9 +5328,7 @@ static void MEM_CHECK_WRITE(x86seg *seg) addbyte(0); // addbyte(0xc3); /*RET*/ - if (!((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) && - !((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - *jump3 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump3 - 1; + *jump3 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump3 - 1; /*slowpath:*/ addbyte(0x67); /*LEA EDI, [EAX+ESI]*/ addbyte(0x8d); @@ -5446,13 +5373,7 @@ static void MEM_CHECK_WRITE_W(x86seg *seg) CHECK_SEG_WRITE(seg); - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ESI, ESI*/ - addbyte(0xf6); - } - else if (IS_32_ADDR(&seg->base)) + if (IS_32_ADDR(&seg->base)) { addbyte(0x8b); /*MOV ESI, seg->base*/ addbyte(0x34); @@ -5495,23 +5416,15 @@ static void MEM_CHECK_WRITE_W(x86seg *seg) addbyte(0x79); /*JNS +*/ jump1 = &codeblock[block_current].data[block_pos]; addbyte(0); - if (!((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) && - !((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x83); /*CMP ESI, -1*/ - addbyte(0xfe); - addbyte(-1); - } + addbyte(0x83); /*CMP ESI, -1*/ + addbyte(0xfe); + addbyte(-1); addbyte(0x8d); /*LEA ESI, 1[EDI]*/ addbyte(0x77); addbyte(0x01); - if (!((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) && - !((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x74); /*JE slowpath*/ - jump4 = &codeblock[block_current].data[block_pos]; - addbyte(0); - } + addbyte(0x74); /*JE slowpath*/ + jump4 = &codeblock[block_current].data[block_pos]; + addbyte(0); addbyte(0x89); /*MOV EBX, EDI*/ addbyte(0xfb); addbyte(0xc1); /*SHR EDI, 12*/ @@ -5562,9 +5475,7 @@ static void MEM_CHECK_WRITE_W(x86seg *seg) /*slowpath:*/ *jump2 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump2 - 1; - if (!((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) && - !((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - *jump4 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump4 - 1; + *jump4 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump4 - 1; jump_pos = block_pos; load_param_1_reg_32(REG_EBX); load_param_2_32(&codeblock[block_current], 1); @@ -5599,13 +5510,7 @@ static void MEM_CHECK_WRITE_L(x86seg *seg) CHECK_SEG_WRITE(seg); - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ESI, ESI*/ - addbyte(0xf6); - } - else if (IS_32_ADDR(&seg->base)) + if (IS_32_ADDR(&seg->base)) { addbyte(0x8b); /*MOV ESI, seg->base*/ addbyte(0x34); @@ -5648,23 +5553,15 @@ static void MEM_CHECK_WRITE_L(x86seg *seg) addbyte(0x79); /*JNS +*/ jump1 = &codeblock[block_current].data[block_pos]; addbyte(0); - if (!((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) && - !((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x83); /*CMP ESI, -1*/ - addbyte(0xfe); - addbyte(-1); - } + addbyte(0x83); /*CMP ESI, -1*/ + addbyte(0xfe); + addbyte(-1); addbyte(0x8d); /*LEA ESI, 3[EDI]*/ addbyte(0x77); addbyte(0x03); - if (!((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) && - !((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x74); /*JE slowpath*/ - jump4 = &codeblock[block_current].data[block_pos]; - addbyte(0); - } + addbyte(0x74); /*JE slowpath*/ + jump4 = &codeblock[block_current].data[block_pos]; + addbyte(0); addbyte(0x89); /*MOV EBX, EDI*/ addbyte(0xfb); addbyte(0xc1); /*SHR EDI, 12*/ @@ -5715,9 +5612,7 @@ static void MEM_CHECK_WRITE_L(x86seg *seg) /*slowpath:*/ *jump2 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump2 - 1; - if (!((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) && - !((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - *jump4 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump4 - 1; + *jump4 = (uintptr_t)&codeblock[block_current].data[block_pos] - (uintptr_t)jump4 - 1; jump_pos = block_pos; load_param_1_reg_32(REG_EBX); load_param_2_32(&codeblock[block_current], 1); @@ -5747,13 +5642,7 @@ static void MEM_CHECK_WRITE_L(x86seg *seg) static int MEM_LOAD_ADDR_EA_B_NO_ABRT(x86seg *seg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ECX, ECX*/ - addbyte(0xc9); - } - else if (IS_32_ADDR(&seg->base)) + if (IS_32_ADDR(&seg->base)) { addbyte(0x8b); /*MOVL ECX, seg->base*/ addbyte(0x0c); @@ -5820,13 +5709,7 @@ static int MEM_LOAD_ADDR_EA_B_NO_ABRT(x86seg *seg) } static int MEM_LOAD_ADDR_EA_W_NO_ABRT(x86seg *seg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ECX, ECX*/ - addbyte(0xc9); - } - else if (IS_32_ADDR(&seg->base)) + if (IS_32_ADDR(&seg->base)) { addbyte(0x8b); /*MOVL ECX, seg->base*/ addbyte(0x0c); @@ -5902,13 +5785,7 @@ static int MEM_LOAD_ADDR_EA_W_NO_ABRT(x86seg *seg) } static int MEM_LOAD_ADDR_EA_L_NO_ABRT(x86seg *seg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ECX, ECX*/ - addbyte(0xc9); - } - else if (IS_32_ADDR(&seg->base)) + if (IS_32_ADDR(&seg->base)) { addbyte(0x8b); /*MOVL ECX, seg->base*/ addbyte(0x0c); @@ -6006,13 +5883,7 @@ static void MEM_STORE_ADDR_EA_B_NO_ABRT(x86seg *seg, int host_reg) addbyte(8); host_reg = 8; } - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR EBX, EBX*/ - addbyte(0xdb); - } - else if (IS_32_ADDR(&seg->base)) + if (IS_32_ADDR(&seg->base)) { addbyte(0x8b); /*MOVL EBX, seg->base*/ addbyte(0x1c); @@ -6084,13 +5955,7 @@ static void MEM_STORE_ADDR_EA_B_NO_ABRT(x86seg *seg, int host_reg) } static void MEM_STORE_ADDR_EA_W_NO_ABRT(x86seg *seg, int host_reg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR EBX, EBX*/ - addbyte(0xdb); - } - else if (IS_32_ADDR(&seg->base)) + if (IS_32_ADDR(&seg->base)) { addbyte(0x8b); /*MOVL EBX, seg->base*/ addbyte(0x1c); @@ -6173,13 +6038,7 @@ static void MEM_STORE_ADDR_EA_W_NO_ABRT(x86seg *seg, int host_reg) } static void MEM_STORE_ADDR_EA_L_NO_ABRT(x86seg *seg, int host_reg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR EBX, EBX*/ - addbyte(0xdb); - } - else if (IS_32_ADDR(&seg->base)) + if (IS_32_ADDR(&seg->base)) { addbyte(0x8b); /*MOVL EBX, seg->base*/ addbyte(0x1c); diff --git a/src/CPU/codegen_ops_x86.h b/src/CPU/codegen_ops_x86.h index 229c066ca..c8c18a28c 100644 --- a/src/CPU/codegen_ops_x86.h +++ b/src/CPU/codegen_ops_x86.h @@ -616,10 +616,6 @@ static void CHECK_SEG_READ(x86seg *seg) return; if (seg->checked) return; - if ((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) - return; - if ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS)) - return; addbyte(0x83); /*CMP seg->base, -1*/ addbyte(0x05|0x38); @@ -641,10 +637,6 @@ static void CHECK_SEG_WRITE(x86seg *seg) return; if (seg->checked) return; - if ((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) - return; - if ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS)) - return; addbyte(0x83); /*CMP seg->base, -1*/ addbyte(0x05|0x38); @@ -658,11 +650,6 @@ static void CHECK_SEG_WRITE(x86seg *seg) } static void CHECK_SEG_LIMITS(x86seg *seg, int end_offset) { - if ((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) - return; - if ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS)) - return; - addbyte(0x3b); /*CMP EAX, seg->limit_low*/ addbyte(0x05); addlong((uint32_t)&seg->limit_low); @@ -688,18 +675,9 @@ static void CHECK_SEG_LIMITS(x86seg *seg, int end_offset) static void MEM_LOAD_ADDR_EA_B(x86seg *seg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR EDX, EDX*/ - addbyte(0xd2); - } - else - { - addbyte(0x8b); /*MOVL EDX, seg->base*/ - addbyte(0x05 | (REG_EDX << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL EDX, seg->base*/ + addbyte(0x05 | (REG_EDX << 3)); + addlong((uint32_t)&seg->base); addbyte(0xe8); /*CALL mem_load_addr_ea_b*/ addlong(mem_load_addr_ea_b - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); @@ -707,18 +685,9 @@ static void MEM_LOAD_ADDR_EA_B(x86seg *seg) } static int MEM_LOAD_ADDR_EA_B_NO_ABRT(x86seg *seg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR EDX, EDX*/ - addbyte(0xd2); - } - else - { - addbyte(0x8b); /*MOVL EDX, seg->base*/ - addbyte(0x05 | (REG_EDX << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL EDX, seg->base*/ + addbyte(0x05 | (REG_EDX << 3)); + addlong((uint32_t)&seg->base); addbyte(0xe8); /*CALL mem_load_addr_ea_b_no_abrt*/ addlong(mem_load_addr_ea_b_no_abrt - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); @@ -728,18 +697,9 @@ static int MEM_LOAD_ADDR_EA_B_NO_ABRT(x86seg *seg) } static void MEM_LOAD_ADDR_EA_W(x86seg *seg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR EDX, EDX*/ - addbyte(0xd2); - } - else - { - addbyte(0x8b); /*MOVL EDX, seg->base*/ - addbyte(0x05 | (REG_EDX << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL EDX, seg->base*/ + addbyte(0x05 | (REG_EDX << 3)); + addlong((uint32_t)&seg->base); addbyte(0xe8); /*CALL mem_load_addr_ea_w*/ addlong(mem_load_addr_ea_w - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); @@ -747,18 +707,9 @@ static void MEM_LOAD_ADDR_EA_W(x86seg *seg) } static void MEM_LOAD_ADDR_EA_W_OFFSET(x86seg *seg, int offset) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR EDX, EDX*/ - addbyte(0xd2); - } - else - { - addbyte(0x8b); /*MOVL EDX, seg->base*/ - addbyte(0x05 | (REG_EDX << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL EDX, seg->base*/ + addbyte(0x05 | (REG_EDX << 3)); + addlong((uint32_t)&seg->base); addbyte(0x83); /*ADD EAX, offset*/ addbyte(0xc0); addbyte(offset); @@ -769,18 +720,9 @@ static void MEM_LOAD_ADDR_EA_W_OFFSET(x86seg *seg, int offset) } static int MEM_LOAD_ADDR_EA_W_NO_ABRT(x86seg *seg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR EDX, EDX*/ - addbyte(0xd2); - } - else - { - addbyte(0x8b); /*MOVL EDX, seg->base*/ - addbyte(0x05 | (REG_EDX << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL EDX, seg->base*/ + addbyte(0x05 | (REG_EDX << 3)); + addlong((uint32_t)&seg->base); addbyte(0xe8); /*CALL mem_load_addr_ea_w_no_abrt*/ addlong(mem_load_addr_ea_w_no_abrt - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); @@ -790,18 +732,9 @@ static int MEM_LOAD_ADDR_EA_W_NO_ABRT(x86seg *seg) } static void MEM_LOAD_ADDR_EA_L(x86seg *seg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR EDX, EDX*/ - addbyte(0xd2); - } - else - { - addbyte(0x8b); /*MOVL EDX, seg->base*/ - addbyte(0x05 | (REG_EDX << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL EDX, seg->base*/ + addbyte(0x05 | (REG_EDX << 3)); + addlong((uint32_t)&seg->base); addbyte(0xe8); /*CALL mem_load_addr_ea_l*/ addlong(mem_load_addr_ea_l - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); @@ -810,18 +743,9 @@ static void MEM_LOAD_ADDR_EA_L(x86seg *seg) } static int MEM_LOAD_ADDR_EA_L_NO_ABRT(x86seg *seg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR EDX, EDX*/ - addbyte(0xd2); - } - else - { - addbyte(0x8b); /*MOVL EDX, seg->base*/ - addbyte(0x05 | (REG_EDX << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL EDX, seg->base*/ + addbyte(0x05 | (REG_EDX << 3)); + addlong((uint32_t)&seg->base); addbyte(0xe8); /*CALL mem_load_addr_ea_l_no_abrt*/ addlong(mem_load_addr_ea_l_no_abrt - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); @@ -832,18 +756,9 @@ static int MEM_LOAD_ADDR_EA_L_NO_ABRT(x86seg *seg) static void MEM_LOAD_ADDR_EA_Q(x86seg *seg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR EDX, EDX*/ - addbyte(0xd2); - } - else - { - addbyte(0x8b); /*MOVL EDX, seg->base*/ - addbyte(0x05 | (REG_EDX << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL EDX, seg->base*/ + addbyte(0x05 | (REG_EDX << 3)); + addlong((uint32_t)&seg->base); addbyte(0xe8); /*CALL mem_load_addr_ea_q*/ addlong(mem_load_addr_ea_q - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); @@ -871,18 +786,9 @@ static void MEM_LOAD_ADDR_IMM_L(x86seg *seg, uint32_t addr) static void MEM_STORE_ADDR_EA_B(x86seg *seg, int host_reg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ESI, ESI*/ - addbyte(0xf6); - } - else - { - addbyte(0x8b); /*MOVL ESI, seg->base*/ - addbyte(0x05 | (REG_ESI << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL ESI, seg->base*/ + addbyte(0x05 | (REG_ESI << 3)); + addlong((uint32_t)&seg->base); if (host_reg != REG_ECX) { addbyte(0x89); /*MOV ECX, host_reg*/ @@ -893,18 +799,9 @@ static void MEM_STORE_ADDR_EA_B(x86seg *seg, int host_reg) } static void MEM_STORE_ADDR_EA_B_NO_ABRT(x86seg *seg, int host_reg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ESI, ESI*/ - addbyte(0xf6); - } - else - { - addbyte(0x8b); /*MOVL ESI, seg->base*/ - addbyte(0x05 | (REG_ESI << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL ESI, seg->base*/ + addbyte(0x05 | (REG_ESI << 3)); + addlong((uint32_t)&seg->base); if (host_reg != REG_ECX) { addbyte(0x89); /*MOV ECX, host_reg*/ @@ -915,18 +812,9 @@ static void MEM_STORE_ADDR_EA_B_NO_ABRT(x86seg *seg, int host_reg) } static void MEM_STORE_ADDR_EA_W(x86seg *seg, int host_reg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ESI, ESI*/ - addbyte(0xf6); - } - else - { - addbyte(0x8b); /*MOVL ESI, seg->base*/ - addbyte(0x05 | (REG_ESI << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL ESI, seg->base*/ + addbyte(0x05 | (REG_ESI << 3)); + addlong((uint32_t)&seg->base); if (host_reg != REG_ECX) { addbyte(0x89); /*MOV ECX, host_reg*/ @@ -937,18 +825,9 @@ static void MEM_STORE_ADDR_EA_W(x86seg *seg, int host_reg) } static void MEM_STORE_ADDR_EA_W_NO_ABRT(x86seg *seg, int host_reg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ESI, ESI*/ - addbyte(0xf6); - } - else - { - addbyte(0x8b); /*MOVL ESI, seg->base*/ - addbyte(0x05 | (REG_ESI << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL ESI, seg->base*/ + addbyte(0x05 | (REG_ESI << 3)); + addlong((uint32_t)&seg->base); if (host_reg != REG_ECX) { addbyte(0x89); /*MOV ECX, host_reg*/ @@ -959,18 +838,9 @@ static void MEM_STORE_ADDR_EA_W_NO_ABRT(x86seg *seg, int host_reg) } static void MEM_STORE_ADDR_EA_L(x86seg *seg, int host_reg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ESI, ESI*/ - addbyte(0xf6); - } - else - { - addbyte(0x8b); /*MOVL ESI, seg->base*/ - addbyte(0x05 | (REG_ESI << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL ESI, seg->base*/ + addbyte(0x05 | (REG_ESI << 3)); + addlong((uint32_t)&seg->base); if (host_reg != REG_ECX) { addbyte(0x89); /*MOV ECX, host_reg*/ @@ -981,18 +851,9 @@ static void MEM_STORE_ADDR_EA_L(x86seg *seg, int host_reg) } static void MEM_STORE_ADDR_EA_L_NO_ABRT(x86seg *seg, int host_reg) { - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ESI, ESI*/ - addbyte(0xf6); - } - else - { - addbyte(0x8b); /*MOVL ESI, seg->base*/ - addbyte(0x05 | (REG_ESI << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL ESI, seg->base*/ + addbyte(0x05 | (REG_ESI << 3)); + addlong((uint32_t)&seg->base); if (host_reg != REG_ECX) { addbyte(0x89); /*MOV ECX, host_reg*/ @@ -1013,18 +874,9 @@ static void MEM_STORE_ADDR_EA_Q(x86seg *seg, int host_reg, int host_reg2) addbyte(0x89); /*MOV ECX, host_reg2*/ addbyte(0xc0 | REG_ECX | (host_reg2 << 3)); } - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ESI, ESI*/ - addbyte(0xf6); - } - else - { - addbyte(0x8b); /*MOVL ESI, seg->base*/ - addbyte(0x05 | (REG_ESI << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL ESI, seg->base*/ + addbyte(0x05 | (REG_ESI << 3)); + addlong((uint32_t)&seg->base); addbyte(0xe8); /*CALL mem_store_addr_ea_q*/ addlong(mem_store_addr_ea_q - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); } @@ -3940,18 +3792,9 @@ static void LOAD_EA() static void MEM_CHECK_WRITE(x86seg *seg) { CHECK_SEG_WRITE(seg); - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ESI, ESI*/ - addbyte(0xf6); - } - else - { - addbyte(0x8b); /*MOVL ESI, seg->base*/ - addbyte(0x05 | (REG_ESI << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL ESI, seg->base*/ + addbyte(0x05 | (REG_ESI << 3)); + addlong((uint32_t)&seg->base); addbyte(0xe8); /*CALL mem_check_write*/ addlong(mem_check_write - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); LOAD_EA(); @@ -3959,18 +3802,9 @@ static void MEM_CHECK_WRITE(x86seg *seg) static void MEM_CHECK_WRITE_W(x86seg *seg) { CHECK_SEG_WRITE(seg); - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ESI, ESI*/ - addbyte(0xf6); - } - else - { - addbyte(0x8b); /*MOVL ESI, seg->base*/ - addbyte(0x05 | (REG_ESI << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL ESI, seg->base*/ + addbyte(0x05 | (REG_ESI << 3)); + addlong((uint32_t)&seg->base); addbyte(0xe8); /*CALL mem_check_write_w*/ addlong(mem_check_write_w - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); LOAD_EA(); @@ -3978,18 +3812,9 @@ static void MEM_CHECK_WRITE_W(x86seg *seg) static void MEM_CHECK_WRITE_L(x86seg *seg) { CHECK_SEG_WRITE(seg); - if (((seg == &_ds) && (cpu_cur_status & CPU_STATUS_FLATDS)) || - ((seg == &_ss) && (cpu_cur_status & CPU_STATUS_FLATSS))) - { - addbyte(0x31); /*XOR ESI, ESI*/ - addbyte(0xf6); - } - else - { - addbyte(0x8b); /*MOVL ESI, seg->base*/ - addbyte(0x05 | (REG_ESI << 3)); - addlong((uint32_t)&seg->base); - } + addbyte(0x8b); /*MOVL ESI, seg->base*/ + addbyte(0x05 | (REG_ESI << 3)); + addlong((uint32_t)&seg->base); addbyte(0xe8); /*CALL mem_check_write_l*/ addlong(mem_check_write_l - (uint32_t)(&codeblock[block_current].data[block_pos + 4])); LOAD_EA(); diff --git a/src/CPU/codegen_x86-64.c b/src/CPU/codegen_x86-64.c index 9f42b07dd..e591adc95 100644 --- a/src/CPU/codegen_x86-64.c +++ b/src/CPU/codegen_x86-64.c @@ -274,13 +274,13 @@ void codegen_block_init(uint32_t phys_addr) block->_cs = cs; block->pnt = block_current; block->phys = phys_addr; + block->use32 = use32; + block->stack32 = stack32; block->next = block->prev = NULL; block->next_2 = block->prev_2 = NULL; block->page_mask = 0; block->flags = 0; - block->status = cpu_cur_status; - block->was_recompiled = 0; recomp_page = block->phys & ~0xfff; diff --git a/src/CPU/codegen_x86.c b/src/CPU/codegen_x86.c index 01015ce87..a42b32104 100644 --- a/src/CPU/codegen_x86.c +++ b/src/CPU/codegen_x86.c @@ -1401,11 +1401,12 @@ void codegen_block_init(uint32_t phys_addr) block->_cs = cs; block->pnt = block_current; block->phys = phys_addr; + block->use32 = use32; + block->stack32 = stack32; block->next = block->prev = NULL; block->next_2 = block->prev_2 = NULL; block->page_mask = 0; block->flags = CODEBLOCK_STATIC_TOP; - block->status = cpu_cur_status; block->was_recompiled = 0; diff --git a/src/CPU/cpu.c b/src/CPU/cpu.c index cbb7161fb..453e8626a 100644 --- a/src/CPU/cpu.c +++ b/src/CPU/cpu.c @@ -1,23 +1,6 @@ -/* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. - * - * This file is part of the 86Box distribution. - * - * CPU type handler. - * - * Version: @(#)cpu.c 1.0.0 2017/05/30 - * - * Author: Sarah Walker, - * leilei, - * Miran Grca, - * Copyright 2008-2017 Sarah Walker. - * Copyright 2016-2017 leilei. - * Copyright 2016-2017 Miran Grca. - */ - +/* Copyright holders: Sarah Walker, Tenshi, leilei + see COPYING for more details +*/ #include "../ibm.h" #include "cpu.h" #include "../model.h" @@ -92,15 +75,12 @@ int cpu_hasMMX, cpu_hasMSR; int cpu_hasCR4; int cpu_use_dynarec; -int hasfpu; - uint64_t cpu_CR4_mask; int cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_write_l; int cpu_prefetch_cycles, cpu_prefetch_width; int cpu_waitstates; int cpu_cache_int_enabled, cpu_cache_ext_enabled; -int cpu_pci_speed; int is286, is386; int israpidcad, is_pentium; @@ -425,7 +405,7 @@ CPU cpus_Cx486[] = {"6x86MX-PR300", CPU_Cx6x86MX, 18, 233333333, 3, 33333333, 0x600, 0x600, 0x0454, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,7,7}, {"6x86MX-PR333", CPU_Cx6x86MX, 18, 250000000, 3, 41666667, 0x600, 0x600, 0x0453, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 20,20,9,9}, {"6x86MX-PR366", CPU_Cx6x86MX, 18, 250000000, 3, 33333333, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12}, - {"6x86MX-PR400", CPU_Cx6x86MX, 18, 285000000, 3, 41666667, 0x600, 0x600, 0x0453, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9}, + {"6x86MX-PR400", CPU_Cx6x86MX, 18, 285000000, 3, 31666667, 0x600, 0x600, 0x0453, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9}, {"", -1, 0, 0, 0} }; @@ -637,6 +617,11 @@ void cpu_set() if (enable_external_fpu) { hasfpu = 1; + if (cpu_s->cpu_type == CPU_i486SX) + { + /* The 487SX is a full implementation of the 486DX and takes over the entire CPU's operation. */ + cpu_s->cpu_type = CPU_i486DX; + } } } diff --git a/src/CPU/cpu.h b/src/CPU/cpu.h index ce0955b7f..cbf7b7516 100644 --- a/src/CPU/cpu.h +++ b/src/CPU/cpu.h @@ -1,23 +1,6 @@ -/* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. - * - * This file is part of the 86Box distribution. - * - * CPU type handler. - * - * Version: @(#)cpu.h 1.0.0 2017/05/30 - * - * Author: Sarah Walker, - * leilei, - * Miran Grca, - * Copyright 2008-2017 Sarah Walker. - * Copyright 2016-2017 leilei. - * Copyright 2016-2017 Miran Grca. - */ - +/* Copyright holders: Sarah Walker, Tenshi, leilei + see COPYING for more details +*/ #ifndef _CPU_H_ #define _CPU_H_ @@ -155,7 +138,6 @@ extern int cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_writ extern int cpu_prefetch_cycles, cpu_prefetch_width; extern int cpu_waitstates; extern int cpu_cache_int_enabled, cpu_cache_ext_enabled; -extern int cpu_pci_speed; extern uint64_t tsc; diff --git a/src/CPU/x86_ops_misc.h b/src/CPU/x86_ops_misc.h index 7734217eb..a2b4f6f31 100644 --- a/src/CPU/x86_ops_misc.h +++ b/src/CPU/x86_ops_misc.h @@ -1,21 +1,3 @@ -/* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. - * - * This file is part of the 86Box distribution. - * - * Miscellaneous x86 CPU Instructions. - * - * Version: @(#)x86_ops_misc.h 1.0.0 2017/05/30 - * - * Author: Sarah Walker, - * Miran Grca, - * Copyright 2008-2017 Sarah Walker. - * Copyright 2016-2017 Miran Grca. - */ - static int opCBW(uint32_t fetchdat) { AH = (AL & 0x80) ? 0xff : 0; @@ -773,17 +755,9 @@ static int opLOADALL(uint32_t fetchdat) ss = readmemw(0, 0x842) | (readmemb(0, 0x844) << 16); _ss.access = readmemb(0, 0x845); _ss.limit = readmemw(0, 0x846); - if (_ss.base == 0 && _ss.limit_low == 0 && _ss.limit_high == 0xffffffff) - cpu_cur_status |= CPU_STATUS_FLATSS; - else - cpu_cur_status &= ~CPU_STATUS_FLATSS; ds = readmemw(0, 0x848) | (readmemb(0, 0x84A) << 16); _ds.access = readmemb(0, 0x84B); _ds.limit = readmemw(0, 0x84C); - if (_ds.base == 0 && _ds.limit_low == 0 && _ds.limit_high == 0xffffffff) - cpu_cur_status |= CPU_STATUS_FLATDS; - else - cpu_cur_status &= ~CPU_STATUS_FLATDS; gdt.base = readmemw(0, 0x84E) | (readmemb(0, 0x850) << 16); gdt.limit = readmemw(0, 0x852); ldt.base = readmemw(0, 0x854) | (readmemb(0, 0x856) << 16); @@ -823,29 +797,8 @@ static void loadall_load_segment(uint32_t addr, x86seg *s) if (s == &_cs) use32 = (segdat3 & 0x40) ? 0x300 : 0; if (s == &_ss) stack32 = (segdat3 & 0x40) ? 1 : 0; - cpu_cur_status &= ~(CPU_STATUS_USE32 | CPU_STATUS_STACK32); - if (use32) - cpu_cur_status |= CPU_STATUS_USE32; - if (stack32) - cpu_cur_status |= CPU_STATUS_STACK32; set_segment_limit(s, segdat3); - - if (s == &_ds) - { - if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff) - - cpu_cur_status |= CPU_STATUS_FLATDS; - else - cpu_cur_status &= ~CPU_STATUS_FLATDS; - } - if (s == &_ss) - { - if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff) - cpu_cur_status |= CPU_STATUS_FLATSS; - else - cpu_cur_status &= ~CPU_STATUS_FLATSS; - } } static int opLOADALL386(uint32_t fetchdat) diff --git a/src/CPU/x86seg.c b/src/CPU/x86seg.c index 4f43d8dc8..cc0cc6dbc 100644 --- a/src/CPU/x86seg.c +++ b/src/CPU/x86seg.c @@ -1,21 +1,6 @@ -/* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. - * - * This file is part of the 86Box distribution. - * - * x86 CPU segment emulation. - * - * Version: @(#)x86seg.c 1.0.0 2017/05/30 - * - * Author: Sarah Walker, - * Miran Grca, - * Copyright 2008-2017 Sarah Walker. - * Copyright 2016-2017 Miran Grca. - */ - +/* Copyright holders: Sarah Walker, SA1988 + see COPYING for more details +*/ #include #include #include @@ -174,29 +159,6 @@ void x86np(char *s, uint16_t error) } -static void set_stack32(int s) -{ - stack32 = s; - if (stack32) - cpu_cur_status |= CPU_STATUS_STACK32; - else - cpu_cur_status &= ~CPU_STATUS_STACK32; -} - -static void set_use32(int u) -{ - if (u) - { - use32 = 0x300; - cpu_cur_status |= CPU_STATUS_USE32; - } - else - { - use32 = 0; - cpu_cur_status &= ~CPU_STATUS_USE32; - } -} - void do_seg_load(x86seg *s, uint16_t *segdat) { s->limit = segdat[0] | ((segdat[3] & 0xF) << 16); @@ -217,21 +179,6 @@ void do_seg_load(x86seg *s, uint16_t *segdat) s->limit_high = (segdat[3] & 0x40) ? 0xffffffff : 0xffff; s->limit_low = s->limit + 1; } - - if (s == &_ds) - { - if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff) - cpu_cur_status |= CPU_STATUS_FLATDS; - else - cpu_cur_status &= ~CPU_STATUS_FLATDS; - } - if (s == &_ss) - { - if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff) - cpu_cur_status |= CPU_STATUS_FLATSS; - else - cpu_cur_status &= ~CPU_STATUS_FLATSS; - } } static void do_seg_v86_init(x86seg *s) @@ -304,8 +251,6 @@ void loadseg(uint16_t seg, x86seg *s) s->seg=0; s->access = 0x80; s->base=-1; - if (s == &_ds) - cpu_cur_status &= ~CPU_STATUS_FLATDS; return; } addr=seg&~7; @@ -358,7 +303,7 @@ void loadseg(uint16_t seg, x86seg *s) x86ss(NULL,seg&~3); return; } - set_stack32((segdat[3] & 0x40) ? 1 : 0); + stack32 = (segdat[3] & 0x40) ? 1 : 0; } else if (s!=&_cs) { @@ -414,22 +359,6 @@ void loadseg(uint16_t seg, x86seg *s) stack32 = 0; s->checked = 1; } - - if (s == &_ds) - { - if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff) - cpu_cur_status |= CPU_STATUS_FLATDS; - else - - cpu_cur_status &= ~CPU_STATUS_FLATDS; - } - if (s == &_ss) - { - if (s->base == 0 && s->limit_low == 0 && s->limit_high == 0xffffffff) - cpu_cur_status |= CPU_STATUS_FLATSS; - else - cpu_cur_status &= ~CPU_STATUS_FLATSS; - } } #define DPL ((segdat[2]>>13)&3) @@ -497,7 +426,8 @@ void loadcs(uint16_t seg) x86np("Load CS not present", seg & 0xfffc); return; } - set_use32(segdat[3] & 0x40); + if (segdat[3]&0x40) use32=0x300; + else use32=0; CS=(seg&~3)|CPL; do_seg_load(&_cs, segdat); use32=(segdat[3]&0x40)?0x300:0; @@ -600,7 +530,8 @@ void loadcsjmp(uint16_t seg, uint32_t oxpc) x86np("Load CS JMP not present\n", seg & 0xfffc); return; } - set_use32(segdat[3]&0x40); + if (segdat[3]&0x40) use32=0x300; + else use32=0; #ifdef CS_ACCESSED cpl_override = 1; @@ -613,6 +544,7 @@ void loadcsjmp(uint16_t seg, uint32_t oxpc) do_seg_load(&_cs, segdat); if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); + use32=(segdat[3]&0x40)?0x300:0; cycles -= timing_jmp_pm; } else /*System segment*/ @@ -710,8 +642,8 @@ void loadcsjmp(uint16_t seg, uint32_t oxpc) CS=seg2; do_seg_load(&_cs, segdat); if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); - set_use32(segdat[3]&0x40); - cpu_state.pc=newpc; + use32=(segdat[3]&0x40)?0x300:0; + cpu_state.pc=newpc; #ifdef CS_ACCESSED cpl_override = 1; @@ -896,7 +828,8 @@ void loadcscall(uint16_t seg) x86np("Load CS call not present", seg & 0xfffc); return; } - set_use32(segdat[3]&0x40); + if (segdat[3]&0x40) use32=0x300; + else use32=0; #ifdef CS_ACCESSED cpl_override = 1; @@ -915,6 +848,7 @@ void loadcscall(uint16_t seg) CS=seg; do_seg_load(&_cs, segdat); if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); + use32=(segdat[3]&0x40)?0x300:0; if (csout) pclog("Complete\n"); cycles -= timing_call_pm; } @@ -1071,7 +1005,7 @@ void loadcscall(uint16_t seg) } if (!stack32) oldsp &= 0xFFFF; SS=newss; - set_stack32((segdat2[3] & 0x40) ? 1 : 0); + stack32 = (segdat2[3] & 0x40) ? 1 : 0; if (stack32) ESP=newsp; else SP=newsp; @@ -1088,7 +1022,7 @@ void loadcscall(uint16_t seg) CS=seg2; do_seg_load(&_cs, segdat); if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); - set_use32(segdat[3]&0x40); + use32=(segdat[3]&0x40)?0x300:0; cpu_state.pc=newpc; if (output) pclog("Set access 2\n"); @@ -1167,8 +1101,8 @@ void loadcscall(uint16_t seg) CS=seg2; do_seg_load(&_cs, segdat); if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); - set_use32(segdat[3]&0x40); - cpu_state.pc=newpc; + use32=(segdat[3]&0x40)?0x300:0; + cpu_state.pc=newpc; #ifdef CS_ACCESSED cpl_override = 1; @@ -1311,8 +1245,8 @@ void pmoderetf(int is32, uint16_t off) do_seg_load(&_cs, segdat); _cs.access = (_cs.access & ~(3 << 5)) | ((CS & 3) << 5); if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); - set_use32(segdat[3] & 0x40); - + use32=(segdat[3]&0x40)?0x300:0; + cycles -= timing_retf_pm; } else @@ -1419,7 +1353,7 @@ void pmoderetf(int is32, uint16_t off) return; } SS=newss; - set_stack32((segdat2[3] & 0x40) ? 1 : 0); + stack32 = (segdat2[3] & 0x40) ? 1 : 0; if (stack32) ESP=newsp; else SP=newsp; do_seg_load(&_ss, segdat2); @@ -1441,7 +1375,7 @@ void pmoderetf(int is32, uint16_t off) CS=seg; do_seg_load(&_cs, segdat); if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); - set_use32(segdat[3] & 0x40); + use32=(segdat[3]&0x40)?0x300:0; if (stack32) ESP+=off; else SP+=off; @@ -1636,7 +1570,7 @@ void pmodeint(int num, int soft) return; } SS=newss; - set_stack32((segdat3[3] & 0x40) ? 1 : 0); + stack32 = (segdat3[3] & 0x40) ? 1 : 0; if (stack32) ESP=newsp; else SP=newsp; do_seg_load(&_ss, segdat3); @@ -1721,7 +1655,7 @@ void pmodeint(int num, int soft) if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); if (type>0x800) cpu_state.pc=segdat[0]|(segdat[3]<<16); else cpu_state.pc=segdat[0]; - set_use32(segdat2[3]&0x40); + use32=(segdat2[3]&0x40)?0x300:0; #ifdef CS_ACCESSED cpl_override = 1; @@ -1875,7 +1809,6 @@ void pmodeiret(int is32) do_seg_v86_init(&_es); loadseg(segs[1],&_ds); do_seg_v86_init(&_ds); - cpu_cur_status &= ~CPU_STATUS_FLATDS; loadseg(segs[2],&_fs); do_seg_v86_init(&_fs); loadseg(segs[3],&_gs); @@ -1893,9 +1826,7 @@ void pmodeiret(int is32) ESP=newsp; loadseg(newss,&_ss); do_seg_v86_init(&_ss); - cpu_cur_status &= ~CPU_STATUS_FLATSS; use32=0; - cpu_cur_status &= ~CPU_STATUS_USE32; flags=(tempflags&0xFFD5)|2; cycles -= timing_iret_v86; return; @@ -1982,7 +1913,7 @@ void pmodeiret(int is32) do_seg_load(&_cs, segdat); _cs.access = (_cs.access & ~(3 << 5)) | ((CS & 3) << 5); if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); - set_use32(segdat[3]&0x40); + use32=(segdat[3]&0x40)?0x300:0; #ifdef CS_ACCESSED cpl_override = 1; @@ -2065,7 +1996,7 @@ void pmodeiret(int is32) return; } SS=newss; - set_stack32((segdat2[3] & 0x40) ? 1 : 0); + stack32 = (segdat2[3] & 0x40) ? 1 : 0; if (stack32) ESP=newsp; else SP=newsp; do_seg_load(&_ss, segdat2); @@ -2087,7 +2018,7 @@ void pmodeiret(int is32) do_seg_load(&_cs, segdat); _cs.access = (_cs.access & ~(3 << 5)) | ((CS & 3) << 5); if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); - set_use32(segdat[3] & 0x40); + use32=(segdat[3]&0x40)?0x300:0; check_seg_valid(&_ds); check_seg_valid(&_es); @@ -2277,7 +2208,7 @@ void taskswitch286(uint16_t seg, uint16_t *segdat, int is32) CS=new_cs; do_seg_load(&_cs, segdat2); if (CPL==3 && oldcpl!=3) flushmmucache_cr3(); - set_use32(segdat2[3] & 0x40); + use32=(segdat2[3]&0x40)?0x300:0; EAX=new_eax; ECX=new_ecx; diff --git a/src/CPU/x86seg.h b/src/CPU/x86seg.h index f4badadf4..4a36f360b 100644 --- a/src/CPU/x86seg.h +++ b/src/CPU/x86seg.h @@ -1,17 +1,4 @@ -/* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. - * - * This file is part of the 86Box distribution. - * - * x86 CPU segment emulation. - * - * Version: @(#)x86seg.h 1.0.0 2017/05/30 - * - * Author: Miran Grca, - * Copyright 2016-2017 Miran Grca. - */ - +/* Copyright holders: Tenshi + see COPYING for more details +*/ void do_seg_load(x86seg *s, uint16_t *segdat); diff --git a/src/CPU/x87_ops.h b/src/CPU/x87_ops.h index b9320081f..e212c6ccb 100644 --- a/src/CPU/x87_ops.h +++ b/src/CPU/x87_ops.h @@ -1,23 +1,3 @@ -/* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. - * - * This file is part of the 86Box distribution. - * - * x87 FPU instructions core. - * - * Version: @(#)x87_ops.h 1.0.0 2017/05/30 - * - * Author: Sarah Walker, - * leilei, - * Miran Grca, - * Copyright 2008-2017 Sarah Walker. - * Copyright 2016-2017 leilei. - * Copyright 2016-2017 Miran Grca. - */ - #include #include diff --git a/src/CPU/x87_ops_loadstore.h b/src/CPU/x87_ops_loadstore.h index 39a14c4fb..ed083b921 100644 --- a/src/CPU/x87_ops_loadstore.h +++ b/src/CPU/x87_ops_loadstore.h @@ -1,21 +1,3 @@ -/* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. - * - * This file is part of the 86Box distribution. - * - * x87 FPU instructions core. - * - * Version: @(#)x87_ops_loadstore.h 1.0.0 2017/05/30 - * - * Author: Sarah Walker, - * Miran Grca, - * Copyright 2008-2017 Sarah Walker. - * Copyright 2016-2017 Miran Grca. - */ - static int opFILDiw_a16(uint32_t fetchdat) { int16_t temp; diff --git a/src/ibm.h b/src/ibm.h index b210b07a0..04acfd78a 100644 --- a/src/ibm.h +++ b/src/ibm.h @@ -177,14 +177,6 @@ struct #define cycles cpu_state._cycles -extern uint32_t cpu_cur_status; - -#define CPU_STATUS_USE32 (1 << 0) -#define CPU_STATUS_STACK32 (1 << 1) -#define CPU_STATUS_FLATDS (1 << 2) -#define CPU_STATUS_FLATSS (1 << 3) - - #define cpu_rm cpu_state.rm_data.rm_mod_reg.rm #define cpu_mod cpu_state.rm_data.rm_mod_reg.mod #define cpu_reg cpu_state.rm_data.rm_mod_reg.reg