From a72142f2b5395e04e40cbf0ecb0dd3ed73174d39 Mon Sep 17 00:00:00 2001
From: GreaseMonkey <thematrixeatsyou@gmail.com>
Date: Fri, 2 May 2025 10:51:34 +1200
Subject: [PATCH] Fix EGA/VGA/SVGA odd-even handling of write mask

Matches my AMD Stoney + S3 Trio64V2, and also Intel's 2023 GPU docs (which *still* tend to be more accurate than IBM's), and makes more sense than what we've (I've?) been doing.
---
 src/video/vid_ega.c  | 4 +---
 src/video/vid_svga.c | 4 +---
 2 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/src/video/vid_ega.c b/src/video/vid_ega.c
index 8333e522e..b828239c0 100644
--- a/src/video/vid_ega.c
+++ b/src/video/vid_ega.c
@@ -1180,9 +1180,7 @@ ega_write(uint32_t addr, uint8_t val, void *priv)
     cycles -= video_timing_write_b;
 
     if (ega->chain2_write) {
-        writemask2 &= ~0xa;
-        if (addr & 1)
-            writemask2 <<= 1;
+        writemask2 &= 0x5 << (addr & 1);
     }
 
     addr = ega_remap_cpu_addr(addr, ega);
diff --git a/src/video/vid_svga.c b/src/video/vid_svga.c
index 67469ed22..86a57c00e 100644
--- a/src/video/vid_svga.c
+++ b/src/video/vid_svga.c
@@ -1689,9 +1689,7 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *priv)
             addr &= ~3;
         addr = ((addr & 0xfffc) << 2) | ((addr & 0x30000) >> 14) | (addr & ~0x3ffff);
     } else if (svga->chain2_write) {
-        writemask2 &= ~0xa;
-        if (addr & 1)
-            writemask2 <<= 1;
+        writemask2 &= 0x5 << (addr & 1);
         addr &= ~1;
         addr <<= 2;
     } else