Hook up Bidirectional LPT, EPP, and ECP to all Super I/O chips (missing is vendor-specific Configuration Register B behavior but that's next on my list), fixed Super I/O chip mistakes for a number of machines, split 286/386SX/M6117D machines into three separate files and reordered them as well.

This commit is contained in:
OBattler
2025-08-11 16:36:30 +02:00
parent 42fa1dbe54
commit dbd748636e
51 changed files with 5062 additions and 4463 deletions

View File

@@ -86,14 +86,28 @@ vt82c686_lpt_handler(vt82c686_t *dev)
lpt_port_remove(dev->lpt);
lpt_set_ext(dev->lpt, !!(dev->regs[0x10] & 0x80));
switch (dev->regs[0x10] & 0x03) {
case 0x01:
lpt_set_epp(dev->lpt, !!(dev->regs[0x10] & 0x20));
lpt_set_ecp(dev->lpt, 1);
break;
case 0x02:
lpt_set_epp(dev->lpt, 1);
lpt_set_ecp(dev->lpt, !!(dev->regs[0x10] & 0x20));
break;
}
if (((dev->regs[0x02] & 0x03) != 0x03) && !(dev->regs[0x0f] & 0x11) && (io_base >= 0x100) && (io_base <= io_mask))
lpt_port_setup(dev->lpt, io_base);
if (dev->lpt_irq) {
if (dev->lpt_irq)
lpt_port_irq(dev->lpt, dev->lpt_irq);
} else {
else
lpt_port_irq(dev->lpt, 0xff);
}
lpt_port_dma(dev->lpt, dev->lpt_dma);
}
static void
@@ -178,6 +192,7 @@ vt82c686_write(uint16_t port, uint8_t val, void *priv)
case 0x10:
dev->regs[reg] &= 0xf4;
vt82c686_lpt_handler(dev);
break;
case 0x11: