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Applied all mainline PCem commits;

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Added experimental NVidia Riva TNT2 emulation (patch from MoochMcGee);
ASUS P/I-P54TP4XE, ASUS P/I-P55T2P4, and ASUS P/I-P55TVP4 are back;
National Semiconductor PC87306 Super I/O chip now correctly reenables devices after a chip power cycle;
Several FDC improvements and the behavior is now a bit closer to real hardware (based on actual tests);
Added MR Intel Advanced/ATX with Microid Research BIOS with support for 4 floppy drives and up to 4 IDE controllers;
Added floppy drives 3 and 4, bringing the maximum to 4;
You can now connect hard disks to the tertiary IDE controller;
Correct undocumented behavior of the LEA instruction with register is back on 286 and later CPU's;
Pentium-rea models with Intel chipsets now have port 92 (with alternate reset and alternate A20 toggle);
Overhauled DMA channel read and write routines and fixed cascading;
Improved IMG detection of a bad BPB (or complete lack of a BPB);
Added preliminary emulation of PS/2 1.44 MB and PC-98 1.25 MB 3-mode drives (both have an inverted DENSEL pin);
Removed the incorrect Amstrad mouse patch from TheCollector1995;
Fixed ATAPI CD-ROM disk change detection;
Windows IOCTL CD-ROM handler now tries to use direct SCSI passthrough for more things, including obtaining CD-ROM capacity;
The Diamond Stealth32 (ET4000/W32p) now also works correctly on the two Award SiS 496/497 boxes;
The (S)VGA handler now converts 6-bit RAMDAC RGB channels to standard 8-bit RGB using a lookup table generated at emulator start, calculated using the correct intensity conversion method and treating intensity 64 as equivalent to 63;
Moved a few options from the Configuration dialog box to the menu;
SIO, PIIX, and PIIX3 now have the reset control register on port CF9 as they should;
Several bugfixes.
This commit is contained in:
OBattler
2016-12-23 03:16:24 +01:00
parent 724c5699ca
commit dc46480aa4
142 changed files with 8778 additions and 3331 deletions
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8
src/x86_ops_int.h
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@@ -1,5 +1,6 @@
static int opINT3(uint32_t fetchdat)
{
int cycles_old = cycles;
if ((cr0 & 1) && (eflags & VM_FLAG) && (IOPL != 3))
{
x86gpf(NULL,0);
@@ -7,11 +8,13 @@ static int opINT3(uint32_t fetchdat)
}
x86_int_sw(3);
CLOCK_CYCLES((is486) ? 44 : 59);
PREFETCH_RUN(cycles_old-cycles, 1, -1, 0,0,0,0, 0);
return 1;
}
static int opINT(uint32_t fetchdat)
{
int cycles_old = cycles;
uint8_t temp;
/*if (msw&1) pclog("INT %i %i %i\n",cr0&1,eflags&VM_FLAG,IOPL);*/
@@ -55,11 +58,14 @@ static int opINT(uint32_t fetchdat)
}*/
x86_int_sw(temp);
PREFETCH_RUN(cycles_old-cycles, 2, -1, 0,0,0,0, 0);
return 1;
}
static int opINTO(uint32_t fetchdat)
{
int cycles_old = cycles;
if ((cr0 & 1) && (eflags & VM_FLAG) && (IOPL != 3))
{
x86gpf(NULL,0);
@@ -69,9 +75,11 @@ static int opINTO(uint32_t fetchdat)
{
cpu_state.oldpc = cpu_state.pc;
x86_int_sw(4);
PREFETCH_RUN(cycles_old-cycles, 1, -1, 0,0,0,0, 0);
return 1;
}
CLOCK_CYCLES(3);
PREFETCH_RUN(3, 1, -1, 0,0,0,0, 0);
return 0;
}