Applied all mainline PCem commits;
Added experimental NVidia Riva TNT2 emulation (patch from MoochMcGee); ASUS P/I-P54TP4XE, ASUS P/I-P55T2P4, and ASUS P/I-P55TVP4 are back; National Semiconductor PC87306 Super I/O chip now correctly reenables devices after a chip power cycle; Several FDC improvements and the behavior is now a bit closer to real hardware (based on actual tests); Added MR Intel Advanced/ATX with Microid Research BIOS with support for 4 floppy drives and up to 4 IDE controllers; Added floppy drives 3 and 4, bringing the maximum to 4; You can now connect hard disks to the tertiary IDE controller; Correct undocumented behavior of the LEA instruction with register is back on 286 and later CPU's; Pentium-rea models with Intel chipsets now have port 92 (with alternate reset and alternate A20 toggle); Overhauled DMA channel read and write routines and fixed cascading; Improved IMG detection of a bad BPB (or complete lack of a BPB); Added preliminary emulation of PS/2 1.44 MB and PC-98 1.25 MB 3-mode drives (both have an inverted DENSEL pin); Removed the incorrect Amstrad mouse patch from TheCollector1995; Fixed ATAPI CD-ROM disk change detection; Windows IOCTL CD-ROM handler now tries to use direct SCSI passthrough for more things, including obtaining CD-ROM capacity; The Diamond Stealth32 (ET4000/W32p) now also works correctly on the two Award SiS 496/497 boxes; The (S)VGA handler now converts 6-bit RAMDAC RGB channels to standard 8-bit RGB using a lookup table generated at emulator start, calculated using the correct intensity conversion method and treating intensity 64 as equivalent to 63; Moved a few options from the Configuration dialog box to the menu; SIO, PIIX, and PIIX3 now have the reset control register on port CF9 as they should; Several bugfixes.
This commit is contained in:
@@ -3,6 +3,7 @@
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{ \
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PUSH_W(reg); \
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CLOCK_CYCLES((is486) ? 1 : 2); \
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PREFETCH_RUN(2, 1, -1, 0,0,1,0, 0); \
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return cpu_state.abrt; \
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}
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@@ -11,6 +12,7 @@
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{ \
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PUSH_L(reg); \
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CLOCK_CYCLES((is486) ? 1 : 2); \
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PREFETCH_RUN(2, 1, -1, 0,0,0,1, 0); \
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return cpu_state.abrt; \
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}
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@@ -19,6 +21,7 @@
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{ \
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reg = POP_W(); \
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CLOCK_CYCLES((is486) ? 1 : 4); \
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PREFETCH_RUN(4, 1, -1, 1,0,0,0, 0); \
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return cpu_state.abrt; \
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}
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@@ -27,6 +30,7 @@
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{ \
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reg = POP_L(); \
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CLOCK_CYCLES((is486) ? 1 : 4); \
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PREFETCH_RUN(4, 1, -1, 0,1,0,0, 0); \
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return cpu_state.abrt; \
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}
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@@ -94,6 +98,7 @@ static int opPUSHA_w(uint32_t fetchdat)
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if (!cpu_state.abrt) SP -= 16;
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}
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CLOCK_CYCLES((is486) ? 11 : 18);
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PREFETCH_RUN(18, 1, -1, 0,0,8,0, 0);
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return cpu_state.abrt;
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}
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static int opPUSHA_l(uint32_t fetchdat)
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@@ -123,6 +128,7 @@ static int opPUSHA_l(uint32_t fetchdat)
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if (!cpu_state.abrt) SP -= 32;
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}
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CLOCK_CYCLES((is486) ? 11 : 18);
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PREFETCH_RUN(18, 1, -1, 0,0,0,8, 0);
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return cpu_state.abrt;
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}
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@@ -151,6 +157,7 @@ static int opPOPA_w(uint32_t fetchdat)
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SP += 16;
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}
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CLOCK_CYCLES((is486) ? 9 : 24);
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PREFETCH_RUN(24, 1, -1, 7,0,0,0, 0);
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return 0;
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}
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static int opPOPA_l(uint32_t fetchdat)
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@@ -178,6 +185,7 @@ static int opPOPA_l(uint32_t fetchdat)
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SP += 32;
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}
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CLOCK_CYCLES((is486) ? 9 : 24);
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PREFETCH_RUN(24, 1, -1, 0,7,0,0, 0);
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return 0;
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}
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@@ -186,6 +194,7 @@ static int opPUSH_imm_w(uint32_t fetchdat)
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uint16_t val = getwordf();
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PUSH_W(val);
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CLOCK_CYCLES(2);
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PREFETCH_RUN(2, 3, -1, 0,0,1,0, 0);
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return cpu_state.abrt;
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}
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static int opPUSH_imm_l(uint32_t fetchdat)
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@@ -193,6 +202,7 @@ static int opPUSH_imm_l(uint32_t fetchdat)
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uint32_t val = getlong(); if (cpu_state.abrt) return 1;
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PUSH_L(val);
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CLOCK_CYCLES(2);
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PREFETCH_RUN(2, 3, -1, 0,0,0,1, 0);
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return cpu_state.abrt;
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}
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@@ -204,6 +214,7 @@ static int opPUSH_imm_bw(uint32_t fetchdat)
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PUSH_W(tempw);
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CLOCK_CYCLES(2);
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PREFETCH_RUN(2, 2, -1, 0,0,1,0, 0);
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return cpu_state.abrt;
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}
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static int opPUSH_imm_bl(uint32_t fetchdat)
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@@ -214,6 +225,7 @@ static int opPUSH_imm_bl(uint32_t fetchdat)
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PUSH_L(templ);
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CLOCK_CYCLES(2);
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PREFETCH_RUN(2, 2, -1, 0,0,0,1, 0);
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return cpu_state.abrt;
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}
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@@ -233,6 +245,7 @@ static int opPOPW_a16(uint32_t fetchdat)
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 6);
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else CLOCK_CYCLES((cpu_mod == 3) ? 4 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? 4 : 5, 2, rmdat, 1,0,(cpu_mod == 3) ? 0:1,0, 0);
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return cpu_state.abrt;
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}
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static int opPOPW_a32(uint32_t fetchdat)
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@@ -251,6 +264,7 @@ static int opPOPW_a32(uint32_t fetchdat)
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 6);
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else CLOCK_CYCLES((cpu_mod == 3) ? 4 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? 4 : 5, 2, rmdat, 1,0,(cpu_mod == 3) ? 0:1,0, 1);
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return cpu_state.abrt;
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}
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@@ -270,6 +284,7 @@ static int opPOPL_a16(uint32_t fetchdat)
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 6);
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else CLOCK_CYCLES((cpu_mod == 3) ? 4 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? 4 : 5, 2, rmdat, 0,1,0,(cpu_mod == 3) ? 0:1, 0);
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return cpu_state.abrt;
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}
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static int opPOPL_a32(uint32_t fetchdat)
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@@ -288,6 +303,7 @@ static int opPOPL_a32(uint32_t fetchdat)
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if (is486) CLOCK_CYCLES((cpu_mod == 3) ? 1 : 6);
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else CLOCK_CYCLES((cpu_mod == 3) ? 4 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? 4 : 5, 2, rmdat, 0,1,0,(cpu_mod == 3) ? 0:1, 1);
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return cpu_state.abrt;
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}
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@@ -297,6 +313,7 @@ static int opENTER_w(uint32_t fetchdat)
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uint16_t offset = getwordf();
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int count = (fetchdat >> 16) & 0xff; cpu_state.pc++;
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uint32_t tempEBP = EBP, tempESP = ESP, frame_ptr;
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int reads = 0, writes = 1, instr_cycles = 0;
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PUSH_W(BP); if (cpu_state.abrt) return 1;
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frame_ptr = ESP;
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@@ -313,16 +330,20 @@ static int opENTER_w(uint32_t fetchdat)
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PUSH_W(tempw);
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if (cpu_state.abrt) { ESP = tempESP; EBP = tempEBP; return 1; }
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CLOCK_CYCLES((is486) ? 3 : 4);
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reads++; writes++; instr_cycles += (is486) ? 3 : 4;
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}
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PUSH_W(frame_ptr);
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if (cpu_state.abrt) { ESP = tempESP; EBP = tempEBP; return 1; }
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CLOCK_CYCLES((is486) ? 3 : 5);
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writes++; instr_cycles += (is486) ? 3 : 5;
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}
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BP = frame_ptr;
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if (stack32) ESP -= offset;
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else SP -= offset;
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CLOCK_CYCLES((is486) ? 14 : 10);
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instr_cycles += (is486) ? 14 : 10;
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PREFETCH_RUN(instr_cycles, 3, -1, reads,0,writes,0, 0);
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return 0;
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}
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static int opENTER_l(uint32_t fetchdat)
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@@ -330,6 +351,7 @@ static int opENTER_l(uint32_t fetchdat)
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uint16_t offset = getwordf();
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int count = (fetchdat >> 16) & 0xff; cpu_state.pc++;
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uint32_t tempEBP = EBP, tempESP = ESP, frame_ptr;
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int reads = 0, writes = 1, instr_cycles = 0;
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PUSH_L(EBP); if (cpu_state.abrt) return 1;
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frame_ptr = ESP;
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@@ -346,16 +368,20 @@ static int opENTER_l(uint32_t fetchdat)
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PUSH_L(templ);
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if (cpu_state.abrt) { ESP = tempESP; EBP = tempEBP; return 1; }
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CLOCK_CYCLES((is486) ? 3 : 4);
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reads++; writes++; instr_cycles += (is486) ? 3 : 4;
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}
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PUSH_L(frame_ptr);
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if (cpu_state.abrt) { ESP = tempESP; EBP = tempEBP; return 1; }
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CLOCK_CYCLES((is486) ? 3 : 5);
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writes++; instr_cycles += (is486) ? 3 : 5;
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}
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EBP = frame_ptr;
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if (stack32) ESP -= offset;
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else SP -= offset;
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CLOCK_CYCLES((is486) ? 14 : 10);
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instr_cycles += (is486) ? 14 : 10;
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PREFETCH_RUN(instr_cycles, 3, -1, reads,0,writes,0, 0);
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return 0;
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}
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@@ -371,6 +397,7 @@ static int opLEAVE_w(uint32_t fetchdat)
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BP = temp;
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CLOCK_CYCLES(4);
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PREFETCH_RUN(4, 1, -1, 1,0,0,0, 0);
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return 0;
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}
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static int opLEAVE_l(uint32_t fetchdat)
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@@ -384,6 +411,7 @@ static int opLEAVE_l(uint32_t fetchdat)
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EBP = temp;
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CLOCK_CYCLES(4);
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PREFETCH_RUN(4, 1, -1, 0,1,0,0, 0);
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return 0;
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}
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@@ -393,12 +421,14 @@ static int opLEAVE_l(uint32_t fetchdat)
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{ \
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PUSH_W(seg); \
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CLOCK_CYCLES(2); \
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PREFETCH_RUN(2, 1, -1, 0,0,1,0, 0); \
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return cpu_state.abrt; \
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} \
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static int opPUSH_ ## seg ## _l(uint32_t fetchdat) \
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{ \
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PUSH_L(seg); \
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CLOCK_CYCLES(2); \
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PREFETCH_RUN(2, 1, -1, 0,0,0,1, 0); \
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return cpu_state.abrt; \
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}
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@@ -410,6 +440,7 @@ static int opLEAVE_l(uint32_t fetchdat)
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temp_seg = POP_W(); if (cpu_state.abrt) return 1; \
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loadseg(temp_seg, realseg); if (cpu_state.abrt) ESP = temp_esp; \
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CLOCK_CYCLES(is486 ? 3 : 7); \
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PREFETCH_RUN(is486 ? 3 : 7, 1, -1, 0,0,1,0, 0); \
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return cpu_state.abrt; \
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} \
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static int opPOP_ ## seg ## _l(uint32_t fetchdat) \
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@@ -419,6 +450,7 @@ static int opLEAVE_l(uint32_t fetchdat)
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temp_seg = POP_L(); if (cpu_state.abrt) return 1; \
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loadseg(temp_seg & 0xffff, realseg); if (cpu_state.abrt) ESP = temp_esp; \
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CLOCK_CYCLES(is486 ? 3 : 7); \
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PREFETCH_RUN(is486 ? 3 : 7, 1, -1, 0,0,1,0, 0); \
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return cpu_state.abrt; \
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}
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@@ -443,7 +475,8 @@ static int opPOP_SS_w(uint32_t fetchdat)
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temp_seg = POP_W(); if (cpu_state.abrt) return 1;
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loadseg(temp_seg, &_ss); if (cpu_state.abrt) { ESP = temp_esp; return 1; }
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CLOCK_CYCLES(is486 ? 3 : 7);
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PREFETCH_RUN(is486 ? 3 : 7, 1, -1, 0,0,1,0, 0);
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cpu_state.oldpc = cpu_state.pc;
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cpu_state.op32 = use32;
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cpu_state.ssegs = 0;
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@@ -462,6 +495,7 @@ static int opPOP_SS_l(uint32_t fetchdat)
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temp_seg = POP_L(); if (cpu_state.abrt) return 1;
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loadseg(temp_seg & 0xffff, &_ss); if (cpu_state.abrt) { ESP = temp_esp; return 1; }
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CLOCK_CYCLES(is486 ? 3 : 7);
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PREFETCH_RUN(is486 ? 3 : 7, 1, -1, 0,0,1,0, 0);
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cpu_state.oldpc = cpu_state.pc;
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cpu_state.op32 = use32;
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