Removed some excess files.
This commit is contained in:
@@ -1,58 +0,0 @@
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#define C0 (1<<8)
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#define C1 (1<<9)
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#define C2 (1<<10)
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#define C3 (1<<14)
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uint32_t x87_pc_off,x87_op_off;
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uint16_t x87_pc_seg,x87_op_seg;
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static inline void x87_set_mmx()
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{
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#ifdef USE_NEW_DYNAREC
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cpu_state.TOP = 0;
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*(uint64_t *)cpu_state.tag = 0x0101010101010101ull;
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cpu_state.ismmx = 1;
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#else
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uint64_t *p;
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cpu_state.TOP = 0;
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p = (uint64_t *)cpu_state.tag;
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*p = 0;
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cpu_state.ismmx = 1;
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#endif
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}
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static inline void x87_emms()
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{
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#ifdef USE_NEW_DYNAREC
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*(uint64_t *)cpu_state.tag = 0;
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cpu_state.ismmx = 0;
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#else
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uint64_t *p;
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p = (uint64_t *)cpu_state.tag;
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*p = 0;
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cpu_state.ismmx = 0;
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#endif
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}
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uint16_t x87_gettag();
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void x87_settag(uint16_t new_tag);
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#ifdef USE_NEW_DYNAREC
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#define TAG_EMPTY 0
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#define TAG_VALID (1 << 0)
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/*Hack for FPU copy. If set then MM[].q contains the 64-bit integer loaded by FILD*/
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#define TAG_UINT64 (1 << 7)
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#define X87_ROUNDING_NEAREST 0
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#define X87_ROUNDING_DOWN 1
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#define X87_ROUNDING_UP 2
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#define X87_ROUNDING_CHOP 3
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void codegen_set_rounding_mode(int mode);
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#else
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#define TAG_EMPTY 0
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#define TAG_VALID (1 << 0)
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/*Hack for FPU copy. If set then MM[].q contains the 64-bit integer loaded by FILD*/
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#define TAG_UINT64 (1 << 2)
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#endif
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File diff suppressed because it is too large
Load Diff
@@ -1,427 +0,0 @@
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#define opFPU(name, optype, a_size, load_var, get, use_var) \
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static int opFADD ## name ## _a ## a_size(uint32_t fetchdat) \
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{ \
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optype t; \
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FP_ENTER(); \
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fetch_ea_ ## a_size(fetchdat); \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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load_var = get(); if (cpu_state.abrt) return 1; \
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if ((cpu_state.npxc >> 10) & 3) \
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fesetround(rounding_modes[(cpu_state.npxc >> 10) & 3]); \
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ST(0) += use_var; \
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if ((cpu_state.npxc >> 10) & 3) \
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fesetround(FE_TONEAREST); \
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FP_TAG(); \
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CLOCK_CYCLES(8); \
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return 0; \
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} \
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static int opFCOM ## name ## _a ## a_size(uint32_t fetchdat) \
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{ \
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optype t; \
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FP_ENTER(); \
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fetch_ea_ ## a_size(fetchdat); \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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load_var = get(); if (cpu_state.abrt) return 1; \
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cpu_state.npxs &= ~(C0|C2|C3); \
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cpu_state.npxs |= x87_compare(ST(0), (double)use_var); \
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CLOCK_CYCLES(4); \
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return 0; \
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} \
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static int opFCOMP ## name ## _a ## a_size(uint32_t fetchdat) \
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{ \
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optype t; \
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FP_ENTER(); \
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fetch_ea_ ## a_size(fetchdat); \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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load_var = get(); if (cpu_state.abrt) return 1; \
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cpu_state.npxs &= ~(C0|C2|C3); \
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cpu_state.npxs |= x87_compare(ST(0), (double)use_var); \
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x87_pop(); \
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CLOCK_CYCLES(4); \
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return 0; \
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} \
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static int opFDIV ## name ## _a ## a_size(uint32_t fetchdat) \
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{ \
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optype t; \
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FP_ENTER(); \
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fetch_ea_ ## a_size(fetchdat); \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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load_var = get(); if (cpu_state.abrt) return 1; \
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x87_div(ST(0), ST(0), use_var); \
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FP_TAG(); \
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CLOCK_CYCLES(73); \
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return 0; \
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} \
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static int opFDIVR ## name ## _a ## a_size(uint32_t fetchdat) \
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{ \
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optype t; \
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FP_ENTER(); \
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fetch_ea_ ## a_size(fetchdat); \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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load_var = get(); if (cpu_state.abrt) return 1; \
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x87_div(ST(0), use_var, ST(0)); \
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FP_TAG(); \
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CLOCK_CYCLES(73); \
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return 0; \
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} \
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static int opFMUL ## name ## _a ## a_size(uint32_t fetchdat) \
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{ \
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optype t; \
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FP_ENTER(); \
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fetch_ea_ ## a_size(fetchdat); \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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load_var = get(); if (cpu_state.abrt) return 1; \
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ST(0) *= use_var; \
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FP_TAG(); \
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CLOCK_CYCLES(11); \
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return 0; \
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} \
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static int opFSUB ## name ## _a ## a_size(uint32_t fetchdat) \
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{ \
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optype t; \
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FP_ENTER(); \
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fetch_ea_ ## a_size(fetchdat); \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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load_var = get(); if (cpu_state.abrt) return 1; \
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ST(0) -= use_var; \
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FP_TAG(); \
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CLOCK_CYCLES(8); \
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return 0; \
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} \
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static int opFSUBR ## name ## _a ## a_size(uint32_t fetchdat) \
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{ \
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optype t; \
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FP_ENTER(); \
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fetch_ea_ ## a_size(fetchdat); \
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SEG_CHECK_READ(cpu_state.ea_seg); \
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load_var = get(); if (cpu_state.abrt) return 1; \
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ST(0) = use_var - ST(0); \
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FP_TAG(); \
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CLOCK_CYCLES(8); \
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return 0; \
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}
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opFPU(s, x87_ts, 16, t.i, geteal, t.s)
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#ifndef FPU_8087
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opFPU(s, x87_ts, 32, t.i, geteal, t.s)
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#endif
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opFPU(d, x87_td, 16, t.i, geteaq, t.d)
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#ifndef FPU_8087
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opFPU(d, x87_td, 32, t.i, geteaq, t.d)
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#endif
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opFPU(iw, uint16_t, 16, t, geteaw, (double)(int16_t)t)
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#ifndef FPU_8087
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opFPU(iw, uint16_t, 32, t, geteaw, (double)(int16_t)t)
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#endif
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opFPU(il, uint32_t, 16, t, geteal, (double)(int32_t)t)
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#ifndef FPU_8087
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opFPU(il, uint32_t, 32, t, geteal, (double)(int32_t)t)
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#endif
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static int opFADD(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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ST(0) = ST(0) + ST(fetchdat & 7);
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FP_TAG();
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CLOCK_CYCLES(8);
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return 0;
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}
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static int opFADDr(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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ST(fetchdat & 7) = ST(fetchdat & 7) + ST(0);
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FP_FTAG();
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CLOCK_CYCLES(8);
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return 0;
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}
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static int opFADDP(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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ST(fetchdat & 7) = ST(fetchdat & 7) + ST(0);
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FP_FTAG();
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x87_pop();
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CLOCK_CYCLES(8);
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return 0;
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}
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static int opFCOM(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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cpu_state.npxs &= ~(C0|C2|C3);
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if (ST(0) == ST(fetchdat & 7)) cpu_state.npxs |= C3;
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else if (ST(0) < ST(fetchdat & 7)) cpu_state.npxs |= C0;
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CLOCK_CYCLES(4);
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return 0;
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}
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static int opFCOMP(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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cpu_state.npxs &= ~(C0|C2|C3);
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cpu_state.npxs |= x87_compare(ST(0), ST(fetchdat & 7));
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x87_pop();
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CLOCK_CYCLES(4);
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return 0;
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}
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static int opFCOMPP(uint32_t fetchdat)
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{
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uint64_t *p, *q;
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FP_ENTER();
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cpu_state.pc++;
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cpu_state.npxs &= ~(C0|C2|C3);
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p = (uint64_t *)&ST(0);
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q = (uint64_t *)&ST(1);
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if ((*p == ((uint64_t)1 << 63) && *q == 0) && is386)
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cpu_state.npxs |= C0; /*Nasty hack to fix 80387 detection*/
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else
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cpu_state.npxs |= x87_compare(ST(0), ST(1));
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x87_pop();
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x87_pop();
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CLOCK_CYCLES(4);
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return 0;
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}
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#ifndef FPU_8087
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static int opFUCOMPP(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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cpu_state.npxs &= ~(C0|C2|C3);
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cpu_state.npxs |= x87_ucompare(ST(0), ST(1));
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x87_pop();
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x87_pop();
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CLOCK_CYCLES(5);
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return 0;
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}
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#ifdef FP_686
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static int opFCOMI(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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flags_rebuild();
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cpu_state.flags &= ~(Z_FLAG | P_FLAG | C_FLAG);
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if (ST(0) == ST(fetchdat & 7)) cpu_state.flags |= Z_FLAG;
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else if (ST(0) < ST(fetchdat & 7)) cpu_state.flags |= C_FLAG;
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CLOCK_CYCLES(4);
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return 0;
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}
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static int opFCOMIP(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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flags_rebuild();
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cpu_state.flags &= ~(Z_FLAG | P_FLAG | C_FLAG);
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if (ST(0) == ST(fetchdat & 7)) cpu_state.flags |= Z_FLAG;
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else if (ST(0) < ST(fetchdat & 7)) cpu_state.flags |= C_FLAG;
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x87_pop();
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CLOCK_CYCLES(4);
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return 0;
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}
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#endif
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#endif
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static int opFDIV(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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x87_div(ST(0), ST(0), ST(fetchdat & 7));
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FP_TAG();
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CLOCK_CYCLES(73);
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return 0;
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}
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static int opFDIVr(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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x87_div(ST(fetchdat & 7), ST(fetchdat & 7), ST(0));
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FP_FTAG();
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CLOCK_CYCLES(73);
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return 0;
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}
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static int opFDIVP(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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x87_div(ST(fetchdat & 7), ST(fetchdat & 7), ST(0));
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FP_FTAG();
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x87_pop();
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CLOCK_CYCLES(73);
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return 0;
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}
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static int opFDIVR(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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x87_div(ST(0), ST(fetchdat&7), ST(0));
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FP_TAG();
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CLOCK_CYCLES(73);
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return 0;
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}
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static int opFDIVRr(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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x87_div(ST(fetchdat & 7), ST(0), ST(fetchdat & 7));
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FP_FTAG();
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CLOCK_CYCLES(73);
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return 0;
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}
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static int opFDIVRP(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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x87_div(ST(fetchdat & 7), ST(0), ST(fetchdat & 7));
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FP_FTAG();
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x87_pop();
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CLOCK_CYCLES(73);
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return 0;
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}
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static int opFMUL(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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ST(0) = ST(0) * ST(fetchdat & 7);
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FP_TAG();
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CLOCK_CYCLES(16);
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return 0;
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}
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static int opFMULr(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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ST(fetchdat & 7) = ST(0) * ST(fetchdat & 7);
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FP_FTAG();
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CLOCK_CYCLES(16);
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return 0;
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}
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static int opFMULP(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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ST(fetchdat & 7) = ST(0) * ST(fetchdat & 7);
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FP_FTAG();
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x87_pop();
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CLOCK_CYCLES(16);
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return 0;
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}
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static int opFSUB(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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ST(0) = ST(0) - ST(fetchdat & 7);
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FP_TAG();
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CLOCK_CYCLES(8);
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return 0;
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}
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static int opFSUBr(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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ST(fetchdat & 7) = ST(fetchdat & 7) - ST(0);
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FP_FTAG();
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CLOCK_CYCLES(8);
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return 0;
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}
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static int opFSUBP(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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ST(fetchdat & 7) = ST(fetchdat & 7) - ST(0);
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FP_FTAG();
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x87_pop();
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CLOCK_CYCLES(8);
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return 0;
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}
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static int opFSUBR(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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ST(0) = ST(fetchdat & 7) - ST(0);
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FP_TAG();
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CLOCK_CYCLES(8);
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return 0;
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}
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static int opFSUBRr(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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ST(fetchdat & 7) = ST(0) - ST(fetchdat & 7);
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FP_FTAG();
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CLOCK_CYCLES(8);
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return 0;
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}
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static int opFSUBRP(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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ST(fetchdat & 7) = ST(0) - ST(fetchdat & 7);
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FP_FTAG();
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x87_pop();
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CLOCK_CYCLES(8);
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return 0;
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}
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#ifndef FPU_8087
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static int opFUCOM(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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cpu_state.npxs &= ~(C0|C2|C3);
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cpu_state.npxs |= x87_ucompare(ST(0), ST(fetchdat & 7));
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CLOCK_CYCLES(4);
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return 0;
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}
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static int opFUCOMP(uint32_t fetchdat)
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{
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FP_ENTER();
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cpu_state.pc++;
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cpu_state.npxs &= ~(C0|C2|C3);
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||||
cpu_state.npxs |= x87_ucompare(ST(0), ST(fetchdat & 7));
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x87_pop();
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CLOCK_CYCLES(4);
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return 0;
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}
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||||
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#ifdef FP_686
|
||||
static int opFUCOMI(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
flags_rebuild();
|
||||
cpu_state.flags &= ~(Z_FLAG | P_FLAG | C_FLAG);
|
||||
if (ST(0) == ST(fetchdat & 7)) cpu_state.flags |= Z_FLAG;
|
||||
else if (ST(0) < ST(fetchdat & 7)) cpu_state.flags |= C_FLAG;
|
||||
CLOCK_CYCLES(4);
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||||
return 0;
|
||||
}
|
||||
static int opFUCOMIP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
flags_rebuild();
|
||||
cpu_state.flags &= ~(Z_FLAG | P_FLAG | C_FLAG);
|
||||
if (ST(0) == ST(fetchdat & 7)) cpu_state.flags |= Z_FLAG;
|
||||
else if (ST(0) < ST(fetchdat & 7)) cpu_state.flags |= C_FLAG;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
@@ -1,492 +0,0 @@
|
||||
/*
|
||||
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
||||
* running old operating systems and software designed for IBM
|
||||
* PC systems and compatibles from 1981 through fairly recent
|
||||
* system designs based on the PCI bus.
|
||||
*
|
||||
* This file is part of the 86Box distribution.
|
||||
*
|
||||
* x87 FPU instructions core.
|
||||
*
|
||||
*
|
||||
*
|
||||
* Author: Sarah Walker, <http://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Copyright 2008-2019 Sarah Walker.
|
||||
* Copyright 2016-2019 Miran Grca.
|
||||
*/
|
||||
|
||||
static int opFILDiw_a16(uint32_t fetchdat)
|
||||
{
|
||||
int16_t temp;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
temp = geteaw(); if (cpu_state.abrt) return 1;
|
||||
x87_push((double)temp);
|
||||
CLOCK_CYCLES(13);
|
||||
return 0;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFILDiw_a32(uint32_t fetchdat)
|
||||
{
|
||||
int16_t temp;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
temp = geteaw(); if (cpu_state.abrt) return 1;
|
||||
x87_push((double)temp);
|
||||
CLOCK_CYCLES(13);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFISTiw_a16(uint32_t fetchdat)
|
||||
{
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
temp64 = x87_fround(ST(0));
|
||||
seteaw((int16_t)temp64);
|
||||
CLOCK_CYCLES(29);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFISTiw_a32(uint32_t fetchdat)
|
||||
{
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
temp64 = x87_fround(ST(0));
|
||||
seteaw((int16_t)temp64);
|
||||
CLOCK_CYCLES(29);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFISTPiw_a16(uint32_t fetchdat)
|
||||
{
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
temp64 = x87_fround(ST(0));
|
||||
seteaw((int16_t)temp64); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(29);
|
||||
return 0;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFISTPiw_a32(uint32_t fetchdat)
|
||||
{
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
temp64 = x87_fround(ST(0));
|
||||
seteaw((int16_t)temp64); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(29);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFILDiq_a16(uint32_t fetchdat)
|
||||
{
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
temp64 = geteaq(); if (cpu_state.abrt) return 1;
|
||||
x87_push((double)temp64);
|
||||
FP_LSQ();
|
||||
FP_LSTAG();
|
||||
|
||||
CLOCK_CYCLES(10);
|
||||
return 0;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFILDiq_a32(uint32_t fetchdat)
|
||||
{
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
temp64 = geteaq(); if (cpu_state.abrt) return 1;
|
||||
x87_push((double)temp64);
|
||||
FP_LSQ();
|
||||
FP_LSTAG();
|
||||
|
||||
CLOCK_CYCLES(10);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int FBSTP_a16(uint32_t fetchdat)
|
||||
{
|
||||
double tempd;
|
||||
int c;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
tempd = ST(0);
|
||||
if (tempd < 0.0)
|
||||
tempd = -tempd;
|
||||
for (c = 0; c < 9; c++)
|
||||
{
|
||||
uint8_t tempc = (uint8_t)floor(fmod(tempd, 10.0));
|
||||
tempd -= floor(fmod(tempd, 10.0));
|
||||
tempd /= 10.0;
|
||||
tempc |= ((uint8_t)floor(fmod(tempd, 10.0))) << 4;
|
||||
tempd -= floor(fmod(tempd, 10.0));
|
||||
tempd /= 10.0;
|
||||
writememb(easeg, cpu_state.eaaddr + c, tempc);
|
||||
}
|
||||
tempc = (uint8_t)floor(fmod(tempd, 10.0));
|
||||
if (ST(0) < 0.0) tempc |= 0x80;
|
||||
writememb(easeg, cpu_state.eaaddr + 9, tempc); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
return 0;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int FBSTP_a32(uint32_t fetchdat)
|
||||
{
|
||||
double tempd;
|
||||
int c;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
tempd = ST(0);
|
||||
if (tempd < 0.0)
|
||||
tempd = -tempd;
|
||||
for (c = 0; c < 9; c++)
|
||||
{
|
||||
uint8_t tempc = (uint8_t)floor(fmod(tempd, 10.0));
|
||||
tempd -= floor(fmod(tempd, 10.0));
|
||||
tempd /= 10.0;
|
||||
tempc |= ((uint8_t)floor(fmod(tempd, 10.0))) << 4;
|
||||
tempd -= floor(fmod(tempd, 10.0));
|
||||
tempd /= 10.0;
|
||||
writememb(easeg, cpu_state.eaaddr + c, tempc);
|
||||
}
|
||||
tempc = (uint8_t)floor(fmod(tempd, 10.0));
|
||||
if (ST(0) < 0.0) tempc |= 0x80;
|
||||
writememb(easeg, cpu_state.eaaddr + 9, tempc); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int FISTPiq_a16(uint32_t fetchdat)
|
||||
{
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
if (cpu_state.tag[cpu_state.TOP] & TAG_UINT64)
|
||||
FP_LSRETQ()
|
||||
else
|
||||
temp64 = x87_fround(ST(0));
|
||||
seteaq(temp64); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(29);
|
||||
return 0;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int FISTPiq_a32(uint32_t fetchdat)
|
||||
{
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
if (cpu_state.tag[cpu_state.TOP] & TAG_UINT64)
|
||||
FP_LSRETQ()
|
||||
else
|
||||
temp64 = x87_fround(ST(0));
|
||||
seteaq(temp64); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(29);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFILDil_a16(uint32_t fetchdat)
|
||||
{
|
||||
int32_t templ;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
templ = geteal(); if (cpu_state.abrt) return 1;
|
||||
x87_push((double)templ);
|
||||
CLOCK_CYCLES(9);
|
||||
return 0;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFILDil_a32(uint32_t fetchdat)
|
||||
{
|
||||
int32_t templ;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
templ = geteal(); if (cpu_state.abrt) return 1;
|
||||
x87_push((double)templ);
|
||||
CLOCK_CYCLES(9);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFISTil_a16(uint32_t fetchdat)
|
||||
{
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
temp64 = x87_fround(ST(0));
|
||||
seteal((int32_t)temp64);
|
||||
CLOCK_CYCLES(28);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFISTil_a32(uint32_t fetchdat)
|
||||
{
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
temp64 = x87_fround(ST(0));
|
||||
seteal((int32_t)temp64);
|
||||
CLOCK_CYCLES(28);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFISTPil_a16(uint32_t fetchdat)
|
||||
{
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
temp64 = x87_fround(ST(0));
|
||||
seteal((int32_t)temp64); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(28);
|
||||
return 0;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFISTPil_a32(uint32_t fetchdat)
|
||||
{
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
temp64 = x87_fround(ST(0));
|
||||
seteal((int32_t)temp64); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(28);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFLDe_a16(uint32_t fetchdat)
|
||||
{
|
||||
double t;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
t=x87_ld80(); if (cpu_state.abrt) return 1;
|
||||
x87_push(t);
|
||||
CLOCK_CYCLES(6);
|
||||
return 0;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFLDe_a32(uint32_t fetchdat)
|
||||
{
|
||||
double t;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
t=x87_ld80(); if (cpu_state.abrt) return 1;
|
||||
x87_push(t);
|
||||
CLOCK_CYCLES(6);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFSTPe_a16(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
x87_st80(ST(0)); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(6);
|
||||
return 0;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFSTPe_a32(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
x87_st80(ST(0)); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(6);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFLDd_a16(uint32_t fetchdat)
|
||||
{
|
||||
x87_td t;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
t.i = geteaq(); if (cpu_state.abrt) return 1;
|
||||
x87_push(t.d);
|
||||
CLOCK_CYCLES(3);
|
||||
return 0;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFLDd_a32(uint32_t fetchdat)
|
||||
{
|
||||
x87_td t;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
t.i = geteaq(); if (cpu_state.abrt) return 1;
|
||||
x87_push(t.d);
|
||||
CLOCK_CYCLES(3);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFSTd_a16(uint32_t fetchdat)
|
||||
{
|
||||
x87_td t;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
t.d = ST(0);
|
||||
seteaq(t.i);
|
||||
CLOCK_CYCLES(8);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFSTd_a32(uint32_t fetchdat)
|
||||
{
|
||||
x87_td t;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
t.d = ST(0);
|
||||
seteaq(t.i);
|
||||
CLOCK_CYCLES(8);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFSTPd_a16(uint32_t fetchdat)
|
||||
{
|
||||
x87_td t;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
t.d = ST(0);
|
||||
seteaq(t.i); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(8);
|
||||
return 0;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFSTPd_a32(uint32_t fetchdat)
|
||||
{
|
||||
x87_td t;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
t.d = ST(0);
|
||||
seteaq(t.i); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(8);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFLDs_a16(uint32_t fetchdat)
|
||||
{
|
||||
x87_ts ts;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
ts.i = geteal(); if (cpu_state.abrt) return 1;
|
||||
x87_push((double)ts.s);
|
||||
CLOCK_CYCLES(3);
|
||||
return 0;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFLDs_a32(uint32_t fetchdat)
|
||||
{
|
||||
x87_ts ts;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
ts.i = geteal(); if (cpu_state.abrt) return 1;
|
||||
x87_push((double)ts.s);
|
||||
CLOCK_CYCLES(3);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFSTs_a16(uint32_t fetchdat)
|
||||
{
|
||||
x87_ts ts;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
ts.s = (float)ST(0);
|
||||
seteal(ts.i);
|
||||
CLOCK_CYCLES(7);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFSTs_a32(uint32_t fetchdat)
|
||||
{
|
||||
x87_ts ts;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
ts.s = (float)ST(0);
|
||||
seteal(ts.i);
|
||||
CLOCK_CYCLES(7);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFSTPs_a16(uint32_t fetchdat)
|
||||
{
|
||||
x87_ts ts;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
ts.s = (float)ST(0);
|
||||
seteal(ts.i); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(7);
|
||||
return 0;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFSTPs_a32(uint32_t fetchdat)
|
||||
{
|
||||
x87_ts ts;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
ts.s = (float)ST(0);
|
||||
seteal(ts.i); if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(7);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
@@ -1,877 +0,0 @@
|
||||
#ifdef FPU_8087
|
||||
static int opFI(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
cpu_state.npxc &= ~0x80;
|
||||
if (rmdat == 0xe1)
|
||||
cpu_state.npxc |= 0x80;
|
||||
wait(3, 0);
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
static int opFSTSW_AX(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
AX = cpu_state.npxs;
|
||||
CLOCK_CYCLES(3);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
static int opFNOP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFCLEX(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
cpu_state.npxs &= 0xff00;
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFINIT(uint32_t fetchdat)
|
||||
{
|
||||
uint64_t *p;
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
#ifdef FPU_8087
|
||||
cpu_state.npxc = 0x3FF;
|
||||
#else
|
||||
cpu_state.npxc = 0x37F;
|
||||
#endif
|
||||
FP_RNPXC();
|
||||
cpu_state.npxs = 0;
|
||||
p = (uint64_t *)cpu_state.tag;
|
||||
*p = FP_DTAG;
|
||||
cpu_state.TOP = 0;
|
||||
cpu_state.ismmx = 0;
|
||||
CLOCK_CYCLES(17);
|
||||
CPU_BLOCK_END();
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int opFFREE(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = FP_EMPTY;
|
||||
CLOCK_CYCLES(3);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFFREEP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = FP_EMPTY; if (cpu_state.abrt) return 1;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(3);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFST(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
ST(fetchdat & 7) = ST(0);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = cpu_state.tag[cpu_state.TOP & 7];
|
||||
CLOCK_CYCLES(3);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFSTP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
ST(fetchdat & 7) = ST(0);
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = cpu_state.tag[cpu_state.TOP & 7];
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(3);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
static int FSTOR()
|
||||
{
|
||||
uint64_t *p;
|
||||
FP_ENTER();
|
||||
switch ((cr0 & 1) | (cpu_state.op32 & 0x100))
|
||||
{
|
||||
case 0x000: /*16-bit real mode*/
|
||||
case 0x001: /*16-bit protected mode*/
|
||||
cpu_state.npxc = readmemw(easeg, cpu_state.eaaddr);
|
||||
FP_NNPXC();
|
||||
cpu_state.npxs = readmemw(easeg, cpu_state.eaaddr+2);
|
||||
x87_settag(readmemw(easeg, cpu_state.eaaddr+4));
|
||||
cpu_state.TOP = (cpu_state.npxs >> 11) & 7;
|
||||
cpu_state.eaaddr += 14;
|
||||
break;
|
||||
case 0x100: /*32-bit real mode*/
|
||||
case 0x101: /*32-bit protected mode*/
|
||||
cpu_state.npxc = readmemw(easeg, cpu_state.eaaddr);
|
||||
FP_NNPXC();
|
||||
cpu_state.npxs = readmemw(easeg, cpu_state.eaaddr+4);
|
||||
x87_settag(readmemw(easeg, cpu_state.eaaddr+8));
|
||||
cpu_state.TOP = (cpu_state.npxs >> 11) & 7;
|
||||
cpu_state.eaaddr += 28;
|
||||
break;
|
||||
}
|
||||
x87_ld_frstor(0); cpu_state.eaaddr += 10;
|
||||
x87_ld_frstor(1); cpu_state.eaaddr += 10;
|
||||
x87_ld_frstor(2); cpu_state.eaaddr += 10;
|
||||
x87_ld_frstor(3); cpu_state.eaaddr += 10;
|
||||
x87_ld_frstor(4); cpu_state.eaaddr += 10;
|
||||
x87_ld_frstor(5); cpu_state.eaaddr += 10;
|
||||
x87_ld_frstor(6); cpu_state.eaaddr += 10;
|
||||
x87_ld_frstor(7);
|
||||
|
||||
cpu_state.ismmx = 0;
|
||||
/*Horrible hack, but as PCem doesn't keep the FPU stack in 80-bit precision at all times
|
||||
something like this is needed*/
|
||||
p = (uint64_t *)cpu_state.tag;
|
||||
if (cpu_state.MM_w4[0] == 0xffff && cpu_state.MM_w4[1] == 0xffff && cpu_state.MM_w4[2] == 0xffff && cpu_state.MM_w4[3] == 0xffff &&
|
||||
cpu_state.MM_w4[4] == 0xffff && cpu_state.MM_w4[5] == 0xffff && cpu_state.MM_w4[6] == 0xffff && cpu_state.MM_w4[7] == 0xffff &&
|
||||
!cpu_state.TOP && (*p == FP_CTAG))
|
||||
cpu_state.ismmx = 1;
|
||||
|
||||
CLOCK_CYCLES((cr0 & 1) ? 34 : 44);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
static int opFSTOR_a16(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
FSTOR();
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFSTOR_a32(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
FSTOR();
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int FSAVE()
|
||||
{
|
||||
uint64_t *p;
|
||||
|
||||
FP_ENTER();
|
||||
cpu_state.npxs = (cpu_state.npxs & ~(7 << 11)) | (FP_TOP(cpu_state.TOP) << 11);
|
||||
|
||||
switch ((cr0 & 1) | (cpu_state.op32 & 0x100))
|
||||
{
|
||||
case 0x000: /*16-bit real mode*/
|
||||
writememw(easeg,cpu_state.eaaddr,cpu_state.npxc);
|
||||
writememw(easeg,cpu_state.eaaddr+2,cpu_state.npxs);
|
||||
writememw(easeg,cpu_state.eaaddr+4,x87_gettag());
|
||||
writememw(easeg,cpu_state.eaaddr+6,x87_pc_off);
|
||||
writememw(easeg,cpu_state.eaaddr+10,x87_op_off);
|
||||
cpu_state.eaaddr+=14;
|
||||
if (cpu_state.ismmx)
|
||||
{
|
||||
x87_stmmx(cpu_state.MM[0]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[1]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[2]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[3]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[4]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[5]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[6]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[7]);
|
||||
}
|
||||
else
|
||||
{
|
||||
x87_st_fsave(0); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(1); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(2); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(3); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(4); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(5); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(6); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(7);
|
||||
}
|
||||
break;
|
||||
case 0x001: /*16-bit protected mode*/
|
||||
writememw(easeg,cpu_state.eaaddr,cpu_state.npxc);
|
||||
writememw(easeg,cpu_state.eaaddr+2,cpu_state.npxs);
|
||||
writememw(easeg,cpu_state.eaaddr+4,x87_gettag());
|
||||
writememw(easeg,cpu_state.eaaddr+6,x87_pc_off);
|
||||
writememw(easeg,cpu_state.eaaddr+8,x87_pc_seg);
|
||||
writememw(easeg,cpu_state.eaaddr+10,x87_op_off);
|
||||
writememw(easeg,cpu_state.eaaddr+12,x87_op_seg);
|
||||
cpu_state.eaaddr+=14;
|
||||
if (cpu_state.ismmx)
|
||||
{
|
||||
x87_stmmx(cpu_state.MM[0]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[1]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[2]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[3]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[4]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[5]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[6]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[7]);
|
||||
}
|
||||
else
|
||||
{
|
||||
x87_st_fsave(0); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(1); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(2); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(3); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(4); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(5); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(6); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(7);
|
||||
}
|
||||
break;
|
||||
case 0x100: /*32-bit real mode*/
|
||||
writememw(easeg,cpu_state.eaaddr,cpu_state.npxc);
|
||||
writememw(easeg,cpu_state.eaaddr+4,cpu_state.npxs);
|
||||
writememw(easeg,cpu_state.eaaddr+8,x87_gettag());
|
||||
writememw(easeg,cpu_state.eaaddr+12,x87_pc_off);
|
||||
writememw(easeg,cpu_state.eaaddr+20,x87_op_off);
|
||||
writememl(easeg,cpu_state.eaaddr+24,(x87_op_off>>16)<<12);
|
||||
cpu_state.eaaddr+=28;
|
||||
if (cpu_state.ismmx)
|
||||
{
|
||||
x87_stmmx(cpu_state.MM[0]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[1]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[2]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[3]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[4]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[5]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[6]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[7]);
|
||||
}
|
||||
else
|
||||
{
|
||||
x87_st_fsave(0); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(1); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(2); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(3); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(4); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(5); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(6); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(7);
|
||||
}
|
||||
break;
|
||||
case 0x101: /*32-bit protected mode*/
|
||||
writememw(easeg,cpu_state.eaaddr,cpu_state.npxc);
|
||||
writememw(easeg,cpu_state.eaaddr+4,cpu_state.npxs);
|
||||
writememw(easeg,cpu_state.eaaddr+8,x87_gettag());
|
||||
writememl(easeg,cpu_state.eaaddr+12,x87_pc_off);
|
||||
writememl(easeg,cpu_state.eaaddr+16,x87_pc_seg);
|
||||
writememl(easeg,cpu_state.eaaddr+20,x87_op_off);
|
||||
writememl(easeg,cpu_state.eaaddr+24,x87_op_seg);
|
||||
cpu_state.eaaddr+=28;
|
||||
if (cpu_state.ismmx)
|
||||
{
|
||||
x87_stmmx(cpu_state.MM[0]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[1]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[2]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[3]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[4]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[5]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[6]); cpu_state.eaaddr+=10;
|
||||
x87_stmmx(cpu_state.MM[7]);
|
||||
}
|
||||
else
|
||||
{
|
||||
x87_st_fsave(0); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(1); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(2); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(3); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(4); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(5); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(6); cpu_state.eaaddr+=10;
|
||||
x87_st_fsave(7);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
cpu_state.npxc = 0x37F;
|
||||
FP_RNPXC();
|
||||
cpu_state.npxs = 0;
|
||||
p = (uint64_t *)cpu_state.tag;
|
||||
*p = FP_DTAG;
|
||||
cpu_state.TOP = 0;
|
||||
cpu_state.ismmx = 0;
|
||||
|
||||
CLOCK_CYCLES((cr0 & 1) ? 56 : 67);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
static int opFSAVE_a16(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
FSAVE();
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFSAVE_a32(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
FSAVE();
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFSTSW_a16(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
seteaw((cpu_state.npxs & 0xC7FF) | (FP_TOP(cpu_state.TOP) << 11));
|
||||
CLOCK_CYCLES(3);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFSTSW_a32(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
seteaw((cpu_state.npxs & 0xC7FF) | (FP_TOP(cpu_state.TOP) << 11));
|
||||
CLOCK_CYCLES(3);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
static int opFLD(uint32_t fetchdat)
|
||||
{
|
||||
int old_tag;
|
||||
uint64_t old_i64;
|
||||
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
old_tag = cpu_state.tag[(cpu_state.TOP + fetchdat) & 7];
|
||||
old_i64 = cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q;
|
||||
x87_push(ST(fetchdat&7));
|
||||
cpu_state.tag[FP_TOP(cpu_state.TOP)] = old_tag;
|
||||
cpu_state.MM[FP_TOP(cpu_state.TOP)].q = old_i64;
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFXCH(uint32_t fetchdat)
|
||||
{
|
||||
double td;
|
||||
uint8_t old_tag;
|
||||
uint64_t old_i64;
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
td = ST(0);
|
||||
ST(0) = ST(fetchdat&7);
|
||||
ST(fetchdat&7) = td;
|
||||
old_tag = cpu_state.tag[FP_TOP(cpu_state.TOP)];
|
||||
cpu_state.tag[FP_TOP(cpu_state.TOP)] = cpu_state.tag[(cpu_state.TOP + fetchdat) & 7];
|
||||
cpu_state.tag[(cpu_state.TOP + fetchdat) & 7] = old_tag;
|
||||
old_i64 = cpu_state.MM[FP_TOP(cpu_state.TOP)].q;
|
||||
cpu_state.MM[FP_TOP(cpu_state.TOP)].q = cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q;
|
||||
cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q = old_i64;
|
||||
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFCHS(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
ST(0) = -ST(0);
|
||||
FP_TAG();
|
||||
CLOCK_CYCLES(6);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFABS(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
ST(0) = fabs(ST(0));
|
||||
FP_TAG();
|
||||
CLOCK_CYCLES(3);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFTST(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
cpu_state.npxs &= ~(C0|C2|C3);
|
||||
if (ST(0) == 0.0) cpu_state.npxs |= C3;
|
||||
else if (ST(0) < 0.0) cpu_state.npxs |= C0;
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFXAM(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
cpu_state.npxs &= ~(C0|C1|C2|C3);
|
||||
if (cpu_state.tag[cpu_state.TOP&7] == FP_EMPTY) cpu_state.npxs |= (C0|C3);
|
||||
else if (ST(0) == 0.0) cpu_state.npxs |= C3;
|
||||
else cpu_state.npxs |= C2;
|
||||
if (ST(0) < 0.0) cpu_state.npxs |= C1;
|
||||
CLOCK_CYCLES(8);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFLD1(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x87_push(1.0);
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFLDL2T(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x87_push(3.3219280948873623);
|
||||
CLOCK_CYCLES(8);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFLDL2E(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x87_push(1.4426950408889634);
|
||||
CLOCK_CYCLES(8);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFLDPI(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x87_push(3.141592653589793);
|
||||
CLOCK_CYCLES(8);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFLDEG2(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x87_push(0.3010299956639812);
|
||||
CLOCK_CYCLES(8);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFLDLN2(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x87_push_u64(0x3fe62e42fefa39f0ull);
|
||||
CLOCK_CYCLES(8);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFLDZ(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
x87_push(0.0);
|
||||
FP_ZTAG();
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opF2XM1(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
ST(0) = pow(2.0, ST(0)) - 1.0;
|
||||
FP_TAG();
|
||||
CLOCK_CYCLES(200);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFYL2X(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
ST(1) = ST(1) * (log(ST(0)) / log(2.0));
|
||||
FP_NTAG();
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(250);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFYL2XP1(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
ST(1) = ST(1) * (log(ST(0)+1.0) / log(2.0));
|
||||
FP_NTAG();
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(250);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFPTAN(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
ST(0) = tan(ST(0));
|
||||
FP_TAG();
|
||||
x87_push(1.0);
|
||||
cpu_state.npxs &= ~C2;
|
||||
CLOCK_CYCLES(235);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFPATAN(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
ST(1) = atan2(ST(1), ST(0));
|
||||
FP_NTAG();
|
||||
x87_pop();
|
||||
CLOCK_CYCLES(250);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFDECSTP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
FP_DECTOP();
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFINCSTP(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
FP_INCTOP();
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFPREM(uint32_t fetchdat)
|
||||
{
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
temp64 = (int64_t)(ST(0) / ST(1));
|
||||
ST(0) = ST(0) - (ST(1) * (double)temp64);
|
||||
FP_TAG();
|
||||
cpu_state.npxs &= ~(C0|C1|C2|C3);
|
||||
if (temp64 & 4) cpu_state.npxs|=C0;
|
||||
if (temp64 & 2) cpu_state.npxs|=C3;
|
||||
if (temp64 & 1) cpu_state.npxs|=C1;
|
||||
CLOCK_CYCLES(100);
|
||||
return 0;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFPREM1(uint32_t fetchdat)
|
||||
{
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
temp64 = (int64_t)(ST(0) / ST(1));
|
||||
ST(0) = ST(0) - (ST(1) * (double)temp64);
|
||||
FP_TAG();
|
||||
cpu_state.npxs &= ~(C0|C1|C2|C3);
|
||||
if (temp64 & 4) cpu_state.npxs|=C0;
|
||||
if (temp64 & 2) cpu_state.npxs|=C3;
|
||||
if (temp64 & 1) cpu_state.npxs|=C1;
|
||||
CLOCK_CYCLES(100);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFSQRT(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
ST(0) = sqrt(ST(0));
|
||||
FP_TAG();
|
||||
CLOCK_CYCLES(83);
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifndef FPU_8087
|
||||
static int opFSINCOS(uint32_t fetchdat)
|
||||
{
|
||||
double td;
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
td = ST(0);
|
||||
ST(0) = sin(td);
|
||||
FP_TAG();
|
||||
x87_push(cos(td));
|
||||
cpu_state.npxs &= ~C2;
|
||||
CLOCK_CYCLES(330);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFRNDINT(uint32_t fetchdat)
|
||||
{
|
||||
double rounded;
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
rounded = (double) x87_fround(ST(0));
|
||||
#ifndef PCEM_CODE
|
||||
if (rounded > ST(0))
|
||||
cpu_state.npxs |= C1;
|
||||
else
|
||||
cpu_state.npxs &= ~C1;
|
||||
#endif
|
||||
ST(0) = rounded;
|
||||
FP_TAG();
|
||||
CLOCK_CYCLES(21);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFSCALE(uint32_t fetchdat)
|
||||
{
|
||||
int64_t temp64;
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
temp64 = (int64_t)ST(1);
|
||||
ST(0) = ST(0) * pow(2.0, (double)temp64);
|
||||
FP_TAG();
|
||||
CLOCK_CYCLES(30);
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifndef FPU_8087
|
||||
static int opFSIN(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
ST(0) = sin(ST(0));
|
||||
FP_TAG();
|
||||
cpu_state.npxs &= ~C2;
|
||||
CLOCK_CYCLES(300);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int opFCOS(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
ST(0) = cos(ST(0));
|
||||
FP_TAG();
|
||||
cpu_state.npxs &= ~C2;
|
||||
CLOCK_CYCLES(300);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
static int FLDENV()
|
||||
{
|
||||
FP_ENTER();
|
||||
switch ((cr0 & 1) | (cpu_state.op32 & 0x100))
|
||||
{
|
||||
case 0x000: /*16-bit real mode*/
|
||||
case 0x001: /*16-bit protected mode*/
|
||||
cpu_state.npxc = readmemw(easeg, cpu_state.eaaddr);
|
||||
FP_NNPXC();
|
||||
cpu_state.npxs = readmemw(easeg, cpu_state.eaaddr+2);
|
||||
x87_settag(readmemw(easeg, cpu_state.eaaddr+4));
|
||||
cpu_state.TOP = (cpu_state.npxs >> 11) & 7;
|
||||
break;
|
||||
case 0x100: /*32-bit real mode*/
|
||||
case 0x101: /*32-bit protected mode*/
|
||||
cpu_state.npxc = readmemw(easeg, cpu_state.eaaddr);
|
||||
FP_NNPXC();
|
||||
cpu_state.npxs = readmemw(easeg, cpu_state.eaaddr+4);
|
||||
x87_settag(readmemw(easeg, cpu_state.eaaddr+8));
|
||||
cpu_state.TOP = (cpu_state.npxs >> 11) & 7;
|
||||
break;
|
||||
}
|
||||
CLOCK_CYCLES((cr0 & 1) ? 34 : 44);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
|
||||
static int opFLDENV_a16(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
FLDENV();
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFLDENV_a32(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
FLDENV();
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFLDCW_a16(uint32_t fetchdat)
|
||||
{
|
||||
uint16_t tempw;
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
tempw = geteaw();
|
||||
if (cpu_state.abrt) return 1;
|
||||
cpu_state.npxc = tempw;
|
||||
FP_NNPXC();
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFLDCW_a32(uint32_t fetchdat)
|
||||
{
|
||||
uint16_t tempw;
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_READ(cpu_state.ea_seg);
|
||||
tempw = geteaw();
|
||||
if (cpu_state.abrt) return 1;
|
||||
cpu_state.npxc = tempw;
|
||||
FP_NNPXC();
|
||||
CLOCK_CYCLES(4);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int FSTENV()
|
||||
{
|
||||
FP_ENTER();
|
||||
switch ((cr0 & 1) | (cpu_state.op32 & 0x100))
|
||||
{
|
||||
case 0x000: /*16-bit real mode*/
|
||||
writememw(easeg,cpu_state.eaaddr,cpu_state.npxc);
|
||||
writememw(easeg,cpu_state.eaaddr+2,cpu_state.npxs);
|
||||
writememw(easeg,cpu_state.eaaddr+4,x87_gettag());
|
||||
writememw(easeg,cpu_state.eaaddr+6,x87_pc_off);
|
||||
writememw(easeg,cpu_state.eaaddr+10,x87_op_off);
|
||||
break;
|
||||
case 0x001: /*16-bit protected mode*/
|
||||
writememw(easeg,cpu_state.eaaddr,cpu_state.npxc);
|
||||
writememw(easeg,cpu_state.eaaddr+2,cpu_state.npxs);
|
||||
writememw(easeg,cpu_state.eaaddr+4,x87_gettag());
|
||||
writememw(easeg,cpu_state.eaaddr+6,x87_pc_off);
|
||||
writememw(easeg,cpu_state.eaaddr+8,x87_pc_seg);
|
||||
writememw(easeg,cpu_state.eaaddr+10,x87_op_off);
|
||||
writememw(easeg,cpu_state.eaaddr+12,x87_op_seg);
|
||||
break;
|
||||
case 0x100: /*32-bit real mode*/
|
||||
writememw(easeg,cpu_state.eaaddr,cpu_state.npxc);
|
||||
writememw(easeg,cpu_state.eaaddr+4,cpu_state.npxs);
|
||||
writememw(easeg,cpu_state.eaaddr+8,x87_gettag());
|
||||
writememw(easeg,cpu_state.eaaddr+12,x87_pc_off);
|
||||
writememw(easeg,cpu_state.eaaddr+20,x87_op_off);
|
||||
writememl(easeg,cpu_state.eaaddr+24,(x87_op_off>>16)<<12);
|
||||
break;
|
||||
case 0x101: /*32-bit protected mode*/
|
||||
writememw(easeg,cpu_state.eaaddr,cpu_state.npxc);
|
||||
writememw(easeg,cpu_state.eaaddr+4,cpu_state.npxs);
|
||||
writememw(easeg,cpu_state.eaaddr+8,x87_gettag());
|
||||
writememl(easeg,cpu_state.eaaddr+12,x87_pc_off);
|
||||
writememl(easeg,cpu_state.eaaddr+16,x87_pc_seg);
|
||||
writememl(easeg,cpu_state.eaaddr+20,x87_op_off);
|
||||
writememl(easeg,cpu_state.eaaddr+24,x87_op_seg);
|
||||
break;
|
||||
}
|
||||
CLOCK_CYCLES((cr0 & 1) ? 56 : 67);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
|
||||
static int opFSTENV_a16(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
FSTENV();
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFSTENV_a32(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
FSTENV();
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int opFSTCW_a16(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_16(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
seteaw(cpu_state.npxc);
|
||||
CLOCK_CYCLES(3);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#ifndef FPU_8087
|
||||
static int opFSTCW_a32(uint32_t fetchdat)
|
||||
{
|
||||
FP_ENTER();
|
||||
fetch_ea_32(fetchdat);
|
||||
SEG_CHECK_WRITE(cpu_state.ea_seg);
|
||||
seteaw(cpu_state.npxc);
|
||||
CLOCK_CYCLES(3);
|
||||
return cpu_state.abrt;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifndef FPU_8087
|
||||
#ifdef FP_686
|
||||
#define opFCMOV(condition) \
|
||||
static int opFCMOV ## condition(uint32_t fetchdat) \
|
||||
{ \
|
||||
FP_ENTER(); \
|
||||
cpu_state.pc++; \
|
||||
if (cond_ ## condition) \
|
||||
{ \
|
||||
cpu_state.tag[FP_TOP(cpu_state.TOP)] = cpu_state.tag[(cpu_state.TOP + fetchdat) & 7]; \
|
||||
cpu_state.MM[FP_TOP(cpu_state.TOP)].q = cpu_state.MM[(cpu_state.TOP + fetchdat) & 7].q; \
|
||||
ST(0) = ST(fetchdat & 7); \
|
||||
} \
|
||||
CLOCK_CYCLES(4); \
|
||||
return 0; \
|
||||
}
|
||||
|
||||
#define cond_U ( PF_SET())
|
||||
#define cond_NU (!PF_SET())
|
||||
|
||||
opFCMOV(B)
|
||||
opFCMOV(E)
|
||||
opFCMOV(BE)
|
||||
opFCMOV(U)
|
||||
opFCMOV(NB)
|
||||
opFCMOV(NE)
|
||||
opFCMOV(NBE)
|
||||
opFCMOV(NU)
|
||||
#endif
|
||||
#endif
|
||||
Reference in New Issue
Block a user