Added few changes
- Added a skeletal 596B(Doesn't work properly) - Splitted the Socket 8, Slot 1 & Socket 370 machines to their respective files
This commit is contained in:
137
src/machine/m_at_socket370.c
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137
src/machine/m_at_socket370.c
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/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Implementation of Socket 370(PGA370) machines.
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*
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*
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*
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* Authors: Miran Grca, <mgrca8@gmail.com>
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*
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* Copyright 2016-2019 Miran Grca.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#include <86box/86box.h>
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#include <86box/mem.h>
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#include <86box/io.h>
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#include <86box/rom.h>
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#include <86box/pci.h>
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#include <86box/device.h>
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#include <86box/chipset.h>
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#include <86box/hdc.h>
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#include <86box/hdc_ide.h>
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#include <86box/keyboard.h>
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#include <86box/intel_flash.h>
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#include <86box/via_vt82c586b.h>
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#include <86box/intel_sio.h>
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#include <86box/piix.h>
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#include <86box/sio.h>
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#include <86box/sst_flash.h>
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#include <86box/hwm.h>
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#include <86box/spd.h>
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#include <86box/video.h>
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#include "cpu.h"
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#include <86box/machine.h>
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int
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machine_at_63a_init(const machine_t *model)
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{
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/* 440ZX Board. 440ZX is basically an underpowered 440BX. There no
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difference between to chipsets other than the name. */
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int ret;
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ret = bios_load_linear(L"roms/machines/63a/63a-q3.bin",
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0x000c0000, 262144, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init_ex(model, 2);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4);
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pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1);
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pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
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pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
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pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4); // Integrated Sound?
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pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
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pci_register_slot(0x01, PCI_CARD_NORMAL, 1, 2, 3, 4);
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device_add(&i440zx_device);
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device_add(&piix4e_device);
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device_add(&w83977tf_device);
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device_add(&keyboard_ps2_pci_device);
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device_add(&intel_flash_bxt_device);
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spd_register(SPD_TYPE_SDRAM, 0x3, 256);
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return ret;
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}
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int
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machine_at_apas3_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear(L"roms/machines/apas3/V0218SAG.BIN",
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0x000c0000, 262144, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init_ex(model, 2);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x0F, PCI_CARD_NORMAL, 1, 2, 3, 4);
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pci_register_slot(0x10, PCI_CARD_NORMAL, 2, 3, 4, 1);
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pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2);
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pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3);
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pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
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pci_register_slot(0x01, PCI_CARD_NORMAL, 1, 2, 3, 4);
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device_add(&via_apro_device);
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device_add(&via_vt82c586b_device);
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device_add(&fdc37c669_device);
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device_add(&keyboard_ps2_pci_device);
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device_add(&sst_flash_39sf020_device);
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spd_register(SPD_TYPE_SDRAM, 0x7, 256);
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return ret;
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}
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#if defined(DEV_BRANCH) && defined(USE_I686) && defined(USE_596B)
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int
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machine_at_bx98_init(const machine_t *model)
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{
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int ret;
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ret = bios_load_linear(L"roms/machines/bx98/vc98103e.bin",
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0x000c0000, 262144, 0);
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if (bios_only || !ret)
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return ret;
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machine_at_common_init_ex(model, 2);
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pci_init(PCI_CONFIG_TYPE_1);
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pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
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pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
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pci_register_slot(0x01, PCI_CARD_NORMAL, 1, 2, 3, 4);
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device_add(&via_apro_device);
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device_add(&via_vt82c596b_device);
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device_add(&um8669f_device);
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device_add(&keyboard_ps2_ami_pci_device);
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device_add(&sst_flash_39sf020_device);
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spd_register(SPD_TYPE_SDRAM, 0x7, 256);
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return ret;
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}
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#endif
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