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Reworked CPU instruction segment limit and page fault checking a bit, fixes #406;

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Implemented the MCA enable/disable bit for the MCA WD NIC's, fixes #407;
A small bug fix in dma.c.
This commit is contained in:
OBattler
2019-09-21 03:33:05 +02:00
parent 5a4f81d538
commit e65e11fe9a
12 changed files with 109 additions and 192 deletions
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41
src/mem.c
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@@ -532,12 +532,6 @@ writemembl(uint32_t addr, uint8_t val)
uint8_t
readmemb386l(uint32_t seg, uint32_t addr)
{
if (seg == (uint32_t) -1) {
x86gpf("NULL segment", 0);
return -1;
}
{
return readmembl(addr + seg);
}
@@ -545,11 +539,6 @@ readmemb386l(uint32_t seg, uint32_t addr)
void
writememb386l(uint32_t seg, uint32_t addr, uint8_t val)
{
if (seg == (uint32_t) -1) {
x86gpf("NULL segment", 0);
return;
}
{
writemembl(addr + seg, val);
}
@@ -560,11 +549,6 @@ readmemwl(uint32_t seg, uint32_t addr)
{
mem_mapping_t *map;
uint32_t addr2 = mem_logical_addr = seg + addr;
if (seg == (uint32_t) -1) {
x86gpf("NULL segment", 0);
return -1;
}
if (addr2 & 1) {
if (!cpu_cyrix_alignment || (addr2 & 7) == 7)
@@ -612,11 +596,6 @@ writememwl(uint32_t seg, uint32_t addr, uint16_t val)
{
mem_mapping_t *map;
uint32_t addr2 = mem_logical_addr = seg + addr;
if (seg == (uint32_t) -1) {
x86gpf("NULL segment", 0);
return;
}
if (addr2 & 1) {
if (!cpu_cyrix_alignment || (addr2 & 7) == 7)
@@ -672,11 +651,6 @@ readmemll(uint32_t seg, uint32_t addr)
{
mem_mapping_t *map;
uint32_t addr2 = mem_logical_addr = seg + addr;
if (seg == (uint32_t) -1) {
x86gpf("NULL segment", 0);
return -1;
}
if (addr2 & 3) {
if (!cpu_cyrix_alignment || (addr2 & 7) > 4)
@@ -723,11 +697,6 @@ writememll(uint32_t seg, uint32_t addr, uint32_t val)
{
mem_mapping_t *map;
uint32_t addr2 = mem_logical_addr = seg + addr;
if (seg == (uint32_t) -1) {
x86gpf("NULL segment", 0);
return;
}
if (addr2 & 3) {
if (!cpu_cyrix_alignment || (addr2 & 7) > 4)
@@ -784,11 +753,6 @@ readmemql(uint32_t seg, uint32_t addr)
{
mem_mapping_t *map;
uint32_t addr2 = mem_logical_addr = seg + addr;
if (seg == (uint32_t) -1) {
x86gpf("NULL segment", 0);
return -1;
}
if (addr2 & 7) {
sub_cycles(timing_misaligned);
@@ -823,11 +787,6 @@ writememql(uint32_t seg, uint32_t addr, uint64_t val)
{
mem_mapping_t *map;
uint32_t addr2 = mem_logical_addr = seg + addr;
if (seg == (uint32_t) -1) {
x86gpf("NULL segment", 0);
return;
}
if (addr2 & 7) {
sub_cycles(timing_misaligned);