Reworked CPU instruction segment limit and page fault checking a bit, fixes #406;
Implemented the MCA enable/disable bit for the MCA WD NIC's, fixes #407; A small bug fix in dma.c.
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@@ -11,15 +11,15 @@
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* - SMC/WD 8013EBT (ISA 16-bit);
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* - SMC/WD 8013EP/A (MCA).
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*
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* Version: @(#)net_wd8003.c 1.0.5 2018/10/22
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* Version: @(#)net_wd8003.c 1.0.6 2019/09/21
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*
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* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
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* TheCollector1995, <mariogplayer@gmail.com>
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* Miran Grca, <mgrca8@gmail.com>
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* Peter Grehan, <grehan@iprg.nokia.com>
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*
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* Copyright 2017,2018 Fred N. van Kempen.
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* Copyright 2016-2018 Miran Grca.
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* Copyright 2017-2019 Fred N. van Kempen.
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* Copyright 2016-2019 Miran Grca.
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* Portions Copyright (C) 2002 MandrakeSoft S.A.
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*
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* This program is free software; you can redistribute it and/or modify
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@@ -613,13 +613,14 @@ wd_mca_write(int port, uint8_t val, void *priv)
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/* Initialize the device if fully configured. */
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/* Register (new) I/O handler. */
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wd_io_set(dev, dev->base_address);
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if (dev->pos_regs[2] & 0x01)
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wd_io_set(dev, dev->base_address);
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mem_mapping_set_addr(&dev->ram_mapping, dev->ram_addr, dev->ram_size);
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if (dev->msr & WE_MSR_ENABLE_RAM)
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mem_mapping_disable(&dev->ram_mapping);
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if ((dev->msr & WE_MSR_ENABLE_RAM) && (dev->pos_regs[2] & 0x01))
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mem_mapping_enable(&dev->ram_mapping);
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else
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mem_mapping_disable(&dev->ram_mapping);
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wdlog("%s: attached IO=0x%X IRQ=%d, RAM addr=0x%06x\n", dev->name,
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dev->base_address, dev->irq, dev->ram_addr);
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