diff --git a/src/86box.c b/src/86box.c index 3e1bd6e3c..b1176bb69 100644 --- a/src/86box.c +++ b/src/86box.c @@ -31,15 +31,15 @@ #include #ifndef _WIN32 -#include -#include +# include +# include #endif #ifdef __APPLE__ -#include -#include -#ifdef __aarch64__ -#include -#endif +# include +# include +# ifdef __aarch64__ +# include +# endif #endif #define HAVE_STDARG_H @@ -48,7 +48,7 @@ #include <86box/mem.h> #include "cpu.h" #ifdef USE_DYNAREC -# include "codegen_public.h" +# include "codegen_public.h" #endif #include "x86_ops.h" #include <86box/io.h> @@ -99,95 +99,94 @@ // Disable c99-designator to avoid the warnings about int ng #ifdef __clang__ -#if __has_warning("-Wunused-but-set-variable") -#pragma clang diagnostic ignored "-Wunused-but-set-variable" +# if __has_warning("-Wunused-but-set-variable") +# pragma clang diagnostic ignored "-Wunused-but-set-variable" +# endif #endif -#endif - /* Stuff that used to be globally declared in plat.h but is now extern there and declared here instead. */ -int dopause; /* system is paused */ -atomic_flag doresize; /* screen resize requested */ -volatile int is_quit; /* system exit requested */ -uint64_t timer_freq; -char emu_version[200]; /* version ID string */ +int dopause; /* system is paused */ +atomic_flag doresize; /* screen resize requested */ +volatile int is_quit; /* system exit requested */ +uint64_t timer_freq; +char emu_version[200]; /* version ID string */ #ifdef MTR_ENABLED -int tracing_on = 0; +int tracing_on = 0; #endif /* Commandline options. */ -int dump_on_exit = 0; /* (O) dump regs on exit */ -int do_dump_config = 0; /* (O) dump config on load */ -int start_in_fullscreen = 0; /* (O) start in fullscreen */ +int dump_on_exit = 0; /* (O) dump regs on exit */ +int do_dump_config = 0; /* (O) dump config on load */ +int start_in_fullscreen = 0; /* (O) start in fullscreen */ #ifdef _WIN32 -int force_debug = 0; /* (O) force debug output */ +int force_debug = 0; /* (O) force debug output */ #endif #ifdef USE_WX -int video_fps = RENDER_FPS; /* (O) render speed in fps */ +int video_fps = RENDER_FPS; /* (O) render speed in fps */ #endif -int settings_only = 0; /* (O) show only the settings dialog */ -int confirm_exit_cmdl = 1; /* (O) do not ask for confirmation on quit if set to 0 */ +int settings_only = 0; /* (O) show only the settings dialog */ +int confirm_exit_cmdl = 1; /* (O) do not ask for confirmation on quit if set to 0 */ #ifdef _WIN32 -uint64_t unique_id = 0; -uint64_t source_hwnd = 0; +uint64_t unique_id = 0; +uint64_t source_hwnd = 0; #endif -char rom_path[1024] = { '\0'}; /* (O) full path to ROMs */ -rom_path_t rom_paths = { "", NULL }; /* (O) full paths to ROMs */ -char log_path[1024] = { '\0'}; /* (O) full path of logfile */ -char vm_name[1024] = { '\0'}; /* (O) display name of the VM */ +char rom_path[1024] = { '\0' }; /* (O) full path to ROMs */ +rom_path_t rom_paths = { "", NULL }; /* (O) full paths to ROMs */ +char log_path[1024] = { '\0' }; /* (O) full path of logfile */ +char vm_name[1024] = { '\0' }; /* (O) display name of the VM */ #ifdef USE_INSTRUMENT -uint8_t instru_enabled = 0; -uint64_t instru_run_ms = 0; +uint8_t instru_enabled = 0; +uint64_t instru_run_ms = 0; #endif /* Configuration values. */ -int window_remember; -int vid_resize; /* (C) allow resizing */ -int invert_display = 0; /* (C) invert the display */ -int suppress_overscan = 0; /* (C) suppress overscans */ -int scale = 0; /* (C) screen scale factor */ -int dpi_scale = 0; /* (C) DPI scaling of the emulated screen */ -int vid_api = 0; /* (C) video renderer */ -int vid_cga_contrast = 0; /* (C) video */ -int video_fullscreen = 0; /* (C) video */ -int video_fullscreen_scale = 0; /* (C) video */ -int video_fullscreen_first = 0; /* (C) video */ -int enable_overscan = 0; /* (C) video */ -int force_43 = 0; /* (C) video */ -int video_filter_method = 1; /* (C) video */ -int video_vsync = 0; /* (C) video */ -int video_framerate = -1; /* (C) video */ -char video_shader[512] = { '\0' }; /* (C) video */ -int bugger_enabled = 0; /* (C) enable ISAbugger */ -int postcard_enabled = 0; /* (C) enable POST card */ -int isamem_type[ISAMEM_MAX] = { 0,0,0,0 }; /* (C) enable ISA mem cards */ -int isartc_type = 0; /* (C) enable ISA RTC card */ -int gfxcard = 0; /* (C) graphics/video card */ -int gfxcard_2 = 0; /* (C) graphics/video card */ -int show_second_monitors = 1; /* (C) show non-primary monitors */ -int sound_is_float = 1; /* (C) sound uses FP values */ -int GAMEBLASTER = 0; /* (C) sound option */ -int GUS = 0; /* (C) sound option */ -int SSI2001 = 0; /* (C) sound option */ -int voodoo_enabled = 0; /* (C) video option */ -int ibm8514_enabled = 0; /* (C) video option */ -int xga_enabled = 0; /* (C) video option */ -uint32_t mem_size = 0; /* (C) memory size (Installed on system board)*/ -uint32_t isa_mem_size = 0; /* (C) memory size (ISA Memory Cards) */ -int cpu_use_dynarec = 0; /* (C) cpu uses/needs Dyna */ -int cpu = 0; /* (C) cpu type */ -int fpu_type = 0; /* (C) fpu type */ -int time_sync = 0; /* (C) enable time sync */ -int confirm_reset = 1; /* (C) enable reset confirmation */ -int confirm_exit = 1; /* (C) enable exit confirmation */ -int confirm_save = 1; /* (C) enable save confirmation */ -int enable_discord = 0; /* (C) enable Discord integration */ -int pit_mode = -1; /* (C) force setting PIT mode */ -int fm_driver = 0; /* (C) select FM sound driver */ -int open_dir_usr_path = 0; /* default file open dialog directory of usr_path */ -int video_fullscreen_scale_maximized = 0; /* (C) Whether fullscreen scaling settings also apply when maximized. */ +int window_remember; +int vid_resize; /* (C) allow resizing */ +int invert_display = 0; /* (C) invert the display */ +int suppress_overscan = 0; /* (C) suppress overscans */ +int scale = 0; /* (C) screen scale factor */ +int dpi_scale = 0; /* (C) DPI scaling of the emulated screen */ +int vid_api = 0; /* (C) video renderer */ +int vid_cga_contrast = 0; /* (C) video */ +int video_fullscreen = 0; /* (C) video */ +int video_fullscreen_scale = 0; /* (C) video */ +int video_fullscreen_first = 0; /* (C) video */ +int enable_overscan = 0; /* (C) video */ +int force_43 = 0; /* (C) video */ +int video_filter_method = 1; /* (C) video */ +int video_vsync = 0; /* (C) video */ +int video_framerate = -1; /* (C) video */ +char video_shader[512] = { '\0' }; /* (C) video */ +int bugger_enabled = 0; /* (C) enable ISAbugger */ +int postcard_enabled = 0; /* (C) enable POST card */ +int isamem_type[ISAMEM_MAX] = { 0, 0, 0, 0 }; /* (C) enable ISA mem cards */ +int isartc_type = 0; /* (C) enable ISA RTC card */ +int gfxcard = 0; /* (C) graphics/video card */ +int gfxcard_2 = 0; /* (C) graphics/video card */ +int show_second_monitors = 1; /* (C) show non-primary monitors */ +int sound_is_float = 1; /* (C) sound uses FP values */ +int GAMEBLASTER = 0; /* (C) sound option */ +int GUS = 0; /* (C) sound option */ +int SSI2001 = 0; /* (C) sound option */ +int voodoo_enabled = 0; /* (C) video option */ +int ibm8514_enabled = 0; /* (C) video option */ +int xga_enabled = 0; /* (C) video option */ +uint32_t mem_size = 0; /* (C) memory size (Installed on system board)*/ +uint32_t isa_mem_size = 0; /* (C) memory size (ISA Memory Cards) */ +int cpu_use_dynarec = 0; /* (C) cpu uses/needs Dyna */ +int cpu = 0; /* (C) cpu type */ +int fpu_type = 0; /* (C) fpu type */ +int time_sync = 0; /* (C) enable time sync */ +int confirm_reset = 1; /* (C) enable reset confirmation */ +int confirm_exit = 1; /* (C) enable exit confirmation */ +int confirm_save = 1; /* (C) enable save confirmation */ +int enable_discord = 0; /* (C) enable Discord integration */ +int pit_mode = -1; /* (C) force setting PIT mode */ +int fm_driver = 0; /* (C) select FM sound driver */ +int open_dir_usr_path = 0; /* default file open dialog directory of usr_path */ +int video_fullscreen_scale_maximized = 0; /* (C) Whether fullscreen scaling settings also apply when maximized. */ /* Statistics. */ extern int mmuflush; @@ -195,36 +194,33 @@ extern int readlnum; extern int writelnum; /* emulator % */ -int fps; +int fps; int framecount; -extern int CPUID; -extern int output; -int atfullspeed; +extern int CPUID; +extern int output; +int atfullspeed; -char exe_path[2048]; /* path (dir) of executable */ -char usr_path[1024]; /* path (dir) of user data */ -char cfg_path[1024]; /* full path of config file */ -FILE *stdlog = NULL; /* file to log output to */ -//int scrnsz_x = SCREEN_RES_X; /* current screen size, X */ -//int scrnsz_y = SCREEN_RES_Y; /* current screen size, Y */ -int config_changed; /* config has changed */ -int title_update; -int framecountx = 0; -int hard_reset_pending = 0; +char exe_path[2048]; /* path (dir) of executable */ +char usr_path[1024]; /* path (dir) of user data */ +char cfg_path[1024]; /* full path of config file */ +FILE *stdlog = NULL; /* file to log output to */ +// int scrnsz_x = SCREEN_RES_X; /* current screen size, X */ +// int scrnsz_y = SCREEN_RES_Y; /* current screen size, Y */ +int config_changed; /* config has changed */ +int title_update; +int framecountx = 0; +int hard_reset_pending = 0; +// int unscaled_size_x = SCREEN_RES_X; /* current unscaled size X */ +// int unscaled_size_y = SCREEN_RES_Y; /* current unscaled size Y */ +// int efscrnsz_y = SCREEN_RES_Y; -//int unscaled_size_x = SCREEN_RES_X; /* current unscaled size X */ -//int unscaled_size_y = SCREEN_RES_Y; /* current unscaled size Y */ -//int efscrnsz_y = SCREEN_RES_Y; - - -static wchar_t mouse_msg[3][200]; - +static wchar_t mouse_msg[3][200]; #ifndef RELEASE_BUILD static char buff[1024]; -static int seen = 0; +static int seen = 0; static int suppr_seen = 1; #endif @@ -243,73 +239,70 @@ pclog_ex(const char *fmt, va_list ap) char temp[1024]; if (strcmp(fmt, "") == 0) - return; + return; if (stdlog == NULL) { - if (log_path[0] != '\0') { - stdlog = plat_fopen(log_path, "w"); - if (stdlog == NULL) - stdlog = stdout; - } else - stdlog = stdout; + if (log_path[0] != '\0') { + stdlog = plat_fopen(log_path, "w"); + if (stdlog == NULL) + stdlog = stdout; + } else + stdlog = stdout; } vsprintf(temp, fmt, ap); - if (suppr_seen && ! strcmp(buff, temp)) - seen++; + if (suppr_seen && !strcmp(buff, temp)) + seen++; else { - if (suppr_seen && seen) - fprintf(stdlog, "*** %d repeats ***\n", seen); - seen = 0; - strcpy(buff, temp); - fprintf(stdlog, "%s", temp); + if (suppr_seen && seen) + fprintf(stdlog, "*** %d repeats ***\n", seen); + seen = 0; + strcpy(buff, temp); + fprintf(stdlog, "%s", temp); } fflush(stdlog); #endif } - void pclog_toggle_suppr(void) { #ifndef RELEASE_BUILD - suppr_seen ^= 1; + suppr_seen ^= 1; #endif } - /* Log something. We only do this in non-release builds. */ void pclog(const char *fmt, ...) { #ifndef RELEASE_BUILD - va_list ap; + va_list ap; - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); #endif } - /* Log a fatal error, and display a UI message before exiting. */ void fatal(const char *fmt, ...) { - char temp[1024]; + char temp[1024]; va_list ap; - char *sp; + char *sp; va_start(ap, fmt); if (stdlog == NULL) { - if (log_path[0] != '\0') { - stdlog = plat_fopen(log_path, "w"); - if (stdlog == NULL) - stdlog = stdout; - } else - stdlog = stdout; + if (log_path[0] != '\0') { + stdlog = plat_fopen(log_path, "w"); + if (stdlog == NULL) + stdlog = stdout; + } else + stdlog = stdout; } vsprintf(temp, fmt, ap); @@ -326,7 +319,8 @@ fatal(const char *fmt, ...) #endif /* Make sure the message does not have a trailing newline. */ - if ((sp = strchr(temp, '\n')) != NULL) *sp = '\0'; + if ((sp = strchr(temp, '\n')) != NULL) + *sp = '\0'; /* Cleanly terminate all of the emulator's components so as to avoid things like threads getting stuck. */ @@ -339,20 +333,19 @@ fatal(const char *fmt, ...) exit(-1); } - void fatal_ex(const char *fmt, va_list ap) { - char temp[1024]; + char temp[1024]; char *sp; if (stdlog == NULL) { - if (log_path[0] != '\0') { - stdlog = plat_fopen(log_path, "w"); - if (stdlog == NULL) - stdlog = stdout; - } else - stdlog = stdout; + if (log_path[0] != '\0') { + stdlog = plat_fopen(log_path, "w"); + if (stdlog == NULL) + stdlog = stdout; + } else + stdlog = stdout; } vsprintf(temp, fmt, ap); @@ -368,7 +361,8 @@ fatal_ex(const char *fmt, va_list ap) #endif /* Make sure the message does not have a trailing newline. */ - if ((sp = strchr(temp, '\n')) != NULL) *sp = '\0'; + if ((sp = strchr(temp, '\n')) != NULL) + *sp = '\0'; /* Cleanly terminate all of the emulator's components so as to avoid things like threads getting stuck. */ @@ -379,27 +373,24 @@ fatal_ex(const char *fmt, va_list ap) fflush(stdlog); } - #ifdef ENABLE_PC_LOG int pc_do_log = ENABLE_PC_LOG; - static void pc_log(const char *fmt, ...) { - va_list ap; + va_list ap; - if (pc_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } + if (pc_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } } #else -#define pc_log(fmt, ...) +# define pc_log(fmt, ...) #endif - /* * Perform initial startup of the PC. * @@ -410,34 +401,34 @@ pc_log(const char *fmt, ...) int pc_init(int argc, char *argv[]) { - char *ppath = NULL, *rpath = NULL; - char *cfg = NULL, *p; - char temp[2048]; - struct tm *info; - time_t now; - int c, lvmp = 0; + char *ppath = NULL, *rpath = NULL; + char *cfg = NULL, *p; + char temp[2048]; + struct tm *info; + time_t now; + int c, lvmp = 0; #ifdef ENABLE_NG - int ng = 0; + int ng = 0; #endif #ifdef _WIN32 - uint32_t *uid, *shwnd; + uint32_t *uid, *shwnd; #endif - uint32_t lang_init = 0; + uint32_t lang_init = 0; - /* Grab the executable's full path. */ - plat_get_exe_name(exe_path, sizeof(exe_path)-1); - p = path_get_filename(exe_path); - *p = '\0'; + /* Grab the executable's full path. */ + plat_get_exe_name(exe_path, sizeof(exe_path) - 1); + p = path_get_filename(exe_path); + *p = '\0'; #if defined(__APPLE__) c = strlen(exe_path); if ((c >= 16) && !strcmp(&exe_path[c - 16], "/Contents/MacOS/")) { exe_path[c - 16] = '\0'; - p = path_get_filename(exe_path); - *p = '\0'; + p = path_get_filename(exe_path); + *p = '\0'; } if (!strncmp(exe_path, "/private/var/folders/", 21)) { ui_msgbox_header(MBX_FATAL, L"App Translocation", EMU_NAME_W L" cannot determine the emulated machine's location due to a macOS security feature. Please move the " EMU_NAME_W L" app to another folder (not /Applications), or make a copy of it and open that copy instead."); - return(0); + return (0); } #elif !defined(_WIN32) /* Grab the actual path if we are an AppImage. */ @@ -446,184 +437,179 @@ pc_init(int argc, char *argv[]) path_get_dirname(exe_path, p); #endif - path_slash(exe_path); + path_slash(exe_path); - /* - * Get the current working directory. - * - * This is normally the directory from where the - * program was run. If we have been started via - * a shortcut (desktop icon), however, the CWD - * could have been set to something else. - */ - plat_getcwd(usr_path, sizeof(usr_path) - 1); - plat_getcwd(rom_path, sizeof(rom_path) - 1); + /* + * Get the current working directory. + * + * This is normally the directory from where the + * program was run. If we have been started via + * a shortcut (desktop icon), however, the CWD + * could have been set to something else. + */ + plat_getcwd(usr_path, sizeof(usr_path) - 1); + plat_getcwd(rom_path, sizeof(rom_path) - 1); - for (c=1; cnext) { + /* + * This is where we start outputting to the log file, + * if there is one. Create a little info header first. + */ + (void) time(&now); + info = localtime(&now); + strftime(temp, sizeof(temp), "%Y/%m/%d %H:%M:%S", info); + pclog("#\n# %ls v%ls logfile, created %s\n#\n", + EMU_NAME_W, EMU_VERSION_FULL_W, temp); + pclog("# VM: %s\n#\n", vm_name); + pclog("# Emulator path: %s\n", exe_path); + pclog("# Userfiles path: %s\n", usr_path); + for (rom_path_t *rom_path = &rom_paths; rom_path != NULL; rom_path = rom_path->next) { pclog("# ROM path: %s\n", rom_path->path); } - pclog("# Configuration file: %s\n#\n\n", cfg_path); - /* - * We are about to read the configuration file, which MAY - * put data into global variables (the hard- and floppy - * disks are an example) so we have to initialize those - * modules before we load the config.. - */ - hdd_init(); - network_init(); - mouse_init(); - cdrom_global_init(); - zip_global_init(); - mo_global_init(); + pclog("# Configuration file: %s\n#\n\n", cfg_path); + /* + * We are about to read the configuration file, which MAY + * put data into global variables (the hard- and floppy + * disks are an example) so we have to initialize those + * modules before we load the config.. + */ + hdd_init(); + network_init(); + mouse_init(); + cdrom_global_init(); + zip_global_init(); + mo_global_init(); - /* Load the configuration file. */ - config_load(); + /* Load the configuration file. */ + config_load(); - /* Load the desired language */ - if (lang_init) - lang_id = lang_init; + /* Load the desired language */ + if (lang_init) + lang_id = lang_init; - gdbstub_init(); + gdbstub_init(); - /* All good! */ - return(1); + /* All good! */ + return (1); } - void pc_speed_changed(void) { - if (cpu_s->cpu_type >= CPU_286) - pit_set_clock(cpu_s->rspeed); - else - pit_set_clock(14318184.0); + if (cpu_s->cpu_type >= CPU_286) + pit_set_clock(cpu_s->rspeed); + else + pit_set_clock(14318184.0); } - void pc_full_speed(void) { - if (! atfullspeed) { - pc_log("Set fullspeed - %i %i\n", is386, AT); - pc_speed_changed(); - } - atfullspeed = 1; + if (!atfullspeed) { + pc_log("Set fullspeed - %i %i\n", is386, AT); + pc_speed_changed(); + } + atfullspeed = 1; } - /* Initialize modules, ran once, after pc_init. */ int pc_init_modules(void) { - int c, m; - wchar_t temp[512]; - char tempc[512]; + int c, m; + wchar_t temp[512]; + char tempc[512]; #ifdef PRINT_MISSING_MACHINES_AND_VIDEO_CARDS - c = m = 0; - while (machine_get_internal_name_ex(c) != NULL) { - m = machine_available(c); - if (!m) - pclog("Missing machine: %s\n", machine_getname_ex(c)); - c++; - } + c = m = 0; + while (machine_get_internal_name_ex(c) != NULL) { + m = machine_available(c); + if (!m) + pclog("Missing machine: %s\n", machine_getname_ex(c)); + c++; + } - c = m = 0; - while (video_get_internal_name(c) != NULL) { - memset(tempc, 0, sizeof(tempc)); - device_get_name(video_card_getdevice(c), 0, tempc); - if ((c > 1) && !(tempc[0])) - break; - m = video_card_available(c); - if (!m) - pclog("Missing video card: %s\n", tempc); - c++; - } + c = m = 0; + while (video_get_internal_name(c) != NULL) { + memset(tempc, 0, sizeof(tempc)); + device_get_name(video_card_getdevice(c), 0, tempc); + if ((c > 1) && !(tempc[0])) + break; + m = video_card_available(c); + if (!m) + pclog("Missing video card: %s\n", tempc); + c++; + } #endif - pc_log("Scanning for ROM images:\n"); - c = m = 0; - while (machine_get_internal_name_ex(m) != NULL) { - c += machine_available(m); - m++; - } - if (c == 0) { - /* No usable ROMs found, aborting. */ - return(0); - } - pc_log("A total of %d ROM sets have been loaded.\n", c); + pc_log("Scanning for ROM images:\n"); + c = m = 0; + while (machine_get_internal_name_ex(m) != NULL) { + c += machine_available(m); + m++; + } + if (c == 0) { + /* No usable ROMs found, aborting. */ + return (0); + } + pc_log("A total of %d ROM sets have been loaded.\n", c); - /* Load the ROMs for the selected machine. */ - if (! machine_available(machine)) { - swprintf(temp, sizeof(temp), plat_get_string(IDS_2063), machine_getname()); - c = 0; - machine = -1; - while (machine_get_internal_name_ex(c) != NULL) { - if (machine_available(c)) { - ui_msgbox_header(MBX_INFO, (wchar_t *) IDS_2128, temp); - machine = c; - config_save(); - break; - } - c++; - } - if (machine == -1) { - fatal("No available machines\n"); - exit(-1); - return(0); - } - } + /* Load the ROMs for the selected machine. */ + if (!machine_available(machine)) { + swprintf(temp, sizeof(temp), plat_get_string(IDS_2063), machine_getname()); + c = 0; + machine = -1; + while (machine_get_internal_name_ex(c) != NULL) { + if (machine_available(c)) { + ui_msgbox_header(MBX_INFO, (wchar_t *) IDS_2128, temp); + machine = c; + config_save(); + break; + } + c++; + } + if (machine == -1) { + fatal("No available machines\n"); + exit(-1); + return (0); + } + } - /* Make sure we have a usable video card. */ - if (! video_card_available(gfxcard)) { - memset(tempc, 0, sizeof(tempc)); - device_get_name(video_card_getdevice(gfxcard), 0, tempc); - swprintf(temp, sizeof(temp), plat_get_string(IDS_2064), tempc); - c = 0; - while (video_get_internal_name(c) != NULL) { - gfxcard = -1; - if (video_card_available(c)) { - ui_msgbox_header(MBX_INFO, (wchar_t *) IDS_2128, temp); - gfxcard = c; - config_save(); - break; - } - c++; - } - if (gfxcard == -1) { - fatal("No available video cards\n"); - exit(-1); - return(0); - } - } + /* Make sure we have a usable video card. */ + if (!video_card_available(gfxcard)) { + memset(tempc, 0, sizeof(tempc)); + device_get_name(video_card_getdevice(gfxcard), 0, tempc); + swprintf(temp, sizeof(temp), plat_get_string(IDS_2064), tempc); + c = 0; + while (video_get_internal_name(c) != NULL) { + gfxcard = -1; + if (video_card_available(c)) { + ui_msgbox_header(MBX_INFO, (wchar_t *) IDS_2128, temp); + gfxcard = c; + config_save(); + break; + } + c++; + } + if (gfxcard == -1) { + fatal("No available video cards\n"); + exit(-1); + return (0); + } + } - if (! video_card_available(gfxcard_2)) { - char temp[1024] = { 0 }; + if (!video_card_available(gfxcard_2)) { + char temp[1024] = { 0 }; char tempc[1024] = { 0 }; device_get_name(video_card_getdevice(gfxcard_2), 0, tempc); snprintf(temp, sizeof(temp), "Video card #2 \"%s\" is not available due to missing ROMs in the roms/video directory. Disabling the second video card.", tempc); @@ -879,113 +862,108 @@ pc_init_modules(void) gfxcard_2 = 0; } - atfullspeed = 0; + atfullspeed = 0; - random_init(); + random_init(); - mem_init(); + mem_init(); #ifdef USE_DYNAREC -#if defined(__APPLE__) && defined(__aarch64__) - pthread_jit_write_protect_np(0); -#endif - codegen_init(); -#if defined(__APPLE__) && defined(__aarch64__) - pthread_jit_write_protect_np(1); -#endif +# if defined(__APPLE__) && defined(__aarch64__) + pthread_jit_write_protect_np(0); +# endif + codegen_init(); +# if defined(__APPLE__) && defined(__aarch64__) + pthread_jit_write_protect_np(1); +# endif #endif - keyboard_init(); - joystick_init(); + keyboard_init(); + joystick_init(); - video_init(); + video_init(); - fdd_init(); + fdd_init(); - sound_init(); + sound_init(); - hdc_init(); + hdc_init(); - video_reset_close(); + video_reset_close(); - machine_status_init(); + machine_status_init(); - return(1); + return (1); } - void pc_send_ca(uint16_t sc) { - keyboard_input(1, 0x1D); /* Ctrl key pressed */ - keyboard_input(1, 0x38); /* Alt key pressed */ - keyboard_input(1, sc); - keyboard_input(0, sc); - keyboard_input(0, 0x38); /* Alt key released */ - keyboard_input(0, 0x1D); /* Ctrl key released */ + keyboard_input(1, 0x1D); /* Ctrl key pressed */ + keyboard_input(1, 0x38); /* Alt key pressed */ + keyboard_input(1, sc); + keyboard_input(0, sc); + keyboard_input(0, 0x38); /* Alt key released */ + keyboard_input(0, 0x1D); /* Ctrl key released */ } - /* Send the machine a Control-Alt-DEL sequence. */ void pc_send_cad(void) { - pc_send_ca(0x153); + pc_send_ca(0x153); } - /* Send the machine a Control-Alt-ESC sequence. */ void pc_send_cae(void) { - pc_send_ca(1); + pc_send_ca(1); } - void pc_reset_hard_close(void) { - ui_sb_set_ready(0); + ui_sb_set_ready(0); - /* Close all the memory mappings. */ - mem_close(); + /* Close all the memory mappings. */ + mem_close(); - /* Turn off timer processing to avoid potential segmentation faults. */ - timer_close(); + /* Turn off timer processing to avoid potential segmentation faults. */ + timer_close(); - suppress_overscan = 0; + suppress_overscan = 0; - nvr_save(); - nvr_close(); + nvr_save(); + nvr_close(); - mouse_close(); + mouse_close(); - lpt_devices_close(); + lpt_devices_close(); - device_close_all(); + device_close_all(); - scsi_device_close_all(); + scsi_device_close_all(); - midi_out_close(); + midi_out_close(); - midi_in_close(); + midi_in_close(); - cdrom_close(); + cdrom_close(); - zip_close(); + zip_close(); - mo_close(); + mo_close(); - scsi_disk_close(); + scsi_disk_close(); - closeal(); + closeal(); - video_reset_close(); + video_reset_close(); - cpu_close(); + cpu_close(); } - /* * This is basically the spot where we start up the actual machine, * by issuing a 'hard reset' to the entire configuration. Order is @@ -995,353 +973,355 @@ pc_reset_hard_close(void) void pc_reset_hard_init(void) { - /* - * First, we reset the modules that are not part of - * the actual machine, but which support some of the - * modules that are. - */ + /* + * First, we reset the modules that are not part of + * the actual machine, but which support some of the + * modules that are. + */ - /* Reset the general machine support modules. */ - io_init(); + /* Reset the general machine support modules. */ + io_init(); - /* Turn on and (re)initialize timer processing. */ - timer_init(); + /* Turn on and (re)initialize timer processing. */ + timer_init(); - device_init(); + device_init(); - sound_reset(); + sound_reset(); - scsi_reset(); - scsi_device_init(); + scsi_reset(); + scsi_device_init(); - /* Initialize the actual machine and its basic modules. */ - machine_init(); + /* Initialize the actual machine and its basic modules. */ + machine_init(); - /* Reset and reconfigure the serial ports. */ - serial_standalone_init(); + /* Reset and reconfigure the serial ports. */ + serial_standalone_init(); - /* Reset and reconfigure the Sound Card layer. */ - sound_card_reset(); + /* Reset and reconfigure the Sound Card layer. */ + sound_card_reset(); - /* Reset any ISA RTC cards. */ - isartc_reset(); + /* Reset any ISA RTC cards. */ + isartc_reset(); - fdc_card_init(); + fdc_card_init(); - fdd_reset(); + fdd_reset(); - /* - * Once the machine has been initialized, all that remains - * should be resetting all devices set up for it, to their - * current configurations ! - * - * For now, we will call their reset functions here, but - * that will be a call to device_reset_all() later ! - */ + /* + * Once the machine has been initialized, all that remains + * should be resetting all devices set up for it, to their + * current configurations ! + * + * For now, we will call their reset functions here, but + * that will be a call to device_reset_all() later ! + */ - /* Reset some basic devices. */ - speaker_init(); - lpt_devices_init(); - shadowbios = 0; + /* Reset some basic devices. */ + speaker_init(); + lpt_devices_init(); + shadowbios = 0; - /* - * Reset the mouse, this will attach it to any port needed. - */ - mouse_reset(); + /* + * Reset the mouse, this will attach it to any port needed. + */ + mouse_reset(); - /* Reset the Hard Disk Controller module. */ - hdc_reset(); - /* Reset and reconfigure the SCSI layer. */ - scsi_card_init(); + /* Reset the Hard Disk Controller module. */ + hdc_reset(); + /* Reset and reconfigure the SCSI layer. */ + scsi_card_init(); - cdrom_hard_reset(); + cdrom_hard_reset(); - zip_hard_reset(); + zip_hard_reset(); - mo_hard_reset(); + mo_hard_reset(); - scsi_disk_hard_reset(); + scsi_disk_hard_reset(); - /* Reset and reconfigure the Network Card layer. */ - network_reset(); + /* Reset and reconfigure the Network Card layer. */ + network_reset(); - if (joystick_type) - gameport_update_joystick_type(); + if (joystick_type) + gameport_update_joystick_type(); - ui_sb_update_panes(); + ui_sb_update_panes(); - if (config_changed) { - config_save(); + if (config_changed) { + config_save(); - config_changed = 0; - } else - ui_sb_set_ready(1); + config_changed = 0; + } else + ui_sb_set_ready(1); - /* Needs the status bar... */ - if (bugger_enabled) - device_add(&bugger_device); - if (postcard_enabled) - device_add(&postcard_device); + /* Needs the status bar... */ + if (bugger_enabled) + device_add(&bugger_device); + if (postcard_enabled) + device_add(&postcard_device); - /* Reset the CPU module. */ - resetx86(); - dma_reset(); - pci_pic_reset(); - cpu_cache_int_enabled = cpu_cache_ext_enabled = 0; + /* Reset the CPU module. */ + resetx86(); + dma_reset(); + pci_pic_reset(); + cpu_cache_int_enabled = cpu_cache_ext_enabled = 0; - atfullspeed = 0; - pc_full_speed(); + atfullspeed = 0; + pc_full_speed(); - cycles = 0; + cycles = 0; #ifdef FPU_CYCLES - fpu_cycles = 0; + fpu_cycles = 0; #endif #ifdef USE_DYNAREC - cycles_main = 0; + cycles_main = 0; #endif - update_mouse_msg(); + update_mouse_msg(); } -void update_mouse_msg() +void +update_mouse_msg() { - wchar_t wcpufamily[2048], wcpu[2048], wmachine[2048], *wcp; + wchar_t wcpufamily[2048], wcpu[2048], wmachine[2048], *wcp; - mbstowcs(wmachine, machine_getname(), strlen(machine_getname())+1); + mbstowcs(wmachine, machine_getname(), strlen(machine_getname()) + 1); - if (!cpu_override) - mbstowcs(wcpufamily, cpu_f->name, strlen(cpu_f->name)+1); - else - swprintf(wcpufamily, sizeof_w(wcpufamily), L"[U] %hs", cpu_f->name); + if (!cpu_override) + mbstowcs(wcpufamily, cpu_f->name, strlen(cpu_f->name) + 1); + else + swprintf(wcpufamily, sizeof_w(wcpufamily), L"[U] %hs", cpu_f->name); - wcp = wcschr(wcpufamily, L'('); - if (wcp) /* remove parentheses */ - *(wcp - 1) = L'\0'; - mbstowcs(wcpu, cpu_s->name, strlen(cpu_s->name)+1); + wcp = wcschr(wcpufamily, L'('); + if (wcp) /* remove parentheses */ + *(wcp - 1) = L'\0'; + mbstowcs(wcpu, cpu_s->name, strlen(cpu_s->name) + 1); #ifdef _WIN32 - swprintf(mouse_msg[0], sizeof_w(mouse_msg[0]), L"%%i%%%% - %ls", - plat_get_string(IDS_2077)); - swprintf(mouse_msg[1], sizeof_w(mouse_msg[1]), L"%%i%%%% - %ls", - (mouse_get_buttons() > 2) ? plat_get_string(IDS_2078) : plat_get_string(IDS_2079)); - wcsncpy(mouse_msg[2], L"%i%%", sizeof_w(mouse_msg[2])); + swprintf(mouse_msg[0], sizeof_w(mouse_msg[0]), L"%%i%%%% - %ls", + plat_get_string(IDS_2077)); + swprintf(mouse_msg[1], sizeof_w(mouse_msg[1]), L"%%i%%%% - %ls", + (mouse_get_buttons() > 2) ? plat_get_string(IDS_2078) : plat_get_string(IDS_2079)); + wcsncpy(mouse_msg[2], L"%i%%", sizeof_w(mouse_msg[2])); #else - swprintf(mouse_msg[0], sizeof_w(mouse_msg[0]), L"%ls v%ls - %%i%%%% - %ls - %ls/%ls - %ls", - EMU_NAME_W, EMU_VERSION_FULL_W, wmachine, wcpufamily, wcpu, - plat_get_string(IDS_2077)); - swprintf(mouse_msg[1], sizeof_w(mouse_msg[1]), L"%ls v%ls - %%i%%%% - %ls - %ls/%ls - %ls", - EMU_NAME_W, EMU_VERSION_FULL_W, wmachine, wcpufamily, wcpu, - (mouse_get_buttons() > 2) ? plat_get_string(IDS_2078) : plat_get_string(IDS_2079)); - swprintf(mouse_msg[2], sizeof_w(mouse_msg[2]), L"%ls v%ls - %%i%%%% - %ls - %ls/%ls", - EMU_NAME_W, EMU_VERSION_FULL_W, wmachine, wcpufamily, wcpu); + swprintf(mouse_msg[0], sizeof_w(mouse_msg[0]), L"%ls v%ls - %%i%%%% - %ls - %ls/%ls - %ls", + EMU_NAME_W, EMU_VERSION_FULL_W, wmachine, wcpufamily, wcpu, + plat_get_string(IDS_2077)); + swprintf(mouse_msg[1], sizeof_w(mouse_msg[1]), L"%ls v%ls - %%i%%%% - %ls - %ls/%ls - %ls", + EMU_NAME_W, EMU_VERSION_FULL_W, wmachine, wcpufamily, wcpu, + (mouse_get_buttons() > 2) ? plat_get_string(IDS_2078) : plat_get_string(IDS_2079)); + swprintf(mouse_msg[2], sizeof_w(mouse_msg[2]), L"%ls v%ls - %%i%%%% - %ls - %ls/%ls", + EMU_NAME_W, EMU_VERSION_FULL_W, wmachine, wcpufamily, wcpu); #endif } void pc_reset_hard(void) { - hard_reset_pending = 1; + hard_reset_pending = 1; } - void pc_close(thread_t *ptr) { - int i; + int i; - /* Wait a while so things can shut down. */ - plat_delay_ms(200); + /* Wait a while so things can shut down. */ + plat_delay_ms(200); - /* Claim the video blitter. */ - startblit(); + /* Claim the video blitter. */ + startblit(); - /* Terminate the UI thread. */ - is_quit = 1; + /* Terminate the UI thread. */ + is_quit = 1; #if (defined(USE_DYNAREC) && defined(USE_NEW_DYNAREC)) - codegen_close(); + codegen_close(); #endif - nvr_save(); + nvr_save(); - config_save(); + config_save(); - plat_mouse_capture(0); + plat_mouse_capture(0); - /* Close all the memory mappings. */ - mem_close(); + /* Close all the memory mappings. */ + mem_close(); - /* Turn off timer processing to avoid potential segmentation faults. */ - timer_close(); + /* Turn off timer processing to avoid potential segmentation faults. */ + timer_close(); - lpt_devices_close(); + lpt_devices_close(); - for (i=0; irspeed / 100); + /* Run a block of code. */ + startblit(); + cpu_exec(cpu_s->rspeed / 100); #ifdef USE_GDBSTUB /* avoid a KBC FIFO overflow when CPU emulation is stalled */ - if (gdbstub_step == GDBSTUB_EXEC) + if (gdbstub_step == GDBSTUB_EXEC) #endif - mouse_process(); - joystick_process(); - endblit(); + mouse_process(); + joystick_process(); + endblit(); - /* Done with this frame, update statistics. */ - framecount++; - if (++framecountx >= 100) { - framecountx = 0; - frames = 0; - } + /* Done with this frame, update statistics. */ + framecount++; + if (++framecountx >= 100) { + framecountx = 0; + frames = 0; + } - if (title_update) { - mouse_msg_idx = (mouse_type == MOUSE_TYPE_NONE) ? 2 : !!mouse_capture; - swprintf(temp, sizeof_w(temp), mouse_msg[mouse_msg_idx], fps); + if (title_update) { + mouse_msg_idx = (mouse_type == MOUSE_TYPE_NONE) ? 2 : !!mouse_capture; + swprintf(temp, sizeof_w(temp), mouse_msg[mouse_msg_idx], fps); #ifdef __APPLE__ - /* Needed due to modifying the UI on the non-main thread is a big no-no. */ - dispatch_async_f(dispatch_get_main_queue(), wcsdup((const wchar_t *) temp), _ui_window_title); + /* Needed due to modifying the UI on the non-main thread is a big no-no. */ + dispatch_async_f(dispatch_get_main_queue(), wcsdup((const wchar_t *) temp), _ui_window_title); #else - ui_window_title(temp); + ui_window_title(temp); #endif - title_update = 0; - } + title_update = 0; + } } - /* Handler for the 1-second timer to refresh the window title. */ void pc_onesec(void) { - fps = framecount; - framecount = 0; + fps = framecount; + framecount = 0; - title_update = 1; + title_update = 1; } void set_screen_size_monitor(int x, int y, int monitor_index) { - int temp_overscan_x = monitors[monitor_index].mon_overscan_x; - int temp_overscan_y = monitors[monitor_index].mon_overscan_y; + int temp_overscan_x = monitors[monitor_index].mon_overscan_x; + int temp_overscan_y = monitors[monitor_index].mon_overscan_y; double dx, dy, dtx, dty; /* Make sure we keep usable values. */ #if 0 pc_log("SetScreenSize(%d, %d) resize=%d\n", x, y, vid_resize); #endif - if (x < 320) x = 320; - if (y < 200) y = 200; - if (x > 2048) x = 2048; - if (y > 2048) y = 2048; + if (x < 320) + x = 320; + if (y < 200) + y = 200; + if (x > 2048) + x = 2048; + if (y > 2048) + y = 2048; /* Save the new values as "real" (unscaled) resolution. */ monitors[monitor_index].mon_unscaled_size_x = x; - monitors[monitor_index].mon_efscrnsz_y = y; + monitors[monitor_index].mon_efscrnsz_y = y; if (suppress_overscan) - temp_overscan_x = temp_overscan_y = 0; + temp_overscan_x = temp_overscan_y = 0; if (force_43) { - dx = (double)x; - dtx = (double)temp_overscan_x; + dx = (double) x; + dtx = (double) temp_overscan_x; - dy = (double)y; - dty = (double)temp_overscan_y; + dy = (double) y; + dty = (double) temp_overscan_y; - /* Account for possible overscan. */ - if (video_get_type_monitor(monitor_index) != VIDEO_FLAG_TYPE_SPECIAL && (temp_overscan_y == 16)) { - /* CGA */ - dy = (((dx - dtx) / 4.0) * 3.0) + dty; - } else if (video_get_type_monitor(monitor_index) != VIDEO_FLAG_TYPE_SPECIAL && (temp_overscan_y < 16)) { - /* MDA/Hercules */ - dy = (x / 4.0) * 3.0; - } else { - if (enable_overscan) { - /* EGA/(S)VGA with overscan */ + /* Account for possible overscan. */ + if (video_get_type_monitor(monitor_index) != VIDEO_FLAG_TYPE_SPECIAL && (temp_overscan_y == 16)) { + /* CGA */ dy = (((dx - dtx) / 4.0) * 3.0) + dty; - } else { - /* EGA/(S)VGA without overscan */ + } else if (video_get_type_monitor(monitor_index) != VIDEO_FLAG_TYPE_SPECIAL && (temp_overscan_y < 16)) { + /* MDA/Hercules */ dy = (x / 4.0) * 3.0; + } else { + if (enable_overscan) { + /* EGA/(S)VGA with overscan */ + dy = (((dx - dtx) / 4.0) * 3.0) + dty; + } else { + /* EGA/(S)VGA without overscan */ + dy = (x / 4.0) * 3.0; + } } - } - monitors[monitor_index].mon_unscaled_size_y = (int)dy; + monitors[monitor_index].mon_unscaled_size_y = (int) dy; } else - monitors[monitor_index].mon_unscaled_size_y = monitors[monitor_index].mon_efscrnsz_y; + monitors[monitor_index].mon_unscaled_size_y = monitors[monitor_index].mon_efscrnsz_y; - switch(scale) { - case 0: /* 50% */ - monitors[monitor_index].mon_scrnsz_x = (monitors[monitor_index].mon_unscaled_size_x>>1); - monitors[monitor_index].mon_scrnsz_y = (monitors[monitor_index].mon_unscaled_size_y>>1); - break; + switch (scale) { + case 0: /* 50% */ + monitors[monitor_index].mon_scrnsz_x = (monitors[monitor_index].mon_unscaled_size_x >> 1); + monitors[monitor_index].mon_scrnsz_y = (monitors[monitor_index].mon_unscaled_size_y >> 1); + break; - case 1: /* 100% */ - monitors[monitor_index].mon_scrnsz_x = monitors[monitor_index].mon_unscaled_size_x; - monitors[monitor_index].mon_scrnsz_y = monitors[monitor_index].mon_unscaled_size_y; - break; + case 1: /* 100% */ + monitors[monitor_index].mon_scrnsz_x = monitors[monitor_index].mon_unscaled_size_x; + monitors[monitor_index].mon_scrnsz_y = monitors[monitor_index].mon_unscaled_size_y; + break; - case 2: /* 150% */ - monitors[monitor_index].mon_scrnsz_x = ((monitors[monitor_index].mon_unscaled_size_x*3)>>1); - monitors[monitor_index].mon_scrnsz_y = ((monitors[monitor_index].mon_unscaled_size_y*3)>>1); - break; + case 2: /* 150% */ + monitors[monitor_index].mon_scrnsz_x = ((monitors[monitor_index].mon_unscaled_size_x * 3) >> 1); + monitors[monitor_index].mon_scrnsz_y = ((monitors[monitor_index].mon_unscaled_size_y * 3) >> 1); + break; - case 3: /* 200% */ - monitors[monitor_index].mon_scrnsz_x = (monitors[monitor_index].mon_unscaled_size_x<<1); - monitors[monitor_index].mon_scrnsz_y = (monitors[monitor_index].mon_unscaled_size_y<<1); - break; + case 3: /* 200% */ + monitors[monitor_index].mon_scrnsz_x = (monitors[monitor_index].mon_unscaled_size_x << 1); + monitors[monitor_index].mon_scrnsz_y = (monitors[monitor_index].mon_unscaled_size_y << 1); + break; } plat_resize_request(monitors[monitor_index].mon_scrnsz_x, monitors[monitor_index].mon_scrnsz_y, monitor_index); @@ -1366,7 +1346,6 @@ reset_screen_size(void) set_screen_size(monitors[i].mon_unscaled_size_x, monitors[i].mon_efscrnsz_y); } - void set_screen_size_natural(void) { @@ -1374,16 +1353,14 @@ set_screen_size_natural(void) set_screen_size(monitors[i].mon_unscaled_size_x, monitors[i].mon_unscaled_size_y); } - int get_actual_size_x(void) { - return(unscaled_size_x); + return (unscaled_size_x); } - int get_actual_size_y(void) { - return(efscrnsz_y); + return (efscrnsz_y); } diff --git a/src/acpi.c b/src/acpi.c index db181cee8..f607eb9cf 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -47,27 +47,30 @@ static double cpu_to_acpi; #ifdef ENABLE_ACPI_LOG int acpi_do_log = ENABLE_ACPI_LOG; - static void acpi_log(const char *fmt, ...) { va_list ap; if (acpi_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define acpi_log(fmt, ...) +# define acpi_log(fmt, ...) #endif -static uint64_t acpi_clock_get() { +static uint64_t +acpi_clock_get() +{ return tsc * cpu_to_acpi; } -static uint32_t acpi_timer_get(acpi_t *dev) { +static uint32_t +acpi_timer_get(acpi_t *dev) +{ uint64_t clock = acpi_clock_get(); if (dev->regs.timer32) return clock & 0xffffffff; @@ -75,7 +78,9 @@ static uint32_t acpi_timer_get(acpi_t *dev) { return clock & 0xffffff; } -static double acpi_get_overflow_period(acpi_t *dev) { +static double +acpi_get_overflow_period(acpi_t *dev) +{ uint64_t timer = acpi_clock_get(); uint64_t overflow_time; @@ -87,7 +92,7 @@ static double acpi_get_overflow_period(acpi_t *dev) { uint64_t time_to_overflow = overflow_time - timer; - return ((double)time_to_overflow / (double)ACPI_TIMER_FREQ) * 1000000.0; + return ((double) time_to_overflow / (double) ACPI_TIMER_FREQ) * 1000000.0; } static void @@ -113,415 +118,469 @@ acpi_update_irq(acpi_t *dev) { int sci_level = (dev->regs.pmsts & dev->regs.pmen) & (RTC_EN | PWRBTN_EN | GBL_EN | TMROF_EN); if (dev->vendor == VEN_SMC) - sci_level |= (dev->regs.pmsts & BM_STS); + sci_level |= (dev->regs.pmsts & BM_STS); if (sci_level) { - if (dev->irq_mode == 1) - pci_set_irq(dev->slot, dev->irq_pin); - else if (dev->irq_mode == 2) - pci_set_mirq(5, dev->mirq_is_level); - else - pci_set_mirq(0xf0 | dev->irq_line, 1); + if (dev->irq_mode == 1) + pci_set_irq(dev->slot, dev->irq_pin); + else if (dev->irq_mode == 2) + pci_set_mirq(5, dev->mirq_is_level); + else + pci_set_mirq(0xf0 | dev->irq_line, 1); } else { - if (dev->irq_mode == 1) - pci_clear_irq(dev->slot, dev->irq_pin); - else if (dev->irq_mode == 2) - pci_clear_mirq(5, dev->mirq_is_level); - else - pci_clear_mirq(0xf0 | dev->irq_line, 1); + if (dev->irq_mode == 1) + pci_clear_irq(dev->slot, dev->irq_pin); + else if (dev->irq_mode == 2) + pci_clear_mirq(5, dev->mirq_is_level); + else + pci_clear_mirq(0xf0 | dev->irq_line, 1); } acpi_timer_update(dev, (dev->regs.pmen & TMROF_EN) && !(dev->regs.pmsts & TMROF_STS)); } - void acpi_raise_smi(void *priv, int do_smi) { acpi_t *dev = (acpi_t *) priv; if (dev->regs.glbctl & 0x01) { - if ((dev->vendor == VEN_VIA) || (dev->vendor == VEN_VIA_596B)) { - if ((!dev->regs.smi_lock || !dev->regs.smi_active)) { - if (do_smi) - smi_raise(); - dev->regs.smi_active = 1; - } - } else if ((dev->vendor == VEN_INTEL) || (dev->vendor == VEN_ALI)) { - if (do_smi) - smi_raise(); - /* Clear bit 16 of GLBCTL. */ - if (dev->vendor == VEN_INTEL) - dev->regs.glbctl &= ~0x00010000; - else - dev->regs.ali_soft_smi = 1; - } else if (dev->vendor == VEN_SMC) { - if (do_smi) - smi_raise(); - } + if ((dev->vendor == VEN_VIA) || (dev->vendor == VEN_VIA_596B)) { + if ((!dev->regs.smi_lock || !dev->regs.smi_active)) { + if (do_smi) + smi_raise(); + dev->regs.smi_active = 1; + } + } else if ((dev->vendor == VEN_INTEL) || (dev->vendor == VEN_ALI)) { + if (do_smi) + smi_raise(); + /* Clear bit 16 of GLBCTL. */ + if (dev->vendor == VEN_INTEL) + dev->regs.glbctl &= ~0x00010000; + else + dev->regs.ali_soft_smi = 1; + } else if (dev->vendor == VEN_SMC) { + if (do_smi) + smi_raise(); + } } } - static uint32_t acpi_reg_read_common_regs(int size, uint16_t addr, void *p) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) p; uint32_t ret = 0x00000000; - int shift16, shift32; + int shift16, shift32; addr &= 0x3f; shift16 = (addr & 1) << 3; shift32 = (addr & 3) << 3; switch (addr) { - case 0x00: case 0x01: - /* PMSTS - Power Management Status Register (IO) */ - ret = (dev->regs.pmsts >> shift16) & 0xff; - if (addr == 0x01) - ret |= (acpi_rtc_status << 2); - break; - case 0x02: case 0x03: - /* PMEN - Power Management Resume Enable Register (IO) */ - ret = (dev->regs.pmen >> shift16) & 0xff; - break; - case 0x04: case 0x05: - /* PMCNTRL - Power Management Control Register (IO) */ - ret = (dev->regs.pmcntrl >> shift16) & 0xff; - if (addr == 0x05) - ret = (ret & 0xdf); /* Bit 5 is write-only. */ - break; - case 0x08: case 0x09: case 0x0a: case 0x0b: - /* PMTMR - Power Management Timer Register (IO) */ - ret = (acpi_timer_get(dev) >> shift32) & 0xff; + case 0x00: + case 0x01: + /* PMSTS - Power Management Status Register (IO) */ + ret = (dev->regs.pmsts >> shift16) & 0xff; + if (addr == 0x01) + ret |= (acpi_rtc_status << 2); + break; + case 0x02: + case 0x03: + /* PMEN - Power Management Resume Enable Register (IO) */ + ret = (dev->regs.pmen >> shift16) & 0xff; + break; + case 0x04: + case 0x05: + /* PMCNTRL - Power Management Control Register (IO) */ + ret = (dev->regs.pmcntrl >> shift16) & 0xff; + if (addr == 0x05) + ret = (ret & 0xdf); /* Bit 5 is write-only. */ + break; + case 0x08: + case 0x09: + case 0x0a: + case 0x0b: + /* PMTMR - Power Management Timer Register (IO) */ + ret = (acpi_timer_get(dev) >> shift32) & 0xff; #ifdef USE_DYNAREC - if (cpu_use_dynarec) - update_tsc(); + if (cpu_use_dynarec) + update_tsc(); #endif - break; + break; } #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); + acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); #endif return ret; } - static uint32_t acpi_reg_read_ali(int size, uint16_t addr, void *p) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) p; uint32_t ret = 0x00000000; - int shift16, shift32; + int shift16, shift32; addr &= 0x3f; shift16 = (addr & 1) << 3; shift32 = (addr & 3) << 3; - switch(addr) { - case 0x10: case 0x11: case 0x12: case 0x13: - /* PCNTRL - Processor Control Register (IO) */ - ret = (dev->regs.pcntrl >> shift16) & 0xff; - break; - case 0x14: - /* LVL2 - Processor Level 2 Register */ - ret = dev->regs.plvl2; - break; - case 0x15: - /* LVL3 - Processor Level 3 Register */ - ret = dev->regs.plvl3; - break; - case 0x18: case 0x19: - /* GPE0_STS - General Purpose Event0 Status Register */ - ret = (dev->regs.gpsts >> shift16) & 0xff; - break; - case 0x1a: case 0x1b: - /* GPE0_EN - General Purpose Event0 Enable Register */ - ret = (dev->regs.gpen >> shift16) & 0xff; - break; - case 0x1d: case 0x1c: - /* GPE1_STS - General Purpose Event1 Status Register */ - ret = (dev->regs.gpsts1 >> shift16) & 0xff; - break; - case 0x1f: case 0x1e: - /* GPE1_EN - General Purpose Event1 Enable Register */ - ret = (dev->regs.gpen1 >> shift16) & 0xff; - break; - case 0x20 ... 0x27: - /* GPE1_CTL - General Purpose Event1 Control Register */ - ret = (dev->regs.gpcntrl >> shift32) & 0xff; - break; - case 0x30: - /* PM2_CNTRL - Power Management 2 Control Register( */ - ret = dev->regs.pmcntrl; - break; - default: - ret = acpi_reg_read_common_regs(size, addr, p); - break; + switch (addr) { + case 0x10: + case 0x11: + case 0x12: + case 0x13: + /* PCNTRL - Processor Control Register (IO) */ + ret = (dev->regs.pcntrl >> shift16) & 0xff; + break; + case 0x14: + /* LVL2 - Processor Level 2 Register */ + ret = dev->regs.plvl2; + break; + case 0x15: + /* LVL3 - Processor Level 3 Register */ + ret = dev->regs.plvl3; + break; + case 0x18: + case 0x19: + /* GPE0_STS - General Purpose Event0 Status Register */ + ret = (dev->regs.gpsts >> shift16) & 0xff; + break; + case 0x1a: + case 0x1b: + /* GPE0_EN - General Purpose Event0 Enable Register */ + ret = (dev->regs.gpen >> shift16) & 0xff; + break; + case 0x1d: + case 0x1c: + /* GPE1_STS - General Purpose Event1 Status Register */ + ret = (dev->regs.gpsts1 >> shift16) & 0xff; + break; + case 0x1f: + case 0x1e: + /* GPE1_EN - General Purpose Event1 Enable Register */ + ret = (dev->regs.gpen1 >> shift16) & 0xff; + break; + case 0x20 ... 0x27: + /* GPE1_CTL - General Purpose Event1 Control Register */ + ret = (dev->regs.gpcntrl >> shift32) & 0xff; + break; + case 0x30: + /* PM2_CNTRL - Power Management 2 Control Register( */ + ret = dev->regs.pmcntrl; + break; + default: + ret = acpi_reg_read_common_regs(size, addr, p); + break; } #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); + acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); #endif return ret; } - static uint32_t acpi_reg_read_intel(int size, uint16_t addr, void *p) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) p; uint32_t ret = 0x00000000; - int shift16, shift32; + int shift16, shift32; addr &= 0x3f; shift16 = (addr & 1) << 3; shift32 = (addr & 3) << 3; switch (addr) { - case 0x0c: case 0x0d: - /* GPSTS - General Purpose Status Register (IO) */ - ret = (dev->regs.gpsts >> shift16) & 0xff; - break; - case 0x0e: case 0x0f: - /* GPEN - General Purpose Enable Register (IO) */ - ret = (dev->regs.gpen >> shift16) & 0xff; - break; - case 0x10: case 0x11: case 0x12: case 0x13: - /* PCNTRL - Processor Control Register (IO) */ - ret = (dev->regs.pcntrl >> shift32) & 0xff; - break; - case 0x18: case 0x19: - /* GLBSTS - Global Status Register (IO) */ - ret = (dev->regs.glbsts >> shift16) & 0xff; - if (addr == 0x18) { - ret &= 0x27; - if (dev->regs.gpsts != 0x0000) - ret |= 0x80; - if (dev->regs.pmsts != 0x0000) - ret |= 0x40; - if (dev->regs.devsts != 0x00000000) - ret |= 0x10; - } - break; - case 0x1c: case 0x1d: case 0x1e: case 0x1f: - /* DEVSTS - Device Status Register (IO) */ - ret = (dev->regs.devsts >> shift32) & 0xff; - break; - case 0x20: case 0x21: - /* GLBEN - Global Enable Register (IO) */ - ret = (dev->regs.glben >> shift16) & 0xff; - break; - case 0x28: case 0x29: case 0x2a: case 0x2b: - /* GLBCTL - Global Control Register (IO) */ - ret = (dev->regs.glbctl >> shift32) & 0xff; - break; - case 0x2c: case 0x2d: case 0x2e: case 0x2f: - /* DEVCTL - Device Control Register (IO) */ - ret = (dev->regs.devctl >> shift32) & 0xff; - break; - case 0x30: case 0x31: case 0x32: - /* GPIREG - General Purpose Input Register (IO) */ - if (size == 1) - ret = dev->regs.gpireg[addr & 3]; - break; - case 0x34: case 0x35: case 0x36: case 0x37: - /* GPOREG - General Purpose Output Register (IO) */ - if (size == 1) - ret = dev->regs.gporeg[addr & 3]; - break; - default: - ret = acpi_reg_read_common_regs(size, addr, p); - break; + case 0x0c: + case 0x0d: + /* GPSTS - General Purpose Status Register (IO) */ + ret = (dev->regs.gpsts >> shift16) & 0xff; + break; + case 0x0e: + case 0x0f: + /* GPEN - General Purpose Enable Register (IO) */ + ret = (dev->regs.gpen >> shift16) & 0xff; + break; + case 0x10: + case 0x11: + case 0x12: + case 0x13: + /* PCNTRL - Processor Control Register (IO) */ + ret = (dev->regs.pcntrl >> shift32) & 0xff; + break; + case 0x18: + case 0x19: + /* GLBSTS - Global Status Register (IO) */ + ret = (dev->regs.glbsts >> shift16) & 0xff; + if (addr == 0x18) { + ret &= 0x27; + if (dev->regs.gpsts != 0x0000) + ret |= 0x80; + if (dev->regs.pmsts != 0x0000) + ret |= 0x40; + if (dev->regs.devsts != 0x00000000) + ret |= 0x10; + } + break; + case 0x1c: + case 0x1d: + case 0x1e: + case 0x1f: + /* DEVSTS - Device Status Register (IO) */ + ret = (dev->regs.devsts >> shift32) & 0xff; + break; + case 0x20: + case 0x21: + /* GLBEN - Global Enable Register (IO) */ + ret = (dev->regs.glben >> shift16) & 0xff; + break; + case 0x28: + case 0x29: + case 0x2a: + case 0x2b: + /* GLBCTL - Global Control Register (IO) */ + ret = (dev->regs.glbctl >> shift32) & 0xff; + break; + case 0x2c: + case 0x2d: + case 0x2e: + case 0x2f: + /* DEVCTL - Device Control Register (IO) */ + ret = (dev->regs.devctl >> shift32) & 0xff; + break; + case 0x30: + case 0x31: + case 0x32: + /* GPIREG - General Purpose Input Register (IO) */ + if (size == 1) + ret = dev->regs.gpireg[addr & 3]; + break; + case 0x34: + case 0x35: + case 0x36: + case 0x37: + /* GPOREG - General Purpose Output Register (IO) */ + if (size == 1) + ret = dev->regs.gporeg[addr & 3]; + break; + default: + ret = acpi_reg_read_common_regs(size, addr, p); + break; } #ifdef ENABLE_ACPI_LOG - // if (size != 1) - // acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); + // if (size != 1) + // acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); #endif return ret; } - static uint32_t acpi_reg_read_via_common(int size, uint16_t addr, void *p) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) p; uint32_t ret = 0x00000000; - int shift16, shift32; + int shift16, shift32; addr &= 0xff; shift16 = (addr & 1) << 3; shift32 = (addr & 3) << 3; switch (addr) { - case 0x10: case 0x11: case 0x12: case 0x13: - /* PCNTRL - Processor Control Register (IO) */ - ret = (dev->regs.pcntrl >> shift32) & 0xff; - break; - case 0x20: case 0x21: - /* GPSTS - General Purpose Status Register (IO) */ - ret = (dev->regs.gpsts >> shift16) & 0xff; - break; - case 0x22: case 0x23: - /* General Purpose SCI Enable */ - ret = (dev->regs.gpscien >> shift16) & 0xff; - break; - case 0x24: case 0x25: - /* General Purpose SMI Enable */ - ret = (dev->regs.gpsmien >> shift16) & 0xff; - break; - case 0x26: case 0x27: - /* Power Supply Control */ - ret = (dev->regs.pscntrl >> shift16) & 0xff; - break; - case 0x28: case 0x29: - /* GLBSTS - Global Status Register (IO) */ - ret = (dev->regs.glbsts >> shift16) & 0xff; - break; - case 0x2a: case 0x2b: - /* GLBEN - Global Enable Register (IO) */ - ret = (dev->regs.glben >> shift16) & 0xff; - break; - case 0x2c: case 0x2d: - /* GLBCTL - Global Control Register (IO) */ - ret = (dev->regs.glbctl >> shift16) & 0xff; - ret &= ~0x0110; - ret |= (dev->regs.smi_lock ? 0x10 : 0x00); - ret |= (dev->regs.smi_active ? 0x01 : 0x00); - break; - case 0x2f: - /* SMI Command */ - if (size == 1) - ret = dev->regs.smicmd & 0xff; - break; - case 0x30: case 0x31: case 0x32: case 0x33: - /* Primary Activity Detect Status */ - ret = (dev->regs.padsts >> shift32) & 0xff; - break; - case 0x34: case 0x35: case 0x36: case 0x37: - /* Primary Activity Detect Enable */ - ret = (dev->regs.paden >> shift32) & 0xff; - break; - case 0x38: case 0x39: case 0x3a: case 0x3b: - /* GP Timer Reload Enable */ - ret = (dev->regs.gptren >> shift32) & 0xff; - break; - default: - ret = acpi_reg_read_common_regs(size, addr, p); - break; + case 0x10: + case 0x11: + case 0x12: + case 0x13: + /* PCNTRL - Processor Control Register (IO) */ + ret = (dev->regs.pcntrl >> shift32) & 0xff; + break; + case 0x20: + case 0x21: + /* GPSTS - General Purpose Status Register (IO) */ + ret = (dev->regs.gpsts >> shift16) & 0xff; + break; + case 0x22: + case 0x23: + /* General Purpose SCI Enable */ + ret = (dev->regs.gpscien >> shift16) & 0xff; + break; + case 0x24: + case 0x25: + /* General Purpose SMI Enable */ + ret = (dev->regs.gpsmien >> shift16) & 0xff; + break; + case 0x26: + case 0x27: + /* Power Supply Control */ + ret = (dev->regs.pscntrl >> shift16) & 0xff; + break; + case 0x28: + case 0x29: + /* GLBSTS - Global Status Register (IO) */ + ret = (dev->regs.glbsts >> shift16) & 0xff; + break; + case 0x2a: + case 0x2b: + /* GLBEN - Global Enable Register (IO) */ + ret = (dev->regs.glben >> shift16) & 0xff; + break; + case 0x2c: + case 0x2d: + /* GLBCTL - Global Control Register (IO) */ + ret = (dev->regs.glbctl >> shift16) & 0xff; + ret &= ~0x0110; + ret |= (dev->regs.smi_lock ? 0x10 : 0x00); + ret |= (dev->regs.smi_active ? 0x01 : 0x00); + break; + case 0x2f: + /* SMI Command */ + if (size == 1) + ret = dev->regs.smicmd & 0xff; + break; + case 0x30: + case 0x31: + case 0x32: + case 0x33: + /* Primary Activity Detect Status */ + ret = (dev->regs.padsts >> shift32) & 0xff; + break; + case 0x34: + case 0x35: + case 0x36: + case 0x37: + /* Primary Activity Detect Enable */ + ret = (dev->regs.paden >> shift32) & 0xff; + break; + case 0x38: + case 0x39: + case 0x3a: + case 0x3b: + /* GP Timer Reload Enable */ + ret = (dev->regs.gptren >> shift32) & 0xff; + break; + default: + ret = acpi_reg_read_common_regs(size, addr, p); + break; } #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); + acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); #endif return ret; } - static uint32_t acpi_reg_read_via(int size, uint16_t addr, void *p) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) p; uint32_t ret = 0x00000000; - int shift16; + int shift16; addr &= 0xff; shift16 = (addr & 1) << 3; switch (addr) { - case 0x40: - /* GPIO Direction Control */ - if (size == 1) - ret = dev->regs.gpio_dir & 0xff; - break; - case 0x42: - /* GPIO port Output Value */ - if (size == 1) - ret = dev->regs.gpio_val & 0x13; - break; - case 0x44: - /* GPIO port Input Value */ - if (size == 1) { - ret = dev->regs.extsmi_val & 0xff; + case 0x40: + /* GPIO Direction Control */ + if (size == 1) + ret = dev->regs.gpio_dir & 0xff; + break; + case 0x42: + /* GPIO port Output Value */ + if (size == 1) + ret = dev->regs.gpio_val & 0x13; + break; + case 0x44: + /* GPIO port Input Value */ + if (size == 1) { + ret = dev->regs.extsmi_val & 0xff; - if (dev->i2c) { - ret &= 0xf9; - if (!(dev->regs.gpio_dir & 0x02) && i2c_gpio_get_scl(dev->i2c)) - ret |= 0x02; - if (!(dev->regs.gpio_dir & 0x04) && i2c_gpio_get_sda(dev->i2c)) - ret |= 0x04; - } - } - break; - case 0x46: case 0x47: - /* GPO Port Output Value */ - ret = (dev->regs.gpo_val >> shift16) & 0xff; - break; - case 0x48: case 0x49: - /* GPO Port Input Value */ - ret = (dev->regs.gpi_val >> shift16) & 0xff; - break; - default: - ret = acpi_reg_read_via_common(size, addr, p); - break; + if (dev->i2c) { + ret &= 0xf9; + if (!(dev->regs.gpio_dir & 0x02) && i2c_gpio_get_scl(dev->i2c)) + ret |= 0x02; + if (!(dev->regs.gpio_dir & 0x04) && i2c_gpio_get_sda(dev->i2c)) + ret |= 0x04; + } + } + break; + case 0x46: + case 0x47: + /* GPO Port Output Value */ + ret = (dev->regs.gpo_val >> shift16) & 0xff; + break; + case 0x48: + case 0x49: + /* GPO Port Input Value */ + ret = (dev->regs.gpi_val >> shift16) & 0xff; + break; + default: + ret = acpi_reg_read_via_common(size, addr, p); + break; } #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); + acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); #endif return ret; } - static uint32_t acpi_reg_read_via_596b(int size, uint16_t addr, void *p) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) p; uint32_t ret = 0x00000000; - int shift16, shift32; + int shift16, shift32; addr &= 0x7f; shift16 = (addr & 1) << 3; shift32 = (addr & 3) << 3; switch (addr) { - case 0x40: /* Extended I/O Trap Status (686A/B) */ - ret = dev->regs.extiotrapsts; - break; - case 0x42: /* Extended I/O Trap Enable (686A/B) */ - ret = dev->regs.extiotrapen; - break; - case 0x44: case 0x45: - /* External SMI Input Value */ - ret = (dev->regs.extsmi_val >> shift16) & 0xff; - break; - case 0x48: case 0x49: case 0x4a: case 0x4b: - /* GPI Port Input Value */ - ret = (dev->regs.gpi_val >> shift32) & 0xff; - break; - case 0x4c: case 0x4d: case 0x4e: case 0x4f: - /* GPO Port Output Value */ - ret = (dev->regs.gpo_val >> shift32) & 0xff; - break; - default: - ret = acpi_reg_read_via_common(size, addr, p); - break; + case 0x40: /* Extended I/O Trap Status (686A/B) */ + ret = dev->regs.extiotrapsts; + break; + case 0x42: /* Extended I/O Trap Enable (686A/B) */ + ret = dev->regs.extiotrapen; + break; + case 0x44: + case 0x45: + /* External SMI Input Value */ + ret = (dev->regs.extsmi_val >> shift16) & 0xff; + break; + case 0x48: + case 0x49: + case 0x4a: + case 0x4b: + /* GPI Port Input Value */ + ret = (dev->regs.gpi_val >> shift32) & 0xff; + break; + case 0x4c: + case 0x4d: + case 0x4e: + case 0x4f: + /* GPO Port Output Value */ + ret = (dev->regs.gpo_val >> shift32) & 0xff; + break; + default: + ret = acpi_reg_read_via_common(size, addr, p); + break; } #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); + acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); #endif return ret; } - static uint32_t acpi_reg_read_smc(int size, uint16_t addr, void *p) { @@ -533,274 +592,300 @@ acpi_reg_read_smc(int size, uint16_t addr, void *p) #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); + acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); #endif return ret; } - static uint32_t acpi_aux_reg_read_smc(int size, uint16_t addr, void *p) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) p; uint32_t ret = 0x00000000; - int shift16; + int shift16; addr &= 0x07; shift16 = (addr & 1) << 3; switch (addr) { - case 0x00: case 0x01: - /* SCI Status Register */ - ret = (dev->regs.pcntrl >> shift16) & 0xff; - break; - case 0x02: case 0x03: - /* SCI Enable Register */ - ret = (dev->regs.gpscien >> shift16) & 0xff; - break; - case 0x04: case 0x05: - /* Miscellaneous Status Register */ - ret = (dev->regs.glbsts >> shift16) & 0xff; - break; - case 0x06: - /* Miscellaneous Enable Register */ - ret = dev->regs.glben & 0xff; - break; - case 0x07: - /* Miscellaneous Control Register */ - ret = dev->regs.glbctl & 0xff; - break; + case 0x00: + case 0x01: + /* SCI Status Register */ + ret = (dev->regs.pcntrl >> shift16) & 0xff; + break; + case 0x02: + case 0x03: + /* SCI Enable Register */ + ret = (dev->regs.gpscien >> shift16) & 0xff; + break; + case 0x04: + case 0x05: + /* Miscellaneous Status Register */ + ret = (dev->regs.glbsts >> shift16) & 0xff; + break; + case 0x06: + /* Miscellaneous Enable Register */ + ret = dev->regs.glben & 0xff; + break; + case 0x07: + /* Miscellaneous Control Register */ + ret = dev->regs.glbctl & 0xff; + break; } acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); return ret; } - static void acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; - int shift16, sus_typ; + int shift16, sus_typ; addr &= 0x3f; #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); + acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); #endif shift16 = (addr & 1) << 3; switch (addr) { - case 0x00: case 0x01: - /* PMSTS - Power Management Status Register (IO) */ - dev->regs.pmsts &= ~((val << shift16) & 0x8d31); - if ((addr == 0x01) && (val & 0x04)) - acpi_rtc_status = 0; - acpi_update_irq(dev); - break; - case 0x02: case 0x03: - /* PMEN - Power Management Resume Enable Register (IO) */ - dev->regs.pmen = ((dev->regs.pmen & ~(0xff << shift16)) | (val << shift16)) & 0x0521; - acpi_update_irq(dev); - break; - case 0x04: case 0x05: - /* PMCNTRL - Power Management Control Register (IO) */ - if ((addr == 0x05) && (val & 0x20)) { - sus_typ = dev->suspend_types[(val >> 2) & 7]; + case 0x00: + case 0x01: + /* PMSTS - Power Management Status Register (IO) */ + dev->regs.pmsts &= ~((val << shift16) & 0x8d31); + if ((addr == 0x01) && (val & 0x04)) + acpi_rtc_status = 0; + acpi_update_irq(dev); + break; + case 0x02: + case 0x03: + /* PMEN - Power Management Resume Enable Register (IO) */ + dev->regs.pmen = ((dev->regs.pmen & ~(0xff << shift16)) | (val << shift16)) & 0x0521; + acpi_update_irq(dev); + break; + case 0x04: + case 0x05: + /* PMCNTRL - Power Management Control Register (IO) */ + if ((addr == 0x05) && (val & 0x20)) { + sus_typ = dev->suspend_types[(val >> 2) & 7]; - if (sus_typ & SUS_POWER_OFF) { - /* Soft power off. */ - plat_power_off(); - return; - } + if (sus_typ & SUS_POWER_OFF) { + /* Soft power off. */ + plat_power_off(); + return; + } - if (sus_typ & SUS_SUSPEND) { - if (sus_typ & SUS_NVR) { - /* Suspend to RAM. */ - nvr_reg_write(0x000f, 0xff, dev->nvr); - } + if (sus_typ & SUS_SUSPEND) { + if (sus_typ & SUS_NVR) { + /* Suspend to RAM. */ + nvr_reg_write(0x000f, 0xff, dev->nvr); + } - if (sus_typ & SUS_RESET_PCI) - device_reset_all_pci(); + if (sus_typ & SUS_RESET_PCI) + device_reset_all_pci(); - if (sus_typ & SUS_RESET_CPU) - cpu_alt_reset = 0; + if (sus_typ & SUS_RESET_CPU) + cpu_alt_reset = 0; - if (sus_typ & SUS_RESET_PCI) { - pci_reset(); - keyboard_at_reset(); + if (sus_typ & SUS_RESET_PCI) { + pci_reset(); + keyboard_at_reset(); - mem_a20_alt = 0; - mem_a20_recalc(); - } + mem_a20_alt = 0; + mem_a20_recalc(); + } - if (sus_typ & (SUS_RESET_CPU | SUS_RESET_CACHE)) - flushmmucache(); + if (sus_typ & (SUS_RESET_CPU | SUS_RESET_CACHE)) + flushmmucache(); - if (sus_typ & SUS_RESET_CPU) - resetx86(); + if (sus_typ & SUS_RESET_CPU) + resetx86(); - /* Since the UI doesn't have a power button at the moment, pause emulation, - then trigger a resume event so that the system resumes after unpausing. */ - plat_pause(1); - timer_set_delay_u64(&dev->resume_timer, 50 * TIMER_USEC); - } - } - dev->regs.pmcntrl = ((dev->regs.pmcntrl & ~(0xff << shift16)) | (val << shift16)) & 0x3f07 /* 0x3c07 */; - break; + /* Since the UI doesn't have a power button at the moment, pause emulation, + then trigger a resume event so that the system resumes after unpausing. */ + plat_pause(1); + timer_set_delay_u64(&dev->resume_timer, 50 * TIMER_USEC); + } + } + dev->regs.pmcntrl = ((dev->regs.pmcntrl & ~(0xff << shift16)) | (val << shift16)) & 0x3f07 /* 0x3c07 */; + break; } } - static void acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; - int shift16, shift32; + int shift16, shift32; addr &= 0x3f; #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); + acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); #endif shift16 = (addr & 1) << 3; shift32 = (addr & 3) << 3; switch (addr) { - case 0x10: case 0x11: case 0x12: case 0x13: - /* PCNTRL - Processor Control Register (IO) */ - dev->regs.pcntrl = ((dev->regs.pcntrl & ~(0xff << shift32)) | (val << shift32)) & 0x00023e1e; - break; - case 0x14: - /* LVL2 - Processor Level 2 Register */ - dev->regs.plvl2 = val; - break; - case 0x15: - /* LVL3 - Processor Level 3 Register */ - dev->regs.plvl3 = val; - break; - case 0x18: case 0x19: - /* GPE0_STS - General Purpose Event0 Status Register */ - dev->regs.gpsts &= ~((val << shift16) & 0x0d07); - break; - case 0x1a: case 0x1b: - /* GPE0_EN - General Purpose Event0 Enable Register */ - dev->regs.gpen = ((dev->regs.gpen & ~(0xff << shift16)) | (val << shift16)) & 0x0d07; - break; - case 0x1d: case 0x1c: - /* GPE1_STS - General Purpose Event1 Status Register */ - dev->regs.gpsts1 &= ~((val << shift16) & 0x0c01); - break; - case 0x1f: case 0x1e: - /* GPE1_EN - General Purpose Event1 Enable Register */ - dev->regs.gpen1 = ((dev->regs.gpen & ~(0xff << shift16)) | (val << shift16)) & 0x0c01; - break; - case 0x20 ... 0x27: - /* GPE1_CTL - General Purpose Event1 Control Register */ - dev->regs.gpcntrl = ((dev->regs.gpcntrl & ~(0xff << shift32)) | (val << shift32)) & 0x00000001; - break; - case 0x30: - /* PM2_CNTRL - Power Management 2 Control Register( */ - dev->regs.pmcntrl = val & 1; - break; - default: - acpi_reg_write_common_regs(size, addr, val, p); - /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ - if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) - dev->regs.gpcntrl &= ~0x0002; - else if ((addr == 0x04) && (dev->regs.pmcntrl & 0x0004)) { - dev->regs.gpsts1 |= 0x01; - if (dev->regs.gpen1 & 0x01) - acpi_raise_smi(dev, 1); - } - } + case 0x10: + case 0x11: + case 0x12: + case 0x13: + /* PCNTRL - Processor Control Register (IO) */ + dev->regs.pcntrl = ((dev->regs.pcntrl & ~(0xff << shift32)) | (val << shift32)) & 0x00023e1e; + break; + case 0x14: + /* LVL2 - Processor Level 2 Register */ + dev->regs.plvl2 = val; + break; + case 0x15: + /* LVL3 - Processor Level 3 Register */ + dev->regs.plvl3 = val; + break; + case 0x18: + case 0x19: + /* GPE0_STS - General Purpose Event0 Status Register */ + dev->regs.gpsts &= ~((val << shift16) & 0x0d07); + break; + case 0x1a: + case 0x1b: + /* GPE0_EN - General Purpose Event0 Enable Register */ + dev->regs.gpen = ((dev->regs.gpen & ~(0xff << shift16)) | (val << shift16)) & 0x0d07; + break; + case 0x1d: + case 0x1c: + /* GPE1_STS - General Purpose Event1 Status Register */ + dev->regs.gpsts1 &= ~((val << shift16) & 0x0c01); + break; + case 0x1f: + case 0x1e: + /* GPE1_EN - General Purpose Event1 Enable Register */ + dev->regs.gpen1 = ((dev->regs.gpen & ~(0xff << shift16)) | (val << shift16)) & 0x0c01; + break; + case 0x20 ... 0x27: + /* GPE1_CTL - General Purpose Event1 Control Register */ + dev->regs.gpcntrl = ((dev->regs.gpcntrl & ~(0xff << shift32)) | (val << shift32)) & 0x00000001; + break; + case 0x30: + /* PM2_CNTRL - Power Management 2 Control Register( */ + dev->regs.pmcntrl = val & 1; + break; + default: + acpi_reg_write_common_regs(size, addr, val, p); + /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ + if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) + dev->regs.gpcntrl &= ~0x0002; + else if ((addr == 0x04) && (dev->regs.pmcntrl & 0x0004)) { + dev->regs.gpsts1 |= 0x01; + if (dev->regs.gpen1 & 0x01) + acpi_raise_smi(dev, 1); + } + } } - static void acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; - int shift16, shift32; + int shift16, shift32; addr &= 0x3f; #ifdef ENABLE_ACPI_LOG if (size != 1) - acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); + acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); #endif shift16 = (addr & 1) << 3; shift32 = (addr & 3) << 3; switch (addr) { - case 0x0c: case 0x0d: - /* GPSTS - General Purpose Status Register (IO) */ - dev->regs.gpsts &= ~((val << shift16) & 0x0f81); - break; - case 0x0e: case 0x0f: - /* GPEN - General Purpose Enable Register (IO) */ - dev->regs.gpen = ((dev->regs.gpen & ~(0xff << shift16)) | (val << shift16)) & 0x0f01; - break; - case 0x10: case 0x11: case 0x13: - /* PCNTRL - Processor Control Register (IO) */ - dev->regs.pcntrl = ((dev->regs.pcntrl & ~(0xff << shift32)) | (val << shift32)) & 0x00023e1e; - break; - case 0x12: - /* PCNTRL - Processor Control Register (IO) */ - dev->regs.pcntrl = ((dev->regs.pcntrl & ~(0xfd << shift32)) | (val << shift32)) & 0x00023e1e; - break; - case 0x18: case 0x19: - /* GLBSTS - Global Status Register (IO) */ - dev->regs.glbsts &= ~((val << shift16) & 0x0d27); - break; - case 0x1c: case 0x1d: case 0x1e: case 0x1f: - /* DEVSTS - Device Status Register (IO) */ - dev->regs.devsts &= ~((val << shift32) & 0x3fff0fff); - break; - case 0x20: case 0x21: - /* GLBEN - Global Enable Register (IO) */ - dev->regs.glben = ((dev->regs.glben & ~(0xff << shift16)) | (val << shift16)) & 0x8d1f; - break; - case 0x28: case 0x29: case 0x2a: case 0x2b: - /* GLBCTL - Global Control Register (IO) */ - dev->regs.glbctl = ((dev->regs.glbctl & ~(0xff << shift32)) | (val << shift32)) & 0x0701ff07; - /* Setting BIOS_RLS also sets GBL_STS and generates SMI. */ - if (dev->regs.glbctl & 0x00000002) { - dev->regs.pmsts |= 0x20; - if (dev->regs.pmen & 0x20) - acpi_update_irq(dev); - } - break; - case 0x2c: case 0x2d: case 0x2e: case 0x2f: - /* DEVCTL - Device Control Register (IO) */ - dev->regs.devctl = ((dev->regs.devctl & ~(0xff << shift32)) | (val << shift32)) & 0x0fffffff; - if (dev->trap_update) - dev->trap_update(dev->trap_priv); - break; - case 0x34: case 0x35: case 0x36: case 0x37: - /* GPOREG - General Purpose Output Register (IO) */ - if (size == 1) - dev->regs.gporeg[addr & 3] = val; - break; - default: - acpi_reg_write_common_regs(size, addr, val, p); - /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ - if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) - dev->regs.glbctl &= ~0x0002; - else if ((addr == 0x04) && (dev->regs.pmcntrl & 0x0004)) { - dev->regs.glbsts |= 0x01; - if (dev->regs.glben & 0x02) - acpi_raise_smi(dev, 1); - } - break; + case 0x0c: + case 0x0d: + /* GPSTS - General Purpose Status Register (IO) */ + dev->regs.gpsts &= ~((val << shift16) & 0x0f81); + break; + case 0x0e: + case 0x0f: + /* GPEN - General Purpose Enable Register (IO) */ + dev->regs.gpen = ((dev->regs.gpen & ~(0xff << shift16)) | (val << shift16)) & 0x0f01; + break; + case 0x10: + case 0x11: + case 0x13: + /* PCNTRL - Processor Control Register (IO) */ + dev->regs.pcntrl = ((dev->regs.pcntrl & ~(0xff << shift32)) | (val << shift32)) & 0x00023e1e; + break; + case 0x12: + /* PCNTRL - Processor Control Register (IO) */ + dev->regs.pcntrl = ((dev->regs.pcntrl & ~(0xfd << shift32)) | (val << shift32)) & 0x00023e1e; + break; + case 0x18: + case 0x19: + /* GLBSTS - Global Status Register (IO) */ + dev->regs.glbsts &= ~((val << shift16) & 0x0d27); + break; + case 0x1c: + case 0x1d: + case 0x1e: + case 0x1f: + /* DEVSTS - Device Status Register (IO) */ + dev->regs.devsts &= ~((val << shift32) & 0x3fff0fff); + break; + case 0x20: + case 0x21: + /* GLBEN - Global Enable Register (IO) */ + dev->regs.glben = ((dev->regs.glben & ~(0xff << shift16)) | (val << shift16)) & 0x8d1f; + break; + case 0x28: + case 0x29: + case 0x2a: + case 0x2b: + /* GLBCTL - Global Control Register (IO) */ + dev->regs.glbctl = ((dev->regs.glbctl & ~(0xff << shift32)) | (val << shift32)) & 0x0701ff07; + /* Setting BIOS_RLS also sets GBL_STS and generates SMI. */ + if (dev->regs.glbctl & 0x00000002) { + dev->regs.pmsts |= 0x20; + if (dev->regs.pmen & 0x20) + acpi_update_irq(dev); + } + break; + case 0x2c: + case 0x2d: + case 0x2e: + case 0x2f: + /* DEVCTL - Device Control Register (IO) */ + dev->regs.devctl = ((dev->regs.devctl & ~(0xff << shift32)) | (val << shift32)) & 0x0fffffff; + if (dev->trap_update) + dev->trap_update(dev->trap_priv); + break; + case 0x34: + case 0x35: + case 0x36: + case 0x37: + /* GPOREG - General Purpose Output Register (IO) */ + if (size == 1) + dev->regs.gporeg[addr & 3] = val; + break; + default: + acpi_reg_write_common_regs(size, addr, val, p); + /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ + if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) + dev->regs.glbctl &= ~0x0002; + else if ((addr == 0x04) && (dev->regs.pmcntrl & 0x0004)) { + dev->regs.glbsts |= 0x01; + if (dev->regs.glben & 0x02) + acpi_raise_smi(dev, 1); + } + break; } } - static void acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; - int shift16, shift32; + int shift16, shift32; addr &= 0xff; acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); @@ -808,84 +893,92 @@ acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *p) shift32 = (addr & 3) << 3; switch (addr) { - case 0x10: case 0x11: case 0x12: case 0x13: - /* PCNTRL - Processor Control Register (IO) */ - dev->regs.pcntrl = ((dev->regs.pcntrl & ~(0xff << shift32)) | (val << shift32)) & 0x0000001e; - break; - case 0x20: case 0x21: - /* GPSTS - General Purpose Status Register (IO) */ - dev->regs.gpsts &= ~((val << shift16) & 0x03ff); - break; - case 0x22: case 0x23: - /* General Purpose SCI Enable */ - dev->regs.gpscien = ((dev->regs.gpscien & ~(0xff << shift16)) | (val << shift16)) & 0x03ff; - break; - case 0x24: case 0x25: - /* General Purpose SMI Enable */ - dev->regs.gpsmien = ((dev->regs.gpsmien & ~(0xff << shift16)) | (val << shift16)) & 0x03ff; - break; - case 0x26: case 0x27: - /* Power Supply Control */ - dev->regs.pscntrl = ((dev->regs.pscntrl & ~(0xff << shift16)) | (val << shift16)) & 0x0701; - break; - case 0x2c: - /* GLBCTL - Global Control Register (IO) */ - dev->regs.glbctl = (dev->regs.glbctl & ~0xff) | (val & 0xff); - dev->regs.smi_lock = !!(dev->regs.glbctl & 0x0010); - /* Setting BIOS_RLS also sets GBL_STS and generates SMI. */ - if (dev->regs.glbctl & 0x0002) { - dev->regs.pmsts |= 0x20; - if (dev->regs.pmen & 0x20) - acpi_update_irq(dev); - } - break; - case 0x2d: - /* GLBCTL - Global Control Register (IO) */ - dev->regs.glbctl &= ~((val << 8) & 0x0100); - if (val & 0x01) - dev->regs.smi_active = 0; - break; - case 0x2f: - /* SMI Command */ - if (size == 1) { - dev->regs.smicmd = val & 0xff; - dev->regs.glbsts |= 0x40; - if (dev->regs.glben & 0x40) - acpi_raise_smi(dev, 1); - } - break; - case 0x38: case 0x39: case 0x3a: case 0x3b: - /* GP Timer Reload Enable */ - dev->regs.gptren = ((dev->regs.gptren & ~(0xff << shift32)) | (val << shift32)) & 0x000000d9; - break; - default: - acpi_reg_write_common_regs(size, addr, val, p); - /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ - if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) - dev->regs.glbctl &= ~0x0002; - else if ((addr == 0x04) && (dev->regs.pmcntrl & 0x0004)) { - dev->regs.glbsts |= 0x20; - if (dev->regs.glben & 0x20) - acpi_raise_smi(dev, 1); - } - break; + case 0x10: + case 0x11: + case 0x12: + case 0x13: + /* PCNTRL - Processor Control Register (IO) */ + dev->regs.pcntrl = ((dev->regs.pcntrl & ~(0xff << shift32)) | (val << shift32)) & 0x0000001e; + break; + case 0x20: + case 0x21: + /* GPSTS - General Purpose Status Register (IO) */ + dev->regs.gpsts &= ~((val << shift16) & 0x03ff); + break; + case 0x22: + case 0x23: + /* General Purpose SCI Enable */ + dev->regs.gpscien = ((dev->regs.gpscien & ~(0xff << shift16)) | (val << shift16)) & 0x03ff; + break; + case 0x24: + case 0x25: + /* General Purpose SMI Enable */ + dev->regs.gpsmien = ((dev->regs.gpsmien & ~(0xff << shift16)) | (val << shift16)) & 0x03ff; + break; + case 0x26: + case 0x27: + /* Power Supply Control */ + dev->regs.pscntrl = ((dev->regs.pscntrl & ~(0xff << shift16)) | (val << shift16)) & 0x0701; + break; + case 0x2c: + /* GLBCTL - Global Control Register (IO) */ + dev->regs.glbctl = (dev->regs.glbctl & ~0xff) | (val & 0xff); + dev->regs.smi_lock = !!(dev->regs.glbctl & 0x0010); + /* Setting BIOS_RLS also sets GBL_STS and generates SMI. */ + if (dev->regs.glbctl & 0x0002) { + dev->regs.pmsts |= 0x20; + if (dev->regs.pmen & 0x20) + acpi_update_irq(dev); + } + break; + case 0x2d: + /* GLBCTL - Global Control Register (IO) */ + dev->regs.glbctl &= ~((val << 8) & 0x0100); + if (val & 0x01) + dev->regs.smi_active = 0; + break; + case 0x2f: + /* SMI Command */ + if (size == 1) { + dev->regs.smicmd = val & 0xff; + dev->regs.glbsts |= 0x40; + if (dev->regs.glben & 0x40) + acpi_raise_smi(dev, 1); + } + break; + case 0x38: + case 0x39: + case 0x3a: + case 0x3b: + /* GP Timer Reload Enable */ + dev->regs.gptren = ((dev->regs.gptren & ~(0xff << shift32)) | (val << shift32)) & 0x000000d9; + break; + default: + acpi_reg_write_common_regs(size, addr, val, p); + /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ + if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) + dev->regs.glbctl &= ~0x0002; + else if ((addr == 0x04) && (dev->regs.pmcntrl & 0x0004)) { + dev->regs.glbsts |= 0x20; + if (dev->regs.glben & 0x20) + acpi_raise_smi(dev, 1); + } + break; } } - static void acpi_i2c_set(acpi_t *dev) { if (dev->i2c) - i2c_gpio_set(dev->i2c, !(dev->regs.gpio_dir & 0x02) || (dev->regs.gpio_val & 0x02), !(dev->regs.gpio_dir & 0x04) || (dev->regs.gpio_val & 0x04)); + i2c_gpio_set(dev->i2c, !(dev->regs.gpio_dir & 0x02) || (dev->regs.gpio_val & 0x02), !(dev->regs.gpio_dir & 0x04) || (dev->regs.gpio_val & 0x04)); } - static void acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; - int shift16, shift32; + int shift16, shift32; addr &= 0xff; acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); @@ -893,54 +986,62 @@ acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *p) shift32 = (addr & 3) << 3; switch (addr) { - case 0x28: case 0x29: - /* GLBSTS - Global Status Register (IO) */ - dev->regs.glbsts &= ~((val << shift16) & 0x007f); - break; - case 0x2a: case 0x2b: - /* GLBEN - Global Enable Register (IO) */ - dev->regs.glben = ((dev->regs.glben & ~(0xff << shift16)) | (val << shift16)) & 0x007f; - break; - case 0x30: case 0x31: case 0x32: case 0x33: - /* Primary Activity Detect Status */ - dev->regs.padsts &= ~((val << shift32) & 0x000000fd); - break; - case 0x34: case 0x35: case 0x36: case 0x37: - /* Primary Activity Detect Enable */ - dev->regs.paden = ((dev->regs.paden & ~(0xff << shift32)) | (val << shift32)) & 0x000000fd; - if (dev->trap_update) - dev->trap_update(dev->trap_priv); - break; - case 0x40: - /* GPIO Direction Control */ - if (size == 1) { - dev->regs.gpio_dir = val & 0x7f; - acpi_i2c_set(dev); - } - break; - case 0x42: - /* GPIO port Output Value */ - if (size == 1) { - dev->regs.gpio_val = val & 0x13; - acpi_i2c_set(dev); - } - break; - case 0x46: case 0x47: - /* GPO Port Output Value */ - dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift16)) | (val << shift16)) & 0xffff; - break; - default: - acpi_reg_write_via_common(size, addr, val, p); - break; + case 0x28: + case 0x29: + /* GLBSTS - Global Status Register (IO) */ + dev->regs.glbsts &= ~((val << shift16) & 0x007f); + break; + case 0x2a: + case 0x2b: + /* GLBEN - Global Enable Register (IO) */ + dev->regs.glben = ((dev->regs.glben & ~(0xff << shift16)) | (val << shift16)) & 0x007f; + break; + case 0x30: + case 0x31: + case 0x32: + case 0x33: + /* Primary Activity Detect Status */ + dev->regs.padsts &= ~((val << shift32) & 0x000000fd); + break; + case 0x34: + case 0x35: + case 0x36: + case 0x37: + /* Primary Activity Detect Enable */ + dev->regs.paden = ((dev->regs.paden & ~(0xff << shift32)) | (val << shift32)) & 0x000000fd; + if (dev->trap_update) + dev->trap_update(dev->trap_priv); + break; + case 0x40: + /* GPIO Direction Control */ + if (size == 1) { + dev->regs.gpio_dir = val & 0x7f; + acpi_i2c_set(dev); + } + break; + case 0x42: + /* GPIO port Output Value */ + if (size == 1) { + dev->regs.gpio_val = val & 0x13; + acpi_i2c_set(dev); + } + break; + case 0x46: + case 0x47: + /* GPO Port Output Value */ + dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift16)) | (val << shift16)) & 0xffff; + break; + default: + acpi_reg_write_via_common(size, addr, val, p); + break; } } - static void acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; - int shift16, shift32; + int shift16, shift32; addr &= 0x7f; acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); @@ -948,41 +1049,51 @@ acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *p) shift32 = (addr & 3) << 3; switch (addr) { - case 0x28: case 0x29: - /* GLBSTS - Global Status Register (IO) */ - dev->regs.glbsts &= ~((val << shift16) & 0xfdff); - break; - case 0x2a: case 0x2b: - /* GLBEN - Global Enable Register (IO) */ - dev->regs.glben = ((dev->regs.glben & ~(0xff << shift16)) | (val << shift16)) & 0xfdff; - break; - case 0x30: case 0x31: case 0x32: case 0x33: - /* Primary Activity Detect Status */ - dev->regs.padsts &= ~((val << shift32) & 0x000007ff); - break; - case 0x34: case 0x35: case 0x36: case 0x37: - /* Primary Activity Detect Enable */ - dev->regs.paden = ((dev->regs.paden & ~(0xff << shift32)) | (val << shift32)) & 0x000007ff; - if (dev->trap_update) - dev->trap_update(dev->trap_priv); - break; - case 0x40: /* Extended I/O Trap Status (686A/B) */ - dev->regs.extiotrapsts &= ~(val & 0x13); - break; - case 0x42: /* Extended I/O Trap Enable (686A/B) */ - dev->regs.extiotrapen = val & 0x13; - break; - case 0x4c: case 0x4d: case 0x4e: case 0x4f: - /* GPO Port Output Value */ - dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift32)) | (val << shift32)) & 0x7fffffff; - break; - default: - acpi_reg_write_via_common(size, addr, val, p); - break; + case 0x28: + case 0x29: + /* GLBSTS - Global Status Register (IO) */ + dev->regs.glbsts &= ~((val << shift16) & 0xfdff); + break; + case 0x2a: + case 0x2b: + /* GLBEN - Global Enable Register (IO) */ + dev->regs.glben = ((dev->regs.glben & ~(0xff << shift16)) | (val << shift16)) & 0xfdff; + break; + case 0x30: + case 0x31: + case 0x32: + case 0x33: + /* Primary Activity Detect Status */ + dev->regs.padsts &= ~((val << shift32) & 0x000007ff); + break; + case 0x34: + case 0x35: + case 0x36: + case 0x37: + /* Primary Activity Detect Enable */ + dev->regs.paden = ((dev->regs.paden & ~(0xff << shift32)) | (val << shift32)) & 0x000007ff; + if (dev->trap_update) + dev->trap_update(dev->trap_priv); + break; + case 0x40: /* Extended I/O Trap Status (686A/B) */ + dev->regs.extiotrapsts &= ~(val & 0x13); + break; + case 0x42: /* Extended I/O Trap Enable (686A/B) */ + dev->regs.extiotrapen = val & 0x13; + break; + case 0x4c: + case 0x4d: + case 0x4e: + case 0x4f: + /* GPO Port Output Value */ + dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift32)) | (val << shift32)) & 0x7fffffff; + break; + default: + acpi_reg_write_via_common(size, addr, val, p); + break; } } - static void acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p) { @@ -994,61 +1105,62 @@ acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p) acpi_reg_write_common_regs(size, addr, val, p); /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) - dev->regs.glbctl &= ~0x0001; + dev->regs.glbctl &= ~0x0001; else if ((addr == 0x04) && (dev->regs.pmcntrl & 0x0004)) { - dev->regs.glbsts |= 0x01; - if (dev->regs.glben & 0x01) - acpi_raise_smi(dev, 1); + dev->regs.glbsts |= 0x01; + if (dev->regs.glben & 0x01) + acpi_raise_smi(dev, 1); } } - static void acpi_aux_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; - int shift16; + int shift16; addr &= 0x07; acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); shift16 = (addr & 1) << 3; switch (addr) { - case 0x00: case 0x01: - /* SCI Status Register */ - dev->regs.gpscists &= ~((val << shift16) & 0x000c); - break; - case 0x02: case 0x03: - /* SCI Enable Register */ - dev->regs.gpscien = ((dev->regs.gpscien & ~(0xff << shift16)) | (val << shift16)) & 0x3fff; - break; - case 0x04: case 0x05: - /* Miscellanous Status Register */ - dev->regs.glbsts &= ~((val << shift16) & 0x001f); - break; - case 0x06: - /* Miscellaneous Enable Register */ - dev->regs.glben = (uint16_t) (val & 0x03); - break; - case 0x07: - /* Miscellaneous Control Register */ - dev->regs.glbctl = (uint16_t) (val & 0x03); - /* Setting BIOS_RLS also sets GBL_STS and generates SMI. */ - if (dev->regs.glbctl & 0x0001) { - dev->regs.pmsts |= 0x20; - if (dev->regs.pmen & 0x20) - acpi_update_irq(dev); - } - if (dev->regs.glbctl & 0x0002) { - dev->regs.pmsts |= 0x10; - if (dev->regs.pmcntrl & 0x02) - acpi_update_irq(dev); - } - break; + case 0x00: + case 0x01: + /* SCI Status Register */ + dev->regs.gpscists &= ~((val << shift16) & 0x000c); + break; + case 0x02: + case 0x03: + /* SCI Enable Register */ + dev->regs.gpscien = ((dev->regs.gpscien & ~(0xff << shift16)) | (val << shift16)) & 0x3fff; + break; + case 0x04: + case 0x05: + /* Miscellanous Status Register */ + dev->regs.glbsts &= ~((val << shift16) & 0x001f); + break; + case 0x06: + /* Miscellaneous Enable Register */ + dev->regs.glben = (uint16_t) (val & 0x03); + break; + case 0x07: + /* Miscellaneous Control Register */ + dev->regs.glbctl = (uint16_t) (val & 0x03); + /* Setting BIOS_RLS also sets GBL_STS and generates SMI. */ + if (dev->regs.glbctl & 0x0001) { + dev->regs.pmsts |= 0x20; + if (dev->regs.pmen & 0x20) + acpi_update_irq(dev); + } + if (dev->regs.glbctl & 0x0002) { + dev->regs.pmsts |= 0x10; + if (dev->regs.pmcntrl & 0x02) + acpi_update_irq(dev); + } + break; } } - static uint32_t acpi_reg_read_common(int size, uint16_t addr, void *p) { @@ -1056,38 +1168,36 @@ acpi_reg_read_common(int size, uint16_t addr, void *p) uint8_t ret = 0xff; if (dev->vendor == VEN_ALI) - ret = acpi_reg_read_ali(size, addr, p); + ret = acpi_reg_read_ali(size, addr, p); else if (dev->vendor == VEN_VIA) - ret = acpi_reg_read_via(size, addr, p); + ret = acpi_reg_read_via(size, addr, p); else if (dev->vendor == VEN_VIA_596B) - ret = acpi_reg_read_via_596b(size, addr, p); + ret = acpi_reg_read_via_596b(size, addr, p); else if (dev->vendor == VEN_INTEL) - ret = acpi_reg_read_intel(size, addr, p); + ret = acpi_reg_read_intel(size, addr, p); else if (dev->vendor == VEN_SMC) - ret = acpi_reg_read_smc(size, addr, p); + ret = acpi_reg_read_smc(size, addr, p); return ret; } - static void acpi_reg_write_common(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; if (dev->vendor == VEN_ALI) - acpi_reg_write_ali(size, addr, val, p); + acpi_reg_write_ali(size, addr, val, p); else if (dev->vendor == VEN_VIA) - acpi_reg_write_via(size, addr, val, p); + acpi_reg_write_via(size, addr, val, p); else if (dev->vendor == VEN_VIA_596B) - acpi_reg_write_via_596b(size, addr, val, p); + acpi_reg_write_via_596b(size, addr, val, p); else if (dev->vendor == VEN_INTEL) - acpi_reg_write_intel(size, addr, val, p); + acpi_reg_write_intel(size, addr, val, p); else if (dev->vendor == VEN_SMC) - acpi_reg_write_smc(size, addr, val, p); + acpi_reg_write_smc(size, addr, val, p); } - static uint32_t acpi_aux_reg_read_common(int size, uint16_t addr, void *p) { @@ -1095,22 +1205,20 @@ acpi_aux_reg_read_common(int size, uint16_t addr, void *p) uint8_t ret = 0xff; if (dev->vendor == VEN_SMC) - ret = acpi_aux_reg_read_smc(size, addr, p); + ret = acpi_aux_reg_read_smc(size, addr, p); return ret; } - static void acpi_aux_reg_write_common(int size, uint16_t addr, uint8_t val, void *p) { acpi_t *dev = (acpi_t *) p; if (dev->vendor == VEN_SMC) - acpi_aux_reg_write_smc(size, addr, val, p); + acpi_aux_reg_write_smc(size, addr, val, p); } - static uint32_t acpi_reg_readl(uint16_t addr, void *p) { @@ -1126,7 +1234,6 @@ acpi_reg_readl(uint16_t addr, void *p) return ret; } - static uint16_t acpi_reg_readw(uint16_t addr, void *p) { @@ -1140,7 +1247,6 @@ acpi_reg_readw(uint16_t addr, void *p) return ret; } - static uint8_t acpi_reg_read(uint16_t addr, void *p) { @@ -1153,7 +1259,6 @@ acpi_reg_read(uint16_t addr, void *p) return ret; } - static uint32_t acpi_aux_reg_readl(uint16_t addr, void *p) { @@ -1169,7 +1274,6 @@ acpi_aux_reg_readl(uint16_t addr, void *p) return ret; } - static uint16_t acpi_aux_reg_readw(uint16_t addr, void *p) { @@ -1183,7 +1287,6 @@ acpi_aux_reg_readw(uint16_t addr, void *p) return ret; } - static uint8_t acpi_aux_reg_read(uint16_t addr, void *p) { @@ -1196,7 +1299,6 @@ acpi_aux_reg_read(uint16_t addr, void *p) return ret; } - static void acpi_reg_writel(uint16_t addr, uint32_t val, void *p) { @@ -1208,7 +1310,6 @@ acpi_reg_writel(uint16_t addr, uint32_t val, void *p) acpi_reg_write_common(4, addr + 3, (val >> 24) & 0xff, p); } - static void acpi_reg_writew(uint16_t addr, uint16_t val, void *p) { @@ -1218,7 +1319,6 @@ acpi_reg_writew(uint16_t addr, uint16_t val, void *p) acpi_reg_write_common(2, addr + 1, (val >> 8) & 0xff, p); } - static void acpi_reg_write(uint16_t addr, uint8_t val, void *p) { @@ -1227,7 +1327,6 @@ acpi_reg_write(uint16_t addr, uint8_t val, void *p) acpi_reg_write_common(1, addr, val, p); } - static void acpi_aux_reg_writel(uint16_t addr, uint32_t val, void *p) { @@ -1239,7 +1338,6 @@ acpi_aux_reg_writel(uint16_t addr, uint32_t val, void *p) acpi_aux_reg_write_common(4, addr + 3, (val >> 24) & 0xff, p); } - static void acpi_aux_reg_writew(uint16_t addr, uint16_t val, void *p) { @@ -1249,7 +1347,6 @@ acpi_aux_reg_writew(uint16_t addr, uint16_t val, void *p) acpi_aux_reg_write_common(2, addr + 1, (val >> 8) & 0xff, p); } - static void acpi_aux_reg_write(uint16_t addr, uint8_t val, void *p) { @@ -1258,75 +1355,73 @@ acpi_aux_reg_write(uint16_t addr, uint8_t val, void *p) acpi_aux_reg_write_common(1, addr, val, p); } - void acpi_update_io_mapping(acpi_t *dev, uint32_t base, int chipset_en) { int size; switch (dev->vendor) { - case VEN_ALI: - case VEN_INTEL: - default: - size = 0x040; - break; - case VEN_SMC: - size = 0x010; - break; - case VEN_VIA: - size = 0x100; - break; - case VEN_VIA_596B: - size = 0x080; - break; + case VEN_ALI: + case VEN_INTEL: + default: + size = 0x040; + break; + case VEN_SMC: + size = 0x010; + break; + case VEN_VIA: + size = 0x100; + break; + case VEN_VIA_596B: + size = 0x080; + break; } acpi_log("ACPI: Update I/O %04X to %04X (%sabled)\n", dev->io_base, base, chipset_en ? "en" : "dis"); if (dev->io_base != 0x0000) { - io_removehandler(dev->io_base, size, - acpi_reg_read, acpi_reg_readw, acpi_reg_readl, - acpi_reg_write, acpi_reg_writew, acpi_reg_writel, dev); + io_removehandler(dev->io_base, size, + acpi_reg_read, acpi_reg_readw, acpi_reg_readl, + acpi_reg_write, acpi_reg_writew, acpi_reg_writel, dev); } dev->io_base = base; if (chipset_en && (dev->io_base != 0x0000)) { - io_sethandler(dev->io_base, size, - acpi_reg_read, acpi_reg_readw, acpi_reg_readl, - acpi_reg_write, acpi_reg_writew, acpi_reg_writel, dev); + io_sethandler(dev->io_base, size, + acpi_reg_read, acpi_reg_readw, acpi_reg_readl, + acpi_reg_write, acpi_reg_writew, acpi_reg_writel, dev); } } - void acpi_update_aux_io_mapping(acpi_t *dev, uint32_t base, int chipset_en) { int size; switch (dev->vendor) { - case VEN_SMC: - size = 0x008; - break; - default: - size = 0x000; - break; + case VEN_SMC: + size = 0x008; + break; + default: + size = 0x000; + break; } acpi_log("ACPI: Update Aux I/O %04X to %04X (%sabled)\n", dev->aux_io_base, base, chipset_en ? "en" : "dis"); if (dev->aux_io_base != 0x0000) { - io_removehandler(dev->aux_io_base, size, - acpi_aux_reg_read, acpi_aux_reg_readw, acpi_aux_reg_readl, - acpi_aux_reg_write, acpi_aux_reg_writew, acpi_aux_reg_writel, dev); + io_removehandler(dev->aux_io_base, size, + acpi_aux_reg_read, acpi_aux_reg_readw, acpi_aux_reg_readl, + acpi_aux_reg_write, acpi_aux_reg_writew, acpi_aux_reg_writel, dev); } dev->aux_io_base = base; if (chipset_en && (dev->aux_io_base != 0x0000)) { - io_sethandler(dev->aux_io_base, size, - acpi_aux_reg_read, acpi_aux_reg_readw, acpi_aux_reg_readl, - acpi_aux_reg_write, acpi_aux_reg_writew, acpi_aux_reg_writel, dev); + io_sethandler(dev->aux_io_base, size, + acpi_aux_reg_read, acpi_aux_reg_readw, acpi_aux_reg_readl, + acpi_aux_reg_write, acpi_aux_reg_writew, acpi_aux_reg_writel, dev); } } @@ -1340,10 +1435,9 @@ acpi_timer_resume(void *priv) /* Nasty workaround for ASUS P2B-LS and potentially others, where the PMCNTRL SMI trap handler clears the resume bit before returning control to the OS. */ if (in_smm) - timer_set_delay_u64(&dev->resume_timer, 50 * TIMER_USEC); + timer_set_delay_u64(&dev->resume_timer, 50 * TIMER_USEC); } - void acpi_init_gporeg(acpi_t *dev, uint8_t val0, uint8_t val1, uint8_t val2, uint8_t val3) { @@ -1354,86 +1448,74 @@ acpi_init_gporeg(acpi_t *dev, uint8_t val0, uint8_t val1, uint8_t val2, uint8_t acpi_log("acpi_init_gporeg(): %02X %02X %02X %02X\n", dev->regs.gporeg[0], dev->regs.gporeg[1], dev->regs.gporeg[2], dev->regs.gporeg[3]); } - void acpi_set_timer32(acpi_t *dev, uint8_t timer32) { dev->regs.timer32 = timer32; } - void acpi_set_slot(acpi_t *dev, int slot) { dev->slot = slot; } - void acpi_set_irq_mode(acpi_t *dev, int irq_mode) { dev->irq_mode = irq_mode; } - void acpi_set_irq_pin(acpi_t *dev, int irq_pin) { dev->irq_pin = irq_pin; } - void acpi_set_irq_line(acpi_t *dev, int irq_line) { dev->irq_line = irq_line; } - void acpi_set_mirq_is_level(acpi_t *dev, int mirq_is_level) { dev->mirq_is_level = mirq_is_level; } - void acpi_set_gpireg2_default(acpi_t *dev, uint8_t gpireg2_default) { dev->gpireg2_default = gpireg2_default; - dev->regs.gpireg[2] = dev->gpireg2_default; + dev->regs.gpireg[2] = dev->gpireg2_default; } - void acpi_set_nvr(acpi_t *dev, nvr_t *nvr) { dev->nvr = nvr; } - void acpi_set_trap_update(acpi_t *dev, void (*update)(void *priv), void *priv) { dev->trap_update = update; - dev->trap_priv = priv; + dev->trap_priv = priv; } - uint8_t acpi_ali_soft_smi_status_read(acpi_t *dev) { return dev->regs.ali_soft_smi = 1; } - void acpi_ali_soft_smi_status_write(acpi_t *dev, uint8_t soft_smi) { dev->regs.ali_soft_smi = soft_smi; } - static void acpi_apm_out(uint16_t port, uint8_t val, void *p) { @@ -1444,27 +1526,26 @@ acpi_apm_out(uint16_t port, uint8_t val, void *p) port &= 0x0001; if (dev->vendor == VEN_ALI) { - if (port == 0x0001) { - acpi_log("ALi SOFT SMI# status set (%i)\n", dev->apm->do_smi); - dev->apm->cmd = val; - // acpi_raise_smi(dev, dev->apm->do_smi); - if (dev->apm->do_smi) - smi_raise(); - dev->regs.ali_soft_smi = 1; - } else if (port == 0x0003) - dev->apm->stat = val; + if (port == 0x0001) { + acpi_log("ALi SOFT SMI# status set (%i)\n", dev->apm->do_smi); + dev->apm->cmd = val; + // acpi_raise_smi(dev, dev->apm->do_smi); + if (dev->apm->do_smi) + smi_raise(); + dev->regs.ali_soft_smi = 1; + } else if (port == 0x0003) + dev->apm->stat = val; } else { - if (port == 0x0000) { - dev->apm->cmd = val; - if (dev->vendor == VEN_INTEL) - dev->regs.glbsts |= 0x20; - acpi_raise_smi(dev, dev->apm->do_smi); - } else - dev->apm->stat = val; + if (port == 0x0000) { + dev->apm->cmd = val; + if (dev->vendor == VEN_INTEL) + dev->regs.glbsts |= 0x20; + acpi_raise_smi(dev, dev->apm->do_smi); + } else + dev->apm->stat = val; } } - static uint8_t acpi_apm_in(uint16_t port, void *p) { @@ -1474,15 +1555,15 @@ acpi_apm_in(uint16_t port, void *p) port &= 0x0001; if (dev->vendor == VEN_ALI) { - if (port == 0x0001) - ret = dev->apm->cmd; - else if (port == 0x0003) - ret = dev->apm->stat; + if (port == 0x0001) + ret = dev->apm->cmd; + else if (port == 0x0003) + ret = dev->apm->stat; } else { - if (port == 0x0000) - ret = dev->apm->cmd; - else - ret = dev->apm->stat; + if (port == 0x0000) + ret = dev->apm->cmd; + else + ret = dev->apm->stat; } acpi_log("[%04X:%08X] APM read: %04X = %02X\n", CS, cpu_state.pc, port, ret); @@ -1490,15 +1571,15 @@ acpi_apm_in(uint16_t port, void *p) return ret; } - static void acpi_reset(void *priv) { acpi_t *dev = (acpi_t *) priv; - int i; + int i; memset(&dev->regs, 0x00, sizeof(acpi_regs_t)); - dev->regs.gpireg[0] = 0xff; dev->regs.gpireg[1] = 0xff; + dev->regs.gpireg[0] = 0xff; + dev->regs.gpireg[1] = 0xff; /* A-Trend ATC7020BXII: - Bit 3: 80-conductor cable on secondary IDE channel (active low) - Bit 2: 80-conductor cable on primary IDE channel (active low) @@ -1506,29 +1587,29 @@ acpi_reset(void *priv) - Bit 1: CMOS battery low (active high) */ dev->regs.gpireg[2] = dev->gpireg2_default; for (i = 0; i < 4; i++) - dev->regs.gporeg[i] = dev->gporeg_default[i]; + dev->regs.gporeg[i] = dev->gporeg_default[i]; if (dev->vendor == VEN_VIA_596B) { - dev->regs.gpo_val = 0x7fffffff; - /* FIC VA-503A: - - Bit 11: ATX power (active high) - - Bit 4: 80-conductor cable on primary IDE channel (active low) - - Bit 3: 80-conductor cable on secondary IDE channel (active low) - - Bit 2: password cleared (active low) - ASUS P3V4X: - - Bit 15: 80-conductor cable on secondary IDE channel (active low) - - Bit 5: 80-conductor cable on primary IDE channel (active low) - BCM GT694VA: - - Bit 19: 80-conductor cable on secondary IDE channel (active low) - - Bit 17: 80-conductor cable on primary IDE channel (active low) - ASUS CUV4X-LS: - - Bit 2: 80-conductor cable on secondary IDE channel (active low) - - Bit 1: 80-conductor cable on primary IDE channel (active low) - Acorp 6VIA90AP: - - Bit 3: 80-conductor cable on secondary IDE channel (active low) - - Bit 1: 80-conductor cable on primary IDE channel (active low) */ - dev->regs.gpi_val = 0xfff57fc1; - if (!strcmp(machine_get_internal_name(), "ficva503a") || !strcmp(machine_get_internal_name(), "6via90ap")) - dev->regs.gpi_val |= 0x00000004; + dev->regs.gpo_val = 0x7fffffff; + /* FIC VA-503A: + - Bit 11: ATX power (active high) + - Bit 4: 80-conductor cable on primary IDE channel (active low) + - Bit 3: 80-conductor cable on secondary IDE channel (active low) + - Bit 2: password cleared (active low) + ASUS P3V4X: + - Bit 15: 80-conductor cable on secondary IDE channel (active low) + - Bit 5: 80-conductor cable on primary IDE channel (active low) + BCM GT694VA: + - Bit 19: 80-conductor cable on secondary IDE channel (active low) + - Bit 17: 80-conductor cable on primary IDE channel (active low) + ASUS CUV4X-LS: + - Bit 2: 80-conductor cable on secondary IDE channel (active low) + - Bit 1: 80-conductor cable on primary IDE channel (active low) + Acorp 6VIA90AP: + - Bit 3: 80-conductor cable on secondary IDE channel (active low) + - Bit 1: 80-conductor cable on primary IDE channel (active low) */ + dev->regs.gpi_val = 0xfff57fc1; + if (!strcmp(machine_get_internal_name(), "ficva503a") || !strcmp(machine_get_internal_name(), "6via90ap")) + dev->regs.gpi_val |= 0x00000004; } /* Power on always generates a resume event. */ @@ -1537,12 +1618,11 @@ acpi_reset(void *priv) acpi_rtc_status = 0; } - static void acpi_speed_changed(void *priv) { - acpi_t *dev = (acpi_t *) priv; - cpu_to_acpi = ACPI_TIMER_FREQ / cpuclock; + acpi_t *dev = (acpi_t *) priv; + cpu_to_acpi = ACPI_TIMER_FREQ / cpuclock; bool timer_enabled = timer_is_enabled(&dev->timer); timer_stop(&dev->timer); @@ -1550,16 +1630,15 @@ acpi_speed_changed(void *priv) timer_on_auto(&dev->timer, acpi_get_overflow_period(dev)); } - static void acpi_close(void *priv) { acpi_t *dev = (acpi_t *) priv; if (dev->i2c) { - if (i2c_smbus == i2c_gpio_get_bus(dev->i2c)) - i2c_smbus = NULL; - i2c_gpio_close(dev->i2c); + if (i2c_smbus == i2c_gpio_get_bus(dev->i2c)) + i2c_smbus = NULL; + i2c_gpio_close(dev->i2c); } timer_stop(&dev->timer); @@ -1567,14 +1646,14 @@ acpi_close(void *priv) free(dev); } - static void * acpi_init(const device_t *info) { acpi_t *dev; - dev = (acpi_t *)malloc(sizeof(acpi_t)); - if (dev == NULL) return(NULL); + dev = (acpi_t *) malloc(sizeof(acpi_t)); + if (dev == NULL) + return (NULL); memset(dev, 0x00, sizeof(acpi_t)); cpu_to_acpi = ACPI_TIMER_FREQ / cpuclock; @@ -1583,47 +1662,47 @@ acpi_init(const device_t *info) dev->irq_line = 9; if ((dev->vendor == VEN_INTEL) || (dev->vendor == VEN_ALI)) { - if (dev->vendor == VEN_ALI) - dev->irq_mode = 2; - dev->apm = device_add(&apm_pci_acpi_device); - if (dev->vendor == VEN_ALI) { - acpi_log("Setting I/O handler at port B1\n"); - io_sethandler(0x00b1, 0x0003, acpi_apm_in, NULL, NULL, acpi_apm_out, NULL, NULL, dev); - } else - io_sethandler(0x00b2, 0x0002, acpi_apm_in, NULL, NULL, acpi_apm_out, NULL, NULL, dev); + if (dev->vendor == VEN_ALI) + dev->irq_mode = 2; + dev->apm = device_add(&apm_pci_acpi_device); + if (dev->vendor == VEN_ALI) { + acpi_log("Setting I/O handler at port B1\n"); + io_sethandler(0x00b1, 0x0003, acpi_apm_in, NULL, NULL, acpi_apm_out, NULL, NULL, dev); + } else + io_sethandler(0x00b2, 0x0002, acpi_apm_in, NULL, NULL, acpi_apm_out, NULL, NULL, dev); } else if (dev->vendor == VEN_VIA) { - dev->i2c = i2c_gpio_init("smbus_vt82c586b"); - i2c_smbus = i2c_gpio_get_bus(dev->i2c); + dev->i2c = i2c_gpio_init("smbus_vt82c586b"); + i2c_smbus = i2c_gpio_get_bus(dev->i2c); } switch (dev->vendor) { - case VEN_ALI: - dev->suspend_types[0] = SUS_POWER_OFF; - dev->suspend_types[1] = SUS_POWER_OFF; - dev->suspend_types[2] = SUS_SUSPEND | SUS_NVR | SUS_RESET_CPU | SUS_RESET_PCI; - dev->suspend_types[3] = SUS_SUSPEND; - break; + case VEN_ALI: + dev->suspend_types[0] = SUS_POWER_OFF; + dev->suspend_types[1] = SUS_POWER_OFF; + dev->suspend_types[2] = SUS_SUSPEND | SUS_NVR | SUS_RESET_CPU | SUS_RESET_PCI; + dev->suspend_types[3] = SUS_SUSPEND; + break; - case VEN_VIA: - dev->suspend_types[0] = SUS_POWER_OFF; - dev->suspend_types[2] = SUS_SUSPEND; - break; + case VEN_VIA: + dev->suspend_types[0] = SUS_POWER_OFF; + dev->suspend_types[2] = SUS_SUSPEND; + break; - case VEN_VIA_596B: - dev->suspend_types[1] = SUS_SUSPEND | SUS_NVR | SUS_RESET_CPU | SUS_RESET_PCI; - dev->suspend_types[2] = SUS_POWER_OFF; - dev->suspend_types[4] = SUS_SUSPEND; - dev->suspend_types[5] = SUS_SUSPEND | SUS_RESET_CPU; - dev->suspend_types[6] = SUS_SUSPEND | SUS_RESET_CPU | SUS_RESET_PCI; - break; + case VEN_VIA_596B: + dev->suspend_types[1] = SUS_SUSPEND | SUS_NVR | SUS_RESET_CPU | SUS_RESET_PCI; + dev->suspend_types[2] = SUS_POWER_OFF; + dev->suspend_types[4] = SUS_SUSPEND; + dev->suspend_types[5] = SUS_SUSPEND | SUS_RESET_CPU; + dev->suspend_types[6] = SUS_SUSPEND | SUS_RESET_CPU | SUS_RESET_PCI; + break; - case VEN_INTEL: - dev->suspend_types[0] = SUS_POWER_OFF; - dev->suspend_types[1] = SUS_SUSPEND | SUS_NVR | SUS_RESET_CPU | SUS_RESET_PCI; - dev->suspend_types[2] = SUS_SUSPEND | SUS_RESET_CPU; - dev->suspend_types[3] = SUS_SUSPEND | SUS_RESET_CACHE; - dev->suspend_types[4] = SUS_SUSPEND; - break; + case VEN_INTEL: + dev->suspend_types[0] = SUS_POWER_OFF; + dev->suspend_types[1] = SUS_SUSPEND | SUS_NVR | SUS_RESET_CPU | SUS_RESET_PCI; + dev->suspend_types[2] = SUS_SUSPEND | SUS_RESET_CPU; + dev->suspend_types[3] = SUS_SUSPEND | SUS_RESET_CACHE; + dev->suspend_types[4] = SUS_SUSPEND; + break; } timer_add(&dev->timer, acpi_timer_overflow, dev, 0); @@ -1635,71 +1714,71 @@ acpi_init(const device_t *info) } const device_t acpi_ali_device = { - .name = "ALi M7101 ACPI", + .name = "ALi M7101 ACPI", .internal_name = "acpi_ali", - .flags = DEVICE_PCI, - .local = VEN_ALI, - .init = acpi_init, - .close = acpi_close, - .reset = acpi_reset, + .flags = DEVICE_PCI, + .local = VEN_ALI, + .init = acpi_init, + .close = acpi_close, + .reset = acpi_reset, { .available = NULL }, .speed_changed = acpi_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t acpi_intel_device = { - .name = "Intel ACPI", + .name = "Intel ACPI", .internal_name = "acpi_intel", - .flags = DEVICE_PCI, - .local = VEN_INTEL, - .init = acpi_init, - .close = acpi_close, - .reset = acpi_reset, + .flags = DEVICE_PCI, + .local = VEN_INTEL, + .init = acpi_init, + .close = acpi_close, + .reset = acpi_reset, { .available = NULL }, .speed_changed = acpi_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t acpi_via_device = { - .name = "VIA ACPI", + .name = "VIA ACPI", .internal_name = "acpi_via", - .flags = DEVICE_PCI, - .local = VEN_VIA, - .init = acpi_init, - .close = acpi_close, - .reset = acpi_reset, + .flags = DEVICE_PCI, + .local = VEN_VIA, + .init = acpi_init, + .close = acpi_close, + .reset = acpi_reset, { .available = NULL }, .speed_changed = acpi_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t acpi_via_596b_device = { - .name = "VIA VT82C596 ACPI", + .name = "VIA VT82C596 ACPI", .internal_name = "acpi_via_596b", - .flags = DEVICE_PCI, - .local = VEN_VIA_596B, - .init = acpi_init, - .close = acpi_close, - .reset = acpi_reset, + .flags = DEVICE_PCI, + .local = VEN_VIA_596B, + .init = acpi_init, + .close = acpi_close, + .reset = acpi_reset, { .available = NULL }, .speed_changed = acpi_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t acpi_smc_device = { - .name = "SMC FDC73C931APM ACPI", + .name = "SMC FDC73C931APM ACPI", .internal_name = "acpi_smc", - .flags = DEVICE_PCI, - .local = VEN_SMC, - .init = acpi_init, - .close = acpi_close, - .reset = acpi_reset, + .flags = DEVICE_PCI, + .local = VEN_SMC, + .init = acpi_init, + .close = acpi_close, + .reset = acpi_reset, { .available = NULL }, .speed_changed = acpi_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/apm.c b/src/apm.c index 3fe8d54c6..d4e85d837 100644 --- a/src/apm.c +++ b/src/apm.c @@ -27,34 +27,30 @@ #include <86box/io.h> #include <86box/apm.h> - #ifdef ENABLE_APM_LOG int apm_do_log = ENABLE_APM_LOG; - static void apm_log(const char *fmt, ...) { va_list ap; if (apm_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define apm_log(fmt, ...) +# define apm_log(fmt, ...) #endif - void apm_set_do_smi(apm_t *dev, uint8_t do_smi) { dev->do_smi = do_smi; } - static void apm_out(uint16_t port, uint8_t val, void *p) { @@ -65,102 +61,98 @@ apm_out(uint16_t port, uint8_t val, void *p) port &= 0x0001; if (port == 0x0000) { - dev->cmd = val; - if (dev->do_smi) - smi_raise(); + dev->cmd = val; + if (dev->do_smi) + smi_raise(); } else - dev->stat = val; + dev->stat = val; } - static uint8_t apm_in(uint16_t port, void *p) { - apm_t *dev = (apm_t *) p; + apm_t *dev = (apm_t *) p; uint8_t ret = 0xff; port &= 0x0001; if (port == 0x0000) - ret = dev->cmd; + ret = dev->cmd; else - ret = dev->stat; + ret = dev->stat; apm_log("[%04X:%08X] APM read: %04X = %02X\n", CS, cpu_state.pc, port, ret); return ret; } - static void apm_reset(void *p) { - apm_t *dev = (apm_t *)p; + apm_t *dev = (apm_t *) p; dev->cmd = dev->stat = 0x00; } - static void apm_close(void *p) { - apm_t *dev = (apm_t *)p; + apm_t *dev = (apm_t *) p; free(dev); } - static void -*apm_init(const device_t *info) + * + apm_init(const device_t *info) { apm_t *dev = (apm_t *) malloc(sizeof(apm_t)); memset(dev, 0, sizeof(apm_t)); if (info->local == 0) - io_sethandler(0x00b2, 0x0002, apm_in, NULL, NULL, apm_out, NULL, NULL, dev); + io_sethandler(0x00b2, 0x0002, apm_in, NULL, NULL, apm_out, NULL, NULL, dev); return dev; } - const device_t apm_device = { - .name = "Advanced Power Management", + .name = "Advanced Power Management", .internal_name = "apm", - .flags = 0, - .local = 0, - .init = apm_init, - .close = apm_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = apm_init, + .close = apm_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t apm_pci_device = { - .name = "Advanced Power Management (PCI)", + .name = "Advanced Power Management (PCI)", .internal_name = "apm_pci", - .flags = DEVICE_PCI, - .local = 0, - .init = apm_init, - .close = apm_close, - .reset = apm_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = apm_init, + .close = apm_close, + .reset = apm_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t apm_pci_acpi_device = { - .name = "Advanced Power Management (PCI)", + .name = "Advanced Power Management (PCI)", .internal_name = "apm_pci_acpi", - .flags = DEVICE_PCI, - .local = 1, - .init = apm_init, - .close = apm_close, - .reset = apm_reset, + .flags = DEVICE_PCI, + .local = 1, + .init = apm_init, + .close = apm_close, + .reset = apm_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/arch_detect.c b/src/arch_detect.c index 03d3b61e7..42ebde095 100644 --- a/src/arch_detect.c +++ b/src/arch_detect.c @@ -16,12 +16,12 @@ */ #if defined(__arm__) || defined(__TARGET_ARCH_ARM) - #error ARCH arm +# error ARCH arm #elif defined(__aarch64__) || defined(_M_ARM64) - #error ARCH arm64 +# error ARCH arm64 #elif defined(__i386) || defined(__i386__) || defined(_M_IX86) - #error ARCH i386 +# error ARCH i386 #elif defined(__x86_64) || defined(__x86_64__) || defined(__amd64) || defined(_M_X64) - #error ARCH x86_64 +# error ARCH x86_64 #endif #error ARCH unknown diff --git a/src/config.c b/src/config.c index 69c4e7c6b..f9fa81945 100644 --- a/src/config.c +++ b/src/config.c @@ -73,8 +73,7 @@ #include <86box/ui.h> #include <86box/snd_opl.h> - -static int cx, cy, cw, ch; +static int cx, cy, cw, ch; static ini_t config; /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ @@ -104,8 +103,8 @@ static void load_general(void) { ini_section_t cat = ini_find_section(config, "General"); - char temp[512]; - char *p; + char temp[512]; + char *p; vid_resize = ini_section_get_int(cat, "vid_resize", 0); if (vid_resize & ~3) @@ -201,13 +200,13 @@ load_general(void) window_remember = ini_section_get_int(cat, "window_remember", 0); if (window_remember) { - p = ini_section_get_string(cat, "window_coordinates", NULL); - if (p == NULL) - p = "0, 0, 0, 0"; - sscanf(p, "%i, %i, %i, %i", &cw, &ch, &cx, &cy); + p = ini_section_get_string(cat, "window_coordinates", NULL); + if (p == NULL) + p = "0, 0, 0, 0"; + sscanf(p, "%i, %i, %i, %i", &cw, &ch, &cx, &cy); } else { - cw = ch = cx = cy = 0; - ini_section_delete_var(cat, "window_remember"); + cw = ch = cx = cy = 0; + ini_section_delete_var(cat, "window_remember"); } ini_section_delete_var(cat, "window_coordinates"); @@ -218,8 +217,8 @@ static void load_monitor(int monitor_index) { ini_section_t cat; - char name[512], temp[512]; - char *p = NULL; + char name[512], temp[512]; + char *p = NULL; sprintf(name, "Monitor #%i", monitor_index + 1); sprintf(temp, "%i, %i, %i, %i", cx, cy, cw, ch); @@ -229,7 +228,7 @@ load_monitor(int monitor_index) p = ini_section_get_string(cat, "window_coordinates", NULL); if (p == NULL) - p = temp; + p = temp; if (window_remember) { sscanf(p, "%i, %i, %i, %i", @@ -245,10 +244,10 @@ load_monitor(int monitor_index) static void load_machine(void) { - ini_section_t cat = ini_find_section(config, "Machine"); - char *p, *migrate_from = NULL; - int c, i, j, speed, legacy_mfg, legacy_cpu; - double multi; + ini_section_t cat = ini_find_section(config, "Machine"); + char *p, *migrate_from = NULL; + int c, i, j, speed, legacy_mfg, legacy_cpu; + double multi; p = ini_section_get_string(cat, "machine", NULL); if (p != NULL) { @@ -525,8 +524,8 @@ static void load_video(void) { ini_section_t cat = ini_find_section(config, "Video"); - char *p; - int free_p = 0; + char *p; + int free_p = 0; if (machine_has_flags(machine, MACHINE_VIDEO_ONLY)) { ini_section_delete_var(cat, "gfxcard"); @@ -551,13 +550,13 @@ load_video(void) free(p); } - voodoo_enabled = !!ini_section_get_int(cat, "voodoo", 0); - ibm8514_enabled = !!ini_section_get_int(cat, "8514a", 0); - xga_enabled = !!ini_section_get_int(cat, "xga", 0); - show_second_monitors = !!ini_section_get_int(cat, "show_second_monitors", 1); + voodoo_enabled = !!ini_section_get_int(cat, "voodoo", 0); + ibm8514_enabled = !!ini_section_get_int(cat, "8514a", 0); + xga_enabled = !!ini_section_get_int(cat, "xga", 0); + show_second_monitors = !!ini_section_get_int(cat, "show_second_monitors", 1); video_fullscreen_scale_maximized = !!ini_section_get_int(cat, "video_fullscreen_scale_maximized", 0); - - p = ini_section_get_string(cat, "gfxcard_2", NULL); + + p = ini_section_get_string(cat, "gfxcard_2", NULL); if (!p) p = "none"; gfxcard_2 = video_get_video_from_internal_name(p); @@ -568,9 +567,9 @@ static void load_input_devices(void) { ini_section_t cat = ini_find_section(config, "Input devices"); - char temp[512]; - int c, d; - char *p; + char temp[512]; + int c, d; + char *p; p = ini_section_get_string(cat, "mouse_type", NULL); if (p != NULL) @@ -658,8 +657,8 @@ static void load_sound(void) { ini_section_t cat = ini_find_section(config, "Sound"); - char temp[512]; - char *p; + char temp[512]; + char *p; p = ini_section_get_string(cat, "sndcard", NULL); /* FIXME: Hack to not break configs with the Sound Blaster 128 PCI set. */ @@ -712,9 +711,9 @@ static void load_network(void) { ini_section_t cat = ini_find_section(config, "Network"); - char *p; - char temp[512]; - int c = 0, min = 0; + char *p; + char temp[512]; + int c = 0, min = 0; /* Handle legacy configuration which supported only one NIC */ p = ini_section_get_string(cat, "net_card", NULL); @@ -796,10 +795,9 @@ load_network(void) strcpy(net_cards_conf[c].host_dev_name, "none"); } - sprintf(temp, "net_%02i_link", c +1); + sprintf(temp, "net_%02i_link", c + 1); net_cards_conf[c].link_state = ini_section_get_int(cat, temp, - (NET_LINK_10_HD|NET_LINK_10_FD|NET_LINK_100_HD|NET_LINK_100_FD|NET_LINK_1000_HD|NET_LINK_1000_FD)); - + (NET_LINK_10_HD | NET_LINK_10_FD | NET_LINK_100_HD | NET_LINK_100_FD | NET_LINK_1000_HD | NET_LINK_1000_FD)); } } @@ -808,9 +806,9 @@ static void load_ports(void) { ini_section_t cat = ini_find_section(config, "Ports (COM & LPT)"); - char *p; - char temp[512]; - int c, d; + char *p; + char temp[512]; + int c, d; for (c = 0; c < SERIAL_MAX; c++) { sprintf(temp, "serial%d_enabled", c + 1); @@ -846,9 +844,9 @@ static void load_storage_controllers(void) { ini_section_t cat = ini_find_section(config, "Storage controllers"); - char *p, temp[512]; - int c, min = 0; - int free_p = 0; + char *p, temp[512]; + int c, min = 0; + int free_p = 0; /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ backwards_compat2 = (cat == NULL); @@ -959,13 +957,13 @@ load_storage_controllers(void) static void load_hard_disks(void) { - ini_section_t cat = ini_find_section(config, "Hard disks"); - char temp[512], tmp2[512]; - char s[512]; - int c; - char *p; - uint32_t max_spt, max_hpc, max_tracks; - uint32_t board = 0, dev = 0; + ini_section_t cat = ini_find_section(config, "Hard disks"); + char temp[512], tmp2[512]; + char s[512]; + int c; + char *p; + uint32_t max_spt, max_hpc, max_tracks; + uint32_t board = 0, dev = 0; memset(temp, '\0', sizeof(temp)); for (c = 0; c < HDD_NUM; c++) { @@ -1161,8 +1159,8 @@ static void load_floppy_drives(void) { ini_section_t cat = ini_find_section(config, "Floppy drives"); - char temp[512], *p; - int c; + char temp[512], *p; + int c; if (!backwards_compat) return; @@ -1221,11 +1219,11 @@ load_floppy_drives(void) static void load_floppy_and_cdrom_drives(void) { - ini_section_t cat = ini_find_section(config, "Floppy and CD-ROM drives"); - char temp[512], tmp2[512], *p; - char s[512]; - unsigned int board = 0, dev = 0; - int c, d = 0; + ini_section_t cat = ini_find_section(config, "Floppy and CD-ROM drives"); + char temp[512], tmp2[512], *p; + char s[512]; + unsigned int board = 0, dev = 0; + int c, d = 0; /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ backwards_compat = (cat == NULL); @@ -1415,7 +1413,7 @@ load_floppy_and_cdrom_drives(void) cdrom[c].image_history[i] = (char *) calloc(MAX_IMAGE_PATH_LEN + 1, sizeof(char)); sprintf(temp, "cdrom_%02i_image_history_%02i", c + 1, i + 1); p = ini_section_get_string(cat, temp, NULL); - if(p) { + if (p) { sprintf(cdrom[c].image_history[i], "%s", p); } } @@ -1427,10 +1425,10 @@ static void load_other_removable_devices(void) { ini_section_t cat = ini_find_section(config, "Other removable devices"); - char temp[512], tmp2[512], *p; - char s[512]; - unsigned int board = 0, dev = 0; - int c, d = 0; + char temp[512], tmp2[512], *p; + char s[512]; + unsigned int board = 0, dev = 0; + int c, d = 0; /* TODO: Backwards compatibility, get rid of this when enough time has passed. */ if (backwards_compat) { @@ -1703,9 +1701,9 @@ static void load_other_peripherals(void) { ini_section_t cat = ini_find_section(config, "Other peripherals"); - char *p; - char temp[512]; - int c, free_p = 0; + char *p; + char temp[512]; + int c, free_p = 0; if (backwards_compat2) { p = ini_section_get_string(cat, "scsicard", NULL); @@ -1882,7 +1880,7 @@ static void save_general(void) { ini_section_t cat = ini_find_or_create_section(config, "General"); - char temp[512], buffer[512] = { 0 }; + char temp[512], buffer[512] = { 0 }; char *va_name; @@ -2058,8 +2056,8 @@ save_monitor(int monitor_index) snprintf(cat, sizeof(cat), "Monitor #%i", monitor_index + 1); if (window_remember) { sprintf(temp, "%i, %i, %i, %i", - monitor_settings[monitor_index].mon_window_x, monitor_settings[monitor_index].mon_window_y, - monitor_settings[monitor_index].mon_window_w, monitor_settings[monitor_index].mon_window_h); + monitor_settings[monitor_index].mon_window_x, monitor_settings[monitor_index].mon_window_y, + monitor_settings[monitor_index].mon_window_w, monitor_settings[monitor_index].mon_window_h); ini_section_set_string(cat, "window_coordinates", temp); if (monitor_settings[monitor_index].mon_window_maximized != 0) { @@ -2078,8 +2076,8 @@ static void save_machine(void) { ini_section_t cat = ini_find_or_create_section(config, "Machine"); - char *p; - int c, i = 0, legacy_mfg, legacy_cpu = -1, closest_legacy_cpu = -1; + char *p; + int c, i = 0, legacy_mfg, legacy_cpu = -1, closest_legacy_cpu = -1; p = machine_get_internal_name(); ini_section_set_string(cat, "machine", p); @@ -2183,7 +2181,7 @@ save_video(void) ini_section_t cat = ini_find_or_create_section(config, "Video"); ini_section_set_string(cat, "gfxcard", - video_get_internal_name(gfxcard)); + video_get_internal_name(gfxcard)); if (voodoo_enabled == 0) ini_section_delete_var(cat, "voodoo"); @@ -2223,8 +2221,8 @@ static void save_input_devices(void) { ini_section_t cat = ini_find_or_create_section(config, "Input devices"); - char temp[512], tmp2[512]; - int c, d; + char temp[512], tmp2[512]; + int c, d; ini_section_set_string(cat, "mouse_type", mouse_get_internal_name(mouse_type)); @@ -2331,8 +2329,8 @@ save_sound(void) static void save_network(void) { - int c = 0; - char temp[512]; + int c = 0; + char temp[512]; ini_section_t cat = ini_find_or_create_section(config, "Network"); ini_section_delete_var(cat, "net_type"); @@ -2351,8 +2349,8 @@ save_network(void) if (net_cards_conf[c].net_type == NET_TYPE_NONE) { ini_section_delete_var(cat, temp); } else { - ini_section_set_string(cat, temp, - (net_cards_conf[c].net_type == NET_TYPE_SLIRP) ? "slirp" : "pcap"); + ini_section_set_string(cat, temp, + (net_cards_conf[c].net_type == NET_TYPE_SLIRP) ? "slirp" : "pcap"); } sprintf(temp, "net_%02i_host_device", c + 1); @@ -2367,7 +2365,7 @@ save_network(void) } sprintf(temp, "net_%02i_link", c + 1); - if (net_cards_conf[c].link_state == (NET_LINK_10_HD|NET_LINK_10_FD|NET_LINK_100_HD|NET_LINK_100_FD|NET_LINK_1000_HD|NET_LINK_1000_FD)) { + if (net_cards_conf[c].link_state == (NET_LINK_10_HD | NET_LINK_10_FD | NET_LINK_100_HD | NET_LINK_100_FD | NET_LINK_1000_HD | NET_LINK_1000_FD)) { ini_section_delete_var(cat, temp); } else { ini_section_set_int(cat, temp, net_cards_conf[c].link_state); @@ -2382,8 +2380,8 @@ static void save_ports(void) { ini_section_t cat = ini_find_or_create_section(config, "Ports (COM & LPT)"); - char temp[512]; - int c, d; + char temp[512]; + int c, d; for (c = 0; c < SERIAL_MAX; c++) { sprintf(temp, "serial%d_enabled", c + 1); @@ -2392,20 +2390,20 @@ save_ports(void) else ini_section_set_int(cat, temp, com_ports[c].enabled); -/* - sprintf(temp, "serial%d_type", c + 1); - if (!com_ports[c].enabled)) - ini_section_delete_var(cat, temp); -// else -// ini_section_set_string(cat, temp, (char *) serial_type[c]) + /* + sprintf(temp, "serial%d_type", c + 1); + if (!com_ports[c].enabled)) + ini_section_delete_var(cat, temp); + // else + // ini_section_set_string(cat, temp, (char *) serial_type[c]) - sprintf(temp, "serial%d_device", c + 1); - if (com_ports[c].device == 0) - ini_section_delete_var(cat, temp); - else - ini_section_set_string(cat, temp, - (char *) com_device_get_internal_name(com_ports[c].device)); - */ + sprintf(temp, "serial%d_device", c + 1); + if (com_ports[c].device == 0) + ini_section_delete_var(cat, temp); + else + ini_section_set_string(cat, temp, + (char *) com_device_get_internal_name(com_ports[c].device)); + */ } for (c = 0; c < PARALLEL_MAX; c++) { @@ -2421,7 +2419,7 @@ save_ports(void) ini_section_delete_var(cat, temp); else ini_section_set_string(cat, temp, - (char *) lpt_device_get_internal_name(lpt_ports[c].device)); + (char *) lpt_device_get_internal_name(lpt_ports[c].device)); } ini_delete_section_if_empty(config, cat); @@ -2432,8 +2430,8 @@ static void save_storage_controllers(void) { ini_section_t cat = ini_find_or_create_section(config, "Storage controllers"); - char temp[512]; - int c; + char temp[512]; + int c; ini_section_delete_var(cat, "scsicard"); @@ -2444,17 +2442,17 @@ save_storage_controllers(void) ini_section_delete_var(cat, temp); else ini_section_set_string(cat, temp, - scsi_card_get_internal_name(scsi_card_current[c])); + scsi_card_get_internal_name(scsi_card_current[c])); } if (fdc_type == FDC_INTERNAL) ini_section_delete_var(cat, "fdc"); else ini_section_set_string(cat, "fdc", - fdc_card_get_internal_name(fdc_type)); + fdc_card_get_internal_name(fdc_type)); ini_section_set_string(cat, "hdc", - hdc_get_internal_name(hdc_current)); + hdc_get_internal_name(hdc_current)); if (ide_ter_enabled == 0) ini_section_delete_var(cat, "ide_ter"); @@ -2522,8 +2520,8 @@ static void save_other_peripherals(void) { ini_section_t cat = ini_find_or_create_section(config, "Other peripherals"); - char temp[512]; - int c; + char temp[512]; + int c; if (bugger_enabled == 0) ini_section_delete_var(cat, "bugger_enabled"); @@ -2541,14 +2539,14 @@ save_other_peripherals(void) ini_section_delete_var(cat, temp); else ini_section_set_string(cat, temp, - (char *) isamem_get_internal_name(isamem_type[c])); + (char *) isamem_get_internal_name(isamem_type[c])); } if (isartc_type == 0) ini_section_delete_var(cat, "isartc_type"); else ini_section_set_string(cat, "isartc_type", - isartc_get_internal_name(isartc_type)); + isartc_get_internal_name(isartc_type)); ini_delete_section_if_empty(config, cat); } @@ -2558,9 +2556,9 @@ static void save_hard_disks(void) { ini_section_t cat = ini_find_or_create_section(config, "Hard disks"); - char temp[32], tmp2[512]; - char *p; - int c; + char temp[32], tmp2[512]; + char *p; + int c; memset(temp, 0x00, sizeof(temp)); for (c = 0; c < HDD_NUM; c++) { @@ -2637,8 +2635,8 @@ static void save_floppy_and_cdrom_drives(void) { ini_section_t cat = ini_find_or_create_section(config, "Floppy and CD-ROM drives"); - char temp[512], tmp2[512]; - int c; + char temp[512], tmp2[512]; + int c; for (c = 0; c < FDD_NUM; c++) { sprintf(temp, "fdd_%02i_type", c + 1); @@ -2646,7 +2644,7 @@ save_floppy_and_cdrom_drives(void) ini_section_delete_var(cat, temp); else ini_section_set_string(cat, temp, - fdd_get_internal_name(fdd_get_type(c))); + fdd_get_internal_name(fdd_get_type(c))); sprintf(temp, "fdd_%02i_fn", c + 1); if (strlen(floppyfns[c]) == 0) { @@ -2733,7 +2731,7 @@ save_floppy_and_cdrom_drives(void) for (int i = 0; i < MAX_PREV_IMAGES; i++) { sprintf(temp, "cdrom_%02i_image_history_%02i", c + 1, i + 1); - if((cdrom[c].image_history[i] == 0) || strlen(cdrom[c].image_history[i]) == 0) { + if ((cdrom[c].image_history[i] == 0) || strlen(cdrom[c].image_history[i]) == 0) { ini_section_delete_var(cat, temp); } else { ini_section_set_string(cat, temp, cdrom[c].image_history[i]); @@ -2749,8 +2747,8 @@ static void save_other_removable_devices(void) { ini_section_t cat = ini_find_or_create_section(config, "Other removable devices"); - char temp[512], tmp2[512]; - int c; + char temp[512], tmp2[512]; + int c; for (c = 0; c < ZIP_NUM; c++) { sprintf(temp, "zip_%02i_parameters", c + 1); diff --git a/src/ddma.c b/src/ddma.c index 2993add52..88afe3f69 100644 --- a/src/ddma.c +++ b/src/ddma.c @@ -35,130 +35,125 @@ #include <86box/dma.h> #include <86box/ddma.h> - #ifdef ENABLE_DDMA_LOG int ddma_do_log = ENABLE_DDMA_LOG; - static void ddma_log(const char *fmt, ...) { va_list ap; if (ddma_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define ddma_log(fmt, ...) +# define ddma_log(fmt, ...) #endif static uint8_t ddma_reg_read(uint16_t addr, void *p) { - ddma_channel_t *dev = (ddma_channel_t *) p; - uint8_t ret = 0xff; - int ch = dev->channel; - int dmab = (ch >= 4) ? 0xc0 : 0x00; + ddma_channel_t *dev = (ddma_channel_t *) p; + uint8_t ret = 0xff; + int ch = dev->channel; + int dmab = (ch >= 4) ? 0xc0 : 0x00; switch (addr & 0x0f) { - case 0x00: - ret = dma[ch].ac & 0xff; - break; - case 0x01: - ret = (dma[ch].ac >> 8) & 0xff; - break; - case 0x02: - ret = dma[ch].page; - break; - case 0x04: - ret = dma[ch].cc & 0xff; - break; - case 0x05: - ret = (dma[ch].cc >> 8) & 0xff; - break; - case 0x09: - ret = inb(dmab + 0x08); - break; + case 0x00: + ret = dma[ch].ac & 0xff; + break; + case 0x01: + ret = (dma[ch].ac >> 8) & 0xff; + break; + case 0x02: + ret = dma[ch].page; + break; + case 0x04: + ret = dma[ch].cc & 0xff; + break; + case 0x05: + ret = (dma[ch].cc >> 8) & 0xff; + break; + case 0x09: + ret = inb(dmab + 0x08); + break; } return ret; } - static void ddma_reg_write(uint16_t addr, uint8_t val, void *p) { - ddma_channel_t *dev = (ddma_channel_t *) p; - int ch = dev->channel; - int page_regs[4] = { 7, 3, 1, 2 }; - int i, dmab = (ch >= 4) ? 0xc0 : 0x00; + ddma_channel_t *dev = (ddma_channel_t *) p; + int ch = dev->channel; + int page_regs[4] = { 7, 3, 1, 2 }; + int i, dmab = (ch >= 4) ? 0xc0 : 0x00; switch (addr & 0x0f) { - case 0x00: - dma[ch].ab = (dma[ch].ab & 0xffff00) | val; - dma[ch].ac = dma[ch].ab; - break; - case 0x01: - dma[ch].ab = (dma[ch].ab & 0xff00ff) | (val << 8); - dma[ch].ac = dma[ch].ab; - break; - case 0x02: - if (ch >= 4) - outb(0x88 + page_regs[ch & 3], val); - else - outb(0x80 + page_regs[ch & 3], val); - break; - case 0x04: - dma[ch].cb = (dma[ch].cb & 0xffff00) | val; - dma[ch].cc = dma[ch].cb; - break; - case 0x05: - dma[ch].cb = (dma[ch].cb & 0xff00ff) | (val << 8); - dma[ch].cc = dma[ch].cb; - break; - case 0x08: - outb(dmab + 0x08, val); - break; - case 0x09: - outb(dmab + 0x09, val); - break; - case 0x0a: - outb(dmab + 0x0a, val); - break; - case 0x0b: - outb(dmab + 0x0b, val); - break; - case 0x0d: - outb(dmab + 0x0d, val); - break; - case 0x0e: - for (i = 0; i < 4; i++) - outb(dmab + 0x0a, i); - break; - case 0x0f: - outb(dmab + 0x0a, (val << 2) | (ch & 3)); - break; + case 0x00: + dma[ch].ab = (dma[ch].ab & 0xffff00) | val; + dma[ch].ac = dma[ch].ab; + break; + case 0x01: + dma[ch].ab = (dma[ch].ab & 0xff00ff) | (val << 8); + dma[ch].ac = dma[ch].ab; + break; + case 0x02: + if (ch >= 4) + outb(0x88 + page_regs[ch & 3], val); + else + outb(0x80 + page_regs[ch & 3], val); + break; + case 0x04: + dma[ch].cb = (dma[ch].cb & 0xffff00) | val; + dma[ch].cc = dma[ch].cb; + break; + case 0x05: + dma[ch].cb = (dma[ch].cb & 0xff00ff) | (val << 8); + dma[ch].cc = dma[ch].cb; + break; + case 0x08: + outb(dmab + 0x08, val); + break; + case 0x09: + outb(dmab + 0x09, val); + break; + case 0x0a: + outb(dmab + 0x0a, val); + break; + case 0x0b: + outb(dmab + 0x0b, val); + break; + case 0x0d: + outb(dmab + 0x0d, val); + break; + case 0x0e: + for (i = 0; i < 4; i++) + outb(dmab + 0x0a, i); + break; + case 0x0f: + outb(dmab + 0x0a, (val << 2) | (ch & 3)); + break; } } - void ddma_update_io_mapping(ddma_t *dev, int ch, uint8_t base_l, uint8_t base_h, int enable) { if (dev->channels[ch].enable && (dev->channels[ch].io_base != 0x0000)) - io_removehandler(dev->channels[ch].io_base, 0x10, ddma_reg_read, NULL, NULL, ddma_reg_write, NULL, NULL, &dev->channels[ch]); + io_removehandler(dev->channels[ch].io_base, 0x10, ddma_reg_read, NULL, NULL, ddma_reg_write, NULL, NULL, &dev->channels[ch]); dev->channels[ch].io_base = base_l | (base_h << 8); - dev->channels[ch].enable = enable; + dev->channels[ch].enable = enable; if (dev->channels[ch].enable && (dev->channels[ch].io_base != 0x0000)) - io_sethandler(dev->channels[ch].io_base, 0x10, ddma_reg_read, NULL, NULL, ddma_reg_write, NULL, NULL, &dev->channels[ch]); + io_sethandler(dev->channels[ch].io_base, 0x10, ddma_reg_read, NULL, NULL, ddma_reg_write, NULL, NULL, &dev->channels[ch]); } - static void ddma_close(void *priv) { @@ -167,33 +162,33 @@ ddma_close(void *priv) free(dev); } - static void * ddma_init(const device_t *info) { ddma_t *dev; - int i; + int i; - dev = (ddma_t *)malloc(sizeof(ddma_t)); - if (dev == NULL) return(NULL); + dev = (ddma_t *) malloc(sizeof(ddma_t)); + if (dev == NULL) + return (NULL); memset(dev, 0x00, sizeof(ddma_t)); for (i = 0; i < 8; i++) - dev->channels[i].channel = i; + dev->channels[i].channel = i; return dev; } const device_t ddma_device = { - .name = "Distributed DMA", + .name = "Distributed DMA", .internal_name = "ddma", - .flags = DEVICE_PCI, - .local = 0, - .init = ddma_init, - .close = ddma_close, - .reset = NULL, + .flags = DEVICE_PCI, + .local = 0, + .init = ddma_init, + .close = ddma_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/device.c b/src/device.c index 0eace721e..6b52ec3b1 100644 --- a/src/device.c +++ b/src/device.c @@ -53,35 +53,30 @@ #include <86box/rom.h> #include <86box/sound.h> +#define DEVICE_MAX 256 /* max # of devices */ -#define DEVICE_MAX 256 /* max # of devices */ - - -static device_t *devices[DEVICE_MAX]; -static void *device_priv[DEVICE_MAX]; -static device_context_t device_current, device_prev; - +static device_t *devices[DEVICE_MAX]; +static void *device_priv[DEVICE_MAX]; +static device_context_t device_current, device_prev; #ifdef ENABLE_DEVICE_LOG int device_do_log = ENABLE_DEVICE_LOG; - static void device_log(const char *fmt, ...) { va_list ap; if (device_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define device_log(fmt, ...) +# define device_log(fmt, ...) #endif - /* Initialize the module for use. */ void device_init(void) @@ -89,7 +84,6 @@ device_init(void) memset(devices, 0x00, sizeof(devices)); } - void device_set_context(device_context_t *c, const device_t *d, int inst) { @@ -98,21 +92,20 @@ device_set_context(device_context_t *c, const device_t *d, int inst) memset(c, 0, sizeof(device_context_t)); c->dev = d; if (inst) { - sprintf(c->name, "%s #%i", d->name, inst); + sprintf(c->name, "%s #%i", d->name, inst); - /* If this is the first instance and a numbered section is not present, but a non-numbered - section of the same name is, rename the non-numbered section to numbered. */ - if (inst == 1) { - sec = config_find_section(c->name); - single_sec = config_find_section((char *) d->name); - if ((sec == NULL) && (single_sec != NULL)) - config_rename_section(single_sec, c->name); - } + /* If this is the first instance and a numbered section is not present, but a non-numbered + section of the same name is, rename the non-numbered section to numbered. */ + if (inst == 1) { + sec = config_find_section(c->name); + single_sec = config_find_section((char *) d->name); + if ((sec == NULL) && (single_sec != NULL)) + config_rename_section(single_sec, c->name); + } } else - sprintf(c->name, "%s", d->name); + sprintf(c->name, "%s", d->name); } - static void device_context_common(const device_t *d, int inst) { @@ -120,98 +113,92 @@ device_context_common(const device_t *d, int inst) device_set_context(&device_current, d, inst); } - void device_context(const device_t *d) { device_context_common(d, 0); } - void device_context_inst(const device_t *d, int inst) { device_context_common(d, inst); } - void device_context_restore(void) { memcpy(&device_current, &device_prev, sizeof(device_context_t)); } - static void * device_add_common(const device_t *d, const device_t *cd, void *p, int inst) { void *priv = NULL; - int c; + int c; for (c = 0; c < 256; c++) { - if (!inst && (devices[c] == (device_t *) d)) { - device_log("DEVICE: device already exists!\n"); - return (NULL); - } - if (devices[c] == NULL) break; + if (!inst && (devices[c] == (device_t *) d)) { + device_log("DEVICE: device already exists!\n"); + return (NULL); + } + if (devices[c] == NULL) + break; } if (c >= DEVICE_MAX) - fatal("DEVICE: too many devices\n"); + fatal("DEVICE: too many devices\n"); /* Do this so that a chained device_add will not identify the same ID its master device is already trying to assign. */ - devices[c] = (device_t *)d; + devices[c] = (device_t *) d; if (p == NULL) { - memcpy(&device_prev, &device_current, sizeof(device_context_t)); - device_set_context(&device_current, cd, inst); + memcpy(&device_prev, &device_current, sizeof(device_context_t)); + device_set_context(&device_current, cd, inst); - if (d->init != NULL) { - priv = d->init(d); - if (priv == NULL) { - if (d->name) - device_log("DEVICE: device '%s' init failed\n", d->name); - else - device_log("DEVICE: device init failed\n"); + if (d->init != NULL) { + priv = d->init(d); + if (priv == NULL) { + if (d->name) + device_log("DEVICE: device '%s' init failed\n", d->name); + else + device_log("DEVICE: device init failed\n"); - devices[c] = NULL; - device_priv[c] = NULL; + devices[c] = NULL; + device_priv[c] = NULL; - return(NULL); - } - } + return (NULL); + } + } - if (d->name) - device_log("DEVICE: device '%s' init successful\n", d->name); - else - device_log("DEVICE: device init successful\n"); + if (d->name) + device_log("DEVICE: device '%s' init successful\n", d->name); + else + device_log("DEVICE: device init successful\n"); - memcpy(&device_current, &device_prev, sizeof(device_context_t)); - device_priv[c] = priv; + memcpy(&device_current, &device_prev, sizeof(device_context_t)); + device_priv[c] = priv; } else - device_priv[c] = p; + device_priv[c] = p; - return(priv); + return (priv); } - char * device_get_internal_name(const device_t *d) { if (d == NULL) - return ""; + return ""; return (char *) d->internal_name; } - void * device_add(const device_t *d) { return device_add_common(d, d, NULL, 0); } - /* For devices that do not have an init function (internal video etc.) */ void device_add_ex(const device_t *d, void *priv) @@ -219,14 +206,12 @@ device_add_ex(const device_t *d, void *priv) device_add_common(d, d, priv, 0); } - void * device_add_inst(const device_t *d, int inst) { return device_add_common(d, d, NULL, inst); } - /* For devices that do not have an init function (internal video etc.) */ void device_add_inst_ex(const device_t *d, void *priv, int inst) @@ -234,7 +219,6 @@ device_add_inst_ex(const device_t *d, void *priv, int inst) device_add_common(d, d, priv, inst); } - /* These four are to add a device with another device's context - will be used to add machines' internal devices. */ void * @@ -243,7 +227,6 @@ device_cadd(const device_t *d, const device_t *cd) return device_add_common(d, cd, NULL, 0); } - /* For devices that do not have an init function (internal video etc.) */ void device_cadd_ex(const device_t *d, const device_t *cd, void *priv) @@ -251,14 +234,12 @@ device_cadd_ex(const device_t *d, const device_t *cd, void *priv) device_add_common(d, cd, priv, 0); } - void * device_cadd_inst(const device_t *d, const device_t *cd, int inst) { return device_add_common(d, cd, NULL, inst); } - /* For devices that do not have an init function (internal video etc.) */ void device_cadd_inst_ex(const device_t *d, const device_t *cd, void *priv, int inst) @@ -266,173 +247,164 @@ device_cadd_inst_ex(const device_t *d, const device_t *cd, void *priv, int inst) device_add_common(d, cd, priv, inst); } - void device_close_all(void) { int c; for (c = (DEVICE_MAX - 1); c >= 0; c--) { - if (devices[c] != NULL) { - if (devices[c]->name) - device_log("Closing device: \"%s\"...\n", devices[c]->name); - if (devices[c]->close != NULL) - devices[c]->close(device_priv[c]); - devices[c] = device_priv[c] = NULL; - } + if (devices[c] != NULL) { + if (devices[c]->name) + device_log("Closing device: \"%s\"...\n", devices[c]->name); + if (devices[c]->close != NULL) + devices[c]->close(device_priv[c]); + devices[c] = device_priv[c] = NULL; + } } } - void device_reset_all(void) { int c; for (c = 0; c < DEVICE_MAX; c++) { - if (devices[c] != NULL) { - if (devices[c]->reset != NULL) - devices[c]->reset(device_priv[c]); - } + if (devices[c] != NULL) { + if (devices[c]->reset != NULL) + devices[c]->reset(device_priv[c]); + } } } - /* Reset all attached PCI devices - needed for PCI turbo reset control. */ void device_reset_all_pci(void) { int c; - for (c=0; creset != NULL) && (devices[c]->flags & DEVICE_PCI)) - devices[c]->reset(device_priv[c]); - } + for (c = 0; c < DEVICE_MAX; c++) { + if (devices[c] != NULL) { + if ((devices[c]->reset != NULL) && (devices[c]->flags & DEVICE_PCI)) + devices[c]->reset(device_priv[c]); + } } } - void * device_get_priv(const device_t *d) { int c; for (c = 0; c < DEVICE_MAX; c++) { - if (devices[c] != NULL) { - if (devices[c] == d) - return(device_priv[c]); - } + if (devices[c] != NULL) { + if (devices[c] == d) + return (device_priv[c]); + } } - return(NULL); + return (NULL); } - int device_available(const device_t *d) { - device_config_t *config = NULL; - device_config_bios_t *bios = NULL; - int bf, roms_present = 0; - int i = 0; + device_config_t *config = NULL; + device_config_bios_t *bios = NULL; + int bf, roms_present = 0; + int i = 0; if (d != NULL) { - config = (device_config_t *) d->config; - if (config != NULL) { - while (config->type != -1) { - if (config->type == CONFIG_BIOS) { - bios = (device_config_bios_t *) config->bios; + config = (device_config_t *) d->config; + if (config != NULL) { + while (config->type != -1) { + if (config->type == CONFIG_BIOS) { + bios = (device_config_bios_t *) config->bios; - /* Go through the ROM's in the device configuration. */ - while (bios->files_no != 0) { - i = 0; - for (bf = 0; bf < bios->files_no; bf++) - i += !!rom_present((char *) bios->files[bf]); - if (i == bios->files_no) - roms_present++; - bios++; - } + /* Go through the ROM's in the device configuration. */ + while (bios->files_no != 0) { + i = 0; + for (bf = 0; bf < bios->files_no; bf++) + i += !!rom_present((char *) bios->files[bf]); + if (i == bios->files_no) + roms_present++; + bios++; + } - return(roms_present ? -1 : 0); - } - config++; - } - } + return (roms_present ? -1 : 0); + } + config++; + } + } - /* No CONFIG_BIOS field present, use the classic available(). */ - if (d->available != NULL) - return(d->available()); - else - return(1); + /* No CONFIG_BIOS field present, use the classic available(). */ + if (d->available != NULL) + return (d->available()); + else + return (1); } /* A NULL device is never available. */ - return(0); + return (0); } - int device_has_config(const device_t *d) { - int c = 0; + int c = 0; device_config_t *config; if (d == NULL) - return 0; + return 0; if (d->config == NULL) - return 0; + return 0; config = (device_config_t *) d->config; while (config->type != -1) { - if (config->type != CONFIG_MAC) - c++; - config++; + if (config->type != CONFIG_MAC) + c++; + config++; } return (c > 0) ? 1 : 0; } - int device_poll(const device_t *d, int x, int y, int z, int b) { int c; for (c = 0; c < DEVICE_MAX; c++) { - if (devices[c] != NULL) { - if (devices[c] == d) { - if (devices[c]->poll) - return(devices[c]->poll(x, y, z, b, device_priv[c])); - } - } + if (devices[c] != NULL) { + if (devices[c] == d) { + if (devices[c]->poll) + return (devices[c]->poll(x, y, z, b, device_priv[c])); + } + } } - return(0); + return (0); } - void device_register_pci_slot(const device_t *d, int device, int type, int inta, int intb, int intc, int intd) { int c; for (c = 0; c < DEVICE_MAX; c++) { - if (devices[c] != NULL) { - if (devices[c] == d) { - if (devices[c]->register_pci_slot) - devices[c]->register_pci_slot(device, type, inta, intb, intc, intd, device_priv[c]); - return; - } - } + if (devices[c] != NULL) { + if (devices[c] == d) { + if (devices[c]->register_pci_slot) + devices[c]->register_pci_slot(device, type, inta, intb, intc, intd, device_priv[c]); + return; + } + } } return; } - void device_get_name(const device_t *d, int bus, char *name) { @@ -440,344 +412,342 @@ device_get_name(const device_t *d, int bus, char *name) char *tname, pbus[8] = { 0 }; if (d == NULL) - return; + return; name[0] = 0x00; if (bus) { - if (d->flags & DEVICE_ISA) - sbus = (d->flags & DEVICE_AT) ? "ISA16" : "ISA"; - else if (d->flags & DEVICE_CBUS) - sbus = "C-BUS"; - else if (d->flags & DEVICE_MCA) - sbus = "MCA"; - else if (d->flags & DEVICE_EISA) - sbus = "EISA"; - else if (d->flags & DEVICE_VLB) - sbus = "VLB"; - else if (d->flags & DEVICE_PCI) - sbus = "PCI"; - else if (d->flags & DEVICE_AGP) - sbus = "AGP"; - else if (d->flags & DEVICE_AC97) - sbus = "AMR"; - else if (d->flags & DEVICE_COM) - sbus = "COM"; - else if (d->flags & DEVICE_LPT) - sbus = "LPT"; + if (d->flags & DEVICE_ISA) + sbus = (d->flags & DEVICE_AT) ? "ISA16" : "ISA"; + else if (d->flags & DEVICE_CBUS) + sbus = "C-BUS"; + else if (d->flags & DEVICE_MCA) + sbus = "MCA"; + else if (d->flags & DEVICE_EISA) + sbus = "EISA"; + else if (d->flags & DEVICE_VLB) + sbus = "VLB"; + else if (d->flags & DEVICE_PCI) + sbus = "PCI"; + else if (d->flags & DEVICE_AGP) + sbus = "AGP"; + else if (d->flags & DEVICE_AC97) + sbus = "AMR"; + else if (d->flags & DEVICE_COM) + sbus = "COM"; + else if (d->flags & DEVICE_LPT) + sbus = "LPT"; - if (sbus != NULL) { - /* First concatenate [] before the device's name. */ - strcat(name, "["); - strcat(name, sbus); - strcat(name, "] "); + if (sbus != NULL) { + /* First concatenate [] before the device's name. */ + strcat(name, "["); + strcat(name, sbus); + strcat(name, "] "); - /* Then change string from ISA16 to ISA if applicable. */ - if (!strcmp(sbus, "ISA16")) - sbus = "ISA"; - else if (!strcmp(sbus, "COM")|| !strcmp(sbus, "LPT")) { - sbus = NULL; - strcat(name, d->name); - return; - } + /* Then change string from ISA16 to ISA if applicable. */ + if (!strcmp(sbus, "ISA16")) + sbus = "ISA"; + else if (!strcmp(sbus, "COM") || !strcmp(sbus, "LPT")) { + sbus = NULL; + strcat(name, d->name); + return; + } - /* Generate the bus string with parentheses. */ - strcat(pbus, "("); - strcat(pbus, sbus); - strcat(pbus, ")"); + /* Generate the bus string with parentheses. */ + strcat(pbus, "("); + strcat(pbus, sbus); + strcat(pbus, ")"); - /* Allocate the temporary device name string and set it to all zeroes. */ - tname = (char *) malloc(strlen(d->name) + 1); - memset(tname, 0x00, strlen(d->name) + 1); + /* Allocate the temporary device name string and set it to all zeroes. */ + tname = (char *) malloc(strlen(d->name) + 1); + memset(tname, 0x00, strlen(d->name) + 1); - /* First strip the bus string with parentheses. */ - fbus = strstr(d->name, pbus); - if (fbus == d->name) - strcat(tname, d->name + strlen(pbus) + 1); - else if (fbus == NULL) - strcat(tname, d->name); - else { - strncat(tname, d->name, fbus - d->name - 1); - strcat(tname, fbus + strlen(pbus)); - } + /* First strip the bus string with parentheses. */ + fbus = strstr(d->name, pbus); + if (fbus == d->name) + strcat(tname, d->name + strlen(pbus) + 1); + else if (fbus == NULL) + strcat(tname, d->name); + else { + strncat(tname, d->name, fbus - d->name - 1); + strcat(tname, fbus + strlen(pbus)); + } - /* Then also strip the bus string with parentheses. */ - fbus = strstr(tname, sbus); - if (fbus == tname) - strcat(name, tname + strlen(sbus) + 1); - /* Special case to not strip the "oPCI" from "Ensoniq AudioPCI" or - the "-ISA" from "AMD PCnet-ISA". */ - else if ((fbus == NULL) || (*(fbus - 1) == 'o') || (*(fbus - 1) == '-')) - strcat(name, tname); - else { - strncat(name, tname, fbus - tname - 1); - strcat(name, fbus + strlen(sbus)); - } + /* Then also strip the bus string with parentheses. */ + fbus = strstr(tname, sbus); + if (fbus == tname) + strcat(name, tname + strlen(sbus) + 1); + /* Special case to not strip the "oPCI" from "Ensoniq AudioPCI" or + the "-ISA" from "AMD PCnet-ISA". */ + else if ((fbus == NULL) || (*(fbus - 1) == 'o') || (*(fbus - 1) == '-')) + strcat(name, tname); + else { + strncat(name, tname, fbus - tname - 1); + strcat(name, fbus + strlen(sbus)); + } - /* Free the temporary device name string. */ - free(tname); - tname = NULL; - } else - strcat(name, d->name); + /* Free the temporary device name string. */ + free(tname); + tname = NULL; + } else + strcat(name, d->name); } else - strcat(name, d->name); + strcat(name, d->name); } - void device_speed_changed(void) { int c; for (c = 0; c < DEVICE_MAX; c++) { - if (devices[c] != NULL) { - if (devices[c]->speed_changed != NULL) - devices[c]->speed_changed(device_priv[c]); - } + if (devices[c] != NULL) { + if (devices[c]->speed_changed != NULL) + devices[c]->speed_changed(device_priv[c]); + } } sound_speed_changed(); } - void device_force_redraw(void) { int c; for (c = 0; c < DEVICE_MAX; c++) { - if (devices[c] != NULL) { - if (devices[c]->force_redraw != NULL) - devices[c]->force_redraw(device_priv[c]); - } + if (devices[c] != NULL) { + if (devices[c]->force_redraw != NULL) + devices[c]->force_redraw(device_priv[c]); + } } } - const char * device_get_config_string(const char *s) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) - return(config_get_string((char *) device_current.name, (char *) s, (char *) c->default_string)); + if (!strcmp(s, c->name)) + return (config_get_string((char *) device_current.name, (char *) s, (char *) c->default_string)); - c++; + c++; } - return(NULL); + return (NULL); } - int device_get_config_int(const char *s) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) - return(config_get_int((char *) device_current.name, (char *) s, c->default_int)); + if (!strcmp(s, c->name)) + return (config_get_int((char *) device_current.name, (char *) s, c->default_int)); - c++; + c++; } - return(0); + return (0); } - int device_get_config_int_ex(const char *s, int def) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) - return(config_get_int((char *) device_current.name, (char *) s, def)); + if (!strcmp(s, c->name)) + return (config_get_int((char *) device_current.name, (char *) s, def)); - c++; + c++; } - return(def); + return (def); } - int device_get_config_hex16(const char *s) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) - return(config_get_hex16((char *) device_current.name, (char *) s, c->default_int)); + if (!strcmp(s, c->name)) + return (config_get_hex16((char *) device_current.name, (char *) s, c->default_int)); - c++; + c++; } - return(0); + return (0); } - int device_get_config_hex20(const char *s) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) - return(config_get_hex20((char *) device_current.name, (char *) s, c->default_int)); + if (!strcmp(s, c->name)) + return (config_get_hex20((char *) device_current.name, (char *) s, c->default_int)); - c++; + c++; } - return(0); + return (0); } - int device_get_config_mac(const char *s, int def) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) - return(config_get_mac((char *) device_current.name, (char *) s, def)); + if (!strcmp(s, c->name)) + return (config_get_mac((char *) device_current.name, (char *) s, def)); - c++; + c++; } - return(def); + return (def); } - void device_set_config_int(const char *s, int val) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) { - config_set_int((char *) device_current.name, (char *) s, val); - break; - } + if (!strcmp(s, c->name)) { + config_set_int((char *) device_current.name, (char *) s, val); + break; + } - c++; + c++; } } - void device_set_config_hex16(const char *s, int val) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) { - config_set_hex16((char *) device_current.name, (char *) s, val); - break; - } + if (!strcmp(s, c->name)) { + config_set_hex16((char *) device_current.name, (char *) s, val); + break; + } - c++; + c++; } } - void device_set_config_hex20(const char *s, int val) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) { - config_set_hex20((char *) device_current.name, (char *) s, val); - break; - } + if (!strcmp(s, c->name)) { + config_set_hex20((char *) device_current.name, (char *) s, val); + break; + } - c++; + c++; } } - void device_set_config_mac(const char *s, int val) { const device_config_t *c = device_current.dev->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) { - config_set_mac((char *) device_current.name, (char *) s, val); - break; - } + if (!strcmp(s, c->name)) { + config_set_mac((char *) device_current.name, (char *) s, val); + break; + } - c++; + c++; } } - int device_is_valid(const device_t *device, int m) { - if (device == NULL) return(1); + if (device == NULL) + return (1); - if ((device->flags & DEVICE_AT) && !machine_has_bus(m, MACHINE_BUS_ISA16)) return(0); + if ((device->flags & DEVICE_AT) && !machine_has_bus(m, MACHINE_BUS_ISA16)) + return (0); - if ((device->flags & DEVICE_CBUS) && !machine_has_bus(m, MACHINE_BUS_CBUS)) return(0); + if ((device->flags & DEVICE_CBUS) && !machine_has_bus(m, MACHINE_BUS_CBUS)) + return (0); - if ((device->flags & DEVICE_ISA) && !machine_has_bus(m, MACHINE_BUS_ISA)) return(0); + if ((device->flags & DEVICE_ISA) && !machine_has_bus(m, MACHINE_BUS_ISA)) + return (0); - if ((device->flags & DEVICE_MCA) && !machine_has_bus(m, MACHINE_BUS_MCA)) return(0); + if ((device->flags & DEVICE_MCA) && !machine_has_bus(m, MACHINE_BUS_MCA)) + return (0); - if ((device->flags & DEVICE_EISA) && !machine_has_bus(m, MACHINE_BUS_EISA)) return(0); + if ((device->flags & DEVICE_EISA) && !machine_has_bus(m, MACHINE_BUS_EISA)) + return (0); - if ((device->flags & DEVICE_VLB) && !machine_has_bus(m, MACHINE_BUS_VLB)) return(0); + if ((device->flags & DEVICE_VLB) && !machine_has_bus(m, MACHINE_BUS_VLB)) + return (0); - if ((device->flags & DEVICE_PCI) && !machine_has_bus(m, MACHINE_BUS_PCI)) return(0); + if ((device->flags & DEVICE_PCI) && !machine_has_bus(m, MACHINE_BUS_PCI)) + return (0); - if ((device->flags & DEVICE_AGP) && !machine_has_bus(m, MACHINE_BUS_AGP)) return(0); + if ((device->flags & DEVICE_AGP) && !machine_has_bus(m, MACHINE_BUS_AGP)) + return (0); - if ((device->flags & DEVICE_PS2) && !machine_has_bus(m, MACHINE_BUS_PS2)) return(0); + if ((device->flags & DEVICE_PS2) && !machine_has_bus(m, MACHINE_BUS_PS2)) + return (0); - if ((device->flags & DEVICE_AC97) && !machine_has_bus(m, MACHINE_BUS_AC97)) return(0); + if ((device->flags & DEVICE_AC97) && !machine_has_bus(m, MACHINE_BUS_AC97)) + return (0); - return(1); + return (1); } - int machine_get_config_int(char *s) { - const device_t *d = machine_getdevice(machine); + const device_t *d = machine_getdevice(machine); const device_config_t *c; - if (d == NULL) return(0); + if (d == NULL) + return (0); c = d->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) - return(config_get_int((char *)d->name, s, c->default_int)); + if (!strcmp(s, c->name)) + return (config_get_int((char *) d->name, s, c->default_int)); - c++; + c++; } - return(0); + return (0); } - char * machine_get_config_string(char *s) { - const device_t *d = machine_getdevice(machine); + const device_t *d = machine_getdevice(machine); const device_config_t *c; - if (d == NULL) return(0); + if (d == NULL) + return (0); c = d->config; while (c && c->type != -1) { - if (! strcmp(s, c->name)) - return(config_get_string((char *)d->name, s, (char *)c->default_string)); + if (!strcmp(s, c->name)) + return (config_get_string((char *) d->name, s, (char *) c->default_string)); - c++; + c++; } - return(NULL); + return (NULL); } diff --git a/src/dma.c b/src/dma.c index 5eb129860..48853321a 100644 --- a/src/dma.c +++ b/src/dma.c @@ -32,114 +32,103 @@ #include <86box/pic.h> #include <86box/dma.h> +dma_t dma[8]; +uint8_t dma_e; +uint8_t dma_m; -dma_t dma[8]; -uint8_t dma_e; -uint8_t dma_m; - - -static uint8_t dmaregs[3][16]; -static int dma_wp[2]; -static uint8_t dma_stat; -static uint8_t dma_stat_rq; -static uint8_t dma_stat_rq_pc; -static uint8_t dma_command[2]; -static uint8_t dma_req_is_soft; -static uint8_t dma_advanced; -static uint8_t dma_at; -static uint8_t dma_buffer[65536]; -static uint16_t dma_sg_base; -static uint16_t dma16_buffer[65536]; +static uint8_t dmaregs[3][16]; +static int dma_wp[2]; +static uint8_t dma_stat; +static uint8_t dma_stat_rq; +static uint8_t dma_stat_rq_pc; +static uint8_t dma_command[2]; +static uint8_t dma_req_is_soft; +static uint8_t dma_advanced; +static uint8_t dma_at; +static uint8_t dma_buffer[65536]; +static uint16_t dma_sg_base; +static uint16_t dma16_buffer[65536]; static uint32_t dma_mask; static struct { - int xfr_command, - xfr_channel; - int byte_ptr; + int xfr_command, + xfr_channel; + int byte_ptr; - int is_ps2; + int is_ps2; } dma_ps2; - -#define DMA_PS2_IOA (1 << 0) -#define DMA_PS2_AUTOINIT (1 << 1) -#define DMA_PS2_XFER_MEM_TO_IO (1 << 2) -#define DMA_PS2_XFER_IO_TO_MEM (3 << 2) -#define DMA_PS2_XFER_MASK (3 << 2) -#define DMA_PS2_DEC2 (1 << 4) -#define DMA_PS2_SIZE16 (1 << 6) - +#define DMA_PS2_IOA (1 << 0) +#define DMA_PS2_AUTOINIT (1 << 1) +#define DMA_PS2_XFER_MEM_TO_IO (1 << 2) +#define DMA_PS2_XFER_IO_TO_MEM (3 << 2) +#define DMA_PS2_XFER_MASK (3 << 2) +#define DMA_PS2_DEC2 (1 << 4) +#define DMA_PS2_SIZE16 (1 << 6) #ifdef ENABLE_DMA_LOG int dma_do_log = ENABLE_DMA_LOG; - static void dma_log(const char *fmt, ...) { va_list ap; if (dma_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define dma_log(fmt, ...) +# define dma_log(fmt, ...) #endif - static void dma_ps2_run(int channel); - int dma_get_drq(int channel) { return !!(dma_stat_rq_pc & (1 << channel)); } - void dma_set_drq(int channel, int set) { dma_stat_rq_pc &= ~(1 << channel); if (set) - dma_stat_rq_pc |= (1 << channel); + dma_stat_rq_pc |= (1 << channel); } - static int dma_transfer_size(dma_t *dev) { return dev->transfer_mode & 0xff; } - static void dma_sg_next_addr(dma_t *dev) { int ts = dma_transfer_size(dev); - dma_bm_read(dev->ptr_cur, (uint8_t *)&(dev->addr), 4, ts); - dma_bm_read(dev->ptr_cur + 4, (uint8_t *)&(dev->count), 4, ts); + dma_bm_read(dev->ptr_cur, (uint8_t *) &(dev->addr), 4, ts); + dma_bm_read(dev->ptr_cur + 4, (uint8_t *) &(dev->count), 4, ts); dma_log("DMA S/G DWORDs: %08X %08X\n", dev->addr, dev->count); dev->eot = dev->count >> 31; dev->count &= 0xfffe; dev->cb = (uint16_t) dev->count; dev->cc = (int) dev->count; if (!dev->count) - dev->count = 65536; + dev->count = 65536; if (ts == 2) - dev->addr &= 0xfffffffe; - dev->ab = dev->addr & dma_mask; - dev->ac = dev->addr & dma_mask; + dev->addr &= 0xfffffffe; + dev->ab = dev->addr & dma_mask; + dev->ac = dev->addr & dma_mask; dev->page = dev->page_l = (dev->ac >> 16) & 0xff; - dev->page_h = (dev->ac >> 24) & 0xff; + dev->page_h = (dev->ac >> 24) & 0xff; dev->ptr_cur += 8; } - static void dma_block_transfer(int channel) { @@ -148,48 +137,46 @@ dma_block_transfer(int channel) bit16 = (channel >= 4); if (dma_advanced) - bit16 = !!(dma_transfer_size(&(dma[channel])) == 2); + bit16 = !!(dma_transfer_size(&(dma[channel])) == 2); dma_req_is_soft = 1; for (i = 0; i <= dma[channel].cb; i++) { - if ((dma[channel].mode & 0x8c) == 0x84) { - if (bit16) - dma_channel_write(channel, dma16_buffer[i]); - else - dma_channel_write(channel, dma_buffer[i]); - } else if ((dma[channel].mode & 0x8c) == 0x88) { - if (bit16) - dma16_buffer[i] = dma_channel_read(channel); - else - dma_buffer[i] = dma_channel_read(channel); - } + if ((dma[channel].mode & 0x8c) == 0x84) { + if (bit16) + dma_channel_write(channel, dma16_buffer[i]); + else + dma_channel_write(channel, dma_buffer[i]); + } else if ((dma[channel].mode & 0x8c) == 0x88) { + if (bit16) + dma16_buffer[i] = dma_channel_read(channel); + else + dma_buffer[i] = dma_channel_read(channel); + } } dma_req_is_soft = 0; } - static void dma_mem_to_mem_transfer(void) { int i; if ((dma[0].mode & 0x0c) != 0x08) - fatal("DMA memory to memory transfer: channel 0 mode not read\n"); + fatal("DMA memory to memory transfer: channel 0 mode not read\n"); if ((dma[1].mode & 0x0c) != 0x04) - fatal("DMA memory to memory transfer: channel 1 mode not write\n"); + fatal("DMA memory to memory transfer: channel 1 mode not write\n"); dma_req_is_soft = 1; for (i = 0; i <= dma[0].cb; i++) - dma_buffer[i] = dma_channel_read(0); + dma_buffer[i] = dma_channel_read(0); for (i = 0; i <= dma[1].cb; i++) - dma_channel_write(1, dma_buffer[i]); + dma_channel_write(1, dma_buffer[i]); dma_req_is_soft = 0; } - static void dma_sg_write(uint16_t port, uint8_t val, void *priv) { @@ -200,51 +187,50 @@ dma_sg_write(uint16_t port, uint8_t val, void *priv) port &= 0xff; if (port < 0x20) - port &= 0xf8; + port &= 0xf8; else - port &= 0xe3; + port &= 0xe3; switch (port) { - case 0x00: - dma_log("DMA S/G Cmd : val = %02X, old = %02X\n", val, dev->sg_command); - if ((val & 1) && !(dev->sg_command & 1)) { /*Start*/ + case 0x00: + dma_log("DMA S/G Cmd : val = %02X, old = %02X\n", val, dev->sg_command); + if ((val & 1) && !(dev->sg_command & 1)) { /*Start*/ #ifdef ENABLE_DMA_LOG - dma_log("DMA S/G start\n"); + dma_log("DMA S/G start\n"); #endif - dev->ptr_cur = dev->ptr; - dma_sg_next_addr(dev); - dev->sg_status = (dev->sg_status & 0xf7) | 0x01; - } - if (!(val & 1) && (dev->sg_command & 1)) { /*Stop*/ + dev->ptr_cur = dev->ptr; + dma_sg_next_addr(dev); + dev->sg_status = (dev->sg_status & 0xf7) | 0x01; + } + if (!(val & 1) && (dev->sg_command & 1)) { /*Stop*/ #ifdef ENABLE_DMA_LOG - dma_log("DMA S/G stop\n"); + dma_log("DMA S/G stop\n"); #endif - dev->sg_status &= ~0x81; - } + dev->sg_status &= ~0x81; + } - dev->sg_command = val; - break; - case 0x20: - dev->ptr = (dev->ptr & 0xffffff00) | (val & 0xfc); - dev->ptr %= (mem_size * 1024); - dev->ptr0 = val; - break; - case 0x21: - dev->ptr = (dev->ptr & 0xffff00fc) | (val << 8); - dev->ptr %= (mem_size * 1024); - break; - case 0x22: - dev->ptr = (dev->ptr & 0xff00fffc) | (val << 16); - dev->ptr %= (mem_size * 1024); - break; - case 0x23: - dev->ptr = (dev->ptr & 0x00fffffc) | (val << 24); - dev->ptr %= (mem_size * 1024); - break; + dev->sg_command = val; + break; + case 0x20: + dev->ptr = (dev->ptr & 0xffffff00) | (val & 0xfc); + dev->ptr %= (mem_size * 1024); + dev->ptr0 = val; + break; + case 0x21: + dev->ptr = (dev->ptr & 0xffff00fc) | (val << 8); + dev->ptr %= (mem_size * 1024); + break; + case 0x22: + dev->ptr = (dev->ptr & 0xff00fffc) | (val << 16); + dev->ptr %= (mem_size * 1024); + break; + case 0x23: + dev->ptr = (dev->ptr & 0x00fffffc) | (val << 24); + dev->ptr %= (mem_size * 1024); + break; } } - static void dma_sg_writew(uint16_t port, uint16_t val, void *priv) { @@ -255,27 +241,26 @@ dma_sg_writew(uint16_t port, uint16_t val, void *priv) port &= 0xff; if (port < 0x20) - port &= 0xf8; + port &= 0xf8; else - port &= 0xe3; + port &= 0xe3; switch (port) { - case 0x00: - dma_sg_write(port, val & 0xff, priv); - break; - case 0x20: - dev->ptr = (dev->ptr & 0xffff0000) | (val & 0xfffc); - dev->ptr %= (mem_size * 1024); - dev->ptr0 = val & 0xff; - break; - case 0x22: - dev->ptr = (dev->ptr & 0x0000fffc) | (val << 16); - dev->ptr %= (mem_size * 1024); - break; + case 0x00: + dma_sg_write(port, val & 0xff, priv); + break; + case 0x20: + dev->ptr = (dev->ptr & 0xffff0000) | (val & 0xfffc); + dev->ptr %= (mem_size * 1024); + dev->ptr0 = val & 0xff; + break; + case 0x22: + dev->ptr = (dev->ptr & 0x0000fffc) | (val << 16); + dev->ptr %= (mem_size * 1024); + break; } } - static void dma_sg_writel(uint16_t port, uint32_t val, void *priv) { @@ -286,23 +271,22 @@ dma_sg_writel(uint16_t port, uint32_t val, void *priv) port &= 0xff; if (port < 0x20) - port &= 0xf8; + port &= 0xf8; else - port &= 0xe3; + port &= 0xe3; switch (port) { - case 0x00: - dma_sg_write(port, val & 0xff, priv); - break; - case 0x20: - dev->ptr = (val & 0xfffffffc); - dev->ptr %= (mem_size * 1024); - dev->ptr0 = val & 0xff; - break; + case 0x00: + dma_sg_write(port, val & 0xff, priv); + break; + case 0x20: + dev->ptr = (val & 0xfffffffc); + dev->ptr %= (mem_size * 1024); + dev->ptr0 = val & 0xff; + break; } } - static uint8_t dma_sg_read(uint16_t port, void *priv) { @@ -313,34 +297,34 @@ dma_sg_read(uint16_t port, void *priv) port &= 0xff; if (port < 0x20) - port &= 0xf8; + port &= 0xf8; else - port &= 0xe3; + port &= 0xe3; switch (port) { - case 0x08: - ret = (dev->sg_status & 0x01); - if (dev->eot) - ret |= 0x80; - if ((dev->sg_command & 0xc0) == 0x40) - ret |= 0x20; - if (dev->ab != 0x00000000) - ret |= 0x08; - if (dev->ac != 0x00000000) - ret |= 0x04; - break; - case 0x20: - ret = dev->ptr0; - break; - case 0x21: - ret = dev->ptr >> 8; - break; - case 0x22: - ret = dev->ptr >> 16; - break; - case 0x23: - ret = dev->ptr >> 24; - break; + case 0x08: + ret = (dev->sg_status & 0x01); + if (dev->eot) + ret |= 0x80; + if ((dev->sg_command & 0xc0) == 0x40) + ret |= 0x20; + if (dev->ab != 0x00000000) + ret |= 0x08; + if (dev->ac != 0x00000000) + ret |= 0x04; + break; + case 0x20: + ret = dev->ptr0; + break; + case 0x21: + ret = dev->ptr >> 8; + break; + case 0x22: + ret = dev->ptr >> 16; + break; + case 0x23: + ret = dev->ptr >> 24; + break; } dma_log("DMA S/G BYTE read : %04X %02X\n", port, ret); @@ -348,7 +332,6 @@ dma_sg_read(uint16_t port, void *priv) return ret; } - static uint16_t dma_sg_readw(uint16_t port, void *priv) { @@ -359,20 +342,20 @@ dma_sg_readw(uint16_t port, void *priv) port &= 0xff; if (port < 0x20) - port &= 0xf8; + port &= 0xf8; else - port &= 0xe3; + port &= 0xe3; switch (port) { - case 0x08: - ret = (uint16_t) dma_sg_read(port, priv); - break; - case 0x20: - ret = dev->ptr0 | (dev->ptr & 0xff00); - break; - case 0x22: - ret = dev->ptr >> 16; - break; + case 0x08: + ret = (uint16_t) dma_sg_read(port, priv); + break; + case 0x20: + ret = dev->ptr0 | (dev->ptr & 0xff00); + break; + case 0x22: + ret = dev->ptr >> 16; + break; } dma_log("DMA S/G WORD read : %04X %04X\n", port, ret); @@ -380,7 +363,6 @@ dma_sg_readw(uint16_t port, void *priv) return ret; } - static uint32_t dma_sg_readl(uint16_t port, void *priv) { @@ -391,17 +373,17 @@ dma_sg_readl(uint16_t port, void *priv) port &= 0xff; if (port < 0x20) - port &= 0xf8; + port &= 0xf8; else - port &= 0xe3; + port &= 0xe3; switch (port) { - case 0x08: - ret = (uint32_t) dma_sg_read(port, priv); - break; - case 0x20: - ret = dev->ptr0 | (dev->ptr & 0xffffff00); - break; + case 0x08: + ret = (uint32_t) dma_sg_read(port, priv); + break; + case 0x20: + ret = dev->ptr0 | (dev->ptr & 0xffffff00); + break; } dma_log("DMA S/G DWORD read : %04X %08X\n", port, ret); @@ -409,93 +391,89 @@ dma_sg_readl(uint16_t port, void *priv) return ret; } - static void dma_ext_mode_write(uint16_t addr, uint8_t val, void *priv) { int channel = (val & 0x03); if (addr == 0x4d6) - channel |= 4; + channel |= 4; dma[channel].ext_mode = val & 0x7c; switch ((val > 2) & 0x03) { - case 0x00: - dma[channel].transfer_mode = 0x0101; - break; - case 0x01: - dma[channel].transfer_mode = 0x0202; - break; - case 0x02: /* 0x02 is reserved. */ - /* Logic says this should be an undocumented mode that counts by words, - but is 8-bit I/O, thus only transferring every second byte. */ - dma[channel].transfer_mode = 0x0201; - break; - case 0x03: - dma[channel].transfer_mode = 0x0102; - break; + case 0x00: + dma[channel].transfer_mode = 0x0101; + break; + case 0x01: + dma[channel].transfer_mode = 0x0202; + break; + case 0x02: /* 0x02 is reserved. */ + /* Logic says this should be an undocumented mode that counts by words, + but is 8-bit I/O, thus only transferring every second byte. */ + dma[channel].transfer_mode = 0x0201; + break; + case 0x03: + dma[channel].transfer_mode = 0x0102; + break; } } - static uint8_t dma_sg_int_status_read(uint16_t addr, void *priv) { - int i; + int i; uint8_t ret = 0x00; for (i = 0; i < 8; i++) { - if (i != 4) - ret = (!!(dma[i].sg_status & 8)) << i; + if (i != 4) + ret = (!!(dma[i].sg_status & 8)) << i; } return ret; } - static uint8_t dma_read(uint16_t addr, void *priv) { - int channel = (addr >> 1) & 3; + int channel = (addr >> 1) & 3; uint8_t temp; switch (addr & 0xf) { - case 0: - case 2: - case 4: - case 6: /*Address registers*/ - dma_wp[0] ^= 1; - if (dma_wp[0]) - return(dma[channel].ac & 0xff); - return((dma[channel].ac >> 8) & 0xff); + case 0: + case 2: + case 4: + case 6: /*Address registers*/ + dma_wp[0] ^= 1; + if (dma_wp[0]) + return (dma[channel].ac & 0xff); + return ((dma[channel].ac >> 8) & 0xff); - case 1: - case 3: - case 5: - case 7: /*Count registers*/ - dma_wp[0] ^= 1; - if (dma_wp[0]) - temp = dma[channel].cc & 0xff; - else - temp = dma[channel].cc >> 8; - return(temp); + case 1: + case 3: + case 5: + case 7: /*Count registers*/ + dma_wp[0] ^= 1; + if (dma_wp[0]) + temp = dma[channel].cc & 0xff; + else + temp = dma[channel].cc >> 8; + return (temp); - case 8: /*Status register*/ - temp = dma_stat_rq_pc & 0xf; - temp <<= 4; - temp |= dma_stat & 0xf; - dma_stat &= ~0xf; - return(temp); + case 8: /*Status register*/ + temp = dma_stat_rq_pc & 0xf; + temp <<= 4; + temp |= dma_stat & 0xf; + dma_stat &= ~0xf; + return (temp); - case 0xd: /*Temporary register*/ - return(0); + case 0xd: /*Temporary register*/ + return (0); } - return(dmaregs[0][addr & 0xf]); + return (dmaregs[0][addr & 0xf]); } - static void dma_write(uint16_t addr, uint8_t val, void *priv) { @@ -503,295 +481,291 @@ dma_write(uint16_t addr, uint8_t val, void *priv) dmaregs[0][addr & 0xf] = val; switch (addr & 0xf) { - case 0: - case 2: - case 4: - case 6: /*Address registers*/ - dma_wp[0] ^= 1; - if (dma_wp[0]) - dma[channel].ab = (dma[channel].ab & 0xffffff00 & dma_mask) | val; - else - dma[channel].ab = (dma[channel].ab & 0xffff00ff & dma_mask) | (val << 8); - dma[channel].ac = dma[channel].ab; - return; + case 0: + case 2: + case 4: + case 6: /*Address registers*/ + dma_wp[0] ^= 1; + if (dma_wp[0]) + dma[channel].ab = (dma[channel].ab & 0xffffff00 & dma_mask) | val; + else + dma[channel].ab = (dma[channel].ab & 0xffff00ff & dma_mask) | (val << 8); + dma[channel].ac = dma[channel].ab; + return; - case 1: - case 3: - case 5: - case 7: /*Count registers*/ - dma_wp[0] ^= 1; - if (dma_wp[0]) - dma[channel].cb = (dma[channel].cb & 0xff00) | val; - else - dma[channel].cb = (dma[channel].cb & 0x00ff) | (val << 8); - dma[channel].cc = dma[channel].cb; - return; + case 1: + case 3: + case 5: + case 7: /*Count registers*/ + dma_wp[0] ^= 1; + if (dma_wp[0]) + dma[channel].cb = (dma[channel].cb & 0xff00) | val; + else + dma[channel].cb = (dma[channel].cb & 0x00ff) | (val << 8); + dma[channel].cc = dma[channel].cb; + return; - case 8: /*Control register*/ - dma_command[0] = val; - if (val & 0x01) - pclog("[%08X:%04X] Memory-to-memory enable\n", CS, cpu_state.pc); - return; + case 8: /*Control register*/ + dma_command[0] = val; + if (val & 0x01) + pclog("[%08X:%04X] Memory-to-memory enable\n", CS, cpu_state.pc); + return; - case 9: /*Request register */ - channel = (val & 3); - if (val & 4) { - dma_stat_rq_pc |= (1 << channel); - if ((channel == 0) && (dma_command[0] & 0x01)) { - pclog("Memory to memory transfer start\n"); - dma_mem_to_mem_transfer(); - } else - dma_block_transfer(channel); - } else - dma_stat_rq_pc &= ~(1 << channel); - break; + case 9: /*Request register */ + channel = (val & 3); + if (val & 4) { + dma_stat_rq_pc |= (1 << channel); + if ((channel == 0) && (dma_command[0] & 0x01)) { + pclog("Memory to memory transfer start\n"); + dma_mem_to_mem_transfer(); + } else + dma_block_transfer(channel); + } else + dma_stat_rq_pc &= ~(1 << channel); + break; - case 0xa: /*Mask*/ - channel = (val & 3); - if (val & 4) - dma_m |= (1 << channel); - else - dma_m &= ~(1 << channel); - return; + case 0xa: /*Mask*/ + channel = (val & 3); + if (val & 4) + dma_m |= (1 << channel); + else + dma_m &= ~(1 << channel); + return; - case 0xb: /*Mode*/ - channel = (val & 3); - dma[channel].mode = val; - if (dma_ps2.is_ps2) { - dma[channel].ps2_mode &= ~0x1c; - if (val & 0x20) - dma[channel].ps2_mode |= 0x10; - if ((val & 0xc) == 8) - dma[channel].ps2_mode |= 4; - else if ((val & 0xc) == 4) - dma[channel].ps2_mode |= 0xc; - } - return; + case 0xb: /*Mode*/ + channel = (val & 3); + dma[channel].mode = val; + if (dma_ps2.is_ps2) { + dma[channel].ps2_mode &= ~0x1c; + if (val & 0x20) + dma[channel].ps2_mode |= 0x10; + if ((val & 0xc) == 8) + dma[channel].ps2_mode |= 4; + else if ((val & 0xc) == 4) + dma[channel].ps2_mode |= 0xc; + } + return; - case 0xc: /*Clear FF*/ - dma_wp[0] = 0; - return; + case 0xc: /*Clear FF*/ + dma_wp[0] = 0; + return; - case 0xd: /*Master clear*/ - dma_wp[0] = 0; - dma_m |= 0xf; - dma_stat_rq_pc &= ~0x0f; - return; + case 0xd: /*Master clear*/ + dma_wp[0] = 0; + dma_m |= 0xf; + dma_stat_rq_pc &= ~0x0f; + return; - case 0xe: /*Clear mask*/ - dma_m &= 0xf0; - return; + case 0xe: /*Clear mask*/ + dma_m &= 0xf0; + return; - case 0xf: /*Mask write*/ - dma_m = (dma_m & 0xf0) | (val & 0xf); - return; + case 0xf: /*Mask write*/ + dma_m = (dma_m & 0xf0) | (val & 0xf); + return; } } - static uint8_t dma_ps2_read(uint16_t addr, void *priv) { - dma_t *dma_c = &dma[dma_ps2.xfr_channel]; - uint8_t temp = 0xff; + dma_t *dma_c = &dma[dma_ps2.xfr_channel]; + uint8_t temp = 0xff; switch (addr) { - case 0x1a: - switch (dma_ps2.xfr_command) { - case 2: /*Address*/ - case 3: - switch (dma_ps2.byte_ptr) { - case 0: - temp = dma_c->ac & 0xff; - dma_ps2.byte_ptr = 1; - break; - case 1: - temp = (dma_c->ac >> 8) & 0xff; - dma_ps2.byte_ptr = 2; - break; - case 2: - temp = (dma_c->ac >> 16) & 0xff; - dma_ps2.byte_ptr = 0; - break; - } - break; + case 0x1a: + switch (dma_ps2.xfr_command) { + case 2: /*Address*/ + case 3: + switch (dma_ps2.byte_ptr) { + case 0: + temp = dma_c->ac & 0xff; + dma_ps2.byte_ptr = 1; + break; + case 1: + temp = (dma_c->ac >> 8) & 0xff; + dma_ps2.byte_ptr = 2; + break; + case 2: + temp = (dma_c->ac >> 16) & 0xff; + dma_ps2.byte_ptr = 0; + break; + } + break; - case 4: /*Count*/ - case 5: - if (dma_ps2.byte_ptr) - temp = dma_c->cc >> 8; - else - temp = dma_c->cc & 0xff; - dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; - break; + case 4: /*Count*/ + case 5: + if (dma_ps2.byte_ptr) + temp = dma_c->cc >> 8; + else + temp = dma_c->cc & 0xff; + dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; + break; - case 6: /*Read DMA status*/ - if (dma_ps2.byte_ptr) { - temp = ((dma_stat_rq & 0xf0) >> 4) | (dma_stat & 0xf0); - dma_stat &= ~0xf0; - dma_stat_rq &= ~0xf0; - } else { - temp = (dma_stat_rq & 0xf) | ((dma_stat & 0xf) << 4); - dma_stat &= ~0xf; - dma_stat_rq &= ~0xf; - } - dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; - break; + case 6: /*Read DMA status*/ + if (dma_ps2.byte_ptr) { + temp = ((dma_stat_rq & 0xf0) >> 4) | (dma_stat & 0xf0); + dma_stat &= ~0xf0; + dma_stat_rq &= ~0xf0; + } else { + temp = (dma_stat_rq & 0xf) | ((dma_stat & 0xf) << 4); + dma_stat &= ~0xf; + dma_stat_rq &= ~0xf; + } + dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; + break; - case 7: /*Mode*/ - temp = dma_c->ps2_mode; - break; + case 7: /*Mode*/ + temp = dma_c->ps2_mode; + break; - case 8: /*Arbitration Level*/ - temp = dma_c->arb_level; - break; + case 8: /*Arbitration Level*/ + temp = dma_c->arb_level; + break; - default: - fatal("Bad XFR Read command %i channel %i\n", dma_ps2.xfr_command, dma_ps2.xfr_channel); - } - break; + default: + fatal("Bad XFR Read command %i channel %i\n", dma_ps2.xfr_command, dma_ps2.xfr_channel); + } + break; } - return(temp); + return (temp); } - static void dma_ps2_write(uint16_t addr, uint8_t val, void *priv) { - dma_t *dma_c = &dma[dma_ps2.xfr_channel]; + dma_t *dma_c = &dma[dma_ps2.xfr_channel]; uint8_t mode; switch (addr) { - case 0x18: - dma_ps2.xfr_channel = val & 0x7; - dma_ps2.xfr_command = val >> 4; - dma_ps2.byte_ptr = 0; - switch (dma_ps2.xfr_command) { - case 9: /*Set DMA mask*/ - dma_m |= (1 << dma_ps2.xfr_channel); - break; + case 0x18: + dma_ps2.xfr_channel = val & 0x7; + dma_ps2.xfr_command = val >> 4; + dma_ps2.byte_ptr = 0; + switch (dma_ps2.xfr_command) { + case 9: /*Set DMA mask*/ + dma_m |= (1 << dma_ps2.xfr_channel); + break; - case 0xa: /*Reset DMA mask*/ - dma_m &= ~(1 << dma_ps2.xfr_channel); - break; + case 0xa: /*Reset DMA mask*/ + dma_m &= ~(1 << dma_ps2.xfr_channel); + break; - case 0xb: - if (!(dma_m & (1 << dma_ps2.xfr_channel))) - dma_ps2_run(dma_ps2.xfr_channel); - break; - } - break; + case 0xb: + if (!(dma_m & (1 << dma_ps2.xfr_channel))) + dma_ps2_run(dma_ps2.xfr_channel); + break; + } + break; - case 0x1a: - switch (dma_ps2.xfr_command) { - case 0: /*I/O address*/ - if (dma_ps2.byte_ptr) - dma_c->io_addr = (dma_c->io_addr & 0x00ff) | (val << 8); - else - dma_c->io_addr = (dma_c->io_addr & 0xff00) | val; - dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; - break; + case 0x1a: + switch (dma_ps2.xfr_command) { + case 0: /*I/O address*/ + if (dma_ps2.byte_ptr) + dma_c->io_addr = (dma_c->io_addr & 0x00ff) | (val << 8); + else + dma_c->io_addr = (dma_c->io_addr & 0xff00) | val; + dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; + break; - case 2: /*Address*/ - switch (dma_ps2.byte_ptr) { - case 0: - dma_c->ac = (dma_c->ac & 0xffff00) | val; - dma_ps2.byte_ptr = 1; - break; + case 2: /*Address*/ + switch (dma_ps2.byte_ptr) { + case 0: + dma_c->ac = (dma_c->ac & 0xffff00) | val; + dma_ps2.byte_ptr = 1; + break; - case 1: - dma_c->ac = (dma_c->ac & 0xff00ff) | (val << 8); - dma_ps2.byte_ptr = 2; - break; + case 1: + dma_c->ac = (dma_c->ac & 0xff00ff) | (val << 8); + dma_ps2.byte_ptr = 2; + break; - case 2: - dma_c->ac = (dma_c->ac & 0x00ffff) | (val << 16); - dma_ps2.byte_ptr = 0; - break; - } - dma_c->ab = dma_c->ac; - break; + case 2: + dma_c->ac = (dma_c->ac & 0x00ffff) | (val << 16); + dma_ps2.byte_ptr = 0; + break; + } + dma_c->ab = dma_c->ac; + break; - case 4: /*Count*/ - if (dma_ps2.byte_ptr) - dma_c->cc = (dma_c->cc & 0xff) | (val << 8); - else - dma_c->cc = (dma_c->cc & 0xff00) | val; - dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; - dma_c->cb = dma_c->cc; - break; + case 4: /*Count*/ + if (dma_ps2.byte_ptr) + dma_c->cc = (dma_c->cc & 0xff) | (val << 8); + else + dma_c->cc = (dma_c->cc & 0xff00) | val; + dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1; + dma_c->cb = dma_c->cc; + break; - case 7: /*Mode register*/ - mode = 0; - if (val & DMA_PS2_DEC2) - mode |= 0x20; - if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_MEM_TO_IO) - mode |= 8; - else if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_IO_TO_MEM) - mode |= 4; - dma_c->mode = (dma_c->mode & ~0x2c) | mode; - if (val & DMA_PS2_AUTOINIT) - dma_c->mode |= 0x10; - dma_c->ps2_mode = val; - dma_c->size = val & DMA_PS2_SIZE16; - break; + case 7: /*Mode register*/ + mode = 0; + if (val & DMA_PS2_DEC2) + mode |= 0x20; + if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_MEM_TO_IO) + mode |= 8; + else if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_IO_TO_MEM) + mode |= 4; + dma_c->mode = (dma_c->mode & ~0x2c) | mode; + if (val & DMA_PS2_AUTOINIT) + dma_c->mode |= 0x10; + dma_c->ps2_mode = val; + dma_c->size = val & DMA_PS2_SIZE16; + break; - case 8: /*Arbitration Level*/ - dma_c->arb_level = val; - break; + case 8: /*Arbitration Level*/ + dma_c->arb_level = val; + break; - default: - fatal("Bad XFR command %i channel %i val %02x\n", dma_ps2.xfr_command, dma_ps2.xfr_channel, val); - } - break; + default: + fatal("Bad XFR command %i channel %i val %02x\n", dma_ps2.xfr_command, dma_ps2.xfr_channel, val); + } + break; } } - static uint8_t dma16_read(uint16_t addr, void *priv) { - int channel = ((addr >> 2) & 3) + 4; + int channel = ((addr >> 2) & 3) + 4; uint8_t temp; addr >>= 1; switch (addr & 0xf) { - case 0: - case 2: - case 4: - case 6: /*Address registers*/ - dma_wp[1] ^= 1; - if (dma_ps2.is_ps2) { - if (dma_wp[1]) - return(dma[channel].ac); - return((dma[channel].ac >> 8) & 0xff); - } - if (dma_wp[1]) - return((dma[channel].ac >> 1) & 0xff); - return((dma[channel].ac >> 9) & 0xff); + case 0: + case 2: + case 4: + case 6: /*Address registers*/ + dma_wp[1] ^= 1; + if (dma_ps2.is_ps2) { + if (dma_wp[1]) + return (dma[channel].ac); + return ((dma[channel].ac >> 8) & 0xff); + } + if (dma_wp[1]) + return ((dma[channel].ac >> 1) & 0xff); + return ((dma[channel].ac >> 9) & 0xff); - case 1: - case 3: - case 5: - case 7: /*Count registers*/ - dma_wp[1] ^= 1; - if (dma_wp[1]) - temp = dma[channel].cc & 0xff; - else - temp = dma[channel].cc >> 8; - return(temp); + case 1: + case 3: + case 5: + case 7: /*Count registers*/ + dma_wp[1] ^= 1; + if (dma_wp[1]) + temp = dma[channel].cc & 0xff; + else + temp = dma[channel].cc >> 8; + return (temp); - case 8: /*Status register*/ - temp = (dma_stat_rq_pc & 0xf0); - temp |= dma_stat >> 4; - dma_stat &= ~0xf0; - return(temp); + case 8: /*Status register*/ + temp = (dma_stat_rq_pc & 0xf0); + temp |= dma_stat >> 4; + dma_stat &= ~0xf0; + return (temp); } - return(dmaregs[1][addr & 0xf]); + return (dmaregs[1][addr & 0xf]); } - static void dma16_write(uint16_t addr, uint8_t val, void *priv) { @@ -800,94 +774,95 @@ dma16_write(uint16_t addr, uint8_t val, void *priv) dmaregs[1][addr & 0xf] = val; switch (addr & 0xf) { - case 0: - case 2: - case 4: - case 6: /*Address registers*/ - dma_wp[1] ^= 1; - if (dma_ps2.is_ps2) { - if (dma_wp[1]) - dma[channel].ab = (dma[channel].ab & 0xffffff00 & dma_mask) | val; - else - dma[channel].ab = (dma[channel].ab & 0xffff00ff & dma_mask) | (val << 8); - } else { - if (dma_wp[1]) - dma[channel].ab = (dma[channel].ab & 0xfffffe00 & dma_mask) | (val << 1); - else - dma[channel].ab = (dma[channel].ab & 0xfffe01ff & dma_mask) | (val << 9); - } - dma[channel].ac = dma[channel].ab; - return; + case 0: + case 2: + case 4: + case 6: /*Address registers*/ + dma_wp[1] ^= 1; + if (dma_ps2.is_ps2) { + if (dma_wp[1]) + dma[channel].ab = (dma[channel].ab & 0xffffff00 & dma_mask) | val; + else + dma[channel].ab = (dma[channel].ab & 0xffff00ff & dma_mask) | (val << 8); + } else { + if (dma_wp[1]) + dma[channel].ab = (dma[channel].ab & 0xfffffe00 & dma_mask) | (val << 1); + else + dma[channel].ab = (dma[channel].ab & 0xfffe01ff & dma_mask) | (val << 9); + } + dma[channel].ac = dma[channel].ab; + return; - case 1: - case 3: - case 5: - case 7: /*Count registers*/ - dma_wp[1] ^= 1; - if (dma_wp[1]) - dma[channel].cb = (dma[channel].cb & 0xff00) | val; - else - dma[channel].cb = (dma[channel].cb & 0x00ff) | (val << 8); - dma[channel].cc = dma[channel].cb; - return; + case 1: + case 3: + case 5: + case 7: /*Count registers*/ + dma_wp[1] ^= 1; + if (dma_wp[1]) + dma[channel].cb = (dma[channel].cb & 0xff00) | val; + else + dma[channel].cb = (dma[channel].cb & 0x00ff) | (val << 8); + dma[channel].cc = dma[channel].cb; + return; - case 8: /*Control register*/ - return; + case 8: /*Control register*/ + return; - case 9: /*Request register */ - channel = (val & 3) + 4; - if (val & 4) { - dma_stat_rq_pc |= (1 << channel); - dma_block_transfer(channel); - } else - dma_stat_rq_pc &= ~(1 << channel); - break; + case 9: /*Request register */ + channel = (val & 3) + 4; + if (val & 4) { + dma_stat_rq_pc |= (1 << channel); + dma_block_transfer(channel); + } else + dma_stat_rq_pc &= ~(1 << channel); + break; - case 0xa: /*Mask*/ - channel = (val & 3); - if (val & 4) - dma_m |= (0x10 << channel); - else - dma_m &= ~(0x10 << channel); - return; + case 0xa: /*Mask*/ + channel = (val & 3); + if (val & 4) + dma_m |= (0x10 << channel); + else + dma_m &= ~(0x10 << channel); + return; - case 0xb: /*Mode*/ - channel = (val & 3) + 4; - dma[channel].mode = val; - if (dma_ps2.is_ps2) { - dma[channel].ps2_mode &= ~0x1c; - if (val & 0x20) - dma[channel].ps2_mode |= 0x10; - if ((val & 0xc) == 8) - dma[channel].ps2_mode |= 4; - else if ((val & 0xc) == 4) - dma[channel].ps2_mode |= 0xc; - } - return; + case 0xb: /*Mode*/ + channel = (val & 3) + 4; + dma[channel].mode = val; + if (dma_ps2.is_ps2) { + dma[channel].ps2_mode &= ~0x1c; + if (val & 0x20) + dma[channel].ps2_mode |= 0x10; + if ((val & 0xc) == 8) + dma[channel].ps2_mode |= 4; + else if ((val & 0xc) == 4) + dma[channel].ps2_mode |= 0xc; + } + return; - case 0xc: /*Clear FF*/ - dma_wp[1] = 0; - return; + case 0xc: /*Clear FF*/ + dma_wp[1] = 0; + return; - case 0xd: /*Master clear*/ - dma_wp[1] = 0; - dma_m |= 0xf0; - dma_stat_rq_pc &= ~0xf0; - return; + case 0xd: /*Master clear*/ + dma_wp[1] = 0; + dma_m |= 0xf0; + dma_stat_rq_pc &= ~0xf0; + return; - case 0xe: /*Clear mask*/ - dma_m &= 0x0f; - return; + case 0xe: /*Clear mask*/ + dma_m &= 0x0f; + return; - case 0xf: /*Mask write*/ - dma_m = (dma_m & 0x0f) | ((val & 0xf) << 4); - return; + case 0xf: /*Mask write*/ + dma_m = (dma_m & 0x0f) | ((val & 0xf) << 4); + return; } } - -#define CHANNELS { 8, 2, 3, 1, 8, 8, 8, 0 } - +#define CHANNELS \ + { \ + 8, 2, 3, 1, 8, 8, 8, 0 \ + } static void dma_page_write(uint16_t addr, uint8_t val, void *priv) @@ -896,54 +871,52 @@ dma_page_write(uint16_t addr, uint8_t val, void *priv) #ifdef USE_DYNAREC if ((addr == 0x84) && cpu_use_dynarec) - update_tsc(); + update_tsc(); #endif addr &= 0x0f; dmaregs[2][addr] = val; if (addr >= 8) - addr = convert[addr & 0x07] | 4; + addr = convert[addr & 0x07] | 4; else - addr = convert[addr & 0x07]; + addr = convert[addr & 0x07]; if (addr < 8) { - dma[addr].page_l = val; + dma[addr].page_l = val; - if (addr > 4) { - dma[addr].page = val & 0xfe; - dma[addr].ab = (dma[addr].ab & 0xff01ffff & dma_mask) | (dma[addr].page << 16); - dma[addr].ac = (dma[addr].ac & 0xff01ffff & dma_mask) | (dma[addr].page << 16); - } else { - dma[addr].page = (dma_at) ? val : val & 0xf; - dma[addr].ab = (dma[addr].ab & 0xff00ffff & dma_mask) | (dma[addr].page << 16); - dma[addr].ac = (dma[addr].ac & 0xff00ffff & dma_mask) | (dma[addr].page << 16); - } + if (addr > 4) { + dma[addr].page = val & 0xfe; + dma[addr].ab = (dma[addr].ab & 0xff01ffff & dma_mask) | (dma[addr].page << 16); + dma[addr].ac = (dma[addr].ac & 0xff01ffff & dma_mask) | (dma[addr].page << 16); + } else { + dma[addr].page = (dma_at) ? val : val & 0xf; + dma[addr].ab = (dma[addr].ab & 0xff00ffff & dma_mask) | (dma[addr].page << 16); + dma[addr].ac = (dma[addr].ac & 0xff00ffff & dma_mask) | (dma[addr].page << 16); + } } } - static uint8_t dma_page_read(uint16_t addr, void *priv) { uint8_t convert[8] = CHANNELS; - uint8_t ret = 0xff; + uint8_t ret = 0xff; addr &= 0x0f; ret = dmaregs[2][addr]; if (addr >= 8) - addr = convert[addr & 0x07] | 4; + addr = convert[addr & 0x07] | 4; else - addr = convert[addr & 0x07]; + addr = convert[addr & 0x07]; if (addr < 8) - ret = dma[addr].page_l; + ret = dma[addr].page_l; return ret; } - static void dma_high_page_write(uint16_t addr, uint8_t val, void *priv) { @@ -952,47 +925,44 @@ dma_high_page_write(uint16_t addr, uint8_t val, void *priv) addr &= 0x0f; if (addr >= 8) - addr = convert[addr & 0x07] | 4; + addr = convert[addr & 0x07] | 4; else - addr = convert[addr & 0x07]; + addr = convert[addr & 0x07]; if (addr < 8) { - dma[addr].page_h = val; + dma[addr].page_h = val; - dma[addr].ab = ((dma[addr].ab & 0xffffff) | (dma[addr].page << 24)) & dma_mask; - dma[addr].ac = ((dma[addr].ac & 0xffffff) | (dma[addr].page << 24)) & dma_mask; + dma[addr].ab = ((dma[addr].ab & 0xffffff) | (dma[addr].page << 24)) & dma_mask; + dma[addr].ac = ((dma[addr].ac & 0xffffff) | (dma[addr].page << 24)) & dma_mask; } } - static uint8_t dma_high_page_read(uint16_t addr, void *priv) { uint8_t convert[8] = CHANNELS; - uint8_t ret = 0xff; + uint8_t ret = 0xff; addr &= 0x0f; if (addr >= 8) - addr = convert[addr & 0x07] | 4; + addr = convert[addr & 0x07] | 4; else - addr = convert[addr & 0x07]; + addr = convert[addr & 0x07]; if (addr < 8) - ret = dma[addr].page_h; + ret = dma[addr].page_h; return ret; } - void dma_set_params(uint8_t advanced, uint32_t mask) { dma_advanced = advanced; - dma_mask = mask; + dma_mask = mask; } - void dma_set_mask(uint32_t mask) { @@ -1001,43 +971,41 @@ dma_set_mask(uint32_t mask) dma_mask = mask; for (i = 0; i < 8; i++) { - dma[i].ab &= mask; - dma[i].ac &= mask; + dma[i].ab &= mask; + dma[i].ac &= mask; } } - void dma_set_at(uint8_t at) { dma_at = at; } - void dma_reset(void) { int c; dma_wp[0] = dma_wp[1] = 0; - dma_m = 0; + dma_m = 0; dma_e = 0xff; for (c = 0; c < 16; c++) - dmaregs[0][c] = dmaregs[1][c] = 0; + dmaregs[0][c] = dmaregs[1][c] = 0; for (c = 0; c < 8; c++) { - memset(&(dma[c]), 0x00, sizeof(dma_t)); - dma[c].size = (c & 4) ? 1 : 0; - dma[c].transfer_mode = (c & 4) ? 0x0202 : 0x0101; + memset(&(dma[c]), 0x00, sizeof(dma_t)); + dma[c].size = (c & 4) ? 1 : 0; + dma[c].transfer_mode = (c & 4) ? 0x0202 : 0x0101; } - dma_stat = 0x00; - dma_stat_rq = 0x00; - dma_stat_rq_pc = 0x00; + dma_stat = 0x00; + dma_stat_rq = 0x00; + dma_stat_rq_pc = 0x00; dma_req_is_soft = 0; - dma_advanced = 0; + dma_advanced = 0; memset(dma_buffer, 0x00, sizeof(dma_buffer)); memset(dma16_buffer, 0x00, sizeof(dma16_buffer)); @@ -1050,34 +1018,32 @@ dma_reset(void) dma_at = is286; } - void dma_remove_sg(void) { int i; io_removehandler(dma_sg_base + 0x0a, 0x01, - dma_sg_int_status_read, NULL, NULL, - NULL, NULL, NULL, - NULL); + dma_sg_int_status_read, NULL, NULL, + NULL, NULL, NULL, + NULL); for (i = 0; i < 8; i++) { - io_removehandler(dma_sg_base + 0x10 + i, 0x01, - dma_sg_read, dma_sg_readw, dma_sg_readl, - dma_sg_write, dma_sg_writew, dma_sg_writel, - &dma[i]); - io_removehandler(dma_sg_base + 0x18 + i, 0x01, - dma_sg_read, dma_sg_readw, dma_sg_readl, - dma_sg_write, dma_sg_writew, dma_sg_writel, - &dma[i]); - io_removehandler(dma_sg_base + 0x20 + i, 0x04, - dma_sg_read, dma_sg_readw, dma_sg_readl, - dma_sg_write, dma_sg_writew, dma_sg_writel, - &dma[i]); + io_removehandler(dma_sg_base + 0x10 + i, 0x01, + dma_sg_read, dma_sg_readw, dma_sg_readl, + dma_sg_write, dma_sg_writew, dma_sg_writel, + &dma[i]); + io_removehandler(dma_sg_base + 0x18 + i, 0x01, + dma_sg_read, dma_sg_readw, dma_sg_readl, + dma_sg_write, dma_sg_writew, dma_sg_writel, + &dma[i]); + io_removehandler(dma_sg_base + 0x20 + i, 0x04, + dma_sg_read, dma_sg_readw, dma_sg_readl, + dma_sg_write, dma_sg_writew, dma_sg_writel, + &dma[i]); } } - void dma_set_sg_base(uint8_t sg_base) { @@ -1086,134 +1052,123 @@ dma_set_sg_base(uint8_t sg_base) dma_sg_base = sg_base << 8; io_sethandler(dma_sg_base + 0x0a, 0x01, - dma_sg_int_status_read, NULL, NULL, - NULL, NULL, NULL, - NULL); + dma_sg_int_status_read, NULL, NULL, + NULL, NULL, NULL, + NULL); for (i = 0; i < 8; i++) { - io_sethandler(dma_sg_base + 0x10 + i, 0x01, - dma_sg_read, dma_sg_readw, dma_sg_readl, - dma_sg_write, dma_sg_writew, dma_sg_writel, - &dma[i]); - io_sethandler(dma_sg_base + 0x18 + i, 0x01, - dma_sg_read, dma_sg_readw, dma_sg_readl, - dma_sg_write, dma_sg_writew, dma_sg_writel, - &dma[i]); - io_sethandler(dma_sg_base + 0x20 + i, 0x04, - dma_sg_read, dma_sg_readw, dma_sg_readl, - dma_sg_write, dma_sg_writew, dma_sg_writel, - &dma[i]); + io_sethandler(dma_sg_base + 0x10 + i, 0x01, + dma_sg_read, dma_sg_readw, dma_sg_readl, + dma_sg_write, dma_sg_writew, dma_sg_writel, + &dma[i]); + io_sethandler(dma_sg_base + 0x18 + i, 0x01, + dma_sg_read, dma_sg_readw, dma_sg_readl, + dma_sg_write, dma_sg_writew, dma_sg_writel, + &dma[i]); + io_sethandler(dma_sg_base + 0x20 + i, 0x04, + dma_sg_read, dma_sg_readw, dma_sg_readl, + dma_sg_write, dma_sg_writew, dma_sg_writel, + &dma[i]); } } - void dma_ext_mode_init(void) { io_sethandler(0x040b, 0x01, - NULL,NULL,NULL, dma_ext_mode_write,NULL,NULL, NULL); + NULL, NULL, NULL, dma_ext_mode_write, NULL, NULL, NULL); io_sethandler(0x04d6, 0x01, - NULL,NULL,NULL, dma_ext_mode_write,NULL,NULL, NULL); + NULL, NULL, NULL, dma_ext_mode_write, NULL, NULL, NULL); } - void dma_high_page_init(void) { io_sethandler(0x0480, 8, - dma_high_page_read,NULL,NULL, dma_high_page_write,NULL,NULL, NULL); + dma_high_page_read, NULL, NULL, dma_high_page_write, NULL, NULL, NULL); } - void dma_init(void) { dma_reset(); io_sethandler(0x0000, 16, - dma_read,NULL,NULL, dma_write,NULL,NULL, NULL); + dma_read, NULL, NULL, dma_write, NULL, NULL, NULL); io_sethandler(0x0080, 8, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); dma_ps2.is_ps2 = 0; } - void dma16_init(void) { dma_reset(); io_sethandler(0x00C0, 32, - dma16_read,NULL,NULL, dma16_write,NULL,NULL, NULL); + dma16_read, NULL, NULL, dma16_write, NULL, NULL, NULL); io_sethandler(0x0088, 8, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); } - void dma_alias_set(void) { io_sethandler(0x0090, 2, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); io_sethandler(0x0093, 13, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); } - void dma_alias_set_piix(void) { io_sethandler(0x0090, 1, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); io_sethandler(0x0094, 3, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); io_sethandler(0x0098, 1, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); io_sethandler(0x009C, 3, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); } - void dma_alias_remove(void) { io_removehandler(0x0090, 2, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); io_removehandler(0x0093, 13, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); } - void dma_alias_remove_piix(void) { io_removehandler(0x0090, 1, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); io_removehandler(0x0094, 3, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); io_removehandler(0x0098, 1, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); io_removehandler(0x009C, 3, - dma_page_read,NULL,NULL, dma_page_write,NULL,NULL, NULL); + dma_page_read, NULL, NULL, dma_page_write, NULL, NULL, NULL); } - void ps2_dma_init(void) { dma_reset(); io_sethandler(0x0018, 1, - dma_ps2_read,NULL,NULL, dma_ps2_write,NULL,NULL, NULL); + dma_ps2_read, NULL, NULL, dma_ps2_write, NULL, NULL, NULL); io_sethandler(0x001a, 1, - dma_ps2_read,NULL,NULL, dma_ps2_write,NULL,NULL, NULL); + dma_ps2_read, NULL, NULL, dma_ps2_write, NULL, NULL, NULL); dma_ps2.is_ps2 = 1; } - -extern void dma_bm_read(uint32_t PhysAddress, uint8_t *DataRead, uint32_t TotalSize, int TransferSize); -extern void dma_bm_write(uint32_t PhysAddress, const uint8_t *DataWrite, uint32_t TotalSize, int TransferSize); - +extern void dma_bm_read(uint32_t PhysAddress, uint8_t *DataRead, uint32_t TotalSize, int TransferSize); +extern void dma_bm_write(uint32_t PhysAddress, const uint8_t *DataWrite, uint32_t TotalSize, int TransferSize); static int dma_sg(uint8_t *data, int transfer_length, int out, void *priv) @@ -1230,479 +1185,466 @@ dma_sg(uint8_t *data, int transfer_length, int out, void *priv) #endif if (!(dev->sg_status & 1)) - return 2; /*S/G disabled*/ + return 2; /*S/G disabled*/ dma_log("DMA S/G %s: %i bytes\n", out ? "write" : "read", transfer_length); while (1) { - if (dev->count <= transfer_length) { - dma_log("%sing %i bytes to %08X\n", sop, dev->count, dev->addr); - if (out) - dma_bm_read(dev->addr, (uint8_t *)(data + buffer_pos), dev->count, 4); - else - dma_bm_write(dev->addr, (uint8_t *)(data + buffer_pos), dev->count, 4); - transfer_length -= dev->count; - buffer_pos += dev->count; - } else { - dma_log("%sing %i bytes to %08X\n", sop, transfer_length, dev->addr); - if (out) - dma_bm_read(dev->addr, (uint8_t *)(data + buffer_pos), transfer_length, 4); - else - dma_bm_write(dev->addr, (uint8_t *)(data + buffer_pos), transfer_length, 4); - /* Increase addr and decrease count so that resumed transfers do not mess up. */ - dev->addr += transfer_length; - dev->count -= transfer_length; - transfer_length = 0; - force_end = 1; - } + if (dev->count <= transfer_length) { + dma_log("%sing %i bytes to %08X\n", sop, dev->count, dev->addr); + if (out) + dma_bm_read(dev->addr, (uint8_t *) (data + buffer_pos), dev->count, 4); + else + dma_bm_write(dev->addr, (uint8_t *) (data + buffer_pos), dev->count, 4); + transfer_length -= dev->count; + buffer_pos += dev->count; + } else { + dma_log("%sing %i bytes to %08X\n", sop, transfer_length, dev->addr); + if (out) + dma_bm_read(dev->addr, (uint8_t *) (data + buffer_pos), transfer_length, 4); + else + dma_bm_write(dev->addr, (uint8_t *) (data + buffer_pos), transfer_length, 4); + /* Increase addr and decrease count so that resumed transfers do not mess up. */ + dev->addr += transfer_length; + dev->count -= transfer_length; + transfer_length = 0; + force_end = 1; + } - if (force_end) { - dma_log("Total transfer length smaller than sum of all blocks, partial block\n"); - return 1; /* This block has exhausted the data to transfer and it was smaller than the count, break. */ - } else { - if (!transfer_length && !dev->eot) { - dma_log("Total transfer length smaller than sum of all blocks, full block\n"); - return 1; /* We have exhausted the data to transfer but there's more blocks left, break. */ - } else if (transfer_length && dev->eot) { - dma_log("Total transfer length greater than sum of all blocks\n"); - return 4; /* There is data left to transfer but we have reached EOT - return with error. */ - } else if (dev->eot) { - dma_log("Regular EOT\n"); - return 5; /* We have regularly reached EOT - clear status and break. */ - } else { - /* We have more to transfer and there are blocks left, get next block. */ - dma_sg_next_addr(dev); - } - } + if (force_end) { + dma_log("Total transfer length smaller than sum of all blocks, partial block\n"); + return 1; /* This block has exhausted the data to transfer and it was smaller than the count, break. */ + } else { + if (!transfer_length && !dev->eot) { + dma_log("Total transfer length smaller than sum of all blocks, full block\n"); + return 1; /* We have exhausted the data to transfer but there's more blocks left, break. */ + } else if (transfer_length && dev->eot) { + dma_log("Total transfer length greater than sum of all blocks\n"); + return 4; /* There is data left to transfer but we have reached EOT - return with error. */ + } else if (dev->eot) { + dma_log("Regular EOT\n"); + return 5; /* We have regularly reached EOT - clear status and break. */ + } else { + /* We have more to transfer and there are blocks left, get next block. */ + dma_sg_next_addr(dev); + } + } } return 1; } - uint8_t _dma_read(uint32_t addr, dma_t *dma_c) { uint8_t temp; if (dma_advanced) { - if (dma_c->sg_status & 1) - dma_c->sg_status = (dma_c->sg_status & 0x0f) | (dma_sg(&temp, 1, 1, dma_c) << 4); - else - dma_bm_read(addr, &temp, 1, dma_transfer_size(dma_c)); + if (dma_c->sg_status & 1) + dma_c->sg_status = (dma_c->sg_status & 0x0f) | (dma_sg(&temp, 1, 1, dma_c) << 4); + else + dma_bm_read(addr, &temp, 1, dma_transfer_size(dma_c)); } else - temp = mem_readb_phys(addr); + temp = mem_readb_phys(addr); - return(temp); + return (temp); } - static uint16_t _dma_readw(uint32_t addr, dma_t *dma_c) { uint16_t temp; if (dma_advanced) { - if (dma_c->sg_status & 1) - dma_c->sg_status = (dma_c->sg_status & 0x0f) | (dma_sg((uint8_t *) &temp, 2, 1, dma_c) << 4); - else - dma_bm_read(addr, (uint8_t *) &temp, 2, dma_transfer_size(dma_c)); + if (dma_c->sg_status & 1) + dma_c->sg_status = (dma_c->sg_status & 0x0f) | (dma_sg((uint8_t *) &temp, 2, 1, dma_c) << 4); + else + dma_bm_read(addr, (uint8_t *) &temp, 2, dma_transfer_size(dma_c)); } else - temp = _dma_read(addr, dma_c) | (_dma_read(addr + 1, dma_c) << 8); + temp = _dma_read(addr, dma_c) | (_dma_read(addr + 1, dma_c) << 8); - return(temp); + return (temp); } - static void _dma_write(uint32_t addr, uint8_t val, dma_t *dma_c) { if (dma_advanced) { - if (dma_c->sg_status & 1) - dma_c->sg_status = (dma_c->sg_status & 0x0f) | (dma_sg(&val, 1, 0, dma_c) << 4); - else - dma_bm_write(addr, &val, 1, dma_transfer_size(dma_c)); + if (dma_c->sg_status & 1) + dma_c->sg_status = (dma_c->sg_status & 0x0f) | (dma_sg(&val, 1, 0, dma_c) << 4); + else + dma_bm_write(addr, &val, 1, dma_transfer_size(dma_c)); } else { - mem_writeb_phys(addr, val); - if (dma_at) - mem_invalidate_range(addr, addr); + mem_writeb_phys(addr, val); + if (dma_at) + mem_invalidate_range(addr, addr); } } - static void _dma_writew(uint32_t addr, uint16_t val, dma_t *dma_c) { if (dma_advanced) { - if (dma_c->sg_status & 1) - dma_c->sg_status = (dma_c->sg_status & 0x0f) | (dma_sg((uint8_t *) &val, 2, 0, dma_c) << 4); - else - dma_bm_write(addr, (uint8_t *) &val, 2, dma_transfer_size(dma_c)); + if (dma_c->sg_status & 1) + dma_c->sg_status = (dma_c->sg_status & 0x0f) | (dma_sg((uint8_t *) &val, 2, 0, dma_c) << 4); + else + dma_bm_write(addr, (uint8_t *) &val, 2, dma_transfer_size(dma_c)); } else { - _dma_write(addr, val & 0xff, dma_c); - _dma_write(addr + 1, val >> 8, dma_c); + _dma_write(addr, val & 0xff, dma_c); + _dma_write(addr + 1, val >> 8, dma_c); } } - static void dma_retreat(dma_t *dma_c) { int as = dma_c->transfer_mode >> 8; if (dma->sg_status & 1) { - dma_c->ac = (dma_c->ac - as) & dma_mask; + dma_c->ac = (dma_c->ac - as) & dma_mask; - dma_c->page = dma_c->page_l = (dma_c->ac >> 16) & 0xff; - dma_c->page_h = (dma_c->ac >> 24) & 0xff; + dma_c->page = dma_c->page_l = (dma_c->ac >> 16) & 0xff; + dma_c->page_h = (dma_c->ac >> 24) & 0xff; } else if (as == 2) - dma_c->ac = ((dma_c->ac & 0xfffe0000) & dma_mask) | ((dma_c->ac - as) & 0xffff); + dma_c->ac = ((dma_c->ac & 0xfffe0000) & dma_mask) | ((dma_c->ac - as) & 0xffff); else - dma_c->ac = ((dma_c->ac & 0xffff0000) & dma_mask) | ((dma_c->ac - as) & 0xffff); + dma_c->ac = ((dma_c->ac & 0xffff0000) & dma_mask) | ((dma_c->ac - as) & 0xffff); } - void dma_advance(dma_t *dma_c) { int as = dma_c->transfer_mode >> 8; if (dma->sg_status & 1) { - dma_c->ac = (dma_c->ac + as) & dma_mask; + dma_c->ac = (dma_c->ac + as) & dma_mask; - dma_c->page = dma_c->page_l = (dma_c->ac >> 16) & 0xff; - dma_c->page_h = (dma_c->ac >> 24) & 0xff; + dma_c->page = dma_c->page_l = (dma_c->ac >> 16) & 0xff; + dma_c->page_h = (dma_c->ac >> 24) & 0xff; } else if (as == 2) - dma_c->ac = ((dma_c->ac & 0xfffe0000) & dma_mask) | ((dma_c->ac + as) & 0xffff); + dma_c->ac = ((dma_c->ac & 0xfffe0000) & dma_mask) | ((dma_c->ac + as) & 0xffff); else - dma_c->ac = ((dma_c->ac & 0xffff0000) & dma_mask) | ((dma_c->ac + as) & 0xffff); + dma_c->ac = ((dma_c->ac & 0xffff0000) & dma_mask) | ((dma_c->ac + as) & 0xffff); } - int dma_channel_read(int channel) { - dma_t *dma_c = &dma[channel]; + dma_t *dma_c = &dma[channel]; uint16_t temp; - int tc = 0; + int tc = 0; if (channel < 4) { - if (dma_command[0] & 0x04) - return(DMA_NODATA); + if (dma_command[0] & 0x04) + return (DMA_NODATA); } else { - if (dma_command[1] & 0x04) - return(DMA_NODATA); + if (dma_command[1] & 0x04) + return (DMA_NODATA); } if (!(dma_e & (1 << channel))) - return(DMA_NODATA); + return (DMA_NODATA); if ((dma_m & (1 << channel)) && !dma_req_is_soft) - return(DMA_NODATA); + return (DMA_NODATA); if ((dma_c->mode & 0xC) != 8) - return(DMA_NODATA); + return (DMA_NODATA); if (!dma_at && !channel) - refreshread(); + refreshread(); - if (! dma_c->size) { - temp = _dma_read(dma_c->ac, dma_c); + if (!dma_c->size) { + temp = _dma_read(dma_c->ac, dma_c); - if (dma_c->mode & 0x20) { - if (dma_ps2.is_ps2) - dma_c->ac--; - else if (dma_advanced) - dma_retreat(dma_c); - else - dma_c->ac = (dma_c->ac & 0xffff0000 & dma_mask) | ((dma_c->ac - 1) & 0xffff); - } else { - if (dma_ps2.is_ps2) - dma_c->ac++; - else if (dma_advanced) - dma_advance(dma_c); - else - dma_c->ac = (dma_c->ac & 0xffff0000 & dma_mask) | ((dma_c->ac + 1) & 0xffff); - } + if (dma_c->mode & 0x20) { + if (dma_ps2.is_ps2) + dma_c->ac--; + else if (dma_advanced) + dma_retreat(dma_c); + else + dma_c->ac = (dma_c->ac & 0xffff0000 & dma_mask) | ((dma_c->ac - 1) & 0xffff); + } else { + if (dma_ps2.is_ps2) + dma_c->ac++; + else if (dma_advanced) + dma_advance(dma_c); + else + dma_c->ac = (dma_c->ac & 0xffff0000 & dma_mask) | ((dma_c->ac + 1) & 0xffff); + } } else { - temp = _dma_readw(dma_c->ac, dma_c); + temp = _dma_readw(dma_c->ac, dma_c); - if (dma_c->mode & 0x20) { - if (dma_ps2.is_ps2) - dma_c->ac -= 2; - else if (dma_advanced) - dma_retreat(dma_c); - else - dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac - 2) & 0x1ffff); - } else { - if (dma_ps2.is_ps2) - dma_c->ac += 2; - else if (dma_advanced) - dma_advance(dma_c); - else - dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac + 2) & 0x1ffff); - } + if (dma_c->mode & 0x20) { + if (dma_ps2.is_ps2) + dma_c->ac -= 2; + else if (dma_advanced) + dma_retreat(dma_c); + else + dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac - 2) & 0x1ffff); + } else { + if (dma_ps2.is_ps2) + dma_c->ac += 2; + else if (dma_advanced) + dma_advance(dma_c); + else + dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac + 2) & 0x1ffff); + } } dma_stat_rq |= (1 << channel); dma_c->cc--; if (dma_c->cc < 0) { - if (dma_advanced && (dma_c->sg_status & 1) && !(dma_c->sg_status & 6)) - dma_sg_next_addr(dma_c); - else { - tc = 1; - if (dma_c->mode & 0x10) { /*Auto-init*/ - dma_c->cc = dma_c->cb; - dma_c->ac = dma_c->ab; - } else - dma_m |= (1 << channel); - dma_stat |= (1 << channel); - } + if (dma_advanced && (dma_c->sg_status & 1) && !(dma_c->sg_status & 6)) + dma_sg_next_addr(dma_c); + else { + tc = 1; + if (dma_c->mode & 0x10) { /*Auto-init*/ + dma_c->cc = dma_c->cb; + dma_c->ac = dma_c->ab; + } else + dma_m |= (1 << channel); + dma_stat |= (1 << channel); + } } if (tc) { - if (dma_advanced && (dma_c->sg_status & 1) && ((dma_c->sg_command & 0xc0) == 0x40)) { - picint(1 << 13); - dma_c->sg_status |= 8; - } + if (dma_advanced && (dma_c->sg_status & 1) && ((dma_c->sg_command & 0xc0) == 0x40)) { + picint(1 << 13); + dma_c->sg_status |= 8; + } - return(temp | DMA_OVER); + return (temp | DMA_OVER); } - return(temp); + return (temp); } - int dma_channel_write(int channel, uint16_t val) { dma_t *dma_c = &dma[channel]; if (channel < 4) { - if (dma_command[0] & 0x04) - return(DMA_NODATA); + if (dma_command[0] & 0x04) + return (DMA_NODATA); } else { - if (dma_command[1] & 0x04) - return(DMA_NODATA); + if (dma_command[1] & 0x04) + return (DMA_NODATA); } if (!(dma_e & (1 << channel))) - return(DMA_NODATA); + return (DMA_NODATA); if ((dma_m & (1 << channel)) && !dma_req_is_soft) - return(DMA_NODATA); + return (DMA_NODATA); if ((dma_c->mode & 0xC) != 4) - return(DMA_NODATA); + return (DMA_NODATA); - if (! dma_c->size) { - _dma_write(dma_c->ac, val & 0xff, dma_c); + if (!dma_c->size) { + _dma_write(dma_c->ac, val & 0xff, dma_c); - if (dma_c->mode & 0x20) { - if (dma_ps2.is_ps2) - dma_c->ac--; - else if (dma_advanced) - dma_retreat(dma_c); - else - dma_c->ac = (dma_c->ac & 0xffff0000 & dma_mask) | ((dma_c->ac - 1) & 0xffff); - } else { - if (dma_ps2.is_ps2) - dma_c->ac++; - else if (dma_advanced) - dma_advance(dma_c); - else - dma_c->ac = (dma_c->ac & 0xffff0000 & dma_mask) | ((dma_c->ac + 1) & 0xffff); - } + if (dma_c->mode & 0x20) { + if (dma_ps2.is_ps2) + dma_c->ac--; + else if (dma_advanced) + dma_retreat(dma_c); + else + dma_c->ac = (dma_c->ac & 0xffff0000 & dma_mask) | ((dma_c->ac - 1) & 0xffff); + } else { + if (dma_ps2.is_ps2) + dma_c->ac++; + else if (dma_advanced) + dma_advance(dma_c); + else + dma_c->ac = (dma_c->ac & 0xffff0000 & dma_mask) | ((dma_c->ac + 1) & 0xffff); + } } else { - _dma_writew(dma_c->ac, val, dma_c); + _dma_writew(dma_c->ac, val, dma_c); - if (dma_c->mode & 0x20) { - if (dma_ps2.is_ps2) - dma_c->ac -= 2; - else if (dma_advanced) - dma_retreat(dma_c); - else - dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac - 2) & 0x1ffff); - dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac - 2) & 0x1ffff); - } else { - if (dma_ps2.is_ps2) - dma_c->ac += 2; - else if (dma_advanced) - dma_advance(dma_c); - else - dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac + 2) & 0x1ffff); - } + if (dma_c->mode & 0x20) { + if (dma_ps2.is_ps2) + dma_c->ac -= 2; + else if (dma_advanced) + dma_retreat(dma_c); + else + dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac - 2) & 0x1ffff); + dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac - 2) & 0x1ffff); + } else { + if (dma_ps2.is_ps2) + dma_c->ac += 2; + else if (dma_advanced) + dma_advance(dma_c); + else + dma_c->ac = (dma_c->ac & 0xfffe0000 & dma_mask) | ((dma_c->ac + 2) & 0x1ffff); + } } dma_stat_rq |= (1 << channel); dma_c->cc--; if (dma_c->cc < 0) { - if (dma_advanced && (dma_c->sg_status & 1) && !(dma_c->sg_status & 6)) - dma_sg_next_addr(dma_c); - else { - if (dma_c->mode & 0x10) { /*Auto-init*/ - dma_c->cc = dma_c->cb; - dma_c->ac = dma_c->ab; - } else - dma_m |= (1 << channel); - dma_stat |= (1 << channel); - } + if (dma_advanced && (dma_c->sg_status & 1) && !(dma_c->sg_status & 6)) + dma_sg_next_addr(dma_c); + else { + if (dma_c->mode & 0x10) { /*Auto-init*/ + dma_c->cc = dma_c->cb; + dma_c->ac = dma_c->ab; + } else + dma_m |= (1 << channel); + dma_stat |= (1 << channel); + } } if (dma_m & (1 << channel)) { - if (dma_advanced && (dma_c->sg_status & 1) && ((dma_c->sg_command & 0xc0) == 0x40)) { - picint(1 << 13); - dma_c->sg_status |= 8; - } + if (dma_advanced && (dma_c->sg_status & 1) && ((dma_c->sg_command & 0xc0) == 0x40)) { + picint(1 << 13); + dma_c->sg_status |= 8; + } - return(DMA_OVER); + return (DMA_OVER); } - return(0); + return (0); } - static void dma_ps2_run(int channel) { dma_t *dma_c = &dma[channel]; switch (dma_c->ps2_mode & DMA_PS2_XFER_MASK) { - case DMA_PS2_XFER_MEM_TO_IO: - do { - if (! dma_c->size) { - uint8_t temp = _dma_read(dma_c->ac, dma_c); + case DMA_PS2_XFER_MEM_TO_IO: + do { + if (!dma_c->size) { + uint8_t temp = _dma_read(dma_c->ac, dma_c); - outb(dma_c->io_addr, temp); + outb(dma_c->io_addr, temp); - if (dma_c->ps2_mode & DMA_PS2_DEC2) - dma_c->ac--; - else - dma_c->ac++; - } else { - uint16_t temp = _dma_readw(dma_c->ac, dma_c); + if (dma_c->ps2_mode & DMA_PS2_DEC2) + dma_c->ac--; + else + dma_c->ac++; + } else { + uint16_t temp = _dma_readw(dma_c->ac, dma_c); - outw(dma_c->io_addr, temp); + outw(dma_c->io_addr, temp); - if (dma_c->ps2_mode & DMA_PS2_DEC2) - dma_c->ac -= 2; - else - dma_c->ac += 2; - } + if (dma_c->ps2_mode & DMA_PS2_DEC2) + dma_c->ac -= 2; + else + dma_c->ac += 2; + } - dma_stat_rq |= (1 << channel); - dma_c->cc--; - } while (dma_c->cc > 0); + dma_stat_rq |= (1 << channel); + dma_c->cc--; + } while (dma_c->cc > 0); - dma_stat |= (1 << channel); - break; + dma_stat |= (1 << channel); + break; - case DMA_PS2_XFER_IO_TO_MEM: - do { - if (! dma_c->size) { - uint8_t temp = inb(dma_c->io_addr); + case DMA_PS2_XFER_IO_TO_MEM: + do { + if (!dma_c->size) { + uint8_t temp = inb(dma_c->io_addr); - _dma_write(dma_c->ac, temp, dma_c); + _dma_write(dma_c->ac, temp, dma_c); - if (dma_c->ps2_mode & DMA_PS2_DEC2) - dma_c->ac--; - else - dma_c->ac++; - } else { - uint16_t temp = inw(dma_c->io_addr); + if (dma_c->ps2_mode & DMA_PS2_DEC2) + dma_c->ac--; + else + dma_c->ac++; + } else { + uint16_t temp = inw(dma_c->io_addr); - _dma_writew(dma_c->ac, temp, dma_c); + _dma_writew(dma_c->ac, temp, dma_c); - if (dma_c->ps2_mode & DMA_PS2_DEC2) - dma_c->ac -= 2; - else - dma_c->ac += 2; - } + if (dma_c->ps2_mode & DMA_PS2_DEC2) + dma_c->ac -= 2; + else + dma_c->ac += 2; + } - dma_stat_rq |= (1 << channel); - dma_c->cc--; - } while (dma_c->cc > 0); + dma_stat_rq |= (1 << channel); + dma_c->cc--; + } while (dma_c->cc > 0); - ps2_cache_clean(); - dma_stat |= (1 << channel); - break; + ps2_cache_clean(); + dma_stat |= (1 << channel); + break; - default: /*Memory verify*/ - do { - if (! dma_c->size) { - if (dma_c->ps2_mode & DMA_PS2_DEC2) - dma_c->ac--; - else - dma_c->ac++; - } else { - if (dma_c->ps2_mode & DMA_PS2_DEC2) - dma_c->ac -= 2; - else - dma_c->ac += 2; - } + default: /*Memory verify*/ + do { + if (!dma_c->size) { + if (dma_c->ps2_mode & DMA_PS2_DEC2) + dma_c->ac--; + else + dma_c->ac++; + } else { + if (dma_c->ps2_mode & DMA_PS2_DEC2) + dma_c->ac -= 2; + else + dma_c->ac += 2; + } - dma_stat_rq |= (1 << channel); - dma->cc--; - } while (dma->cc > 0); - - dma_stat |= (1 << channel); - break; + dma_stat_rq |= (1 << channel); + dma->cc--; + } while (dma->cc > 0); + dma_stat |= (1 << channel); + break; } } - int dma_mode(int channel) { - return(dma[channel].mode); + return (dma[channel].mode); } - /* DMA Bus Master Page Read/Write */ void dma_bm_read(uint32_t PhysAddress, uint8_t *DataRead, uint32_t TotalSize, int TransferSize) { - uint32_t i = 0, n, n2; - uint8_t bytes[4] = { 0, 0, 0, 0 }; + uint32_t i = 0, n, n2; + uint8_t bytes[4] = { 0, 0, 0, 0 }; - n = TotalSize & ~(TransferSize - 1); + n = TotalSize & ~(TransferSize - 1); n2 = TotalSize - n; /* Do the divisible block, if there is one. */ if (n) { - for (i = 0; i < n; i += TransferSize) - mem_read_phys((void *) &(DataRead[i]), PhysAddress + i, TransferSize); + for (i = 0; i < n; i += TransferSize) + mem_read_phys((void *) &(DataRead[i]), PhysAddress + i, TransferSize); } /* Do the non-divisible block, if there is one. */ if (n2) { - mem_read_phys((void *) bytes, PhysAddress + n, TransferSize); - memcpy((void *) &(DataRead[n]), bytes, n2); + mem_read_phys((void *) bytes, PhysAddress + n, TransferSize); + memcpy((void *) &(DataRead[n]), bytes, n2); } } - void dma_bm_write(uint32_t PhysAddress, const uint8_t *DataWrite, uint32_t TotalSize, int TransferSize) { - uint32_t i = 0, n, n2; - uint8_t bytes[4] = { 0, 0, 0, 0 }; + uint32_t i = 0, n, n2; + uint8_t bytes[4] = { 0, 0, 0, 0 }; - n = TotalSize & ~(TransferSize - 1); + n = TotalSize & ~(TransferSize - 1); n2 = TotalSize - n; /* Do the divisible block, if there is one. */ if (n) { - for (i = 0; i < n; i += TransferSize) - mem_write_phys((void *) &(DataWrite[i]), PhysAddress + i, TransferSize); + for (i = 0; i < n; i += TransferSize) + mem_write_phys((void *) &(DataWrite[i]), PhysAddress + i, TransferSize); } /* Do the non-divisible block, if there is one. */ if (n2) { - mem_read_phys((void *) bytes, PhysAddress + n, TransferSize); - memcpy(bytes, (void *) &(DataWrite[n]), n2); - mem_write_phys((void *) bytes, PhysAddress + n, TransferSize); + mem_read_phys((void *) bytes, PhysAddress + n, TransferSize); + memcpy(bytes, (void *) &(DataWrite[n]), n2); + mem_write_phys((void *) bytes, PhysAddress + n, TransferSize); } if (dma_at) - mem_invalidate_range(PhysAddress, PhysAddress + TotalSize - 1); + mem_invalidate_range(PhysAddress, PhysAddress + TotalSize - 1); } diff --git a/src/fifo8.c b/src/fifo8.c index a6f7f1e0e..5e3008a7d 100644 --- a/src/fifo8.c +++ b/src/fifo8.c @@ -21,31 +21,35 @@ #include <86box/86box.h> #include <86box/fifo8.h> -void fifo8_create(Fifo8 *fifo, uint32_t capacity) +void +fifo8_create(Fifo8 *fifo, uint32_t capacity) { - fifo->data = (uint8_t *)malloc(capacity); - memset(fifo->data, 0, capacity); + fifo->data = (uint8_t *) malloc(capacity); + memset(fifo->data, 0, capacity); fifo->capacity = capacity; - fifo->head = 0; - fifo->num = 0; + fifo->head = 0; + fifo->num = 0; } -void fifo8_destroy(Fifo8 *fifo) +void +fifo8_destroy(Fifo8 *fifo) { if (fifo->data) { - free(fifo->data); - fifo->data = NULL; - } + free(fifo->data); + fifo->data = NULL; + } } -void fifo8_push(Fifo8 *fifo, uint8_t data) +void +fifo8_push(Fifo8 *fifo, uint8_t data) { assert(fifo->num < fifo->capacity); fifo->data[(fifo->head + fifo->num) % fifo->capacity] = data; fifo->num++; } -void fifo8_push_all(Fifo8 *fifo, const uint8_t *data, uint32_t num) +void +fifo8_push_all(Fifo8 *fifo, const uint8_t *data, uint32_t num) { uint32_t start, avail; @@ -64,7 +68,8 @@ void fifo8_push_all(Fifo8 *fifo, const uint8_t *data, uint32_t num) fifo->num += num; } -uint8_t fifo8_pop(Fifo8 *fifo) +uint8_t +fifo8_pop(Fifo8 *fifo) { uint8_t ret; @@ -75,41 +80,47 @@ uint8_t fifo8_pop(Fifo8 *fifo) return ret; } -const uint8_t *fifo8_pop_buf(Fifo8 *fifo, uint32_t max, uint32_t *num) +const uint8_t * +fifo8_pop_buf(Fifo8 *fifo, uint32_t max, uint32_t *num) { uint8_t *ret; assert(max > 0 && max <= fifo->num); *num = MIN(fifo->capacity - fifo->head, max); - ret = &fifo->data[fifo->head]; + ret = &fifo->data[fifo->head]; fifo->head += *num; fifo->head %= fifo->capacity; fifo->num -= *num; return ret; } -void fifo8_reset(Fifo8 *fifo) +void +fifo8_reset(Fifo8 *fifo) { - fifo->num = 0; + fifo->num = 0; fifo->head = 0; } -int fifo8_is_empty(Fifo8 *fifo) +int +fifo8_is_empty(Fifo8 *fifo) { return (fifo->num == 0); } -int fifo8_is_full(Fifo8 *fifo) +int +fifo8_is_full(Fifo8 *fifo) { return (fifo->num == fifo->capacity); } -uint32_t fifo8_num_free(Fifo8 *fifo) +uint32_t +fifo8_num_free(Fifo8 *fifo) { return fifo->capacity - fifo->num; } -uint32_t fifo8_num_used(Fifo8 *fifo) +uint32_t +fifo8_num_used(Fifo8 *fifo) { return fifo->num; } diff --git a/src/gdbstub.c b/src/gdbstub.c index d609c68e2..efca53f74 100644 --- a/src/gdbstub.c +++ b/src/gdbstub.c @@ -25,7 +25,7 @@ # include # else # include -# define ssize_t long +# define ssize_t long # define strtok_r(a, b, c) strtok_s(a, b, c) # endif # include @@ -121,8 +121,8 @@ typedef struct _gdbstub_client_ { struct sockaddr_in addr; char packet[16384], response[16384]; - int has_packet: 1, first_packet_received: 1, ida_mode: 1, waiting_stop: 1, - packet_pos, response_pos; + int has_packet : 1, first_packet_received : 1, ida_mode : 1, waiting_stop : 1, + packet_pos, response_pos; event_t *processed_event, *response_event; @@ -162,7 +162,7 @@ gdbstub_log(const char *fmt, ...) static x86seg *segment_regs[] = { &cpu_state.seg_cs, &cpu_state.seg_ss, &cpu_state.seg_ds, &cpu_state.seg_es, &cpu_state.seg_fs, &cpu_state.seg_gs }; static uint32_t *cr_regs[] = { &cpu_state.CR0.l, &cr2, &cr3, &cr4 }; static void *fpu_regs[] = { &cpu_state.npxc, &cpu_state.npxs, NULL, &x87_pc_seg, &x87_pc_off, &x87_op_seg, &x87_op_off }; -static char target_xml[] = /* QEMU gdb-xml/i386-32bit.xml with modifications (described in comments) */ +static char target_xml[] = /* QEMU gdb-xml/i386-32bit.xml with modifications (described in comments) */ // clang-format off "" "" diff --git a/src/ini.c b/src/ini.c index 6c4565bb9..b3c7295cb 100644 --- a/src/ini.c +++ b/src/ini.c @@ -245,7 +245,7 @@ ini_close(ini_t ini) sec = (section_t *) list->next; while (sec != NULL) { - ns = (section_t *) sec->list.next; + ns = (section_t *) sec->list.next; ent = (entry_t *) sec->entry_head.next; while (ent != NULL) { diff --git a/src/io.c b/src/io.c index 6501a199a..ef7dc7c02 100644 --- a/src/io.c +++ b/src/io.c @@ -30,286 +30,268 @@ #include "cpu.h" #include <86box/m_amstrad.h> - -#define NPORTS 65536 /* PC/AT supports 64K ports */ - +#define NPORTS 65536 /* PC/AT supports 64K ports */ typedef struct _io_ { - uint8_t (*inb)(uint16_t addr, void *priv); + uint8_t (*inb)(uint16_t addr, void *priv); uint16_t (*inw)(uint16_t addr, void *priv); uint32_t (*inl)(uint16_t addr, void *priv); - void (*outb)(uint16_t addr, uint8_t val, void *priv); - void (*outw)(uint16_t addr, uint16_t val, void *priv); - void (*outl)(uint16_t addr, uint32_t val, void *priv); + void (*outb)(uint16_t addr, uint8_t val, void *priv); + void (*outw)(uint16_t addr, uint16_t val, void *priv); + void (*outl)(uint16_t addr, uint32_t val, void *priv); - void *priv; + void *priv; struct _io_ *prev, *next; } io_t; typedef struct { - uint8_t enable; - uint16_t base, size; - void (*func)(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv), - *priv; + uint8_t enable; + uint16_t base, size; + void (*func)(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv), + *priv; } io_trap_t; -int initialized = 0; +int initialized = 0; io_t *io[NPORTS], *io_last[NPORTS]; - #ifdef ENABLE_IO_LOG int io_do_log = ENABLE_IO_LOG; - static void io_log(const char *fmt, ...) { va_list ap; if (io_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define io_log(fmt, ...) +# define io_log(fmt, ...) #endif - void io_init(void) { - int c; + int c; io_t *p, *q; if (!initialized) { - for (c=0; cprev; - free(p); - p = q; - } - p = NULL; - } + /* Port c has at least one handler. */ + p = io_last[c]; + /* After this loop, p will have the pointer to the first handler. */ + while (p) { + q = p->prev; + free(p); + p = q; + } + p = NULL; + } - /* io[c] should be NULL. */ - io[c] = io_last[c] = NULL; + /* io[c] should be NULL. */ + io[c] = io_last[c] = NULL; } } - void io_sethandler_common(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv, int step) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv, int step) { - int c; + int c; io_t *p, *q = NULL; for (c = 0; c < size; c += step) { - p = io_last[base + c]; - q = (io_t *) malloc(sizeof(io_t)); - memset(q, 0, sizeof(io_t)); - if (p) { - p->next = q; - q->prev = p; - } else { - io[base + c] = q; - q->prev = NULL; - } + p = io_last[base + c]; + q = (io_t *) malloc(sizeof(io_t)); + memset(q, 0, sizeof(io_t)); + if (p) { + p->next = q; + q->prev = p; + } else { + io[base + c] = q; + q->prev = NULL; + } - q->inb = inb; - q->inw = inw; - q->inl = inl; + q->inb = inb; + q->inw = inw; + q->inl = inl; - q->outb = outb; - q->outw = outw; - q->outl = outl; + q->outb = outb; + q->outw = outw; + q->outl = outl; - q->priv = priv; - q->next = NULL; + q->priv = priv; + q->next = NULL; - io_last[base + c] = q; + io_last[base + c] = q; } } - void io_removehandler_common(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv, int step) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv, int step) { - int c; + int c; io_t *p, *q; for (c = 0; c < size; c += step) { - p = io[base + c]; - if (!p) - continue; - while(p) { - q = p->next; - if ((p->inb == inb) && (p->inw == inw) && - (p->inl == inl) && (p->outb == outb) && - (p->outw == outw) && (p->outl == outl) && - (p->priv == priv)) { - if (p->prev) - p->prev->next = p->next; - else - io[base + c] = p->next; - if (p->next) - p->next->prev = p->prev; - else - io_last[base + c] = p->prev; - free(p); - p = NULL; - break; - } - p = q; - } + p = io[base + c]; + if (!p) + continue; + while (p) { + q = p->next; + if ((p->inb == inb) && (p->inw == inw) && (p->inl == inl) && (p->outb == outb) && (p->outw == outw) && (p->outl == outl) && (p->priv == priv)) { + if (p->prev) + p->prev->next = p->next; + else + io[base + c] = p->next; + if (p->next) + p->next->prev = p->prev; + else + io_last[base + c] = p->prev; + free(p); + p = NULL; + break; + } + p = q; + } } } - void io_handler_common(int set, uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv, int step) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv, int step) { if (set) - io_sethandler_common(base, size, inb, inw, inl, outb, outw, outl, priv, step); + io_sethandler_common(base, size, inb, inw, inl, outb, outw, outl, priv, step); else - io_removehandler_common(base, size, inb, inw, inl, outb, outw, outl, priv, step); + io_removehandler_common(base, size, inb, inw, inl, outb, outw, outl, priv, step); } - void io_sethandler(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv) { io_sethandler_common(base, size, inb, inw, inl, outb, outw, outl, priv, 1); } - void io_removehandler(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv) { io_removehandler_common(base, size, inb, inw, inl, outb, outw, outl, priv, 1); } - void io_handler(int set, uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv) { io_handler_common(set, base, size, inb, inw, inl, outb, outw, outl, priv, 1); } - void io_sethandler_interleaved(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv) { io_sethandler_common(base, size, inb, inw, inl, outb, outw, outl, priv, 2); } - void io_removehandler_interleaved(uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv) { io_removehandler_common(base, size, inb, inw, inl, outb, outw, outl, priv, 2); } - void io_handler_interleaved(int set, uint16_t base, int size, - uint8_t (*inb)(uint16_t addr, void *priv), - uint16_t (*inw)(uint16_t addr, void *priv), - uint32_t (*inl)(uint16_t addr, void *priv), - void (*outb)(uint16_t addr, uint8_t val, void *priv), - void (*outw)(uint16_t addr, uint16_t val, void *priv), - void (*outl)(uint16_t addr, uint32_t val, void *priv), - void *priv) + uint8_t (*inb)(uint16_t addr, void *priv), + uint16_t (*inw)(uint16_t addr, void *priv), + uint32_t (*inl)(uint16_t addr, void *priv), + void (*outb)(uint16_t addr, uint8_t val, void *priv), + void (*outw)(uint16_t addr, uint16_t val, void *priv), + void (*outl)(uint16_t addr, uint32_t val, void *priv), + void *priv) { io_handler_common(set, base, size, inb, inw, inl, outb, outw, outl, priv, 2); } - uint8_t inb(uint16_t port) { uint8_t ret = 0xff; - io_t *p, *q; - int found = 0; - int qfound = 0; + io_t *p, *q; + int found = 0; + int qfound = 0; p = io[port]; - while(p) { - q = p->next; - if (p->inb) { - ret &= p->inb(port, p->priv); - found |= 1; - qfound++; - } - p = q; + while (p) { + q = p->next; + if (p->inb) { + ret &= p->inb(port, p->priv); + found |= 1; + qfound++; + } + p = q; } if (amstrad_latch & 0x80000000) { @@ -322,41 +304,40 @@ inb(uint16_t port) } if (!found) - cycles -= io_delay; + cycles -= io_delay; /* TriGem 486-BIOS MHz output. */ /* if (port == 0x1ed) - ret = 0xfe; */ + ret = 0xfe; */ io_log("[%04X:%08X] (%i, %i, %04i) in b(%04X) = %02X\n", CS, cpu_state.pc, in_smm, found, qfound, port, ret); - return(ret); + return (ret); } - void outb(uint16_t port, uint8_t val) { io_t *p, *q; - int found = 0; - int qfound = 0; + int found = 0; + int qfound = 0; p = io[port]; - while(p) { - q = p->next; - if (p->outb) { - p->outb(port, val, p->priv); - found |= 1; - qfound++; - } - p = q; + while (p) { + q = p->next; + if (p->outb) { + p->outb(port, val, p->priv); + found |= 1; + qfound++; + } + p = q; } if (!found) { - cycles -= io_delay; + cycles -= io_delay; #ifdef USE_DYNAREC - if (cpu_use_dynarec && ((port == 0xeb) || (port == 0xed))) - update_tsc(); + if (cpu_use_dynarec && ((port == 0xeb) || (port == 0xed))) + update_tsc(); #endif } @@ -365,41 +346,40 @@ outb(uint16_t port, uint8_t val) return; } - uint16_t inw(uint16_t port) { - io_t *p, *q; - uint16_t ret = 0xffff; - int found = 0; - int qfound = 0; - uint8_t ret8[2]; - int i = 0; + io_t *p, *q; + uint16_t ret = 0xffff; + int found = 0; + int qfound = 0; + uint8_t ret8[2]; + int i = 0; p = io[port]; - while(p) { - q = p->next; - if (p->inw) { - ret &= p->inw(port, p->priv); - found |= 2; - qfound++; - } - p = q; + while (p) { + q = p->next; + if (p->inw) { + ret &= p->inw(port, p->priv); + found |= 2; + qfound++; + } + p = q; } ret8[0] = ret & 0xff; ret8[1] = (ret >> 8) & 0xff; for (i = 0; i < 2; i++) { - p = io[(port + i) & 0xffff]; - while(p) { - q = p->next; - if (p->inb && !p->inw) { - ret8[i] &= p->inb(port + i, p->priv); - found |= 1; - qfound++; - } - p = q; - } + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->inb && !p->inw) { + ret8[i] &= p->inb(port + i, p->priv); + found |= 1; + qfound++; + } + p = q; + } } ret = (ret8[1] << 8) | ret8[0]; @@ -413,51 +393,50 @@ inw(uint16_t port) } if (!found) - cycles -= io_delay; + cycles -= io_delay; io_log("[%04X:%08X] (%i, %i, %04i) in w(%04X) = %04X\n", CS, cpu_state.pc, in_smm, found, qfound, port, ret); return ret; } - void outw(uint16_t port, uint16_t val) { io_t *p, *q; - int found = 0; - int qfound = 0; - int i = 0; + int found = 0; + int qfound = 0; + int i = 0; p = io[port]; - while(p) { - q = p->next; - if (p->outw) { - p->outw(port, val, p->priv); - found |= 2; - qfound++; - } - p = q; + while (p) { + q = p->next; + if (p->outw) { + p->outw(port, val, p->priv); + found |= 2; + qfound++; + } + p = q; } for (i = 0; i < 2; i++) { - p = io[(port + i) & 0xffff]; - while(p) { - q = p->next; - if (p->outb && !p->outw) { - p->outb(port + i, val >> (i << 3), p->priv); - found |= 1; - qfound++; - } - p = q; - } + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->outb && !p->outw) { + p->outb(port + i, val >> (i << 3), p->priv); + found |= 1; + qfound++; + } + p = q; + } } if (!found) { - cycles -= io_delay; + cycles -= io_delay; #ifdef USE_DYNAREC - if (cpu_use_dynarec && ((port == 0xeb) || (port == 0xed))) - update_tsc(); + if (cpu_use_dynarec && ((port == 0xeb) || (port == 0xed))) + update_tsc(); #endif } @@ -466,32 +445,31 @@ outw(uint16_t port, uint16_t val) return; } - uint32_t inl(uint16_t port) { - io_t *p, *q; + io_t *p, *q; uint32_t ret = 0xffffffff; uint16_t ret16[2]; - uint8_t ret8[4]; - int found = 0; - int qfound = 0; - int i = 0; + uint8_t ret8[4]; + int found = 0; + int qfound = 0; + int i = 0; p = io[port]; - while(p) { - q = p->next; - if (p->inl) { - ret &= p->inl(port, p->priv); - found |= 4; - qfound++; - } - p = q; + while (p) { + q = p->next; + if (p->inl) { + ret &= p->inl(port, p->priv); + found |= 4; + qfound++; + } + p = q; } ret16[0] = ret & 0xffff; ret16[1] = (ret >> 16) & 0xffff; - p = io[port & 0xffff]; + p = io[port & 0xffff]; while (p) { q = p->next; if (p->inw && !p->inl) { @@ -519,16 +497,16 @@ inl(uint16_t port) ret8[2] = (ret >> 16) & 0xff; ret8[3] = (ret >> 24) & 0xff; for (i = 0; i < 4; i++) { - p = io[(port + i) & 0xffff]; - while(p) { - q = p->next; - if (p->inb && !p->inw && !p->inl) { - ret8[i] &= p->inb(port + i, p->priv); - found |= 1; - qfound++; - } - p = q; - } + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->inb && !p->inw && !p->inl) { + ret8[i] &= p->inb(port + i, p->priv); + found |= 1; + qfound++; + } + p = q; + } } ret = (ret8[3] << 24) | (ret8[2] << 16) | (ret8[1] << 8) | ret8[0]; @@ -542,66 +520,65 @@ inl(uint16_t port) } if (!found) - cycles -= io_delay; + cycles -= io_delay; io_log("[%04X:%08X] (%i, %i, %04i) in l(%04X) = %08X\n", CS, cpu_state.pc, in_smm, found, qfound, port, ret); return ret; } - void outl(uint16_t port, uint32_t val) { io_t *p, *q; - int found = 0; - int qfound = 0; - int i = 0; + int found = 0; + int qfound = 0; + int i = 0; p = io[port]; if (p) { - while(p) { - q = p->next; - if (p->outl) { - p->outl(port, val, p->priv); - found |= 4; - qfound++; - } - p = q; - } + while (p) { + q = p->next; + if (p->outl) { + p->outl(port, val, p->priv); + found |= 4; + qfound++; + } + p = q; + } } for (i = 0; i < 4; i += 2) { - p = io[(port + i) & 0xffff]; - while(p) { - q = p->next; - if (p->outw && !p->outl) { - p->outw(port + i, val >> (i << 3), p->priv); - found |= 2; - qfound++; - } - p = q; - } + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->outw && !p->outl) { + p->outw(port + i, val >> (i << 3), p->priv); + found |= 2; + qfound++; + } + p = q; + } } for (i = 0; i < 4; i++) { - p = io[(port + i) & 0xffff]; - while(p) { - q = p->next; - if (p->outb && !p->outw && !p->outl) { - p->outb(port + i, val >> (i << 3), p->priv); - found |= 1; - qfound++; - } - p = q; - } + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->outb && !p->outw && !p->outl) { + p->outb(port + i, val >> (i << 3), p->priv); + found |= 1; + qfound++; + } + p = q; + } } if (!found) { - cycles -= io_delay; + cycles -= io_delay; #ifdef USE_DYNAREC - if (cpu_use_dynarec && ((port == 0xeb) || (port == 0xed))) - update_tsc(); + if (cpu_use_dynarec && ((port == 0xeb) || (port == 0xed))) + update_tsc(); #endif } @@ -610,7 +587,6 @@ outl(uint16_t port, uint32_t val) return; } - static uint8_t io_trap_readb(uint16_t addr, void *priv) { @@ -619,7 +595,6 @@ io_trap_readb(uint16_t addr, void *priv) return 0xff; } - static uint16_t io_trap_readw(uint16_t addr, void *priv) { @@ -628,7 +603,6 @@ io_trap_readw(uint16_t addr, void *priv) return 0xffff; } - static uint32_t io_trap_readl(uint16_t addr, void *priv) { @@ -637,7 +611,6 @@ io_trap_readl(uint16_t addr, void *priv) return 0xffffffff; } - static void io_trap_writeb(uint16_t addr, uint8_t val, void *priv) { @@ -645,7 +618,6 @@ io_trap_writeb(uint16_t addr, uint8_t val, void *priv) trap->func(1, addr, 1, val, trap->priv); } - static void io_trap_writew(uint16_t addr, uint16_t val, void *priv) { @@ -653,7 +625,6 @@ io_trap_writew(uint16_t addr, uint16_t val, void *priv) trap->func(2, addr, 1, val, trap->priv); } - static void io_trap_writel(uint16_t addr, uint32_t val, void *priv) { @@ -661,61 +632,58 @@ io_trap_writel(uint16_t addr, uint32_t val, void *priv) trap->func(4, addr, 1, val, trap->priv); } - void * io_trap_add(void (*func)(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv), - void *priv) + void *priv) { /* Instantiate new I/O trap. */ io_trap_t *trap = (io_trap_t *) malloc(sizeof(io_trap_t)); - trap->enable = 0; + trap->enable = 0; trap->base = trap->size = 0; - trap->func = func; - trap->priv = priv; + trap->func = func; + trap->priv = priv; return trap; } - void io_trap_remap(void *handle, int enable, uint16_t addr, uint16_t size) { io_trap_t *trap = (io_trap_t *) handle; if (!trap) - return; + return; io_log("I/O: Remapping trap from %04X-%04X (enable %d) to %04X-%04X (enable %d)\n", - trap->base, trap->base + trap->size - 1, trap->enable, addr, addr + size - 1, enable); + trap->base, trap->base + trap->size - 1, trap->enable, addr, addr + size - 1, enable); /* Remove old I/O mapping. */ if (trap->enable && trap->size) { - io_removehandler(trap->base, trap->size, - io_trap_readb, io_trap_readw, io_trap_readl, - io_trap_writeb, io_trap_writew, io_trap_writel, - trap); + io_removehandler(trap->base, trap->size, + io_trap_readb, io_trap_readw, io_trap_readl, + io_trap_writeb, io_trap_writew, io_trap_writel, + trap); } /* Set trap enable flag, base address and size. */ trap->enable = !!enable; - trap->base = addr; - trap->size = size; + trap->base = addr; + trap->size = size; /* Add new I/O mapping. */ if (trap->enable && trap->size) { - io_sethandler(trap->base, trap->size, - io_trap_readb, io_trap_readw, io_trap_readl, - io_trap_writeb, io_trap_writew, io_trap_writel, - trap); + io_sethandler(trap->base, trap->size, + io_trap_readb, io_trap_readw, io_trap_readl, + io_trap_writeb, io_trap_writew, io_trap_writel, + trap); } } - void io_trap_remove(void *handle) { io_trap_t *trap = (io_trap_t *) handle; if (!trap) - return; + return; /* Unmap I/O trap before freeing it. */ io_trap_remap(trap, 0, 0, 0); diff --git a/src/ioapic.c b/src/ioapic.c index e308b9a1c..587b3699d 100644 --- a/src/ioapic.c +++ b/src/ioapic.c @@ -28,32 +28,28 @@ #include <86box/mem.h> #include <86box/chipset.h> - typedef struct { uint8_t dummy; } ioapic_t; - #ifdef ENABLE_IOAPIC_LOG int ioapic_do_log = ENABLE_IOAPIC_LOG; - static void ioapic_log(const char *fmt, ...) { va_list ap; if (ioapic_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define ioapic_log(fmt, ...) +# define ioapic_log(fmt, ...) #endif - static void ioapic_write(uint16_t port, uint8_t val, void *priv) { @@ -61,50 +57,47 @@ ioapic_write(uint16_t port, uint8_t val, void *priv) /* target POST FF, issued by Award before jumping to the bootloader */ if (val != 0xff) - return; + return; ioapic_log("IOAPIC: Caught POST %02X\n", val); /* The _MP_ table must be located in the BIOS area, the EBDA, or the last 1k of conventional memory; at a 16-byte boundary in all cases. Award writes both tables to the BIOS area. */ for (addr = 0xf0000; addr <= 0xfffff; addr += 16) { - /* check signature for the _MP_ table (Floating Point Structure) */ - if (mem_readl_phys(addr) != 0x5f504d5f) /* ASCII "_MP_" */ - continue; + /* check signature for the _MP_ table (Floating Point Structure) */ + if (mem_readl_phys(addr) != 0x5f504d5f) /* ASCII "_MP_" */ + continue; - /* read and check pointer to the PCMP table (Configuration Table) */ - pcmp = mem_readl_phys(addr + 4); - if ((pcmp < 0xf0000) || (pcmp > 0xfffff) || (mem_readl_phys(pcmp) != 0x504d4350)) /* ASCII "PCMP" */ - continue; + /* read and check pointer to the PCMP table (Configuration Table) */ + pcmp = mem_readl_phys(addr + 4); + if ((pcmp < 0xf0000) || (pcmp > 0xfffff) || (mem_readl_phys(pcmp) != 0x504d4350)) /* ASCII "PCMP" */ + continue; - /* patch over the signature on both tables */ - ioapic_log("IOAPIC: Patching _MP_ [%08x] and PCMP [%08x] tables\n", addr, pcmp); - ram[addr] = ram[addr + 1] = ram[addr + 2] = ram[addr + 3] = 0xff; - ram[pcmp] = ram[pcmp + 1] = ram[pcmp + 2] = ram[pcmp + 3] = 0xff; + /* patch over the signature on both tables */ + ioapic_log("IOAPIC: Patching _MP_ [%08x] and PCMP [%08x] tables\n", addr, pcmp); + ram[addr] = ram[addr + 1] = ram[addr + 2] = ram[addr + 3] = 0xff; + ram[pcmp] = ram[pcmp + 1] = ram[pcmp + 2] = ram[pcmp + 3] = 0xff; - break; + break; } } - static void ioapic_reset(ioapic_t *dev) { } - static void ioapic_close(void *priv) { ioapic_t *dev = (ioapic_t *) priv; io_removehandler(0x80, 1, - NULL, NULL, NULL, ioapic_write, NULL, NULL, NULL); + NULL, NULL, NULL, ioapic_write, NULL, NULL, NULL); free(dev); } - static void * ioapic_init(const device_t *info) { @@ -114,22 +107,21 @@ ioapic_init(const device_t *info) ioapic_reset(dev); io_sethandler(0x80, 1, - NULL, NULL, NULL, ioapic_write, NULL, NULL, NULL); + NULL, NULL, NULL, ioapic_write, NULL, NULL, NULL); return dev; } - const device_t ioapic_device = { - .name = "I/O Advanced Programmable Interrupt Controller", + .name = "I/O Advanced Programmable Interrupt Controller", .internal_name = "ioapic", - .flags = DEVICE_AT, - .local = 0, - .init = ioapic_init, - .close = ioapic_close, - .reset = NULL, + .flags = DEVICE_AT, + .local = 0, + .init = ioapic_init, + .close = ioapic_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/log.c b/src/log.c index 99bab97a5..9eb80c6ad 100644 --- a/src/log.c +++ b/src/log.c @@ -34,17 +34,14 @@ #include <86box/version.h> #include <86box/log.h> - #ifndef RELEASE_BUILD typedef struct { - char buff[1024], *dev_name; - int seen, suppr_seen; + char buff[1024], *dev_name; + int seen, suppr_seen; } log_t; - -extern FILE *stdlog; /* file to log output to */ - +extern FILE *stdlog; /* file to log output to */ void log_set_suppr_seen(void *priv, int suppr_seen) @@ -54,7 +51,6 @@ log_set_suppr_seen(void *priv, int suppr_seen) log->suppr_seen = suppr_seen; } - void log_set_dev_name(void *priv, char *dev_name) { @@ -63,19 +59,17 @@ log_set_dev_name(void *priv, char *dev_name) log->dev_name = dev_name; } - static void log_copy(log_t *log, char *dest, const char *src, size_t dest_size) { memset(dest, 0x00, dest_size * sizeof(char)); if (log && log->dev_name && strcmp(log->dev_name, "")) { - strcat(dest, log->dev_name); - strcat(dest, ": "); + strcat(dest, log->dev_name); + strcat(dest, ": "); } strcat(dest, src); } - /* * Log something to the logfile or stdout. * @@ -87,50 +81,49 @@ void log_out(void *priv, const char *fmt, va_list ap) { log_t *log = (log_t *) priv; - char temp[1024], fmt2[1024]; + char temp[1024], fmt2[1024]; if (log == NULL) - return; + return; if (strcmp(fmt, "") == 0) - return; + return; if (stdlog == NULL) { - if (log_path[0] != '\0') { - stdlog = plat_fopen(log_path, "w"); - if (stdlog == NULL) - stdlog = stdout; - } else - stdlog = stdout; + if (log_path[0] != '\0') { + stdlog = plat_fopen(log_path, "w"); + if (stdlog == NULL) + stdlog = stdout; + } else + stdlog = stdout; } vsprintf(temp, fmt, ap); - if (log->suppr_seen && ! strcmp(log->buff, temp)) - log->seen++; + if (log->suppr_seen && !strcmp(log->buff, temp)) + log->seen++; else { - if (log->suppr_seen && log->seen) { - log_copy(log, fmt2, "*** %d repeats ***\n", 1024); - fprintf(stdlog, fmt2, log->seen); - } - log->seen = 0; - strcpy(log->buff, temp); - log_copy(log, fmt2, temp, 1024); - fprintf(stdlog, fmt2, ap); + if (log->suppr_seen && log->seen) { + log_copy(log, fmt2, "*** %d repeats ***\n", 1024); + fprintf(stdlog, fmt2, log->seen); + } + log->seen = 0; + strcpy(log->buff, temp); + log_copy(log, fmt2, temp, 1024); + fprintf(stdlog, fmt2, ap); } fflush(stdlog); } - void log_fatal(void *priv, const char *fmt, ...) { - log_t *log = (log_t *) priv; - char temp[1024], fmt2[1024]; + log_t *log = (log_t *) priv; + char temp[1024], fmt2[1024]; va_list ap; if (log == NULL) - return; + return; va_start(ap, fmt); log_copy(log, fmt2, fmt, 1024); @@ -140,7 +133,6 @@ log_fatal(void *priv, const char *fmt, ...) exit(-1); } - void * log_open(char *dev_name) { @@ -148,13 +140,12 @@ log_open(char *dev_name) memset(log, 0, sizeof(log_t)); - log->dev_name = dev_name; + log->dev_name = dev_name; log->suppr_seen = 1; return (void *) log; } - void log_close(void *priv) { diff --git a/src/machine_status.c b/src/machine_status.c index 1429d9295..47541d3ef 100644 --- a/src/machine_status.c +++ b/src/machine_status.c @@ -26,21 +26,22 @@ machine_status_t machine_status; void -machine_status_init() { +machine_status_init() +{ for (size_t i = 0; i < FDD_NUM; ++i) { - machine_status.fdd[i].empty = (strlen(floppyfns[i]) == 0); + machine_status.fdd[i].empty = (strlen(floppyfns[i]) == 0); machine_status.fdd[i].active = false; } for (size_t i = 0; i < CDROM_NUM; ++i) { - machine_status.cdrom[i].empty = cdrom[i].host_drive != 200 || (strlen(cdrom[i].image_path) == 0); + machine_status.cdrom[i].empty = cdrom[i].host_drive != 200 || (strlen(cdrom[i].image_path) == 0); machine_status.cdrom[i].active = false; } for (size_t i = 0; i < ZIP_NUM; i++) { - machine_status.zip[i].empty = (strlen(zip_drives[i].image_path) == 0); + machine_status.zip[i].empty = (strlen(zip_drives[i].image_path) == 0); machine_status.zip[i].active = false; } for (size_t i = 0; i < MO_NUM; i++) { - machine_status.mo[i].empty = (strlen(mo_drives[i].image_path) == 0); + machine_status.mo[i].empty = (strlen(mo_drives[i].image_path) == 0); machine_status.mo[i].active = false; } @@ -52,6 +53,6 @@ machine_status_init() { for (size_t i = 0; i < NET_CARD_MAX; i++) { machine_status.net[i].active = false; - machine_status.net[i].empty = !network_is_connected(i); + machine_status.net[i].empty = !network_is_connected(i); } } \ No newline at end of file diff --git a/src/mca.c b/src/mca.c index 4ef00318d..b48bdd2a7 100644 --- a/src/mca.c +++ b/src/mca.c @@ -5,99 +5,105 @@ #include <86box/io.h> #include <86box/mca.h> - -void (*mca_card_write[8])(int addr, uint8_t val, void *priv); -uint8_t (*mca_card_read[8])(int addr, void *priv); +void (*mca_card_write[8])(int addr, uint8_t val, void *priv); +uint8_t (*mca_card_read[8])(int addr, void *priv); uint8_t (*mca_card_feedb[8])(void *priv); -void (*mca_card_reset[8])(void *priv); -void *mca_priv[8]; +void (*mca_card_reset[8])(void *priv); +void *mca_priv[8]; static int mca_index; static int mca_nr_cards; - -void mca_init(int nr_cards) +void +mca_init(int nr_cards) { - int c; + int c; - for (c = 0; c < 8; c++) { - mca_card_read[c] = NULL; - mca_card_write[c] = NULL; - mca_card_reset[c] = NULL; - mca_priv[c] = NULL; - } + for (c = 0; c < 8; c++) { + mca_card_read[c] = NULL; + mca_card_write[c] = NULL; + mca_card_reset[c] = NULL; + mca_priv[c] = NULL; + } - mca_index = 0; - mca_nr_cards = nr_cards; + mca_index = 0; + mca_nr_cards = nr_cards; } -void mca_set_index(int index) +void +mca_set_index(int index) { - mca_index = index; + mca_index = index; } -uint8_t mca_read(uint16_t port) +uint8_t +mca_read(uint16_t port) { - if (mca_index >= mca_nr_cards) - return 0xff; - if (!mca_card_read[mca_index]) - return 0xff; - return mca_card_read[mca_index](port, mca_priv[mca_index]); + if (mca_index >= mca_nr_cards) + return 0xff; + if (!mca_card_read[mca_index]) + return 0xff; + return mca_card_read[mca_index](port, mca_priv[mca_index]); } -uint8_t mca_read_index(uint16_t port, int index) +uint8_t +mca_read_index(uint16_t port, int index) { - if (mca_index >= mca_nr_cards) - return 0xff; - if (!mca_card_read[index]) - return 0xff; - return mca_card_read[index](port, mca_priv[index]); + if (mca_index >= mca_nr_cards) + return 0xff; + if (!mca_card_read[index]) + return 0xff; + return mca_card_read[index](port, mca_priv[index]); } -int mca_get_nr_cards(void) +int +mca_get_nr_cards(void) { - return mca_nr_cards; + return mca_nr_cards; } -void mca_write(uint16_t port, uint8_t val) +void +mca_write(uint16_t port, uint8_t val) { - if (mca_index >= mca_nr_cards) - return; - if (mca_card_write[mca_index]) - mca_card_write[mca_index](port, val, mca_priv[mca_index]); + if (mca_index >= mca_nr_cards) + return; + if (mca_card_write[mca_index]) + mca_card_write[mca_index](port, val, mca_priv[mca_index]); } -uint8_t mca_feedb(void) +uint8_t +mca_feedb(void) { - if (mca_card_feedb[mca_index]) - return !!(mca_card_feedb[mca_index](mca_priv[mca_index])); - else - return 0; + if (mca_card_feedb[mca_index]) + return !!(mca_card_feedb[mca_index](mca_priv[mca_index])); + else + return 0; } -void mca_reset(void) +void +mca_reset(void) { - int c; + int c; - for (c = 0; c < 8; c++) { - if (mca_card_reset[c]) - mca_card_reset[c](mca_priv[c]); - } + for (c = 0; c < 8; c++) { + if (mca_card_reset[c]) + mca_card_reset[c](mca_priv[c]); + } } - -void mca_add(uint8_t (*read)(int addr, void *priv), void (*write)(int addr, uint8_t val, void *priv), uint8_t (*feedb)(void *priv), void (*reset)(void *priv), void *priv) +void +mca_add(uint8_t (*read)(int addr, void *priv), void (*write)(int addr, uint8_t val, void *priv), uint8_t (*feedb)(void *priv), void (*reset)(void *priv), void *priv) { - int c; + int c; - for (c = 0; c < mca_nr_cards; c++) { - if (!mca_card_read[c] && !mca_card_write[c]) { - mca_card_read[c] = read; - mca_card_write[c] = write; - mca_card_feedb[c] = feedb; - mca_card_reset[c] = reset; - mca_priv[c] = priv; - return; - } - } + for (c = 0; c < mca_nr_cards; c++) { + if (!mca_card_read[c] && !mca_card_write[c]) { + mca_card_read[c] = read; + mca_card_write[c] = write; + mca_card_feedb[c] = feedb; + mca_card_reset[c] = reset; + mca_priv[c] = priv; + return; + } + } } diff --git a/src/nmi.c b/src/nmi.c index 1e820a82a..4fde00765 100644 --- a/src/nmi.c +++ b/src/nmi.c @@ -8,18 +8,17 @@ #include <86box/io.h> #include <86box/nmi.h> - int nmi_mask; - -void nmi_write(uint16_t port, uint8_t val, void *p) +void +nmi_write(uint16_t port, uint8_t val, void *p) { - nmi_mask = val & 0x80; + nmi_mask = val & 0x80; } - -void nmi_init(void) +void +nmi_init(void) { - io_sethandler(0x00a0, 0x000f, NULL, NULL, NULL, nmi_write, NULL, NULL, NULL); - nmi_mask = 0; + io_sethandler(0x00a0, 0x000f, NULL, NULL, NULL, nmi_write, NULL, NULL, NULL); + nmi_mask = 0; } diff --git a/src/nvr.c b/src/nvr.c index a68331e34..eb5a1e49d 100644 --- a/src/nvr.c +++ b/src/nvr.c @@ -62,107 +62,100 @@ #include <86box/plat.h> #include <86box/nvr.h> +int nvr_dosave; /* NVR is dirty, needs saved */ -int nvr_dosave; /* NVR is dirty, needs saved */ - - -static int8_t days_in_month[12] = { 31,28,31,30,31,30,31,31,30,31,30,31 }; +static int8_t days_in_month[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; static struct tm intclk; -static nvr_t *saved_nvr = NULL; - +static nvr_t *saved_nvr = NULL; #ifdef ENABLE_NVR_LOG int nvr_do_log = ENABLE_NVR_LOG; - static void nvr_log(const char *fmt, ...) { va_list ap; if (nvr_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define nvr_log(fmt, ...) +# define nvr_log(fmt, ...) #endif - /* Determine whether or not the year is leap. */ int nvr_is_leap(int year) { - if (year % 400 == 0) return(1); - if (year % 100 == 0) return(0); - if (year % 4 == 0) return(1); + if (year % 400 == 0) + return (1); + if (year % 100 == 0) + return (0); + if (year % 4 == 0) + return (1); - return(0); + return (0); } - /* Determine the days in the current month. */ int nvr_get_days(int month, int year) { if (month != 2) - return(days_in_month[month - 1]); + return (days_in_month[month - 1]); - return(nvr_is_leap(year) ? 29 : 28); + return (nvr_is_leap(year) ? 29 : 28); } - /* One more second has passed, update the internal clock. */ void rtc_tick(void) { /* Ping the internal clock. */ if (++intclk.tm_sec == 60) { - intclk.tm_sec = 0; - if (++intclk.tm_min == 60) { - intclk.tm_min = 0; - if (++intclk.tm_hour == 24) { - intclk.tm_hour = 0; - if (++intclk.tm_mday == (nvr_get_days(intclk.tm_mon, - intclk.tm_year) + 1)) { - intclk.tm_mday = 1; - if (++intclk.tm_mon == 13) { - intclk.tm_mon = 1; - intclk.tm_year++; - } - } - } - } + intclk.tm_sec = 0; + if (++intclk.tm_min == 60) { + intclk.tm_min = 0; + if (++intclk.tm_hour == 24) { + intclk.tm_hour = 0; + if (++intclk.tm_mday == (nvr_get_days(intclk.tm_mon, intclk.tm_year) + 1)) { + intclk.tm_mday = 1; + if (++intclk.tm_mon == 13) { + intclk.tm_mon = 1; + intclk.tm_year++; + } + } + } + } } } - /* This is the RTC one-second timer. */ static void onesec_timer(void *priv) { - nvr_t *nvr = (nvr_t *)priv; - int is_at; + nvr_t *nvr = (nvr_t *) priv; + int is_at; if (++nvr->onesec_cnt >= 100) { - /* Update the internal clock. */ - is_at = IS_AT(machine); - if (!is_at) - rtc_tick(); + /* Update the internal clock. */ + is_at = IS_AT(machine); + if (!is_at) + rtc_tick(); - /* Update the RTC device if needed. */ - if (nvr->tick != NULL) - (*nvr->tick)(nvr); + /* Update the RTC device if needed. */ + if (nvr->tick != NULL) + (*nvr->tick)(nvr); - nvr->onesec_cnt = 0; + nvr->onesec_cnt = 0; } - timer_advance_u64(&nvr->onesec_time, (uint64_t)(10000ULL * TIMER_USEC)); + timer_advance_u64(&nvr->onesec_time, (uint64_t) (10000ULL * TIMER_USEC)); } - /* Initialize the generic NVRAM/RTC device. */ void nvr_init(nvr_t *nvr) @@ -170,18 +163,18 @@ nvr_init(nvr_t *nvr) int c; /* Set up the NVR file's name. */ - c = strlen(machine_get_internal_name()) + 5; - nvr->fn = (char *)malloc(c + 1); + c = strlen(machine_get_internal_name()) + 5; + nvr->fn = (char *) malloc(c + 1); sprintf(nvr->fn, "%s.nvr", machine_get_internal_name()); /* Initialize the internal clock as needed. */ memset(&intclk, 0x00, sizeof(intclk)); if (time_sync & TIME_SYNC_ENABLED) { - nvr_time_sync(); + nvr_time_sync(); } else { - /* Reset the internal clock to 1980/01/01 00:00. */ - intclk.tm_mon = 1; - intclk.tm_year = 1980; + /* Reset the internal clock to 1980/01/01 00:00. */ + intclk.tm_mon = 1; + intclk.tm_year = 1980; } /* Set up our timer. */ @@ -194,10 +187,9 @@ nvr_init(nvr_t *nvr) saved_nvr = nvr; /* Try to load the saved data. */ - (void)nvr_load(); + (void) nvr_load(); } - /* Get path to the NVR folder. */ char * nvr_path(char *str) @@ -210,17 +202,16 @@ nvr_path(char *str) strcat(temp, NVR_PATH); /* Create the directory if needed. */ - if (! plat_dir_check(temp)) - plat_dir_create(temp); + if (!plat_dir_check(temp)) + plat_dir_create(temp); /* Now append the actual filename. */ path_slash(temp); strcat(temp, str); - return(temp); + return (temp); } - /* * Load an NVR from file. * @@ -235,53 +226,52 @@ nvr_path(char *str) int nvr_load(void) { - char *path; - FILE *fp; - uint8_t regs[NVR_MAXSIZE] = { 0 }; + char *path; + FILE *fp; + uint8_t regs[NVR_MAXSIZE] = { 0 }; /* Make sure we have been initialized. */ - if (saved_nvr == NULL) return(0); + if (saved_nvr == NULL) + return (0); /* Clear out any old data. */ memset(saved_nvr->regs, 0x00, sizeof(saved_nvr->regs)); /* Set the defaults. */ if (saved_nvr->reset != NULL) - saved_nvr->reset(saved_nvr); + saved_nvr->reset(saved_nvr); /* Load the (relevant) part of the NVR contents. */ if (saved_nvr->size != 0) { - path = nvr_path(saved_nvr->fn); - nvr_log("NVR: loading from '%s'\n", path); - fp = plat_fopen(path, "rb"); - saved_nvr->is_new = (fp == NULL); - if (fp != NULL) { - memcpy(regs, saved_nvr->regs, sizeof(regs)); - /* Read NVR contents from file. */ - if (fread(saved_nvr->regs, 1, saved_nvr->size, fp) != saved_nvr->size) { - memcpy(saved_nvr->regs, regs, sizeof(regs)); - saved_nvr->is_new = 1; + path = nvr_path(saved_nvr->fn); + nvr_log("NVR: loading from '%s'\n", path); + fp = plat_fopen(path, "rb"); + saved_nvr->is_new = (fp == NULL); + if (fp != NULL) { + memcpy(regs, saved_nvr->regs, sizeof(regs)); + /* Read NVR contents from file. */ + if (fread(saved_nvr->regs, 1, saved_nvr->size, fp) != saved_nvr->size) { + memcpy(saved_nvr->regs, regs, sizeof(regs)); + saved_nvr->is_new = 1; + } + (void) fclose(fp); } - (void)fclose(fp); - } } else - saved_nvr->is_new = 1; + saved_nvr->is_new = 1; /* Get the local RTC running! */ if (saved_nvr->start != NULL) - saved_nvr->start(saved_nvr); + saved_nvr->start(saved_nvr); - return(1); + return (1); } - void nvr_set_ven_save(void (*ven_save)(void)) { saved_nvr->ven_save = ven_save; } - /* Save the current NVR to a file. */ int nvr_save(void) @@ -290,94 +280,90 @@ nvr_save(void) FILE *fp; /* Make sure we have been initialized. */ - if (saved_nvr == NULL) return(0); + if (saved_nvr == NULL) + return (0); if (saved_nvr->size != 0) { - path = nvr_path(saved_nvr->fn); - nvr_log("NVR: saving to '%s'\n", path); - fp = plat_fopen(path, "wb"); - if (fp != NULL) { - /* Save NVR contents to file. */ - (void)fwrite(saved_nvr->regs, saved_nvr->size, 1, fp); - fclose(fp); - } + path = nvr_path(saved_nvr->fn); + nvr_log("NVR: saving to '%s'\n", path); + fp = plat_fopen(path, "wb"); + if (fp != NULL) { + /* Save NVR contents to file. */ + (void) fwrite(saved_nvr->regs, saved_nvr->size, 1, fp); + fclose(fp); + } } if (saved_nvr->ven_save) - saved_nvr->ven_save(); + saved_nvr->ven_save(); /* Device is clean again. */ nvr_dosave = 0; - return(1); + return (1); } - void nvr_close(void) { saved_nvr = NULL; } - void nvr_time_sync(void) { struct tm *tm; - time_t now; + time_t now; /* Get the current time of day, and convert to local time. */ - (void)time(&now); - if(time_sync & TIME_SYNC_UTC) - tm = gmtime(&now); + (void) time(&now); + if (time_sync & TIME_SYNC_UTC) + tm = gmtime(&now); else - tm = localtime(&now); + tm = localtime(&now); /* Set the internal clock. */ nvr_time_set(tm); } - /* Get current time from internal clock. */ void nvr_time_get(struct tm *tm) { - uint8_t dom, mon, sum, wd; + uint8_t dom, mon, sum, wd; uint16_t cent, yr; - tm->tm_sec = intclk.tm_sec; - tm->tm_min = intclk.tm_min; + tm->tm_sec = intclk.tm_sec; + tm->tm_min = intclk.tm_min; tm->tm_hour = intclk.tm_hour; - dom = intclk.tm_mday; - mon = intclk.tm_mon; - yr = (intclk.tm_year % 100); - cent = ((intclk.tm_year - yr) / 100) % 4; - sum = dom+mon+yr+cent; - wd = ((sum + 6) % 7); + dom = intclk.tm_mday; + mon = intclk.tm_mon; + yr = (intclk.tm_year % 100); + cent = ((intclk.tm_year - yr) / 100) % 4; + sum = dom + mon + yr + cent; + wd = ((sum + 6) % 7); tm->tm_wday = wd; tm->tm_mday = intclk.tm_mday; - tm->tm_mon = (intclk.tm_mon - 1); + tm->tm_mon = (intclk.tm_mon - 1); tm->tm_year = (intclk.tm_year - 1900); } - /* Set internal clock time. */ void nvr_time_set(struct tm *tm) { - intclk.tm_sec = tm->tm_sec; - intclk.tm_min = tm->tm_min; + intclk.tm_sec = tm->tm_sec; + intclk.tm_min = tm->tm_min; intclk.tm_hour = tm->tm_hour; intclk.tm_wday = tm->tm_wday; intclk.tm_mday = tm->tm_mday; - intclk.tm_mon = (tm->tm_mon + 1); + intclk.tm_mon = (tm->tm_mon + 1); intclk.tm_year = (tm->tm_year + 1900); } - /* Open or create a file in the NVR area. */ FILE * nvr_fopen(char *str, char *mode) { - return(plat_fopen(nvr_path(str), mode)); + return (plat_fopen(nvr_path(str), mode)); } diff --git a/src/nvr_at.c b/src/nvr_at.c index eb749ff49..91ee4a949 100644 --- a/src/nvr_at.c +++ b/src/nvr_at.c @@ -238,588 +238,570 @@ #include <86box/device.h> #include <86box/nvr.h> - /* RTC registers and bit definitions. */ -#define RTC_SECONDS 0 -#define RTC_ALSECONDS 1 -# define AL_DONTCARE 0xc0 /* Alarm time is not set */ -#define RTC_MINUTES 2 -#define RTC_ALMINUTES 3 -#define RTC_HOURS 4 -# define RTC_AMPM 0x80 /* PM flag if 12h format in use */ -#define RTC_ALHOURS 5 -#define RTC_DOW 6 -#define RTC_DOM 7 -#define RTC_MONTH 8 -#define RTC_YEAR 9 -#define RTC_REGA 10 -# define REGA_UIP 0x80 -# define REGA_DV2 0x40 -# define REGA_DV1 0x20 -# define REGA_DV0 0x10 -# define REGA_DV 0x70 -# define REGA_RS3 0x08 -# define REGA_RS2 0x04 -# define REGA_RS1 0x02 -# define REGA_RS0 0x01 -# define REGA_RS 0x0f -#define RTC_REGB 11 -# define REGB_SET 0x80 -# define REGB_PIE 0x40 -# define REGB_AIE 0x20 -# define REGB_UIE 0x10 -# define REGB_SQWE 0x08 -# define REGB_DM 0x04 -# define REGB_2412 0x02 -# define REGB_DSE 0x01 -#define RTC_REGC 12 -# define REGC_IRQF 0x80 -# define REGC_PF 0x40 -# define REGC_AF 0x20 -# define REGC_UF 0x10 -#define RTC_REGD 13 -# define REGD_VRT 0x80 -#define RTC_CENTURY_AT 0x32 /* century register for AT etc */ -#define RTC_CENTURY_PS 0x37 /* century register for PS/1 PS/2 */ -#define RTC_ALDAY 0x7D /* VIA VT82C586B - alarm day */ -#define RTC_ALMONTH 0x7E /* VIA VT82C586B - alarm month */ -#define RTC_CENTURY_VIA 0x7F /* century register for VIA VT82C586B */ +#define RTC_SECONDS 0 +#define RTC_ALSECONDS 1 +#define AL_DONTCARE 0xc0 /* Alarm time is not set */ +#define RTC_MINUTES 2 +#define RTC_ALMINUTES 3 +#define RTC_HOURS 4 +#define RTC_AMPM 0x80 /* PM flag if 12h format in use */ +#define RTC_ALHOURS 5 +#define RTC_DOW 6 +#define RTC_DOM 7 +#define RTC_MONTH 8 +#define RTC_YEAR 9 +#define RTC_REGA 10 +#define REGA_UIP 0x80 +#define REGA_DV2 0x40 +#define REGA_DV1 0x20 +#define REGA_DV0 0x10 +#define REGA_DV 0x70 +#define REGA_RS3 0x08 +#define REGA_RS2 0x04 +#define REGA_RS1 0x02 +#define REGA_RS0 0x01 +#define REGA_RS 0x0f +#define RTC_REGB 11 +#define REGB_SET 0x80 +#define REGB_PIE 0x40 +#define REGB_AIE 0x20 +#define REGB_UIE 0x10 +#define REGB_SQWE 0x08 +#define REGB_DM 0x04 +#define REGB_2412 0x02 +#define REGB_DSE 0x01 +#define RTC_REGC 12 +#define REGC_IRQF 0x80 +#define REGC_PF 0x40 +#define REGC_AF 0x20 +#define REGC_UF 0x10 +#define RTC_REGD 13 +#define REGD_VRT 0x80 +#define RTC_CENTURY_AT 0x32 /* century register for AT etc */ +#define RTC_CENTURY_PS 0x37 /* century register for PS/1 PS/2 */ +#define RTC_ALDAY 0x7D /* VIA VT82C586B - alarm day */ +#define RTC_ALMONTH 0x7E /* VIA VT82C586B - alarm month */ +#define RTC_CENTURY_VIA 0x7F /* century register for VIA VT82C586B */ -#define RTC_ALDAY_SIS 0x7E /* Day of Month Alarm for SiS */ -#define RTC_ALMONT_SIS 0x7F /* Month Alarm for SiS */ +#define RTC_ALDAY_SIS 0x7E /* Day of Month Alarm for SiS */ +#define RTC_ALMONT_SIS 0x7F /* Month Alarm for SiS */ -#define RTC_REGS 14 /* number of registers */ - -#define FLAG_NO_NMI 0x01 -#define FLAG_AMI_1992_HACK 0x02 -#define FLAG_AMI_1994_HACK 0x04 -#define FLAG_AMI_1995_HACK 0x08 -#define FLAG_P6RP4_HACK 0x10 -#define FLAG_PIIX4 0x20 +#define RTC_REGS 14 /* number of registers */ +#define FLAG_NO_NMI 0x01 +#define FLAG_AMI_1992_HACK 0x02 +#define FLAG_AMI_1994_HACK 0x04 +#define FLAG_AMI_1995_HACK 0x08 +#define FLAG_P6RP4_HACK 0x10 +#define FLAG_PIIX4 0x20 typedef struct { - int8_t stat; + int8_t stat; - uint8_t cent, def, - flags, read_addr, - wp_0d, wp_32, - pad, pad0; + uint8_t cent, def, + flags, read_addr, + wp_0d, wp_32, + pad, pad0; - uint8_t addr[8], wp[2], - bank[8], *lock; + uint8_t addr[8], wp[2], + bank[8], *lock; - int16_t count, state; + int16_t count, state; - uint64_t ecount, - rtc_time; - pc_timer_t update_timer, - rtc_timer; + uint64_t ecount, + rtc_time; + pc_timer_t update_timer, + rtc_timer; } local_t; - -static uint8_t nvr_at_inited = 0; - +static uint8_t nvr_at_inited = 0; /* Get the current NVR time. */ static void time_get(nvr_t *nvr, struct tm *tm) { - local_t *local = (local_t *)nvr->data; - int8_t temp; + local_t *local = (local_t *) nvr->data; + int8_t temp; if (nvr->regs[RTC_REGB] & REGB_DM) { - /* NVR is in Binary data mode. */ - tm->tm_sec = nvr->regs[RTC_SECONDS]; - tm->tm_min = nvr->regs[RTC_MINUTES]; - temp = nvr->regs[RTC_HOURS]; - tm->tm_wday = (nvr->regs[RTC_DOW] - 1); - tm->tm_mday = nvr->regs[RTC_DOM]; - tm->tm_mon = (nvr->regs[RTC_MONTH] - 1); - tm->tm_year = nvr->regs[RTC_YEAR]; - if (local->cent != 0xFF) - tm->tm_year += (nvr->regs[local->cent] * 100) - 1900; + /* NVR is in Binary data mode. */ + tm->tm_sec = nvr->regs[RTC_SECONDS]; + tm->tm_min = nvr->regs[RTC_MINUTES]; + temp = nvr->regs[RTC_HOURS]; + tm->tm_wday = (nvr->regs[RTC_DOW] - 1); + tm->tm_mday = nvr->regs[RTC_DOM]; + tm->tm_mon = (nvr->regs[RTC_MONTH] - 1); + tm->tm_year = nvr->regs[RTC_YEAR]; + if (local->cent != 0xFF) + tm->tm_year += (nvr->regs[local->cent] * 100) - 1900; } else { - /* NVR is in BCD data mode. */ - tm->tm_sec = RTC_DCB(nvr->regs[RTC_SECONDS]); - tm->tm_min = RTC_DCB(nvr->regs[RTC_MINUTES]); - temp = RTC_DCB(nvr->regs[RTC_HOURS]); - tm->tm_wday = (RTC_DCB(nvr->regs[RTC_DOW]) - 1); - tm->tm_mday = RTC_DCB(nvr->regs[RTC_DOM]); - tm->tm_mon = (RTC_DCB(nvr->regs[RTC_MONTH]) - 1); - tm->tm_year = RTC_DCB(nvr->regs[RTC_YEAR]); - if (local->cent != 0xFF) - tm->tm_year += (RTC_DCB(nvr->regs[local->cent]) * 100) - 1900; + /* NVR is in BCD data mode. */ + tm->tm_sec = RTC_DCB(nvr->regs[RTC_SECONDS]); + tm->tm_min = RTC_DCB(nvr->regs[RTC_MINUTES]); + temp = RTC_DCB(nvr->regs[RTC_HOURS]); + tm->tm_wday = (RTC_DCB(nvr->regs[RTC_DOW]) - 1); + tm->tm_mday = RTC_DCB(nvr->regs[RTC_DOM]); + tm->tm_mon = (RTC_DCB(nvr->regs[RTC_MONTH]) - 1); + tm->tm_year = RTC_DCB(nvr->regs[RTC_YEAR]); + if (local->cent != 0xFF) + tm->tm_year += (RTC_DCB(nvr->regs[local->cent]) * 100) - 1900; } /* Adjust for 12/24 hour mode. */ if (nvr->regs[RTC_REGB] & REGB_2412) - tm->tm_hour = temp; - else - tm->tm_hour = ((temp & ~RTC_AMPM)%12) + ((temp&RTC_AMPM) ? 12 : 0); + tm->tm_hour = temp; + else + tm->tm_hour = ((temp & ~RTC_AMPM) % 12) + ((temp & RTC_AMPM) ? 12 : 0); } - /* Set the current NVR time. */ static void time_set(nvr_t *nvr, struct tm *tm) { - local_t *local = (local_t *)nvr->data; - int year = (tm->tm_year + 1900); + local_t *local = (local_t *) nvr->data; + int year = (tm->tm_year + 1900); if (nvr->regs[RTC_REGB] & REGB_DM) { - /* NVR is in Binary data mode. */ - nvr->regs[RTC_SECONDS] = tm->tm_sec; - nvr->regs[RTC_MINUTES] = tm->tm_min; - nvr->regs[RTC_DOW] = (tm->tm_wday + 1); - nvr->regs[RTC_DOM] = tm->tm_mday; - nvr->regs[RTC_MONTH] = (tm->tm_mon + 1); - nvr->regs[RTC_YEAR] = (year % 100); - if (local->cent != 0xFF) - nvr->regs[local->cent] = (year / 100); + /* NVR is in Binary data mode. */ + nvr->regs[RTC_SECONDS] = tm->tm_sec; + nvr->regs[RTC_MINUTES] = tm->tm_min; + nvr->regs[RTC_DOW] = (tm->tm_wday + 1); + nvr->regs[RTC_DOM] = tm->tm_mday; + nvr->regs[RTC_MONTH] = (tm->tm_mon + 1); + nvr->regs[RTC_YEAR] = (year % 100); + if (local->cent != 0xFF) + nvr->regs[local->cent] = (year / 100); - if (nvr->regs[RTC_REGB] & REGB_2412) { - /* NVR is in 24h mode. */ - nvr->regs[RTC_HOURS] = tm->tm_hour; - } else { - /* NVR is in 12h mode. */ - nvr->regs[RTC_HOURS] = (tm->tm_hour % 12) ? (tm->tm_hour % 12) : 12; - if (tm->tm_hour > 11) - nvr->regs[RTC_HOURS] |= RTC_AMPM; - } + if (nvr->regs[RTC_REGB] & REGB_2412) { + /* NVR is in 24h mode. */ + nvr->regs[RTC_HOURS] = tm->tm_hour; + } else { + /* NVR is in 12h mode. */ + nvr->regs[RTC_HOURS] = (tm->tm_hour % 12) ? (tm->tm_hour % 12) : 12; + if (tm->tm_hour > 11) + nvr->regs[RTC_HOURS] |= RTC_AMPM; + } } else { - /* NVR is in BCD data mode. */ - nvr->regs[RTC_SECONDS] = RTC_BCD(tm->tm_sec); - nvr->regs[RTC_MINUTES] = RTC_BCD(tm->tm_min); - nvr->regs[RTC_DOW] = RTC_BCD(tm->tm_wday + 1); - nvr->regs[RTC_DOM] = RTC_BCD(tm->tm_mday); - nvr->regs[RTC_MONTH] = RTC_BCD(tm->tm_mon + 1); - nvr->regs[RTC_YEAR] = RTC_BCD(year % 100); - if (local->cent != 0xFF) - nvr->regs[local->cent] = RTC_BCD(year / 100); + /* NVR is in BCD data mode. */ + nvr->regs[RTC_SECONDS] = RTC_BCD(tm->tm_sec); + nvr->regs[RTC_MINUTES] = RTC_BCD(tm->tm_min); + nvr->regs[RTC_DOW] = RTC_BCD(tm->tm_wday + 1); + nvr->regs[RTC_DOM] = RTC_BCD(tm->tm_mday); + nvr->regs[RTC_MONTH] = RTC_BCD(tm->tm_mon + 1); + nvr->regs[RTC_YEAR] = RTC_BCD(year % 100); + if (local->cent != 0xFF) + nvr->regs[local->cent] = RTC_BCD(year / 100); - if (nvr->regs[RTC_REGB] & REGB_2412) { - /* NVR is in 24h mode. */ - nvr->regs[RTC_HOURS] = RTC_BCD(tm->tm_hour); - } else { - /* NVR is in 12h mode. */ - nvr->regs[RTC_HOURS] = (tm->tm_hour % 12) - ? RTC_BCD(tm->tm_hour % 12) - : RTC_BCD(12); - if (tm->tm_hour > 11) - nvr->regs[RTC_HOURS] |= RTC_AMPM; - } + if (nvr->regs[RTC_REGB] & REGB_2412) { + /* NVR is in 24h mode. */ + nvr->regs[RTC_HOURS] = RTC_BCD(tm->tm_hour); + } else { + /* NVR is in 12h mode. */ + nvr->regs[RTC_HOURS] = (tm->tm_hour % 12) + ? RTC_BCD(tm->tm_hour % 12) + : RTC_BCD(12); + if (tm->tm_hour > 11) + nvr->regs[RTC_HOURS] |= RTC_AMPM; + } } } - /* Check if the current time matches a set alarm time. */ static int8_t check_alarm(nvr_t *nvr, int8_t addr) { - return((nvr->regs[addr+1] == nvr->regs[addr]) || - ((nvr->regs[addr+1] & AL_DONTCARE) == AL_DONTCARE)); + return ((nvr->regs[addr + 1] == nvr->regs[addr]) || ((nvr->regs[addr + 1] & AL_DONTCARE) == AL_DONTCARE)); } - /* Check for VIA stuff. */ static int8_t check_alarm_via(nvr_t *nvr, int8_t addr, int8_t addr_2) { - local_t *local = (local_t *)nvr->data; + local_t *local = (local_t *) nvr->data; if (local->cent == RTC_CENTURY_VIA) { - return((nvr->regs[addr_2] == nvr->regs[addr]) || - ((nvr->regs[addr_2] & AL_DONTCARE) == AL_DONTCARE)); + return ((nvr->regs[addr_2] == nvr->regs[addr]) || ((nvr->regs[addr_2] & AL_DONTCARE) == AL_DONTCARE)); } else - return 1; + return 1; } - /* Update the NVR registers from the internal clock. */ static void timer_update(void *priv) { - nvr_t *nvr = (nvr_t *)priv; - local_t *local = (local_t *)nvr->data; + nvr_t *nvr = (nvr_t *) priv; + local_t *local = (local_t *) nvr->data; struct tm tm; local->ecount = 0LL; - if (! (nvr->regs[RTC_REGB] & REGB_SET)) { - /* Get the current time from the internal clock. */ - nvr_time_get(&tm); + if (!(nvr->regs[RTC_REGB] & REGB_SET)) { + /* Get the current time from the internal clock. */ + nvr_time_get(&tm); - /* Update registers with current time. */ - time_set(nvr, &tm); + /* Update registers with current time. */ + time_set(nvr, &tm); - /* Clear update status. */ - local->stat = 0x00; + /* Clear update status. */ + local->stat = 0x00; - /* Check for any alarms we need to handle. */ - if (check_alarm(nvr, RTC_SECONDS) && - check_alarm(nvr, RTC_MINUTES) && - check_alarm(nvr, RTC_HOURS) && - check_alarm_via(nvr, RTC_DOM, RTC_ALDAY) && - check_alarm_via(nvr, RTC_MONTH, RTC_ALMONTH)/* && - check_alarm_via(nvr, RTC_DOM, RTC_ALDAY_SIS) && - check_alarm_via(nvr, RTC_MONTH, RTC_ALMONT_SIS)*/) { - nvr->regs[RTC_REGC] |= REGC_AF; - if (nvr->regs[RTC_REGB] & REGB_AIE) { - /* Generate an interrupt. */ - if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) { - picintlevel(1 << nvr->irq); - nvr->regs[RTC_REGC] |= REGC_IRQF; - } - } - } + /* Check for any alarms we need to handle. */ + if (check_alarm(nvr, RTC_SECONDS) && check_alarm(nvr, RTC_MINUTES) && check_alarm(nvr, RTC_HOURS) && check_alarm_via(nvr, RTC_DOM, RTC_ALDAY) && check_alarm_via(nvr, RTC_MONTH, RTC_ALMONTH) /* && + check_alarm_via(nvr, RTC_DOM, RTC_ALDAY_SIS) && + check_alarm_via(nvr, RTC_MONTH, RTC_ALMONT_SIS)*/ + ) { + nvr->regs[RTC_REGC] |= REGC_AF; + if (nvr->regs[RTC_REGB] & REGB_AIE) { + /* Generate an interrupt. */ + if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) { + picintlevel(1 << nvr->irq); + nvr->regs[RTC_REGC] |= REGC_IRQF; + } + } + } - /* - * The flag and interrupt should be issued - * on update ended, not started. - */ - nvr->regs[RTC_REGC] |= REGC_UF; - if (nvr->regs[RTC_REGB] & REGB_UIE) { - /* Generate an interrupt. */ - if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) { - picintlevel(1 << nvr->irq); - nvr->regs[RTC_REGC] |= REGC_IRQF; - } - } + /* + * The flag and interrupt should be issued + * on update ended, not started. + */ + nvr->regs[RTC_REGC] |= REGC_UF; + if (nvr->regs[RTC_REGB] & REGB_UIE) { + /* Generate an interrupt. */ + if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) { + picintlevel(1 << nvr->irq); + nvr->regs[RTC_REGC] |= REGC_IRQF; + } + } } } - static void timer_load_count(nvr_t *nvr) { - int c = nvr->regs[RTC_REGA] & REGA_RS; + int c = nvr->regs[RTC_REGA] & REGA_RS; local_t *local = (local_t *) nvr->data; timer_disable(&local->rtc_timer); if ((nvr->regs[RTC_REGA] & 0x70) != 0x20) { - local->state = 0; - return; + local->state = 0; + return; } local->state = 1; switch (c) { - case 0: - local->state = 0; - break; - case 1: case 2: - local->count = 1 << (c + 6); - timer_set_delay_u64(&local->rtc_timer, (local->count) * RTCCONST); - break; - default: - local->count = 1 << (c - 1); - timer_set_delay_u64(&local->rtc_timer, (local->count) * RTCCONST); - break; + case 0: + local->state = 0; + break; + case 1: + case 2: + local->count = 1 << (c + 6); + timer_set_delay_u64(&local->rtc_timer, (local->count) * RTCCONST); + break; + default: + local->count = 1 << (c - 1); + timer_set_delay_u64(&local->rtc_timer, (local->count) * RTCCONST); + break; } } - static void timer_intr(void *priv) { - nvr_t *nvr = (nvr_t *)priv; - local_t *local = (local_t *)nvr->data; + nvr_t *nvr = (nvr_t *) priv; + local_t *local = (local_t *) nvr->data; if (local->state == 1) { - timer_load_count(nvr); + timer_load_count(nvr); - nvr->regs[RTC_REGC] |= REGC_PF; - if (nvr->regs[RTC_REGB] & REGB_PIE) { - /* Generate an interrupt. */ - if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) { - picintlevel(1 << nvr->irq); - nvr->regs[RTC_REGC] |= REGC_IRQF; - } - } + nvr->regs[RTC_REGC] |= REGC_PF; + if (nvr->regs[RTC_REGB] & REGB_PIE) { + /* Generate an interrupt. */ + if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF))) { + picintlevel(1 << nvr->irq); + nvr->regs[RTC_REGC] |= REGC_IRQF; + } + } } } - /* Callback from internal clock, another second passed. */ static void timer_tick(nvr_t *nvr) { - local_t *local = (local_t *)nvr->data; + local_t *local = (local_t *) nvr->data; /* Only update it there is no SET in progress. */ - if (! (nvr->regs[RTC_REGB] & REGB_SET)) { - /* Set the UIP bit, announcing the update. */ - local->stat = REGA_UIP; + if (!(nvr->regs[RTC_REGB] & REGB_SET)) { + /* Set the UIP bit, announcing the update. */ + local->stat = REGA_UIP; - rtc_tick(); + rtc_tick(); - /* Schedule the actual update. */ - local->ecount = (244ULL + 1984ULL) * TIMER_USEC; - timer_set_delay_u64(&local->update_timer, local->ecount); + /* Schedule the actual update. */ + local->ecount = (244ULL + 1984ULL) * TIMER_USEC; + timer_set_delay_u64(&local->update_timer, local->ecount); } } - static void nvr_reg_common_write(uint16_t reg, uint8_t val, nvr_t *nvr, local_t *local) { if ((reg == 0x2c) && (local->flags & FLAG_AMI_1994_HACK)) - nvr->is_new = 0; + nvr->is_new = 0; if ((reg == 0x2d) && (local->flags & FLAG_AMI_1992_HACK)) - nvr->is_new = 0; + nvr->is_new = 0; if ((reg == 0x52) && (local->flags & FLAG_AMI_1995_HACK)) - nvr->is_new = 0; + nvr->is_new = 0; if ((reg >= 0x38) && (reg <= 0x3f) && local->wp[0]) - return; + return; if ((reg >= 0xb8) && (reg <= 0xbf) && local->wp[1]) - return; + return; if (local->lock[reg]) - return; + return; if (nvr->regs[reg] != val) { - nvr->regs[reg] = val; - nvr_dosave = 1; + nvr->regs[reg] = val; + nvr_dosave = 1; } } - /* This must be exposed because ACPI uses it. */ void nvr_reg_write(uint16_t reg, uint8_t val, void *priv) { - nvr_t *nvr = (nvr_t *)priv; - local_t *local = (local_t *)nvr->data; + nvr_t *nvr = (nvr_t *) priv; + local_t *local = (local_t *) nvr->data; struct tm tm; - uint8_t old; - uint8_t irq = 0, old_irq = 0; + uint8_t old; + uint8_t irq = 0, old_irq = 0; old = nvr->regs[reg]; - switch(reg) { - case RTC_REGA: - nvr->regs[RTC_REGA] = val; - timer_load_count(nvr); - break; + switch (reg) { + case RTC_REGA: + nvr->regs[RTC_REGA] = val; + timer_load_count(nvr); + break; - case RTC_REGB: - old_irq = (nvr->regs[RTC_REGB] & nvr->regs[RTC_REGC]) & 0x70; - nvr->regs[RTC_REGB] = val; - if (((old^val) & REGB_SET) && (val & REGB_SET)) { - /* According to the datasheet... */ - nvr->regs[RTC_REGA] &= ~REGA_UIP; - nvr->regs[RTC_REGB] &= ~REGB_UIE; - } - irq = (nvr->regs[RTC_REGB] & nvr->regs[RTC_REGC]) & 0x70; - if (old_irq && !irq) { - picintc(1 << nvr->irq); - nvr->regs[RTC_REGC] &= ~REGC_IRQF; - } else if (!old_irq && irq) { - picintlevel(1 << nvr->irq); - nvr->regs[RTC_REGC] |= REGC_IRQF; - } - break; + case RTC_REGB: + old_irq = (nvr->regs[RTC_REGB] & nvr->regs[RTC_REGC]) & 0x70; + nvr->regs[RTC_REGB] = val; + if (((old ^ val) & REGB_SET) && (val & REGB_SET)) { + /* According to the datasheet... */ + nvr->regs[RTC_REGA] &= ~REGA_UIP; + nvr->regs[RTC_REGB] &= ~REGB_UIE; + } + irq = (nvr->regs[RTC_REGB] & nvr->regs[RTC_REGC]) & 0x70; + if (old_irq && !irq) { + picintc(1 << nvr->irq); + nvr->regs[RTC_REGC] &= ~REGC_IRQF; + } else if (!old_irq && irq) { + picintlevel(1 << nvr->irq); + nvr->regs[RTC_REGC] |= REGC_IRQF; + } + break; - case RTC_REGC: /* R/O */ - break; + case RTC_REGC: /* R/O */ + break; - case RTC_REGD: /* R/O */ - /* This is needed for VIA, where writing to this register changes a write-only - bit whose value is read from power management register 42. */ - nvr->regs[RTC_REGD] = val & 0x80; - break; + case RTC_REGD: /* R/O */ + /* This is needed for VIA, where writing to this register changes a write-only + bit whose value is read from power management register 42. */ + nvr->regs[RTC_REGD] = val & 0x80; + break; - case 0x32: - if ((reg == 0x32) && (local->cent == RTC_CENTURY_VIA) && local->wp_32) - break; - nvr_reg_common_write(reg, val, nvr, local); - break; + case 0x32: + if ((reg == 0x32) && (local->cent == RTC_CENTURY_VIA) && local->wp_32) + break; + nvr_reg_common_write(reg, val, nvr, local); + break; - default: /* non-RTC registers are just NVRAM */ - nvr_reg_common_write(reg, val, nvr, local); - break; + default: /* non-RTC registers are just NVRAM */ + nvr_reg_common_write(reg, val, nvr, local); + break; } if ((reg < RTC_REGA) || ((local->cent != 0xff) && (reg == local->cent))) { - if ((reg != 1) && (reg != 3) && (reg != 5)) { - if ((old != val) && !(time_sync & TIME_SYNC_ENABLED)) { - /* Update internal clock. */ - time_get(nvr, &tm); - nvr_time_set(&tm); - nvr_dosave = 1; - } - } + if ((reg != 1) && (reg != 3) && (reg != 5)) { + if ((old != val) && !(time_sync & TIME_SYNC_ENABLED)) { + /* Update internal clock. */ + time_get(nvr, &tm); + nvr_time_set(&tm); + nvr_dosave = 1; + } + } } } - /* Write to one of the NVR registers. */ static void nvr_write(uint16_t addr, uint8_t val, void *priv) { - nvr_t *nvr = (nvr_t *)priv; - local_t *local = (local_t *)nvr->data; - uint8_t addr_id = (addr & 0x0e) >> 1; + nvr_t *nvr = (nvr_t *) priv; + local_t *local = (local_t *) nvr->data; + uint8_t addr_id = (addr & 0x0e) >> 1; cycles -= ISA_CYCLES(8); if (local->bank[addr_id] == 0xff) - return; + return; if (addr & 1) { - // if (local->bank[addr_id] == 0xff) - // return; - nvr_reg_write(local->addr[addr_id], val, priv); + // if (local->bank[addr_id] == 0xff) + // return; + nvr_reg_write(local->addr[addr_id], val, priv); } else { - local->addr[addr_id] = (val & (nvr->size - 1)); - /* Some chipsets use a 256 byte NVRAM but ports 70h and 71h always access only 128 bytes. */ - if (addr_id == 0x0) - local->addr[addr_id] &= 0x7f; - else if ((addr_id == 0x1) && (local->flags & FLAG_PIIX4)) - local->addr[addr_id] = (local->addr[addr_id] & 0x7f) | 0x80; - if (local->bank[addr_id] > 0) - local->addr[addr_id] = (local->addr[addr_id] & 0x7f) | (0x80 * local->bank[addr_id]); - if (!(local->flags & FLAG_NO_NMI)) - nmi_mask = (~val & 0x80); + local->addr[addr_id] = (val & (nvr->size - 1)); + /* Some chipsets use a 256 byte NVRAM but ports 70h and 71h always access only 128 bytes. */ + if (addr_id == 0x0) + local->addr[addr_id] &= 0x7f; + else if ((addr_id == 0x1) && (local->flags & FLAG_PIIX4)) + local->addr[addr_id] = (local->addr[addr_id] & 0x7f) | 0x80; + if (local->bank[addr_id] > 0) + local->addr[addr_id] = (local->addr[addr_id] & 0x7f) | (0x80 * local->bank[addr_id]); + if (!(local->flags & FLAG_NO_NMI)) + nmi_mask = (~val & 0x80); } } - /* Read from one of the NVR registers. */ static uint8_t nvr_read(uint16_t addr, void *priv) { - nvr_t *nvr = (nvr_t *)priv; - local_t *local = (local_t *)nvr->data; - uint8_t ret; - uint8_t addr_id = (addr & 0x0e) >> 1; + nvr_t *nvr = (nvr_t *) priv; + local_t *local = (local_t *) nvr->data; + uint8_t ret; + uint8_t addr_id = (addr & 0x0e) >> 1; uint16_t i, checksum = 0x0000; cycles -= ISA_CYCLES(8); if (local->bank[addr_id] == 0xff) - ret = 0xff; - else if (addr & 1) switch(local->addr[addr_id]) { - case RTC_REGA: - ret = (nvr->regs[RTC_REGA] & 0x7f) | local->stat; - break; + ret = 0xff; + else if (addr & 1) + switch (local->addr[addr_id]) { + case RTC_REGA: + ret = (nvr->regs[RTC_REGA] & 0x7f) | local->stat; + break; - case RTC_REGC: - ret = nvr->regs[RTC_REGC]; - picintc(1 << nvr->irq); - nvr->regs[RTC_REGC] = 0x00; - break; + case RTC_REGC: + ret = nvr->regs[RTC_REGC]; + picintc(1 << nvr->irq); + nvr->regs[RTC_REGC] = 0x00; + break; - case RTC_REGD: - /* Bits 6-0 of this register always read 0. Bit 7 is battery state, - we should always return it set, as that means the battery is OK. */ - ret = REGD_VRT; - break; + case RTC_REGD: + /* Bits 6-0 of this register always read 0. Bit 7 is battery state, + we should always return it set, as that means the battery is OK. */ + ret = REGD_VRT; + break; - case 0x2c: - if (!nvr->is_new && (local->flags & FLAG_AMI_1994_HACK)) - ret = nvr->regs[local->addr[addr_id]] & 0x7f; - else - ret = nvr->regs[local->addr[addr_id]]; - break; + case 0x2c: + if (!nvr->is_new && (local->flags & FLAG_AMI_1994_HACK)) + ret = nvr->regs[local->addr[addr_id]] & 0x7f; + else + ret = nvr->regs[local->addr[addr_id]]; + break; - case 0x2d: - if (!nvr->is_new && (local->flags & FLAG_AMI_1992_HACK)) - ret = nvr->regs[local->addr[addr_id]] & 0xf7; - else - ret = nvr->regs[local->addr[addr_id]]; - break; + case 0x2d: + if (!nvr->is_new && (local->flags & FLAG_AMI_1992_HACK)) + ret = nvr->regs[local->addr[addr_id]] & 0xf7; + else + ret = nvr->regs[local->addr[addr_id]]; + break; - case 0x2e: - case 0x2f: - if (!nvr->is_new && (local->flags & FLAG_AMI_1992_HACK)) { - for (i = 0x10; i <= 0x2d; i++) { - if (i == 0x2d) - checksum += (nvr->regs[i] & 0xf7); - else - checksum += nvr->regs[i]; - } - if (local->addr[addr_id] == 0x2e) - ret = checksum >> 8; - else - ret = checksum & 0xff; - } else if (!nvr->is_new && (local->flags & FLAG_AMI_1994_HACK)) { - for (i = 0x10; i <= 0x2d; i++) { - if (i == 0x2c) - checksum += (nvr->regs[i] & 0x7f); - else - checksum += nvr->regs[i]; - } - if (local->addr[addr_id] == 0x2e) - ret = checksum >> 8; - else - ret = checksum & 0xff; - } else - ret = nvr->regs[local->addr[addr_id]]; - break; + case 0x2e: + case 0x2f: + if (!nvr->is_new && (local->flags & FLAG_AMI_1992_HACK)) { + for (i = 0x10; i <= 0x2d; i++) { + if (i == 0x2d) + checksum += (nvr->regs[i] & 0xf7); + else + checksum += nvr->regs[i]; + } + if (local->addr[addr_id] == 0x2e) + ret = checksum >> 8; + else + ret = checksum & 0xff; + } else if (!nvr->is_new && (local->flags & FLAG_AMI_1994_HACK)) { + for (i = 0x10; i <= 0x2d; i++) { + if (i == 0x2c) + checksum += (nvr->regs[i] & 0x7f); + else + checksum += nvr->regs[i]; + } + if (local->addr[addr_id] == 0x2e) + ret = checksum >> 8; + else + ret = checksum & 0xff; + } else + ret = nvr->regs[local->addr[addr_id]]; + break; - case 0x3e: - case 0x3f: - if (!nvr->is_new && (local->flags & FLAG_AMI_1995_HACK)) { - /* The checksum at 3E-3F is for 37-3D and 40-7F. */ - for (i = 0x37; i <= 0x3d; i++) - checksum += nvr->regs[i]; - for (i = 0x40; i <= 0x7f; i++) { - if (i == 0x52) - checksum += (nvr->regs[i] & 0xf3); - else - checksum += nvr->regs[i]; - } - if (local->addr[addr_id] == 0x3e) - ret = checksum >> 8; - else - ret = checksum & 0xff; - } else if (!nvr->is_new && (local->flags & FLAG_P6RP4_HACK)) { - /* The checksum at 3E-3F is for 37-3D and 40-51. */ - for (i = 0x37; i <= 0x3d; i++) - checksum += nvr->regs[i]; - for (i = 0x40; i <= 0x51; i++) { - if (i == 0x43) - checksum += (nvr->regs[i] | 0x02); - else - checksum += nvr->regs[i]; - } - if (local->addr[addr_id] == 0x3e) - ret = checksum >> 8; - else - ret = checksum & 0xff; - } else - ret = nvr->regs[local->addr[addr_id]]; - break; + case 0x3e: + case 0x3f: + if (!nvr->is_new && (local->flags & FLAG_AMI_1995_HACK)) { + /* The checksum at 3E-3F is for 37-3D and 40-7F. */ + for (i = 0x37; i <= 0x3d; i++) + checksum += nvr->regs[i]; + for (i = 0x40; i <= 0x7f; i++) { + if (i == 0x52) + checksum += (nvr->regs[i] & 0xf3); + else + checksum += nvr->regs[i]; + } + if (local->addr[addr_id] == 0x3e) + ret = checksum >> 8; + else + ret = checksum & 0xff; + } else if (!nvr->is_new && (local->flags & FLAG_P6RP4_HACK)) { + /* The checksum at 3E-3F is for 37-3D and 40-51. */ + for (i = 0x37; i <= 0x3d; i++) + checksum += nvr->regs[i]; + for (i = 0x40; i <= 0x51; i++) { + if (i == 0x43) + checksum += (nvr->regs[i] | 0x02); + else + checksum += nvr->regs[i]; + } + if (local->addr[addr_id] == 0x3e) + ret = checksum >> 8; + else + ret = checksum & 0xff; + } else + ret = nvr->regs[local->addr[addr_id]]; + break; - case 0x43: - if (!nvr->is_new && (local->flags & FLAG_P6RP4_HACK)) - ret = nvr->regs[local->addr[addr_id]] | 0x02; - else - ret = nvr->regs[local->addr[addr_id]]; - break; + case 0x43: + if (!nvr->is_new && (local->flags & FLAG_P6RP4_HACK)) + ret = nvr->regs[local->addr[addr_id]] | 0x02; + else + ret = nvr->regs[local->addr[addr_id]]; + break; - case 0x52: - if (!nvr->is_new && (local->flags & FLAG_AMI_1995_HACK)) - ret = nvr->regs[local->addr[addr_id]] & 0xf3; - else - ret = nvr->regs[local->addr[addr_id]]; - break; + case 0x52: + if (!nvr->is_new && (local->flags & FLAG_AMI_1995_HACK)) + ret = nvr->regs[local->addr[addr_id]] & 0xf3; + else + ret = nvr->regs[local->addr[addr_id]]; + break; - default: - ret = nvr->regs[local->addr[addr_id]]; - break; - } else { - ret = local->addr[addr_id]; - if (!local->read_addr) - ret &= 0x80; - if (alt_access) - ret = (ret & 0x7f) | (nmi_mask ? 0x00 : 0x80); + default: + ret = nvr->regs[local->addr[addr_id]]; + break; + } + else { + ret = local->addr[addr_id]; + if (!local->read_addr) + ret &= 0x80; + if (alt_access) + ret = (ret & 0x7f) | (nmi_mask ? 0x00 : 0x80); } - return(ret); + return (ret); } - /* Secondary NVR write - used by SMC. */ static void nvr_sec_write(uint16_t addr, uint8_t val, void *priv) @@ -827,7 +809,6 @@ nvr_sec_write(uint16_t addr, uint8_t val, void *priv) nvr_write(0x72 + (addr & 1), val, priv); } - /* Secondary NVR read - used by SMC. */ static uint8_t nvr_sec_read(uint16_t addr, void *priv) @@ -835,20 +816,19 @@ nvr_sec_read(uint16_t addr, void *priv) return nvr_read(0x72 + (addr & 1), priv); } - /* Reset the RTC state to 1980/01/01 00:00. */ static void nvr_reset(nvr_t *nvr) { - local_t *local = (local_t *)nvr->data; + local_t *local = (local_t *) nvr->data; /* memset(nvr->regs, local->def, RTC_REGS); */ memset(nvr->regs, local->def, nvr->size); - nvr->regs[RTC_DOM] = 1; + nvr->regs[RTC_DOM] = 1; nvr->regs[RTC_MONTH] = 1; - nvr->regs[RTC_YEAR] = RTC_BCD(80); + nvr->regs[RTC_YEAR] = RTC_BCD(80); if (local->cent != 0xFF) - nvr->regs[local->cent] = RTC_BCD(19); + nvr->regs[local->cent] = RTC_BCD(19); nvr->regs[RTC_REGD] = REGD_VRT; } @@ -857,68 +837,65 @@ nvr_reset(nvr_t *nvr) static void nvr_start(nvr_t *nvr) { - int i; + int i; local_t *local = (local_t *) nvr->data; struct tm tm; - int default_found = 0; + int default_found = 0; for (i = 0; i < nvr->size; i++) { - if (nvr->regs[i] == local->def) - default_found++; + if (nvr->regs[i] == local->def) + default_found++; } if (default_found == nvr->size) - nvr->regs[0x0e] = 0xff; /* If load failed or it loaded an uninitialized NVR, - mark everything as bad. */ + nvr->regs[0x0e] = 0xff; /* If load failed or it loaded an uninitialized NVR, + mark everything as bad. */ /* Initialize the internal and chip times. */ if (time_sync & TIME_SYNC_ENABLED) { - /* Use the internal clock's time. */ - nvr_time_get(&tm); - time_set(nvr, &tm); + /* Use the internal clock's time. */ + nvr_time_get(&tm); + time_set(nvr, &tm); } else { - /* Set the internal clock from the chip time. */ - time_get(nvr, &tm); - nvr_time_set(&tm); + /* Set the internal clock from the chip time. */ + time_get(nvr, &tm); + nvr_time_set(&tm); } /* Start the RTC. */ - nvr->regs[RTC_REGA] = (REGA_RS2|REGA_RS1); + nvr->regs[RTC_REGA] = (REGA_RS2 | REGA_RS1); nvr->regs[RTC_REGB] = REGB_2412; } - static void nvr_at_speed_changed(void *priv) { - nvr_t *nvr = (nvr_t *) priv; + nvr_t *nvr = (nvr_t *) priv; local_t *local = (local_t *) nvr->data; timer_load_count(nvr); timer_disable(&local->update_timer); if (local->ecount > 0ULL) - timer_set_delay_u64(&local->update_timer, local->ecount); + timer_set_delay_u64(&local->update_timer, local->ecount); timer_disable(&nvr->onesec_time); timer_set_delay_u64(&nvr->onesec_time, (10000ULL * TIMER_USEC)); } - void nvr_at_handler(int set, uint16_t base, nvr_t *nvr) { io_handler(set, base, 2, - nvr_read,NULL,NULL, nvr_write,NULL,NULL, nvr); + nvr_read, NULL, NULL, nvr_write, NULL, NULL, nvr); } - void nvr_at_sec_handler(int set, uint16_t base, nvr_t *nvr) { io_handler(set, base, 2, - nvr_sec_read,NULL,NULL, nvr_sec_write,NULL,NULL, nvr); + nvr_sec_read, NULL, NULL, nvr_sec_write, NULL, NULL, nvr); } void @@ -929,7 +906,6 @@ nvr_read_addr_set(int set, nvr_t *nvr) local->read_addr = set; } - void nvr_wp_set(int set, int h, nvr_t *nvr) { @@ -938,19 +914,17 @@ nvr_wp_set(int set, int h, nvr_t *nvr) local->wp[h] = set; } - void nvr_via_wp_set(int set, int reg, nvr_t *nvr) { local_t *local = (local_t *) nvr->data; if (reg == 0x0d) - local->wp_0d = set; + local->wp_0d = set; else - local->wp_32 = set; + local->wp_32 = set; } - void nvr_bank_set(int base, uint8_t bank, nvr_t *nvr) { @@ -959,25 +933,22 @@ nvr_bank_set(int base, uint8_t bank, nvr_t *nvr) local->bank[base] = bank; } - void nvr_lock_set(int base, int size, int lock, nvr_t *nvr) { local_t *local = (local_t *) nvr->data; - int i; + int i; for (i = 0; i < size; i++) - local->lock[base + i] = lock; + local->lock[base + i] = lock; } - void nvr_irq_set(int irq, nvr_t *nvr) { nvr->irq = irq; } - static void nvr_at_reset(void *priv) { @@ -988,90 +959,90 @@ nvr_at_reset(void *priv) nvr->regs[RTC_REGC] &= ~(REGC_PF | REGC_AF | REGC_UF | REGC_IRQF); } - static void * nvr_at_init(const device_t *info) { local_t *local; - nvr_t *nvr; + nvr_t *nvr; /* Allocate an NVR for this machine. */ - nvr = (nvr_t *)malloc(sizeof(nvr_t)); - if (nvr == NULL) return(NULL); + nvr = (nvr_t *) malloc(sizeof(nvr_t)); + if (nvr == NULL) + return (NULL); memset(nvr, 0x00, sizeof(nvr_t)); - local = (local_t *)malloc(sizeof(local_t)); + local = (local_t *) malloc(sizeof(local_t)); memset(local, 0x00, sizeof(local_t)); nvr->data = local; /* This is machine specific. */ - nvr->size = machines[machine].nvrmask + 1; + nvr->size = machines[machine].nvrmask + 1; local->lock = (uint8_t *) malloc(nvr->size); memset(local->lock, 0x00, nvr->size); - local->def = 0xff /*0x00*/; + local->def = 0xff /*0x00*/; local->flags = 0x00; - switch(info->local & 7) { - case 0: /* standard AT, no century register */ - if (info->local == 16) { - local->flags |= FLAG_P6RP4_HACK; - nvr->irq = 8; - local->cent = RTC_CENTURY_AT; - } else { - nvr->irq = 8; - local->cent = 0xff; - } - break; + switch (info->local & 7) { + case 0: /* standard AT, no century register */ + if (info->local == 16) { + local->flags |= FLAG_P6RP4_HACK; + nvr->irq = 8; + local->cent = RTC_CENTURY_AT; + } else { + nvr->irq = 8; + local->cent = 0xff; + } + break; - case 1: /* standard AT */ - case 5: /* AMI WinBIOS 1994 */ - case 6: /* AMI BIOS 1995 */ - if (info->local == 9) - local->flags |= FLAG_PIIX4; - else { - local->def = 0x00; - if ((info->local & 7) == 5) - local->flags |= FLAG_AMI_1994_HACK; - else if ((info->local & 7) == 6) - local->flags |= FLAG_AMI_1995_HACK; - else - local->def = 0xff; - } - nvr->irq = 8; - local->cent = RTC_CENTURY_AT; - break; + case 1: /* standard AT */ + case 5: /* AMI WinBIOS 1994 */ + case 6: /* AMI BIOS 1995 */ + if (info->local == 9) + local->flags |= FLAG_PIIX4; + else { + local->def = 0x00; + if ((info->local & 7) == 5) + local->flags |= FLAG_AMI_1994_HACK; + else if ((info->local & 7) == 6) + local->flags |= FLAG_AMI_1995_HACK; + else + local->def = 0xff; + } + nvr->irq = 8; + local->cent = RTC_CENTURY_AT; + break; - case 2: /* PS/1 or PS/2 */ - nvr->irq = 8; - local->cent = RTC_CENTURY_PS; - local->def = 0x00; - if (info->local & 8) - local->flags |= FLAG_NO_NMI; - break; + case 2: /* PS/1 or PS/2 */ + nvr->irq = 8; + local->cent = RTC_CENTURY_PS; + local->def = 0x00; + if (info->local & 8) + local->flags |= FLAG_NO_NMI; + break; - case 3: /* Amstrad PC's */ - nvr->irq = 1; - local->cent = RTC_CENTURY_AT; - local->def = 0xff; - if (info->local & 8) - local->flags |= FLAG_NO_NMI; - break; + case 3: /* Amstrad PC's */ + nvr->irq = 1; + local->cent = RTC_CENTURY_AT; + local->def = 0xff; + if (info->local & 8) + local->flags |= FLAG_NO_NMI; + break; - case 4: /* IBM AT */ - if (info->local == 12) { - local->def = 0x00; - local->flags |= FLAG_AMI_1992_HACK; - } else if (info->local == 20) - local->def = 0x00; - else - local->def = 0xff; - nvr->irq = 8; - local->cent = RTC_CENTURY_AT; - break; + case 4: /* IBM AT */ + if (info->local == 12) { + local->def = 0x00; + local->flags |= FLAG_AMI_1992_HACK; + } else if (info->local == 20) + local->def = 0x00; + else + local->def = 0xff; + nvr->irq = 8; + local->cent = RTC_CENTURY_AT; + break; - case 7: /* VIA VT82C586B */ - nvr->irq = 8; - local->cent = RTC_CENTURY_VIA; - break; + case 7: /* VIA VT82C586B */ + nvr->irq = 8; + local->cent = RTC_CENTURY_VIA; + break; } local->read_addr = 1; @@ -1079,41 +1050,40 @@ nvr_at_init(const device_t *info) /* Set up any local handlers here. */ nvr->reset = nvr_reset; nvr->start = nvr_start; - nvr->tick = timer_tick; + nvr->tick = timer_tick; /* Initialize the generic NVR. */ nvr_init(nvr); if (nvr_at_inited == 0) { - /* Start the timers. */ - timer_add(&local->update_timer, timer_update, nvr, 0); + /* Start the timers. */ + timer_add(&local->update_timer, timer_update, nvr, 0); - timer_add(&local->rtc_timer, timer_intr, nvr, 0); - /* On power on, if the oscillator is disabled, it's reenabled. */ - if ((nvr->regs[RTC_REGA] & 0x70) == 0x00) - nvr->regs[RTC_REGA] = (nvr->regs[RTC_REGA] & 0x8f) | 0x20; - nvr_at_reset(nvr); - timer_load_count(nvr); + timer_add(&local->rtc_timer, timer_intr, nvr, 0); + /* On power on, if the oscillator is disabled, it's reenabled. */ + if ((nvr->regs[RTC_REGA] & 0x70) == 0x00) + nvr->regs[RTC_REGA] = (nvr->regs[RTC_REGA] & 0x8f) | 0x20; + nvr_at_reset(nvr); + timer_load_count(nvr); - /* Set up the I/O handler for this device. */ - io_sethandler(0x0070, 2, - nvr_read,NULL,NULL, nvr_write,NULL,NULL, nvr); - if (info->local & 8) { - io_sethandler(0x0072, 2, - nvr_read,NULL,NULL, nvr_write,NULL,NULL, nvr); - } + /* Set up the I/O handler for this device. */ + io_sethandler(0x0070, 2, + nvr_read, NULL, NULL, nvr_write, NULL, NULL, nvr); + if (info->local & 8) { + io_sethandler(0x0072, 2, + nvr_read, NULL, NULL, nvr_write, NULL, NULL, nvr); + } - nvr_at_inited = 1; + nvr_at_inited = 1; } - return(nvr); + return (nvr); } - static void nvr_at_close(void *priv) { - nvr_t *nvr = (nvr_t *) priv; + nvr_t *nvr = (nvr_t *) priv; local_t *local = (local_t *) nvr->data; nvr_close(); @@ -1123,101 +1093,101 @@ nvr_at_close(void *priv) timer_disable(&nvr->onesec_time); if (nvr != NULL) { - if (nvr->fn != NULL) - free(nvr->fn); + if (nvr->fn != NULL) + free(nvr->fn); - if (nvr->data != NULL) - free(nvr->data); + if (nvr->data != NULL) + free(nvr->data); - free(nvr); + free(nvr); } if (nvr_at_inited == 1) - nvr_at_inited = 0; + nvr_at_inited = 0; } const device_t at_nvr_old_device = { - .name = "PC/AT NVRAM (No century)", + .name = "PC/AT NVRAM (No century)", .internal_name = "at_nvr_old", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 0, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 0, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t at_nvr_device = { - .name = "PC/AT NVRAM", + .name = "PC/AT NVRAM", .internal_name = "at_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 1, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 1, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ps_nvr_device = { - .name = "PS/1 or PS/2 NVRAM", + .name = "PS/1 or PS/2 NVRAM", .internal_name = "ps_nvr", - .flags = DEVICE_PS2, - .local = 2, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_PS2, + .local = 2, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t amstrad_nvr_device = { - .name = "Amstrad NVRAM", + .name = "Amstrad NVRAM", .internal_name = "amstrad_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 3, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 3, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ibmat_nvr_device = { - .name = "IBM AT NVRAM", + .name = "IBM AT NVRAM", .internal_name = "ibmat_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 4, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 4, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t piix4_nvr_device = { - .name = "Intel PIIX4 PC/AT NVRAM", + .name = "Intel PIIX4 PC/AT NVRAM", .internal_name = "piix4_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 9, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 9, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ps_no_nmi_nvr_device = { @@ -1225,8 +1195,11 @@ const device_t ps_no_nmi_nvr_device = { "ps1_nvr", DEVICE_PS2, 10, - nvr_at_init, nvr_at_close, nvr_at_reset, - { NULL }, nvr_at_speed_changed, + nvr_at_init, + nvr_at_close, + nvr_at_reset, + { NULL }, + nvr_at_speed_changed, NULL }; @@ -1235,91 +1208,94 @@ const device_t amstrad_no_nmi_nvr_device = { "amstrad_nvr", DEVICE_ISA | DEVICE_AT, 11, - nvr_at_init, nvr_at_close, nvr_at_reset, - { NULL }, nvr_at_speed_changed, + nvr_at_init, + nvr_at_close, + nvr_at_reset, + { NULL }, + nvr_at_speed_changed, NULL }; const device_t ami_1992_nvr_device = { - .name = "AMI Color 1992 PC/AT NVRAM", + .name = "AMI Color 1992 PC/AT NVRAM", .internal_name = "ami_1992_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 12, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 12, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ami_1994_nvr_device = { - .name = "AMI WinBIOS 1994 PC/AT NVRAM", + .name = "AMI WinBIOS 1994 PC/AT NVRAM", .internal_name = "ami_1994_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 13, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 13, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ami_1995_nvr_device = { - .name = "AMI WinBIOS 1995 PC/AT NVRAM", + .name = "AMI WinBIOS 1995 PC/AT NVRAM", .internal_name = "ami_1995_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 14, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 14, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t via_nvr_device = { - .name = "VIA PC/AT NVRAM", + .name = "VIA PC/AT NVRAM", .internal_name = "via_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 15, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 15, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t p6rp4_nvr_device = { - .name = "ASUS P/I-P6RP4 PC/AT NVRAM", + .name = "ASUS P/I-P6RP4 PC/AT NVRAM", .internal_name = "p6rp4_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 16, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 16, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t amstrad_megapc_nvr_device = { - .name = "Amstrad MegapC NVRAM", + .name = "Amstrad MegapC NVRAM", .internal_name = "amstrad_megapc_nvr", - .flags = DEVICE_ISA | DEVICE_AT, - .local = 20, - .init = nvr_at_init, - .close = nvr_at_close, - .reset = nvr_at_reset, + .flags = DEVICE_ISA | DEVICE_AT, + .local = 20, + .init = nvr_at_init, + .close = nvr_at_close, + .reset = nvr_at_reset, { .available = NULL }, .speed_changed = nvr_at_speed_changed, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/nvr_ps2.c b/src/nvr_ps2.c index e82eff150..6b6b69cc8 100644 --- a/src/nvr_ps2.c +++ b/src/nvr_ps2.c @@ -49,70 +49,66 @@ #include <86box/nvr_ps2.h> #include <86box/rom.h> - typedef struct { - int addr; + int addr; - uint8_t *ram; - int size; + uint8_t *ram; + int size; - char *fn; + char *fn; } ps2_nvr_t; - static uint8_t ps2_nvr_read(uint16_t port, void *priv) { - ps2_nvr_t *nvr = (ps2_nvr_t *)priv; - uint8_t ret = 0xff; + ps2_nvr_t *nvr = (ps2_nvr_t *) priv; + uint8_t ret = 0xff; switch (port) { - case 0x74: - ret = nvr->addr & 0xff; - break; + case 0x74: + ret = nvr->addr & 0xff; + break; - case 0x75: - ret = nvr->addr >> 8; - break; + case 0x75: + ret = nvr->addr >> 8; + break; - case 0x76: - ret = nvr->ram[nvr->addr]; - break; + case 0x76: + ret = nvr->ram[nvr->addr]; + break; } - return(ret); + return (ret); } - static void ps2_nvr_write(uint16_t port, uint8_t val, void *priv) { - ps2_nvr_t *nvr = (ps2_nvr_t *)priv; + ps2_nvr_t *nvr = (ps2_nvr_t *) priv; switch (port) { - case 0x74: - nvr->addr = (nvr->addr & 0x1f00) | val; - break; + case 0x74: + nvr->addr = (nvr->addr & 0x1f00) | val; + break; - case 0x75: - nvr->addr = (nvr->addr & 0xff) | ((val & 0x1f) << 8); - break; + case 0x75: + nvr->addr = (nvr->addr & 0xff) | ((val & 0x1f) << 8); + break; - case 0x76: - nvr->ram[nvr->addr] = val; - break; + case 0x76: + nvr->ram[nvr->addr] = val; + break; } } - static void * ps2_nvr_init(const device_t *info) { ps2_nvr_t *nvr; - FILE *f = NULL; - int c; + FILE *f = NULL; + int c; - nvr = (ps2_nvr_t *)malloc(sizeof(ps2_nvr_t)); + nvr = (ps2_nvr_t *) malloc(sizeof(ps2_nvr_t)); memset(nvr, 0x00, sizeof(ps2_nvr_t)); if (info->local) @@ -121,38 +117,37 @@ ps2_nvr_init(const device_t *info) nvr->size = 8192; /* Set up the NVR file's name. */ - c = strlen(machine_get_internal_name()) + 9; - nvr->fn = (char *)malloc(c + 1); + c = strlen(machine_get_internal_name()) + 9; + nvr->fn = (char *) malloc(c + 1); sprintf(nvr->fn, "%s_sec.nvr", machine_get_internal_name()); io_sethandler(0x0074, 3, - ps2_nvr_read,NULL,NULL, ps2_nvr_write,NULL,NULL, nvr); + ps2_nvr_read, NULL, NULL, ps2_nvr_write, NULL, NULL, nvr); f = nvr_fopen(nvr->fn, "rb"); - nvr->ram = (uint8_t *)malloc(nvr->size); + nvr->ram = (uint8_t *) malloc(nvr->size); memset(nvr->ram, 0xff, nvr->size); if (f != NULL) { - if (fread(nvr->ram, 1, nvr->size, f) != nvr->size) - fatal("ps2_nvr_init(): Error reading EEPROM data\n"); - fclose(f); + if (fread(nvr->ram, 1, nvr->size, f) != nvr->size) + fatal("ps2_nvr_init(): Error reading EEPROM data\n"); + fclose(f); } - return(nvr); + return (nvr); } - static void ps2_nvr_close(void *priv) { - ps2_nvr_t *nvr = (ps2_nvr_t *)priv; - FILE *f = NULL; + ps2_nvr_t *nvr = (ps2_nvr_t *) priv; + FILE *f = NULL; f = nvr_fopen(nvr->fn, "wb"); if (f != NULL) { - (void)fwrite(nvr->ram, nvr->size, 1, f); - fclose(f); + (void) fwrite(nvr->ram, nvr->size, 1, f); + fclose(f); } if (nvr->ram != NULL) @@ -162,29 +157,29 @@ ps2_nvr_close(void *priv) } const device_t ps2_nvr_device = { - .name = "PS/2 Secondary NVRAM for PS/2 Models 70-80", + .name = "PS/2 Secondary NVRAM for PS/2 Models 70-80", .internal_name = "ps2_nvr", - .flags = 0, - .local = 0, - .init = ps2_nvr_init, - .close = ps2_nvr_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = ps2_nvr_init, + .close = ps2_nvr_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ps2_nvr_55ls_device = { - .name = "PS/2 Secondary NVRAM for PS/2 Models 55LS-65SX", + .name = "PS/2 Secondary NVRAM for PS/2 Models 55LS-65SX", .internal_name = "ps2_nvr_55ls", - .flags = 0, - .local = 1, - .init = ps2_nvr_init, - .close = ps2_nvr_close, - .reset = NULL, + .flags = 0, + .local = 1, + .init = ps2_nvr_init, + .close = ps2_nvr_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/pci.c b/src/pci.c index 36dd09002..b4078167c 100644 --- a/src/pci.c +++ b/src/pci.c @@ -35,65 +35,59 @@ #include <86box/pci.h> #include <86box/keyboard.h> - typedef struct { - uint8_t bus, id, type; - uint8_t irq_routing[4]; + uint8_t bus, id, type; + uint8_t irq_routing[4]; - void *priv; - void (*write)(int func, int addr, uint8_t val, void *priv); - uint8_t (*read)(int func, int addr, void *priv); + void *priv; + void (*write)(int func, int addr, uint8_t val, void *priv); + uint8_t (*read)(int func, int addr, void *priv); } pci_card_t; typedef struct { - uint8_t enabled; - uint8_t irq_line; + uint8_t enabled; + uint8_t irq_line; } pci_mirq_t; +int pci_burst_time, agp_burst_time, + pci_nonburst_time, agp_nonburst_time; -int pci_burst_time, agp_burst_time, - pci_nonburst_time, agp_nonburst_time; - -static pci_card_t pci_cards[32]; -static uint8_t pci_pmc = 0, last_pci_card = 0, last_normal_pci_card = 0, last_pci_bus = 1; -static uint8_t pci_card_to_slot_mapping[256][32], pci_bus_number_to_index_mapping[256]; -static uint8_t pci_irqs[16], pci_irq_level[16]; -static uint64_t pci_irq_hold[16]; -static pci_mirq_t pci_mirqs[8]; -static int pci_type, - pci_switch, - pci_index, - pci_func, - pci_card, - pci_bus, - pci_enable, - pci_key; -static int trc_reg = 0; - - -static void pci_reset_regs(void); +static pci_card_t pci_cards[32]; +static uint8_t pci_pmc = 0, last_pci_card = 0, last_normal_pci_card = 0, last_pci_bus = 1; +static uint8_t pci_card_to_slot_mapping[256][32], pci_bus_number_to_index_mapping[256]; +static uint8_t pci_irqs[16], pci_irq_level[16]; +static uint64_t pci_irq_hold[16]; +static pci_mirq_t pci_mirqs[8]; +static int pci_type, + pci_switch, + pci_index, + pci_func, + pci_card, + pci_bus, + pci_enable, + pci_key; +static int trc_reg = 0; +static void pci_reset_regs(void); #ifdef ENABLE_PCI_LOG int pci_do_log = ENABLE_PCI_LOG; - static void pci_log(const char *fmt, ...) { va_list ap; if (pci_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define pci_log(fmt, ...) +# define pci_log(fmt, ...) #endif - static void pci_clear_slot(int card) { @@ -101,201 +95,205 @@ pci_clear_slot(int card) pci_card_to_slot_mapping[pci_cards[card].bus][pci_cards[card].id] = 0xff; - pci_cards[card].id = 0xff; + pci_cards[card].id = 0xff; pci_cards[card].type = 0xff; for (i = 0; i < 4; i++) - pci_cards[card].irq_routing[i] = 0; + pci_cards[card].irq_routing[i] = 0; - pci_cards[card].read = NULL; + pci_cards[card].read = NULL; pci_cards[card].write = NULL; - pci_cards[card].priv = NULL; + pci_cards[card].priv = NULL; } - void pci_relocate_slot(int type, int new_slot) { - int i, card = -1; - int old_slot; + int i, card = -1; + int old_slot; uint8_t mapping; if ((new_slot < 0) || (new_slot > 31)) - return; + return; for (i = 0; i < 32; i++) { - if ((pci_cards[i].bus == 0) && (pci_cards[i].type == type)) { - card = i; - break; - } + if ((pci_cards[i].bus == 0) && (pci_cards[i].type == type)) { + card = i; + break; + } } if (card == -1) - return; + return; - old_slot = pci_cards[card].id; - pci_cards[card].id = new_slot; - mapping = pci_card_to_slot_mapping[0][old_slot]; + old_slot = pci_cards[card].id; + pci_cards[card].id = new_slot; + mapping = pci_card_to_slot_mapping[0][old_slot]; pci_card_to_slot_mapping[0][old_slot] = 0xff; pci_card_to_slot_mapping[0][new_slot] = mapping; } - static void pci_cf8_write(uint16_t port, uint32_t val, void *priv) { pci_log("cf8 write: %08X\n", val); - pci_index = val & 0xff; - pci_func = (val >> 8) & 7; - pci_card = (val >> 11) & 31; - pci_bus = (val >> 16) & 0xff; + pci_index = val & 0xff; + pci_func = (val >> 8) & 7; + pci_card = (val >> 11) & 31; + pci_bus = (val >> 16) & 0xff; pci_enable = (val >> 31) & 1; } - static uint32_t pci_cf8_read(uint16_t port, void *priv) { - return pci_index | (pci_func << 8) | - (pci_card << 11) | (pci_bus << 16) | (pci_enable << 31); + return pci_index | (pci_func << 8) | (pci_card << 11) | (pci_bus << 16) | (pci_enable << 31); } - static void pci_write(uint16_t port, uint8_t val, void *priv) { uint8_t slot = 0; if (in_smm) - pci_log("(%i) %03x write: %02X\n", pci_enable, port, val); + pci_log("(%i) %03x write: %02X\n", pci_enable, port, val); switch (port) { - case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff: - if (! pci_enable) - return; + case 0xcfc: + case 0xcfd: + case 0xcfe: + case 0xcff: + if (!pci_enable) + return; - pci_log("Writing %02X to PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", val, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].write) { - pci_log("Writing to PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); - pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv); - } + pci_log("Writing %02X to PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", val, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].write) { + pci_log("Writing to PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv); + } #ifdef ENABLE_PCI_LOG - else - pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - } + } #ifdef ENABLE_PCI_LOG - else - pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - break; + break; } } - static void pci_writew(uint16_t port, uint16_t val, void *priv) { uint8_t slot = 0; if (in_smm) - pci_log("(%i) %03x write: %02X\n", pci_enable, port, val); + pci_log("(%i) %03x write: %02X\n", pci_enable, port, val); switch (port) { - case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff: - if (! pci_enable) - return; + case 0xcfc: + case 0xcfd: + case 0xcfe: + case 0xcff: + if (!pci_enable) + return; - pci_log("Writing %04X to PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", val, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].write) { - pci_log("Writing to PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); - pci_cards[slot].write(pci_func, pci_index | (port & 3), val & 0xff, pci_cards[slot].priv); - pci_cards[slot].write(pci_func, pci_index | ((port & 3) + 1), val >> 8, pci_cards[slot].priv); - } + pci_log("Writing %04X to PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", val, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].write) { + pci_log("Writing to PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + pci_cards[slot].write(pci_func, pci_index | (port & 3), val & 0xff, pci_cards[slot].priv); + pci_cards[slot].write(pci_func, pci_index | ((port & 3) + 1), val >> 8, pci_cards[slot].priv); + } #ifdef ENABLE_PCI_LOG - else - pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - } + } #ifdef ENABLE_PCI_LOG - else - pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - break; + break; } } - static void pci_writel(uint16_t port, uint32_t val, void *priv) { uint8_t slot = 0; if (in_smm) - pci_log("(%i) %03x write: %02X\n", pci_enable, port, val); + pci_log("(%i) %03x write: %02X\n", pci_enable, port, val); switch (port) { - case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff: - if (! pci_enable) - return; + case 0xcfc: + case 0xcfd: + case 0xcfe: + case 0xcff: + if (!pci_enable) + return; - pci_log("Writing %08X to PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", val, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].write) { - pci_log("Writing to PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); - pci_cards[slot].write(pci_func, pci_index | (port & 3), val & 0xff, pci_cards[slot].priv); - pci_cards[slot].write(pci_func, pci_index | ((port & 3) + 1), (val >> 8) & 0xff, pci_cards[slot].priv); - pci_cards[slot].write(pci_func, pci_index | ((port & 3) + 2), (val >> 16) & 0xff, pci_cards[slot].priv); - pci_cards[slot].write(pci_func, pci_index | ((port & 3) + 3), (val >> 24) & 0xff, pci_cards[slot].priv); - } + pci_log("Writing %08X to PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", val, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].write) { + pci_log("Writing to PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + pci_cards[slot].write(pci_func, pci_index | (port & 3), val & 0xff, pci_cards[slot].priv); + pci_cards[slot].write(pci_func, pci_index | ((port & 3) + 1), (val >> 8) & 0xff, pci_cards[slot].priv); + pci_cards[slot].write(pci_func, pci_index | ((port & 3) + 2), (val >> 16) & 0xff, pci_cards[slot].priv); + pci_cards[slot].write(pci_func, pci_index | ((port & 3) + 3), (val >> 24) & 0xff, pci_cards[slot].priv); + } #ifdef ENABLE_PCI_LOG - else - pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - } + } #ifdef ENABLE_PCI_LOG - else - pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - break; + break; } } - static uint8_t pci_read(uint16_t port, void *priv) { uint8_t slot = 0; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if (in_smm) - pci_log("(%i) %03x read\n", pci_enable, port); + pci_log("(%i) %03x read\n", pci_enable, port); switch (port) { - case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff: - if (! pci_enable) - return 0xff; + case 0xcfc: + case 0xcfd: + case 0xcfe: + case 0xcff: + if (!pci_enable) + return 0xff; - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].read) - ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].read) + ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); #ifdef ENABLE_PCI_LOG - else - pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - } + } #ifdef ENABLE_PCI_LOG - else - pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif } @@ -304,35 +302,37 @@ pci_read(uint16_t port, void *priv) return ret; } - static uint16_t pci_readw(uint16_t port, void *priv) { - uint8_t slot = 0; - uint16_t ret = 0xffff; + uint8_t slot = 0; + uint16_t ret = 0xffff; if (in_smm) - pci_log("(%i) %03x read\n", pci_enable, port); + pci_log("(%i) %03x read\n", pci_enable, port); switch (port) { - case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff: - if (! pci_enable) - return 0xff; + case 0xcfc: + case 0xcfd: + case 0xcfe: + case 0xcff: + if (!pci_enable) + return 0xff; - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].read) { - ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); - ret |= (pci_cards[slot].read(pci_func, (pci_index | (port & 3)) + 1, pci_cards[slot].priv) << 8); - } + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].read) { + ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); + ret |= (pci_cards[slot].read(pci_func, (pci_index | (port & 3)) + 1, pci_cards[slot].priv) << 8); + } #ifdef ENABLE_PCI_LOG - else - pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - } + } #ifdef ENABLE_PCI_LOG - else - pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif } @@ -341,37 +341,39 @@ pci_readw(uint16_t port, void *priv) return ret; } - static uint32_t pci_readl(uint16_t port, void *priv) { - uint8_t slot = 0; - uint32_t ret = 0xffffffff; + uint8_t slot = 0; + uint32_t ret = 0xffffffff; if (in_smm) - pci_log("(%i) %03x read\n", pci_enable, port); + pci_log("(%i) %03x read\n", pci_enable, port); switch (port) { - case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff: - if (! pci_enable) - return 0xff; + case 0xcfc: + case 0xcfd: + case 0xcfe: + case 0xcff: + if (!pci_enable) + return 0xff; - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].read) { - ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); - ret |= (pci_cards[slot].read(pci_func, (pci_index | (port & 3)) + 1, pci_cards[slot].priv) << 8); - ret |= (pci_cards[slot].read(pci_func, (pci_index | (port & 3)) + 2, pci_cards[slot].priv) << 16); - ret |= (pci_cards[slot].read(pci_func, (pci_index | (port & 3)) + 3, pci_cards[slot].priv) << 24); - } + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].read) { + ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); + ret |= (pci_cards[slot].read(pci_func, (pci_index | (port & 3)) + 1, pci_cards[slot].priv) << 8); + ret |= (pci_cards[slot].read(pci_func, (pci_index | (port & 3)) + 2, pci_cards[slot].priv) << 16); + ret |= (pci_cards[slot].read(pci_func, (pci_index | (port & 3)) + 3, pci_cards[slot].priv) << 24); + } #ifdef ENABLE_PCI_LOG - else - pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif - } + } #ifdef ENABLE_PCI_LOG - else - pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); + else + pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif } @@ -380,10 +382,8 @@ pci_readl(uint16_t port, void *priv) return ret; } - -static void pci_type2_write(uint16_t port, uint8_t val, void *priv); -static uint8_t pci_type2_read(uint16_t port, void *priv); - +static void pci_type2_write(uint16_t port, uint8_t val, void *priv); +static uint8_t pci_type2_read(uint16_t port, void *priv); void pci_set_pmc(uint8_t pmc) @@ -391,148 +391,140 @@ pci_set_pmc(uint8_t pmc) pci_reset_regs(); if (!pci_pmc && (pmc & 0x01)) { - io_removehandler(0x0cf8, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); - io_removehandler(0x0cfa, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); - io_sethandler(0x0cf8, 1, - NULL,NULL,pci_cf8_read, NULL,NULL,pci_cf8_write, NULL); - io_sethandler(0x0cfc, 4, - pci_read,NULL,NULL, pci_write,NULL,NULL, NULL); + io_removehandler(0x0cf8, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); + io_removehandler(0x0cfa, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); + io_sethandler(0x0cf8, 1, + NULL, NULL, pci_cf8_read, NULL, NULL, pci_cf8_write, NULL); + io_sethandler(0x0cfc, 4, + pci_read, NULL, NULL, pci_write, NULL, NULL, NULL); } else if (pci_pmc && !(pmc & 0x01)) { - io_removehandler(0x0cf8, 1, - NULL,NULL,pci_cf8_read, NULL,NULL,pci_cf8_write, NULL); - io_removehandler(0x0cfc, 4, - pci_read,NULL,NULL, pci_write,NULL,NULL, NULL); - io_sethandler(0x0cf8, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); - io_sethandler(0x0cfa, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); + io_removehandler(0x0cf8, 1, + NULL, NULL, pci_cf8_read, NULL, NULL, pci_cf8_write, NULL); + io_removehandler(0x0cfc, 4, + pci_read, NULL, NULL, pci_write, NULL, NULL, NULL); + io_sethandler(0x0cf8, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); + io_sethandler(0x0cfa, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); } pci_pmc = (pmc & 0x01); } - static void pci_type2_write(uint16_t port, uint8_t val, void *priv) { uint8_t slot = 0; if (port == 0xcf8) { - pci_func = (val >> 1) & 7; + pci_func = (val >> 1) & 7; - if (!pci_key && (val & 0xf0)) - io_sethandler(0xc000, 0x1000, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); - else if (pci_key && !(val & 0xf0)) - io_removehandler(0xc000, 0x1000, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); + if (!pci_key && (val & 0xf0)) + io_sethandler(0xc000, 0x1000, + pci_type2_read, NULL, NULL, + pci_type2_write, NULL, NULL, NULL); + else if (pci_key && !(val & 0xf0)) + io_removehandler(0xc000, 0x1000, + pci_type2_read, NULL, NULL, + pci_type2_write, NULL, NULL, NULL); - pci_key = val & 0xf0; + pci_key = val & 0xf0; } else if (port == 0xcfa) - pci_bus = val; + pci_bus = val; else if (port == 0xcfb) { - pci_log("Write %02X to port 0CFB\n", val); - pci_set_pmc(val); + pci_log("Write %02X to port 0CFB\n", val); + pci_set_pmc(val); } else { - pci_card = (port >> 8) & 0xf; - pci_index = port & 0xff; + pci_card = (port >> 8) & 0xf; + pci_index = port & 0xff; - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].write) - pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv); + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].write) + pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv); #ifdef ENABLE_PCI_LOG - else - pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); + else + pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); #endif - } + } #ifdef ENABLE_PCI_LOG - else - pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); + else + pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); #endif } } - static void pci_type2_writel(uint16_t port, uint32_t val, void *priv) { int i; for (i = 0; i < 4; i++) { - /* Make sure to have the DWORD write not pass through to PMC if mechanism 1 is in use, - as otherwise, the PCI enable bits clobber it. */ - if (!pci_pmc || ((port + i) != 0x0cfb)) - pci_type2_write(port + i, val >> 8, priv); + /* Make sure to have the DWORD write not pass through to PMC if mechanism 1 is in use, + as otherwise, the PCI enable bits clobber it. */ + if (!pci_pmc || ((port + i) != 0x0cfb)) + pci_type2_write(port + i, val >> 8, priv); } } - static uint8_t pci_type2_read(uint16_t port, void *priv) { uint8_t slot = 0; if (port == 0xcf8) - return pci_key | (pci_func << 1); + return pci_key | (pci_func << 1); else if (port == 0xcfa) - return pci_bus; + return pci_bus; else if (port == 0xcfb) - return pci_pmc; + return pci_pmc; - pci_card = (port >> 8) & 0xf; + pci_card = (port >> 8) & 0xf; pci_index = port & 0xff; slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; if (slot != 0xff) { - if (pci_cards[slot].read) - return pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); + if (pci_cards[slot].read) + return pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); #ifdef ENABLE_PCI_LOG - else - pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); + else + pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); #endif } #ifdef ENABLE_PCI_LOG else - pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); + pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); #endif return 0xff; } - void pci_set_irq_routing(int pci_int, int irq) { pci_irqs[pci_int - 1] = irq; } - void pci_set_irq_level(int pci_int, int level) { pci_irq_level[pci_int - 1] = !!level; } - void pci_enable_mirq(int mirq) { pci_mirqs[mirq].enabled = 1; } - void pci_set_mirq_routing(int mirq, int irq) { pci_mirqs[mirq].irq_line = irq; } - void pci_set_mirq(uint8_t mirq, int level) { @@ -540,129 +532,127 @@ pci_set_mirq(uint8_t mirq, int level) uint8_t irq_bit; if (mirq >= 0xf0) { - irq_line = mirq & 0x0f; - irq_bit = 0x1D; + irq_line = mirq & 0x0f; + irq_bit = 0x1D; } else { - if (! pci_mirqs[mirq].enabled) { - pci_log("pci_set_mirq(%02X): MIRQ0 disabled\n", mirq); - return; - } + if (!pci_mirqs[mirq].enabled) { + pci_log("pci_set_mirq(%02X): MIRQ0 disabled\n", mirq); + return; + } - if (pci_mirqs[mirq].irq_line > 0x0f) { - pci_log("pci_set_mirq(%02X): IRQ line is disabled\n", mirq); - return; - } + if (pci_mirqs[mirq].irq_line > 0x0f) { + pci_log("pci_set_mirq(%02X): IRQ line is disabled\n", mirq); + return; + } - irq_line = pci_mirqs[mirq].irq_line; - irq_bit = (0x1E + mirq); + irq_line = pci_mirqs[mirq].irq_line; + irq_bit = (0x1E + mirq); } pci_log("pci_set_mirq(%02X): Using IRQ %i\n", mirq, irq_line); if (level && (pci_irq_hold[irq_line] & (1ULL << irq_bit))) { - /* IRQ already held, do nothing. */ - pci_log("pci_set_mirq(%02X): MIRQ is already holding the IRQ\n", mirq); - picintlevel(1 << irq_line); - return; + /* IRQ already held, do nothing. */ + pci_log("pci_set_mirq(%02X): MIRQ is already holding the IRQ\n", mirq); + picintlevel(1 << irq_line); + return; } pci_log("pci_set_mirq(%02X): MIRQ not yet holding the IRQ\n", mirq); if (!level || !pci_irq_hold[irq_line]) { - pci_log("pci_set_mirq(%02X): Issuing %s-triggered IRQ (%sheld)\n", mirq, level ? "level" : "edge", pci_irq_hold[irq_line] ? "" : "not "); + pci_log("pci_set_mirq(%02X): Issuing %s-triggered IRQ (%sheld)\n", mirq, level ? "level" : "edge", pci_irq_hold[irq_line] ? "" : "not "); - /* Only raise the interrupt if it's edge-triggered or level-triggered and not yet being held. */ - if (level) - picintlevel(1 << irq_line); - else - picint(1 << irq_line); + /* Only raise the interrupt if it's edge-triggered or level-triggered and not yet being held. */ + if (level) + picintlevel(1 << irq_line); + else + picint(1 << irq_line); } else if (level && pci_irq_hold[irq_line]) { - pci_log("pci_set_mirq(%02X): IRQ line already being held\n", mirq); - picintlevel(1 << irq_line); + pci_log("pci_set_mirq(%02X): IRQ line already being held\n", mirq); + picintlevel(1 << irq_line); } /* If the IRQ is level-triggered, mark that this MIRQ is holding it. */ if (level) { - pci_log("pci_set_mirq(%02X): Marking that this card is holding the IRQ\n", mirq); - pci_irq_hold[irq_line] |= (1ULL << irq_bit); + pci_log("pci_set_mirq(%02X): Marking that this card is holding the IRQ\n", mirq); + pci_irq_hold[irq_line] |= (1ULL << irq_bit); } pci_log("pci_set_mirq(%02X): Edge-triggered interrupt, not marking\n", mirq); } - void pci_set_irq(uint8_t card, uint8_t pci_int) { - uint8_t slot = 0; - uint8_t irq_routing = 0; + uint8_t slot = 0; + uint8_t irq_routing = 0; uint8_t pci_int_index = pci_int - PCI_INTA; - uint8_t irq_line = 0; - uint8_t level = 0; + uint8_t irq_line = 0; + uint8_t level = 0; - if (! last_pci_card) { - pci_log("pci_set_irq(%02X, %02X): No PCI slots (how are we even here?!)\n", card, pci_int); - return; + if (!last_pci_card) { + pci_log("pci_set_irq(%02X, %02X): No PCI slots (how are we even here?!)\n", card, pci_int); + return; } pci_log("pci_set_irq(%02X, %02X): %i PCI slots\n", card, pci_int, last_pci_card); slot = card; if (slot == 0xff) { - pci_log("pci_set_irq(%02X, %02X): Card is not on a PCI slot (how are we even here?!)\n", card, pci_int); - return; + pci_log("pci_set_irq(%02X, %02X): Card is not on a PCI slot (how are we even here?!)\n", card, pci_int); + return; } pci_log("pci_set_irq(%02X, %02X): Card is on PCI slot %02X\n", card, pci_int, slot); - if (! pci_cards[slot].irq_routing[pci_int_index]) { - pci_log("pci_set_irq(%02X, %02X): No IRQ routing for this slot and INT pin combination\n", card, pci_int); - return; + if (!pci_cards[slot].irq_routing[pci_int_index]) { + pci_log("pci_set_irq(%02X, %02X): No IRQ routing for this slot and INT pin combination\n", card, pci_int); + return; } if (pci_type & PCI_NO_IRQ_STEERING) - irq_line = pci_cards[slot].read(0, 0x3c, pci_cards[slot].priv); + irq_line = pci_cards[slot].read(0, 0x3c, pci_cards[slot].priv); else { - irq_routing = (pci_cards[slot].irq_routing[pci_int_index] - PCI_INTA) & 3; - pci_log("pci_set_irq(%02X, %02X): IRQ routing for this slot and INT pin combination: %02X\n", card, pci_int, irq_routing); + irq_routing = (pci_cards[slot].irq_routing[pci_int_index] - PCI_INTA) & 3; + pci_log("pci_set_irq(%02X, %02X): IRQ routing for this slot and INT pin combination: %02X\n", card, pci_int, irq_routing); - irq_line = pci_irqs[irq_routing]; - level = pci_irq_level[irq_routing]; + irq_line = pci_irqs[irq_routing]; + level = pci_irq_level[irq_routing]; } if (irq_line > 0x0f) { - pci_log("pci_set_irq(%02X, %02X): IRQ line is disabled\n", card, pci_int); - return; + pci_log("pci_set_irq(%02X, %02X): IRQ line is disabled\n", card, pci_int); + return; } else - pci_log("pci_set_irq(%02X, %02X): Using IRQ %i\n", card, pci_int, irq_line); + pci_log("pci_set_irq(%02X, %02X): Using IRQ %i\n", card, pci_int, irq_line); if (level && (pci_irq_hold[irq_line] & (1ULL << slot))) { - /* IRQ already held, do nothing. */ - pci_log("pci_set_irq(%02X, %02X): Card is already holding the IRQ\n", card, pci_int); - picintlevel(1 << irq_line); - return; + /* IRQ already held, do nothing. */ + pci_log("pci_set_irq(%02X, %02X): Card is already holding the IRQ\n", card, pci_int); + picintlevel(1 << irq_line); + return; } pci_log("pci_set_irq(%02X, %02X): Card not yet holding the IRQ\n", card, pci_int); if (!level || !pci_irq_hold[irq_line]) { - pci_log("pci_set_irq(%02X, %02X): Issuing %s-triggered IRQ (%sheld)\n", card, pci_int, level ? "level" : "edge", pci_irq_hold[irq_line] ? "" : "not "); + pci_log("pci_set_irq(%02X, %02X): Issuing %s-triggered IRQ (%sheld)\n", card, pci_int, level ? "level" : "edge", pci_irq_hold[irq_line] ? "" : "not "); - /* Only raise the interrupt if it's edge-triggered or level-triggered and not yet being held. */ - if (level) - picintlevel(1 << irq_line); - else - picint(1 << irq_line); + /* Only raise the interrupt if it's edge-triggered or level-triggered and not yet being held. */ + if (level) + picintlevel(1 << irq_line); + else + picint(1 << irq_line); } else if (level && pci_irq_hold[irq_line]) { - pci_log("pci_set_irq(%02X, %02X): IRQ line already being held\n", card, pci_int); - picintlevel(1 << irq_line); + pci_log("pci_set_irq(%02X, %02X): IRQ line already being held\n", card, pci_int); + picintlevel(1 << irq_line); } /* If the IRQ is level-triggered, mark that this card is holding it. */ if (level) { - pci_log("pci_set_irq(%02X, %02X): Marking that this card is holding the IRQ\n", card, pci_int); - pci_irq_hold[irq_line] |= (1ULL << slot); + pci_log("pci_set_irq(%02X, %02X): Marking that this card is holding the IRQ\n", card, pci_int); + pci_irq_hold[irq_line] |= (1ULL << slot); } else { - pci_log("pci_set_irq(%02X, %02X): Edge-triggered interrupt, not marking\n", card, pci_int); + pci_log("pci_set_irq(%02X, %02X): Edge-triggered interrupt, not marking\n", card, pci_int); } } - void pci_clear_mirq(uint8_t mirq, int level) { @@ -670,137 +660,133 @@ pci_clear_mirq(uint8_t mirq, int level) uint8_t irq_bit; if (mirq >= 0xf0) { - irq_line = mirq & 0x0f; - irq_bit = 0x1D; + irq_line = mirq & 0x0f; + irq_bit = 0x1D; } else { - if (mirq > 1) { - pci_log("pci_clear_mirq(%02X): Invalid MIRQ\n", mirq); - return; - } + if (mirq > 1) { + pci_log("pci_clear_mirq(%02X): Invalid MIRQ\n", mirq); + return; + } - if (! pci_mirqs[mirq].enabled) { - pci_log("pci_clear_mirq(%02X): MIRQ0 disabled\n", mirq); - return; - } + if (!pci_mirqs[mirq].enabled) { + pci_log("pci_clear_mirq(%02X): MIRQ0 disabled\n", mirq); + return; + } - if (pci_mirqs[mirq].irq_line > 0x0f) { - pci_log("pci_clear_mirq(%02X): IRQ line is disabled\n", mirq); - return; - } + if (pci_mirqs[mirq].irq_line > 0x0f) { + pci_log("pci_clear_mirq(%02X): IRQ line is disabled\n", mirq); + return; + } - irq_line = pci_mirqs[mirq].irq_line; - irq_bit = (0x1E + mirq); + irq_line = pci_mirqs[mirq].irq_line; + irq_bit = (0x1E + mirq); } pci_log("pci_clear_mirq(%02X): Using IRQ %i\n", mirq, irq_line); if (level && !(pci_irq_hold[irq_line] & (1ULL << irq_bit))) { - /* IRQ not held, do nothing. */ - pci_log("pci_clear_mirq(%02X): MIRQ is not holding the IRQ\n", mirq); - return; + /* IRQ not held, do nothing. */ + pci_log("pci_clear_mirq(%02X): MIRQ is not holding the IRQ\n", mirq); + return; } if (level) { - pci_log("pci_clear_mirq(%02X): Releasing this MIRQ's hold on the IRQ\n", mirq); - pci_irq_hold[irq_line] &= ~(1 << irq_bit); + pci_log("pci_clear_mirq(%02X): Releasing this MIRQ's hold on the IRQ\n", mirq); + pci_irq_hold[irq_line] &= ~(1 << irq_bit); - if (! pci_irq_hold[irq_line]) { - pci_log("pci_clear_mirq(%02X): IRQ no longer held by any card, clearing it\n", mirq); - picintc(1 << irq_line); - } else { - pci_log("pci_clear_mirq(%02X): IRQ is still being held\n", mirq); - } + if (!pci_irq_hold[irq_line]) { + pci_log("pci_clear_mirq(%02X): IRQ no longer held by any card, clearing it\n", mirq); + picintc(1 << irq_line); + } else { + pci_log("pci_clear_mirq(%02X): IRQ is still being held\n", mirq); + } } else { - pci_log("pci_clear_mirq(%02X): Clearing edge-triggered interrupt\n", mirq); - picintc(1 << irq_line); - } + pci_log("pci_clear_mirq(%02X): Clearing edge-triggered interrupt\n", mirq); + picintc(1 << irq_line); + } } - void pci_clear_irq(uint8_t card, uint8_t pci_int) { - uint8_t slot = 0; - uint8_t irq_routing = 0; + uint8_t slot = 0; + uint8_t irq_routing = 0; uint8_t pci_int_index = pci_int - PCI_INTA; - uint8_t irq_line = 0; - uint8_t level = 0; + uint8_t irq_line = 0; + uint8_t level = 0; - if (! last_pci_card) { - // pci_log("pci_clear_irq(%02X, %02X): No PCI slots (how are we even here?!)\n", card, pci_int); - return; + if (!last_pci_card) { + // pci_log("pci_clear_irq(%02X, %02X): No PCI slots (how are we even here?!)\n", card, pci_int); + return; } // pci_log("pci_clear_irq(%02X, %02X): %i PCI slots\n", card, pci_int, last_pci_card); slot = card; if (slot == 0xff) { - // pci_log("pci_clear_irq(%02X, %02X): Card is not on a PCI slot (how are we even here?!)\n", card, pci_int); - return; + // pci_log("pci_clear_irq(%02X, %02X): Card is not on a PCI slot (how are we even here?!)\n", card, pci_int); + return; } // pci_log("pci_clear_irq(%02X, %02X): Card is on PCI slot %02X\n", card, pci_int, slot); - if (! pci_cards[slot].irq_routing[pci_int_index]) { - // pci_log("pci_clear_irq(%02X, %02X): No IRQ routing for this slot and INT pin combination\n", card, pci_int); - return; + if (!pci_cards[slot].irq_routing[pci_int_index]) { + // pci_log("pci_clear_irq(%02X, %02X): No IRQ routing for this slot and INT pin combination\n", card, pci_int); + return; } if (pci_type & PCI_NO_IRQ_STEERING) - irq_line = pci_cards[slot].read(0, 0x3c, pci_cards[slot].priv); + irq_line = pci_cards[slot].read(0, 0x3c, pci_cards[slot].priv); else { - irq_routing = (pci_cards[slot].irq_routing[pci_int_index] - PCI_INTA) & 3; - // pci_log("pci_clear_irq(%02X, %02X): IRQ routing for this slot and INT pin combination: %02X\n", card, pci_int, irq_routing); + irq_routing = (pci_cards[slot].irq_routing[pci_int_index] - PCI_INTA) & 3; + // pci_log("pci_clear_irq(%02X, %02X): IRQ routing for this slot and INT pin combination: %02X\n", card, pci_int, irq_routing); - irq_line = pci_irqs[irq_routing]; - level = pci_irq_level[irq_routing]; + irq_line = pci_irqs[irq_routing]; + level = pci_irq_level[irq_routing]; } if (irq_line > 0x0f) { - // pci_log("pci_clear_irq(%02X, %02X): IRQ line is disabled\n", card, pci_int); - return; + // pci_log("pci_clear_irq(%02X, %02X): IRQ line is disabled\n", card, pci_int); + return; } // pci_log("pci_clear_irq(%02X, %02X): Using IRQ %i\n", card, pci_int, irq_line); if (level && !(pci_irq_hold[irq_line] & (1ULL << slot))) { - /* IRQ not held, do nothing. */ - // pci_log("pci_clear_irq(%02X, %02X): Card is not holding the IRQ\n", card, pci_int); - return; + /* IRQ not held, do nothing. */ + // pci_log("pci_clear_irq(%02X, %02X): Card is not holding the IRQ\n", card, pci_int); + return; } if (level) { - // pci_log("pci_clear_irq(%02X, %02X): Releasing this card's hold on the IRQ\n", card, pci_int); - pci_irq_hold[irq_line] &= ~(1 << slot); + // pci_log("pci_clear_irq(%02X, %02X): Releasing this card's hold on the IRQ\n", card, pci_int); + pci_irq_hold[irq_line] &= ~(1 << slot); - if (! pci_irq_hold[irq_line]) { - // pci_log("pci_clear_irq(%02X, %02X): IRQ no longer held by any card, clearing it\n", card, pci_int); - picintc(1 << irq_line); - } // else { - // pci_log("pci_clear_irq(%02X, %02X): IRQ is still being held\n", card, pci_int); - // } + if (!pci_irq_hold[irq_line]) { + // pci_log("pci_clear_irq(%02X, %02X): IRQ no longer held by any card, clearing it\n", card, pci_int); + picintc(1 << irq_line); + } // else { + // pci_log("pci_clear_irq(%02X, %02X): IRQ is still being held\n", card, pci_int); + // } } else { - // pci_log("pci_clear_irq(%02X, %02X): Clearing edge-triggered interrupt\n", card, pci_int); - picintc(1 << irq_line); + // pci_log("pci_clear_irq(%02X, %02X): Clearing edge-triggered interrupt\n", card, pci_int); + picintc(1 << irq_line); } } - uint8_t pci_get_int(uint8_t slot, uint8_t pci_int) { return pci_cards[slot].irq_routing[pci_int - PCI_INTA]; } - static void pci_reset_regs(void) { pci_index = pci_card = pci_func = pci_bus = pci_key = 0; io_removehandler(0xc000, 0x1000, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); + pci_type2_read, NULL, NULL, + pci_type2_write, NULL, NULL, NULL); } - void pci_pic_reset(void) { @@ -808,7 +794,6 @@ pci_pic_reset(void) pic_set_pci_flag(last_pci_card > 0); } - static void pci_reset_hard(void) { @@ -817,141 +802,130 @@ pci_reset_hard(void) pci_reset_regs(); for (i = 0; i < 16; i++) { - if (pci_irq_hold[i]) { - pci_irq_hold[i] = 0; + if (pci_irq_hold[i]) { + pci_irq_hold[i] = 0; - picintc(1 << i); - } + picintc(1 << i); + } } pci_pic_reset(); } - void pci_reset(void) { if (pci_switch) { - pci_pmc = 0x00; + pci_pmc = 0x00; - io_removehandler(0x0cf8, 1, - NULL,NULL,pci_cf8_read, NULL,NULL,pci_cf8_write, NULL); - io_removehandler(0x0cfc, 4, - pci_read,NULL,NULL, pci_write,NULL,NULL, NULL); - io_sethandler(0x0cf8, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); - io_sethandler(0x0cfa, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); + io_removehandler(0x0cf8, 1, + NULL, NULL, pci_cf8_read, NULL, NULL, pci_cf8_write, NULL); + io_removehandler(0x0cfc, 4, + pci_read, NULL, NULL, pci_write, NULL, NULL, NULL); + io_sethandler(0x0cf8, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); + io_sethandler(0x0cfa, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); } pci_reset_hard(); } - static void pci_slots_clear(void) { uint8_t i, j; last_pci_card = last_normal_pci_card = 0; - last_pci_bus = 1; + last_pci_bus = 1; for (i = 0; i < 32; i++) - pci_clear_slot(i); + pci_clear_slot(i); i = 0; do { - for (j = 0; j < 32; j++) - pci_card_to_slot_mapping[i][j] = 0xff; - pci_bus_number_to_index_mapping[i] = 0xff; + for (j = 0; j < 32; j++) + pci_card_to_slot_mapping[i][j] = 0xff; + pci_bus_number_to_index_mapping[i] = 0xff; } while (i++ < 0xff); pci_bus_number_to_index_mapping[0] = 0; /* always map bus 0 to index 0 */ } - uint32_t trc_readl(uint16_t port, void *priv) { return 0xffffffff; } - uint16_t trc_readw(uint16_t port, void *priv) { return 0xffff; } - uint8_t trc_read(uint16_t port, void *priv) { return trc_reg & 0xfb; } - static void trc_reset(uint8_t val) { if (val & 2) { - dma_reset(); - dma_set_at(1); + dma_reset(); + dma_set_at(1); - device_reset_all(); + device_reset_all(); - cpu_alt_reset = 0; + cpu_alt_reset = 0; - pci_reset(); - keyboard_at_reset(); + pci_reset(); + keyboard_at_reset(); - mem_a20_alt = 0; - mem_a20_recalc(); + mem_a20_alt = 0; + mem_a20_recalc(); - flushmmucache(); + flushmmucache(); } resetx86(); } - void trc_writel(uint16_t port, uint32_t val, void *priv) { } - void trc_writew(uint16_t port, uint16_t val, void *priv) { } - void trc_write(uint16_t port, uint8_t val, void *priv) { pci_log("TRC Write: %02X\n", val); if (!(trc_reg & 4) && (val & 4)) - trc_reset(val); + trc_reset(val); trc_reg = val & 0xfd; if (val & 2) - trc_reg &= 0xfb; + trc_reg &= 0xfb; } - void trc_init(void) { trc_reg = 0; io_sethandler(0x0cf9, 0x0001, - trc_read, trc_readw, trc_readl, trc_write, trc_writew, trc_writel, NULL); + trc_read, trc_readw, trc_readl, trc_write, trc_writew, trc_writel, NULL); } - void pci_init(int type) { @@ -963,167 +937,160 @@ pci_init(int type) trc_init(); - pci_type = type; + pci_type = type; pci_switch = !!(type & PCI_CAN_SWITCH_TYPE); if (pci_switch) { - pci_pmc = 0x00; + pci_pmc = 0x00; - io_sethandler(0x0cfb, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,pci_type2_writel, NULL); + io_sethandler(0x0cfb, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, pci_type2_writel, NULL); } if (type & PCI_NO_IRQ_STEERING) { - pic_elcr_io_handler(0); - pic_elcr_set_enabled(0); + pic_elcr_io_handler(0); + pic_elcr_set_enabled(0); } else { - pic_elcr_io_handler(1); - pic_elcr_set_enabled(1); + pic_elcr_io_handler(1); + pic_elcr_set_enabled(1); } if ((type & PCI_CONFIG_TYPE_MASK) == PCI_CONFIG_TYPE_1) { - io_sethandler(0x0cf8, 1, - NULL,NULL,pci_cf8_read, NULL,NULL,pci_cf8_write, NULL); - io_sethandler(0x0cfc, 4, - pci_read,pci_readw,pci_readl, pci_write,pci_writew,pci_writel, NULL); - pci_pmc = 1; + io_sethandler(0x0cf8, 1, + NULL, NULL, pci_cf8_read, NULL, NULL, pci_cf8_write, NULL); + io_sethandler(0x0cfc, 4, + pci_read, pci_readw, pci_readl, pci_write, pci_writew, pci_writel, NULL); + pci_pmc = 1; } else { - io_sethandler(0x0cf8, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); - io_sethandler(0x0cfa, 1, - pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL); - pci_pmc = 0; + io_sethandler(0x0cf8, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); + io_sethandler(0x0cfa, 1, + pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); + pci_pmc = 0; } for (c = 0; c < 4; c++) { - pci_irqs[c] = PCI_IRQ_DISABLED; - pci_irq_level[c] = (type & PCI_NO_IRQ_STEERING) ? 0 : 1; + pci_irqs[c] = PCI_IRQ_DISABLED; + pci_irq_level[c] = (type & PCI_NO_IRQ_STEERING) ? 0 : 1; } for (c = 0; c < 3; c++) { - pci_mirqs[c].enabled = 0; - pci_mirqs[c].irq_line = PCI_IRQ_DISABLED; + pci_mirqs[c].enabled = 0; + pci_mirqs[c].irq_line = PCI_IRQ_DISABLED; } pic_set_pci_flag(1); } - uint8_t pci_register_bus() { return last_pci_bus++; } - void pci_remap_bus(uint8_t bus_index, uint8_t bus_number) { uint8_t i = 1; do { - if (pci_bus_number_to_index_mapping[i] == bus_index) - pci_bus_number_to_index_mapping[i] = 0xff; + if (pci_bus_number_to_index_mapping[i] == bus_index) + pci_bus_number_to_index_mapping[i] = 0xff; } while (i++ < 0xff); if ((bus_number > 0) && (bus_number < 0xff)) - pci_bus_number_to_index_mapping[bus_number] = bus_index; + pci_bus_number_to_index_mapping[bus_number] = bus_index; } - void pci_register_slot(int card, int type, int inta, int intb, int intc, int intd) { pci_register_bus_slot(0, card, type, inta, intb, intc, intd); } - void pci_register_bus_slot(int bus, int card, int type, int inta, int intb, int intc, int intd) { pci_card_t *dev = &pci_cards[last_pci_card]; - dev->bus = bus; - dev->id = card; - dev->type = type; - dev->irq_routing[0] = inta; - dev->irq_routing[1] = intb; - dev->irq_routing[2] = intc; - dev->irq_routing[3] = intd; - dev->read = NULL; - dev->write = NULL; - dev->priv = NULL; + dev->bus = bus; + dev->id = card; + dev->type = type; + dev->irq_routing[0] = inta; + dev->irq_routing[1] = intb; + dev->irq_routing[2] = intc; + dev->irq_routing[3] = intd; + dev->read = NULL; + dev->write = NULL; + dev->priv = NULL; pci_card_to_slot_mapping[bus][card] = last_pci_card; pci_log("pci_register_slot(): pci_cards[%i].bus = %02X; .id = %02X\n", last_pci_card, bus, card); if (type == PCI_CARD_NORMAL) - last_normal_pci_card = last_pci_card; + last_normal_pci_card = last_pci_card; last_pci_card++; } - uint8_t pci_find_slot(uint8_t add_type, uint8_t ignore_slot) { pci_card_t *dev; - uint8_t i, ret = 0xff; + uint8_t i, ret = 0xff; for (i = 0; i < last_pci_card; i++) { - dev = &pci_cards[i]; + dev = &pci_cards[i]; - if (!dev->read && !dev->write && ((ignore_slot == 0xff) || (i != ignore_slot))) { - if (add_type & PCI_ADD_STRICT) { - if (dev->type == (add_type & 0x7f)) { - ret = i; - break; - } - } else { - if (((dev->type == PCI_CARD_NORMAL) && ((add_type & 0x7f) >= PCI_ADD_NORMAL)) || - (dev->type == (add_type & 0x7f))) { - ret = i; - break; - } - } - } + if (!dev->read && !dev->write && ((ignore_slot == 0xff) || (i != ignore_slot))) { + if (add_type & PCI_ADD_STRICT) { + if (dev->type == (add_type & 0x7f)) { + ret = i; + break; + } + } else { + if (((dev->type == PCI_CARD_NORMAL) && ((add_type & 0x7f) >= PCI_ADD_NORMAL)) || (dev->type == (add_type & 0x7f))) { + ret = i; + break; + } + } + } } return ret; } - uint8_t pci_add_card(uint8_t add_type, uint8_t (*read)(int func, int addr, void *priv), void (*write)(int func, int addr, uint8_t val, void *priv), void *priv) { pci_card_t *dev; - uint8_t i, j; + uint8_t i, j; if (add_type < PCI_ADD_AGP) - pci_log("pci_add_card(): Adding PCI CARD at specific slot %02X [SPECIFIC]\n", add_type); + pci_log("pci_add_card(): Adding PCI CARD at specific slot %02X [SPECIFIC]\n", add_type); - if (! last_pci_card) { - pci_log("pci_add_card(): Adding PCI CARD failed (no PCI slots) [%s]\n", (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_AGP) ? "AGP" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : ((add_type == PCI_ADD_SCSI) ? "SCSI" : ((add_type == PCI_ADD_SOUND) ? "SOUND" : "SPECIFIC"))))); - return 0xff; + if (!last_pci_card) { + pci_log("pci_add_card(): Adding PCI CARD failed (no PCI slots) [%s]\n", (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_AGP) ? "AGP" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : ((add_type == PCI_ADD_SCSI) ? "SCSI" : ((add_type == PCI_ADD_SOUND) ? "SOUND" : "SPECIFIC"))))); + return 0xff; } /* First, find the next available slot. */ i = pci_find_slot(add_type, 0xff); if (i != 0xff) { - dev = &pci_cards[i]; - j = pci_find_slot(add_type, i); + dev = &pci_cards[i]; + j = pci_find_slot(add_type, i); - if (!(pci_type & PCI_NO_BRIDGES) && (dev->type == PCI_CARD_NORMAL) && (add_type != PCI_ADD_BRIDGE) && (j == 0xff)) { - pci_log("pci_add_card(): Reached last NORMAL slot, adding bridge to pci_cards[%i]\n", i); - device_add_inst(&dec21150_device, last_pci_bus); - i = pci_find_slot(add_type, 0xff); - dev = &pci_cards[i]; - } + if (!(pci_type & PCI_NO_BRIDGES) && (dev->type == PCI_CARD_NORMAL) && (add_type != PCI_ADD_BRIDGE) && (j == 0xff)) { + pci_log("pci_add_card(): Reached last NORMAL slot, adding bridge to pci_cards[%i]\n", i); + device_add_inst(&dec21150_device, last_pci_bus); + i = pci_find_slot(add_type, 0xff); + dev = &pci_cards[i]; + } - dev->read = read; - dev->write = write; - dev->priv = priv; - pci_log("pci_add_card(): Adding PCI CARD to pci_cards[%i] (bus %02X slot %02X) [%s]\n", i, dev->bus, dev->id, (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_AGP) ? "AGP" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : ((add_type == PCI_ADD_SCSI) ? "SCSI" : ((add_type == PCI_ADD_SOUND) ? "SOUND" : "SPECIFIC"))))); - return i; + dev->read = read; + dev->write = write; + dev->priv = priv; + pci_log("pci_add_card(): Adding PCI CARD to pci_cards[%i] (bus %02X slot %02X) [%s]\n", i, dev->bus, dev->id, (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_AGP) ? "AGP" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : ((add_type == PCI_ADD_SCSI) ? "SCSI" : ((add_type == PCI_ADD_SOUND) ? "SOUND" : "SPECIFIC"))))); + return i; } return 0xff; diff --git a/src/pci_dummy.c b/src/pci_dummy.c index d843b9ee9..22ed1522d 100644 --- a/src/pci_dummy.c +++ b/src/pci_dummy.c @@ -13,230 +13,225 @@ static uint8_t pci_regs[256]; static bar_t pci_bar[2]; static uint8_t interrupt_on = 0x00; -static uint8_t card = 0; +static uint8_t card = 0; -static void pci_dummy_interrupt(int set) +static void +pci_dummy_interrupt(int set) { - if (set) - { - pci_set_irq(card, pci_regs[0x3D]); - } - else - { - pci_clear_irq(card, pci_regs[0x3D]); - } -} - - -static uint8_t pci_dummy_read(uint16_t Port, void *p) -{ - uint8_t ret = 0; - - switch(Port & 0x20) - { - case 0x00: - return 0x1A; - case 0x01: - return 0x07; - case 0x02: - return 0x0B; - case 0x03: - return 0xAB; - case 0x04: - return pci_regs[0x3C]; - case 0x05: - return pci_regs[0x3D]; - case 0x06: - ret = interrupt_on; - if (interrupt_on) - { - pci_dummy_interrupt(0); - interrupt_on = 0; - } - return ret; - default: - return 0x00; - } -} - -static uint16_t pci_dummy_readw(uint16_t Port, void *p) -{ - return pci_dummy_read(Port, p); -} - - -static uint32_t pci_dummy_readl(uint16_t Port, void *p) -{ - return pci_dummy_read(Port, p); -} - - -static void pci_dummy_write(uint16_t Port, uint8_t Val, void *p) -{ - switch(Port & 0x20) - { - case 0x06: - if (!interrupt_on) - { - interrupt_on = 1; - pci_dummy_interrupt(1); - } - return; - default: - return; - } -} - -static void pci_dummy_writew(uint16_t Port, uint16_t Val, void *p) -{ - pci_dummy_write(Port, Val & 0xFF, p); -} - -static void pci_dummy_writel(uint16_t Port, uint32_t Val, void *p) -{ - pci_dummy_write(Port, Val & 0xFF, p); -} - - -static void pci_dummy_io_remove(void) -{ - io_removehandler(pci_bar[0].addr, 0x0020, pci_dummy_read, pci_dummy_readw, pci_dummy_readl, pci_dummy_write, pci_dummy_writew, pci_dummy_writel, NULL); -} - -static void pci_dummy_io_set(void) -{ - io_sethandler(pci_bar[0].addr, 0x0020, pci_dummy_read, pci_dummy_readw, pci_dummy_readl, pci_dummy_write, pci_dummy_writew, pci_dummy_writel, NULL); -} - - -static uint8_t pci_dummy_pci_read(int func, int addr, void *priv) -{ - pclog("AB0B:071A: PCI_Read(%d, %04x)\n", func, addr); - - switch(addr) { - case 0x00: - return 0x1A; - case 0x01: - return 0x07; - break; - - case 0x02: - return 0x0B; - case 0x03: - return 0xAB; - - case 0x04: /* PCI_COMMAND_LO */ - case 0x05: /* PCI_COMMAND_HI */ - return pci_regs[addr]; - - case 0x06: /* PCI_STATUS_LO */ - case 0x07: /* PCI_STATUS_HI */ - return pci_regs[addr]; - - case 0x08: - case 0x09: - return 0x00; - - case 0x0A: - return pci_regs[addr]; - - case 0x0B: - return pci_regs[addr]; - - case 0x10: /* PCI_BAR 7:5 */ - return (pci_bar[0].addr_regs[0] & 0xe0) | 0x01; - case 0x11: /* PCI_BAR 15:8 */ - return pci_bar[0].addr_regs[1]; - case 0x12: /* PCI_BAR 23:16 */ - return pci_bar[0].addr_regs[2]; - case 0x13: /* PCI_BAR 31:24 */ - return pci_bar[0].addr_regs[3]; - - case 0x2C: - return 0x1A; - case 0x2D: - return 0x07; - - case 0x2E: - return 0x0B; - case 0x2F: - return 0xAB; - - case 0x3C: /* PCI_ILR */ - return pci_regs[addr]; - - case 0x3D: /* PCI_IPR */ - return pci_regs[addr]; - - default: - return 0x00; + if (set) { + pci_set_irq(card, pci_regs[0x3D]); + } else { + pci_clear_irq(card, pci_regs[0x3D]); } } -static void pci_dummy_pci_write(int func, int addr, uint8_t val, void *priv) +static uint8_t +pci_dummy_read(uint16_t Port, void *p) +{ + uint8_t ret = 0; + + switch (Port & 0x20) { + case 0x00: + return 0x1A; + case 0x01: + return 0x07; + case 0x02: + return 0x0B; + case 0x03: + return 0xAB; + case 0x04: + return pci_regs[0x3C]; + case 0x05: + return pci_regs[0x3D]; + case 0x06: + ret = interrupt_on; + if (interrupt_on) { + pci_dummy_interrupt(0); + interrupt_on = 0; + } + return ret; + default: + return 0x00; + } +} + +static uint16_t +pci_dummy_readw(uint16_t Port, void *p) +{ + return pci_dummy_read(Port, p); +} + +static uint32_t +pci_dummy_readl(uint16_t Port, void *p) +{ + return pci_dummy_read(Port, p); +} + +static void +pci_dummy_write(uint16_t Port, uint8_t Val, void *p) +{ + switch (Port & 0x20) { + case 0x06: + if (!interrupt_on) { + interrupt_on = 1; + pci_dummy_interrupt(1); + } + return; + default: + return; + } +} + +static void +pci_dummy_writew(uint16_t Port, uint16_t Val, void *p) +{ + pci_dummy_write(Port, Val & 0xFF, p); +} + +static void +pci_dummy_writel(uint16_t Port, uint32_t Val, void *p) +{ + pci_dummy_write(Port, Val & 0xFF, p); +} + +static void +pci_dummy_io_remove(void) +{ + io_removehandler(pci_bar[0].addr, 0x0020, pci_dummy_read, pci_dummy_readw, pci_dummy_readl, pci_dummy_write, pci_dummy_writew, pci_dummy_writel, NULL); +} + +static void +pci_dummy_io_set(void) +{ + io_sethandler(pci_bar[0].addr, 0x0020, pci_dummy_read, pci_dummy_readw, pci_dummy_readl, pci_dummy_write, pci_dummy_writew, pci_dummy_writel, NULL); +} + +static uint8_t +pci_dummy_pci_read(int func, int addr, void *priv) +{ + pclog("AB0B:071A: PCI_Read(%d, %04x)\n", func, addr); + + switch (addr) { + case 0x00: + return 0x1A; + case 0x01: + return 0x07; + break; + + case 0x02: + return 0x0B; + case 0x03: + return 0xAB; + + case 0x04: /* PCI_COMMAND_LO */ + case 0x05: /* PCI_COMMAND_HI */ + return pci_regs[addr]; + + case 0x06: /* PCI_STATUS_LO */ + case 0x07: /* PCI_STATUS_HI */ + return pci_regs[addr]; + + case 0x08: + case 0x09: + return 0x00; + + case 0x0A: + return pci_regs[addr]; + + case 0x0B: + return pci_regs[addr]; + + case 0x10: /* PCI_BAR 7:5 */ + return (pci_bar[0].addr_regs[0] & 0xe0) | 0x01; + case 0x11: /* PCI_BAR 15:8 */ + return pci_bar[0].addr_regs[1]; + case 0x12: /* PCI_BAR 23:16 */ + return pci_bar[0].addr_regs[2]; + case 0x13: /* PCI_BAR 31:24 */ + return pci_bar[0].addr_regs[3]; + + case 0x2C: + return 0x1A; + case 0x2D: + return 0x07; + + case 0x2E: + return 0x0B; + case 0x2F: + return 0xAB; + + case 0x3C: /* PCI_ILR */ + return pci_regs[addr]; + + case 0x3D: /* PCI_IPR */ + return pci_regs[addr]; + + default: + return 0x00; + } +} + +static void +pci_dummy_pci_write(int func, int addr, uint8_t val, void *priv) { uint8_t valxor; pclog("AB0B:071A: PCI_Write(%d, %04x, %02x)\n", func, addr, val); - switch(addr) { - case 0x04: /* PCI_COMMAND_LO */ - valxor = (val & 0x03) ^ pci_regs[addr]; - if (valxor & PCI_COMMAND_IO) - { - pci_dummy_io_remove(); - if (((pci_bar[0].addr & 0xffe0) != 0) && (val & PCI_COMMAND_IO)) - { - pci_dummy_io_set(); - } - } - pci_regs[addr] = val & 0x03; - break; + switch (addr) { + case 0x04: /* PCI_COMMAND_LO */ + valxor = (val & 0x03) ^ pci_regs[addr]; + if (valxor & PCI_COMMAND_IO) { + pci_dummy_io_remove(); + if (((pci_bar[0].addr & 0xffe0) != 0) && (val & PCI_COMMAND_IO)) { + pci_dummy_io_set(); + } + } + pci_regs[addr] = val & 0x03; + break; - case 0x10: /* PCI_BAR */ - val &= 0xe0; /* 0xe0 acc to RTL DS */ - val |= 0x01; /* re-enable IOIN bit */ - /*FALLTHROUGH*/ + case 0x10: /* PCI_BAR */ + val &= 0xe0; /* 0xe0 acc to RTL DS */ + val |= 0x01; /* re-enable IOIN bit */ + /*FALLTHROUGH*/ - case 0x11: /* PCI_BAR */ - case 0x12: /* PCI_BAR */ - case 0x13: /* PCI_BAR */ - /* Remove old I/O. */ - pci_dummy_io_remove(); + case 0x11: /* PCI_BAR */ + case 0x12: /* PCI_BAR */ + case 0x13: /* PCI_BAR */ + /* Remove old I/O. */ + pci_dummy_io_remove(); - /* Set new I/O as per PCI request. */ - pci_bar[0].addr_regs[addr & 3] = val; + /* Set new I/O as per PCI request. */ + pci_bar[0].addr_regs[addr & 3] = val; - /* Then let's calculate the new I/O base. */ - pci_bar[0].addr &= 0xffe0; + /* Then let's calculate the new I/O base. */ + pci_bar[0].addr &= 0xffe0; - /* Log the new base. */ - pclog("AB0B:071A: PCI: new I/O base is %04X\n", pci_bar[0].addr); + /* Log the new base. */ + pclog("AB0B:071A: PCI: new I/O base is %04X\n", pci_bar[0].addr); - /* We're done, so get out of the here. */ - if (pci_regs[4] & PCI_COMMAND_IO) - { - if ((pci_bar[0].addr) != 0) - { - pci_dummy_io_set(); - } - } - break; + /* We're done, so get out of the here. */ + if (pci_regs[4] & PCI_COMMAND_IO) { + if ((pci_bar[0].addr) != 0) { + pci_dummy_io_set(); + } + } + break; - case 0x3C: /* PCI_ILR */ - pclog("AB0B:071A: IRQ now: %i\n", val); - pci_regs[addr] = val; - return; + case 0x3C: /* PCI_ILR */ + pclog("AB0B:071A: IRQ now: %i\n", val); + pci_regs[addr] = val; + return; } } - -void pci_dummy_init(void) +void +pci_dummy_init(void) { - card = pci_add_card(PCI_ADD_NORMAL, pci_dummy_pci_read, pci_dummy_pci_write, NULL); + card = pci_add_card(PCI_ADD_NORMAL, pci_dummy_pci_read, pci_dummy_pci_write, NULL); - pci_bar[0].addr_regs[0] = 0x01; - pci_regs[0x04] = 0x03; + pci_bar[0].addr_regs[0] = 0x01; + pci_regs[0x04] = 0x03; - pci_regs[0x3D] = PCI_INTD; + pci_regs[0x3D] = PCI_INTD; } diff --git a/src/pic.c b/src/pic.c index 12fd80264..b39e75e33 100644 --- a/src/pic.c +++ b/src/pic.c @@ -36,66 +36,58 @@ #include <86box/nvr.h> #include <86box/acpi.h> - -enum -{ +enum { STATE_NONE = 0, STATE_ICW2, STATE_ICW3, STATE_ICW4 }; +pic_t pic, pic2; -pic_t pic, pic2; +static pc_timer_t pic_timer; +static int shadow = 0, elcr_enabled = 0, + tmr_inited = 0, latched = 0, + pic_pci = 0; -static pc_timer_t pic_timer; - -static int shadow = 0, elcr_enabled = 0, - tmr_inited = 0, latched = 0, - pic_pci = 0; - -static uint16_t smi_irq_mask = 0x0000, - smi_irq_status = 0x0000; - -static void (*update_pending)(void); +static uint16_t smi_irq_mask = 0x0000, + smi_irq_status = 0x0000; +static void (*update_pending)(void); #ifdef ENABLE_PIC_LOG int pic_do_log = ENABLE_PIC_LOG; - static void pic_log(const char *fmt, ...) { va_list ap; if (pic_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define pic_log(fmt, ...) +# define pic_log(fmt, ...) #endif - void pic_reset_smi_irq_mask(void) { smi_irq_mask = 0x0000; } - void pic_set_smi_irq_mask(int irq, int set) { if ((irq >= 0) && (irq <= 15)) { - if (set) - smi_irq_mask |= (1 << irq); - else - smi_irq_mask &= ~(1 << irq); + if (set) + smi_irq_mask |= (1 << irq); + else + smi_irq_mask &= ~(1 << irq); } } @@ -105,15 +97,13 @@ pic_get_smi_irq_status(void) return smi_irq_status; } - void pic_clear_smi_irq_status(int irq) { if ((irq >= 0) && (irq <= 15)) - smi_irq_status &= ~(1 << irq); + smi_irq_status &= ~(1 << irq); } - void pic_elcr_write(uint16_t port, uint8_t val, void *priv) { @@ -122,25 +112,24 @@ pic_elcr_write(uint16_t port, uint8_t val, void *priv) pic_log("ELCR%i: WRITE %02X\n", port & 1, val); if (port & 1) - val &= 0xde; + val &= 0xde; else - val &= 0xf8; + val &= 0xf8; dev->elcr = val; pic_log("ELCR %i: %c %c %c %c %c %c %c %c\n", - port & 1, - (val & 1) ? 'L' : 'E', - (val & 2) ? 'L' : 'E', - (val & 4) ? 'L' : 'E', - (val & 8) ? 'L' : 'E', - (val & 0x10) ? 'L' : 'E', - (val & 0x20) ? 'L' : 'E', - (val & 0x40) ? 'L' : 'E', - (val & 0x80) ? 'L' : 'E'); + port & 1, + (val & 1) ? 'L' : 'E', + (val & 2) ? 'L' : 'E', + (val & 4) ? 'L' : 'E', + (val & 8) ? 'L' : 'E', + (val & 0x10) ? 'L' : 'E', + (val & 0x20) ? 'L' : 'E', + (val & 0x40) ? 'L' : 'E', + (val & 0x80) ? 'L' : 'E'); } - uint8_t pic_elcr_read(uint16_t port, void *priv) { @@ -151,110 +140,100 @@ pic_elcr_read(uint16_t port, void *priv) return dev->elcr; } - int pic_elcr_get_enabled(void) { return elcr_enabled; } - void pic_elcr_set_enabled(int enabled) { elcr_enabled = enabled; } - void pic_elcr_io_handler(int set) { io_handler(set, 0x04d0, 0x0001, - pic_elcr_read, NULL, NULL, - pic_elcr_write, NULL, NULL, &pic); + pic_elcr_read, NULL, NULL, + pic_elcr_write, NULL, NULL, &pic); io_handler(set, 0x04d1, 0x0001, - pic_elcr_read, NULL, NULL, - pic_elcr_write, NULL, NULL, &pic2); + pic_elcr_read, NULL, NULL, + pic_elcr_write, NULL, NULL, &pic2); } - static uint8_t pic_cascade_mode(pic_t *dev) { return !(dev->icw1 & 2); } - static __inline uint8_t pic_slave_on(pic_t *dev, int channel) { pic_log("pic_slave_on(%i): %i, %02X, %02X\n", channel, pic_cascade_mode(dev), dev->icw4 & 0x0c, dev->icw3 & (1 << channel)); - return pic_cascade_mode(dev) && (dev->is_master || ((dev->icw4 & 0x0c) == 0x0c)) && - (dev->icw3 & (1 << channel)); + return pic_cascade_mode(dev) && (dev->is_master || ((dev->icw4 & 0x0c) == 0x0c)) && (dev->icw3 & (1 << channel)); } - static __inline int find_best_interrupt(pic_t *dev) { uint8_t b; uint8_t intr; - int i, j; - int ret = -1; + int i, j; + int ret = -1; for (i = 0; i < 8; i++) { - j = (i + dev->priority) & 7; - b = 1 << j; + j = (i + dev->priority) & 7; + b = 1 << j; - if (dev->isr & b) - break; - else if ((dev->state == 0) && ((dev->irr & ~dev->imr) & b)) { - ret = j; - break; - } + if (dev->isr & b) + break; + else if ((dev->state == 0) && ((dev->irr & ~dev->imr) & b)) { + ret = j; + break; + } } intr = dev->interrupt = (ret == -1) ? 0x17 : ret; if (dev->at && (ret != 1)) { - if (dev == &pic2) - intr += 8; + if (dev == &pic2) + intr += 8; - if (cpu_fast_off_flags & (1u << intr)) - cpu_fast_off_advance(); + if (cpu_fast_off_flags & (1u << intr)) + cpu_fast_off_advance(); } return ret; } - static __inline void pic_update_pending_xt(void) { if (find_best_interrupt(&pic) != -1) { - latched++; - if (latched == 1) - timer_on_auto(&pic_timer, 0.35); + latched++; + if (latched == 1) + timer_on_auto(&pic_timer, 0.35); } else if (latched == 0) - pic.int_pending = 0; + pic.int_pending = 0; } - static __inline void pic_update_pending_at(void) { pic2.int_pending = (find_best_interrupt(&pic2) != -1); if (pic2.int_pending) - pic.irr |= (1 << pic2.icw3); + pic.irr |= (1 << pic2.icw3); else - pic.irr &= ~(1 << pic2.icw3); + pic.irr &= ~(1 << pic2.icw3); pic.int_pending = (find_best_interrupt(&pic) != -1); } - static void pic_callback(void *priv) { @@ -264,15 +243,14 @@ pic_callback(void *priv) latched--; if (latched > 0) - timer_on_auto(&pic_timer, 0.35); + timer_on_auto(&pic_timer, 0.35); } - void pic_reset() { int is_at = IS_AT(machine); - is_at = is_at || !strcmp(machine_get_internal_name(), "xi8088"); + is_at = is_at || !strcmp(machine_get_internal_name(), "xi8088"); memset(&pic, 0, sizeof(pic_t)); memset(&pic2, 0, sizeof(pic_t)); @@ -281,10 +259,10 @@ pic_reset() pic.interrupt = pic2.interrupt = 0x17; if (is_at) - pic.slaves[2] = &pic2; + pic.slaves[2] = &pic2; if (tmr_inited) - timer_on_auto(&pic_timer, 0.0); + timer_on_auto(&pic_timer, 0.0); memset(&pic_timer, 0x00, sizeof(pc_timer_t)); timer_add(&pic_timer, pic_callback, &pic, 0); tmr_inited = 1; @@ -294,76 +272,69 @@ pic_reset() smi_irq_mask = smi_irq_status = 0x0000; - shadow = 0; + shadow = 0; pic_pci = 0; } - void pic_set_shadow(int sh) { shadow = sh; } - void pic_set_pci_flag(int pci) { pic_pci = pci; } - static uint8_t pic_level_triggered(pic_t *dev, int irq) { if (elcr_enabled) - return !!(dev->elcr & (1 << irq)); + return !!(dev->elcr & (1 << irq)); else - return !!(dev->icw1 & 8); + return !!(dev->icw1 & 8); } - int picint_is_level(int irq) { return pic_level_triggered(((irq > 7) ? &pic2 : &pic), irq & 7); } - static void pic_acknowledge(pic_t *dev) { - int pic_int = dev->interrupt & 7; + int pic_int = dev->interrupt & 7; int pic_int_num = 1 << pic_int; dev->isr |= pic_int_num; if (!pic_level_triggered(dev, pic_int) || !(dev->lines & pic_int_num)) - dev->irr &= ~pic_int_num; + dev->irr &= ~pic_int_num; } - /* Find IRQ for non-specific EOI (either by command or automatic) by finding the highest IRQ priority with ISR bit set, that is also not masked if the PIC is in special mask mode. */ static uint8_t pic_non_specific_find(pic_t *dev) { - int i, j; + int i, j; uint8_t b, irq = 0xff; for (i = 0; i < 8; i++) { - j = (i + dev->priority) & 7; - b = (1 << j); + j = (i + dev->priority) & 7; + b = (1 << j); - if ((dev->isr & b) && (!dev->special_mask_mode || !(dev->imr & b))) { - irq = j; - break; - } + if ((dev->isr & b) && (!dev->special_mask_mode || !(dev->imr & b))) { + irq = j; + break; + } } return irq; } - /* Do the EOI and rotation, if either is requested, on the given IRQ. */ static void pic_action(pic_t *dev, uint8_t irq, uint8_t eoi, uint8_t rotate) @@ -371,16 +342,15 @@ pic_action(pic_t *dev, uint8_t irq, uint8_t eoi, uint8_t rotate) uint8_t b = (1 << irq); if (irq != 0xff) { - if (eoi) - dev->isr &= ~b; - if (rotate) - dev->priority = (irq + 1) & 7; + if (eoi) + dev->isr &= ~b; + if (rotate) + dev->priority = (irq + 1) & 7; - update_pending(); + update_pending(); } } - /* Automatic non-specific EOI. */ static __inline void pic_auto_non_specific_eoi(pic_t *dev) @@ -388,75 +358,73 @@ pic_auto_non_specific_eoi(pic_t *dev) uint8_t irq; if (dev->icw4 & 2) { - irq = pic_non_specific_find(dev); + irq = pic_non_specific_find(dev); - pic_action(dev, irq, 1, dev->auto_eoi_rotate); + pic_action(dev, irq, 1, dev->auto_eoi_rotate); } } - /* Do the PIC command specified by bits 7-5 of the value written to the OCW2 register. */ static void pic_command(pic_t *dev) { uint8_t irq = 0xff; - if (dev->ocw2 & 0x60) { /* SL and/or EOI set */ - if (dev->ocw2 & 0x40) /* SL set, specific priority level */ - irq = (dev->ocw2 & 0x07); - else /* SL clear, non-specific priority level (find highest with ISR set) */ - irq = pic_non_specific_find(dev); + if (dev->ocw2 & 0x60) { /* SL and/or EOI set */ + if (dev->ocw2 & 0x40) /* SL set, specific priority level */ + irq = (dev->ocw2 & 0x07); + else /* SL clear, non-specific priority level (find highest with ISR set) */ + irq = pic_non_specific_find(dev); pic_action(dev, irq, dev->ocw2 & 0x20, dev->ocw2 & 0x80); - } else /* SL and EOI clear */ - dev->auto_eoi_rotate = !!(dev->ocw2 & 0x80); + } else /* SL and EOI clear */ + dev->auto_eoi_rotate = !!(dev->ocw2 & 0x80); } - uint8_t pic_read(uint16_t addr, void *priv) { pic_t *dev = (pic_t *) priv; if (shadow) { - /* VIA PIC shadow read */ - if (addr & 0x0001) - dev->data_bus = ((dev->icw2 & 0xf8) >> 3) << 0; - else { - dev->data_bus = ((dev->ocw3 & 0x20) >> 5) << 4; - dev->data_bus |= ((dev->ocw2 & 0x80) >> 7) << 3; - dev->data_bus |= ((dev->icw4 & 0x10) >> 4) << 2; - dev->data_bus |= ((dev->icw4 & 0x02) >> 1) << 1; - dev->data_bus |= ((dev->icw4 & 0x08) >> 3) << 0; - } + /* VIA PIC shadow read */ + if (addr & 0x0001) + dev->data_bus = ((dev->icw2 & 0xf8) >> 3) << 0; + else { + dev->data_bus = ((dev->ocw3 & 0x20) >> 5) << 4; + dev->data_bus |= ((dev->ocw2 & 0x80) >> 7) << 3; + dev->data_bus |= ((dev->icw4 & 0x10) >> 4) << 2; + dev->data_bus |= ((dev->icw4 & 0x02) >> 1) << 1; + dev->data_bus |= ((dev->icw4 & 0x08) >> 3) << 0; + } } else { - /* Standard 8259 PIC read */ + /* Standard 8259 PIC read */ #ifndef UNDEFINED_READ - /* Put the IRR on to the data bus by default until the real PIC is probed. */ - dev->data_bus = dev->irr; + /* Put the IRR on to the data bus by default until the real PIC is probed. */ + dev->data_bus = dev->irr; #endif - if (dev->ocw3 & 0x04) { - dev->interrupt &= ~0x20; /* Freeze the interrupt until the poll is over. */ - if (dev->int_pending) { - dev->data_bus = 0x80 | (dev->interrupt & 7); - pic_acknowledge(dev); - dev->int_pending = 0; - update_pending(); - } else - dev->data_bus = 0x00; - dev->ocw3 &= ~0x04; - } else if (addr & 0x0001) - dev->data_bus = dev->imr; - else if (dev->ocw3 & 0x02) { - if (dev->ocw3 & 0x01) - dev->data_bus = dev->isr; + if (dev->ocw3 & 0x04) { + dev->interrupt &= ~0x20; /* Freeze the interrupt until the poll is over. */ + if (dev->int_pending) { + dev->data_bus = 0x80 | (dev->interrupt & 7); + pic_acknowledge(dev); + dev->int_pending = 0; + update_pending(); + } else + dev->data_bus = 0x00; + dev->ocw3 &= ~0x04; + } else if (addr & 0x0001) + dev->data_bus = dev->imr; + else if (dev->ocw3 & 0x02) { + if (dev->ocw3 & 0x01) + dev->data_bus = dev->isr; #ifdef UNDEFINED_READ - else - dev->data_bus = 0x00; + else + dev->data_bus = 0x00; #endif - } - /* If A0 = 0, VIA shadow is disabled, and poll mode is disabled, - simply read whatever is currently on the data bus. */ + } + /* If A0 = 0, VIA shadow is disabled, and poll mode is disabled, + simply read whatever is currently on the data bus. */ } pic_log("pic_read(%04X, %08X) = %02X\n", addr, priv, dev->data_bus); @@ -464,7 +432,6 @@ pic_read(uint16_t addr, void *priv) return dev->data_bus; } - static void pic_write(uint16_t addr, uint8_t val, void *priv) { @@ -475,77 +442,75 @@ pic_write(uint16_t addr, uint8_t val, void *priv) dev->data_bus = val; if (addr & 0x0001) { - switch (dev->state) { - case STATE_ICW2: - dev->icw2 = val; - if (pic_cascade_mode(dev)) - dev->state = STATE_ICW3; - else - dev->state = (dev->icw1 & 1) ? STATE_ICW4 : STATE_NONE; - break; - case STATE_ICW3: - dev->icw3 = val; - dev->state = (dev->icw1 & 1) ? STATE_ICW4 : STATE_NONE; - break; - case STATE_ICW4: - dev->icw4 = val; - dev->state = STATE_NONE; - break; - case STATE_NONE: - dev->imr = val; - update_pending(); - break; - } + switch (dev->state) { + case STATE_ICW2: + dev->icw2 = val; + if (pic_cascade_mode(dev)) + dev->state = STATE_ICW3; + else + dev->state = (dev->icw1 & 1) ? STATE_ICW4 : STATE_NONE; + break; + case STATE_ICW3: + dev->icw3 = val; + dev->state = (dev->icw1 & 1) ? STATE_ICW4 : STATE_NONE; + break; + case STATE_ICW4: + dev->icw4 = val; + dev->state = STATE_NONE; + break; + case STATE_NONE: + dev->imr = val; + update_pending(); + break; + } } else { - if (val & 0x10) { - /* Treat any write with any of the bits 7 to 5 set as invalid if PCI. */ - if (pic_pci && (val & 0xe0)) - return; + if (val & 0x10) { + /* Treat any write with any of the bits 7 to 5 set as invalid if PCI. */ + if (pic_pci && (val & 0xe0)) + return; - dev->icw1 = val; - dev->icw2 = dev->icw3 = 0x00; - if (!(dev->icw1 & 1)) - dev->icw4 = 0x00; - dev->ocw2 = dev->ocw3 = 0x00; - dev->irr = dev->lines; - dev->imr = dev->isr = 0x00; - dev->ack_bytes = dev->priority = 0x00; - dev->auto_eoi_rotate = dev->special_mask_mode = 0x00; - dev->interrupt = 0x17; - dev->int_pending = 0x00; - dev->state = STATE_ICW2; - update_pending(); - } else if (val & 0x08) { - dev->ocw3 = val; - if (dev->ocw3 & 0x04) - dev->interrupt |= 0x20; /* Freeze the interrupt until the poll is over. */ - if (dev->ocw3 & 0x40) - dev->special_mask_mode = !!(dev->ocw3 & 0x20); - } else { - dev->ocw2 = val; - pic_command(dev); - } + dev->icw1 = val; + dev->icw2 = dev->icw3 = 0x00; + if (!(dev->icw1 & 1)) + dev->icw4 = 0x00; + dev->ocw2 = dev->ocw3 = 0x00; + dev->irr = dev->lines; + dev->imr = dev->isr = 0x00; + dev->ack_bytes = dev->priority = 0x00; + dev->auto_eoi_rotate = dev->special_mask_mode = 0x00; + dev->interrupt = 0x17; + dev->int_pending = 0x00; + dev->state = STATE_ICW2; + update_pending(); + } else if (val & 0x08) { + dev->ocw3 = val; + if (dev->ocw3 & 0x04) + dev->interrupt |= 0x20; /* Freeze the interrupt until the poll is over. */ + if (dev->ocw3 & 0x40) + dev->special_mask_mode = !!(dev->ocw3 & 0x20); + } else { + dev->ocw2 = val; + pic_command(dev); + } } } - void pic_set_pci(void) { int i; for (i = 0x0024; i < 0x0040; i += 4) { - io_sethandler(i, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic); - io_sethandler(i + 0x0080, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic2); + io_sethandler(i, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic); + io_sethandler(i + 0x0080, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic2); } for (i = 0x1120; i < 0x1140; i += 4) { - io_sethandler(i, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic); - io_sethandler(i + 0x0080, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic2); + io_sethandler(i, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic); + io_sethandler(i + 0x0080, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic2); } } - void pic_init(void) { @@ -555,7 +520,6 @@ pic_init(void) io_sethandler(0x0020, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic); } - void pic_init_pcjr(void) { @@ -565,7 +529,6 @@ pic_init_pcjr(void) io_sethandler(0x0020, 0x0008, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic); } - void pic2_init(void) { @@ -573,152 +536,145 @@ pic2_init(void) pic.slaves[2] = &pic2; } - void picint_common(uint16_t num, int level, int set) { - int i, raise; + int i, raise; uint8_t b, slaves = 0; /* Make sure to ignore all slave IRQ's, and in case of AT+, translate IRQ 2 to IRQ 9. */ for (i = 0; i < 8; i++) { - b = (1 << i); - raise = num & b; + b = (1 << i); + raise = num & b; - if (pic.icw3 & b) { - slaves++; + if (pic.icw3 & b) { + slaves++; - if (raise) { - num &= ~b; - if (pic.at && (i == 2)) - num |= (1 << 9); - } - } + if (raise) { + num &= ~b; + if (pic.at && (i == 2)) + num |= (1 << 9); + } + } } if (!slaves) - num &= 0x00ff; + num &= 0x00ff; if (!num) { - pic_log("Attempting to %s null IRQ\n", set ? "raise" : "lower"); - return; + pic_log("Attempting to %s null IRQ\n", set ? "raise" : "lower"); + return; } if (num & 0x0100) - acpi_rtc_status = !!set; + acpi_rtc_status = !!set; if (set) { - if (smi_irq_mask & num) { - smi_raise(); - smi_irq_status |= num; - } + if (smi_irq_mask & num) { + smi_raise(); + smi_irq_status |= num; + } - if (num & 0xff00) { - if (level) - pic2.lines |= (num >> 8); + if (num & 0xff00) { + if (level) + pic2.lines |= (num >> 8); - pic2.irr |= (num >> 8); - } + pic2.irr |= (num >> 8); + } - if (num & 0x00ff) { - if (level) - pic.lines |= (num >> 8); + if (num & 0x00ff) { + if (level) + pic.lines |= (num >> 8); - pic.irr |= num; - } + pic.irr |= num; + } } else { - smi_irq_status &= ~num; + smi_irq_status &= ~num; - if (num & 0xff00) { - pic2.lines &= ~(num >> 8); - pic2.irr &= ~(num >> 8); - } + if (num & 0xff00) { + pic2.lines &= ~(num >> 8); + pic2.irr &= ~(num >> 8); + } - if (num & 0x00ff) { - pic.lines &= ~num; - pic.irr &= ~num; - } + if (num & 0x00ff) { + pic.lines &= ~num; + pic.irr &= ~num; + } } if (!(pic.interrupt & 0x20) && !(pic2.interrupt & 0x20)) - update_pending(); + update_pending(); } - void picint(uint16_t num) { picint_common(num, 0, 1); } - void picintlevel(uint16_t num) { picint_common(num, 1, 1); } - void picintc(uint16_t num) { picint_common(num, 0, 0); } - static uint8_t pic_i86_mode(pic_t *dev) { return !!(dev->icw4 & 1); } - static uint8_t pic_irq_ack_read(pic_t *dev, int phase) { - uint8_t intr = dev->interrupt & 0x47; + uint8_t intr = dev->interrupt & 0x47; uint8_t slave = intr & 0x40; intr &= 0x07; pic_log(" pic_irq_ack_read(%08X, %i)\n", dev, phase); if (dev != NULL) { - if (phase == 0) { - dev->interrupt |= 0x20; /* Freeze it so it still takes interrupts but they do not - override the one currently being processed. */ - pic_acknowledge(dev); - if (slave) - dev->data_bus = pic_irq_ack_read(dev->slaves[intr], phase); - else - dev->data_bus = pic_i86_mode(dev) ? 0xff : 0xcd; - } else if (pic_i86_mode(dev)) { - dev->int_pending = 0; - if (slave) - dev->data_bus = pic_irq_ack_read(dev->slaves[intr], phase); - else - dev->data_bus = intr + (dev->icw2 & 0xf8); - pic_auto_non_specific_eoi(dev); - } else if (phase == 1) { - if (slave) - dev->data_bus = pic_irq_ack_read(dev->slaves[intr], phase); - else if (dev->icw1 & 0x04) - dev->data_bus = (intr << 2) + (dev->icw1 & 0xe0); - else - dev->data_bus = (intr << 3) + (dev->icw1 & 0xc0); - } else if (phase == 2) { - dev->int_pending = 0; - if (slave) - dev->data_bus = pic_irq_ack_read(dev->slaves[intr], phase); - else - dev->data_bus = dev->icw2; - pic_auto_non_specific_eoi(dev); - } + if (phase == 0) { + dev->interrupt |= 0x20; /* Freeze it so it still takes interrupts but they do not + override the one currently being processed. */ + pic_acknowledge(dev); + if (slave) + dev->data_bus = pic_irq_ack_read(dev->slaves[intr], phase); + else + dev->data_bus = pic_i86_mode(dev) ? 0xff : 0xcd; + } else if (pic_i86_mode(dev)) { + dev->int_pending = 0; + if (slave) + dev->data_bus = pic_irq_ack_read(dev->slaves[intr], phase); + else + dev->data_bus = intr + (dev->icw2 & 0xf8); + pic_auto_non_specific_eoi(dev); + } else if (phase == 1) { + if (slave) + dev->data_bus = pic_irq_ack_read(dev->slaves[intr], phase); + else if (dev->icw1 & 0x04) + dev->data_bus = (intr << 2) + (dev->icw1 & 0xe0); + else + dev->data_bus = (intr << 3) + (dev->icw1 & 0xc0); + } else if (phase == 2) { + dev->int_pending = 0; + if (slave) + dev->data_bus = pic_irq_ack_read(dev->slaves[intr], phase); + else + dev->data_bus = dev->icw2; + pic_auto_non_specific_eoi(dev); + } } return dev->data_bus; } - uint8_t pic_irq_ack(void) { @@ -726,63 +682,62 @@ pic_irq_ack(void) /* Needed for Xi8088. */ if ((pic.ack_bytes == 0) && pic.int_pending && pic_slave_on(&pic, pic.interrupt)) { - if (!pic.slaves[pic.interrupt]->int_pending) { - /* If we are on AT, IRQ 2 is pending, and we cannot find a pending IRQ on PIC 2, fatal out. */ - fatal("IRQ %i pending on AT without a pending IRQ on PIC %i (normal)\n", pic.interrupt, pic.interrupt); - exit(-1); - return -1; - } + if (!pic.slaves[pic.interrupt]->int_pending) { + /* If we are on AT, IRQ 2 is pending, and we cannot find a pending IRQ on PIC 2, fatal out. */ + fatal("IRQ %i pending on AT without a pending IRQ on PIC %i (normal)\n", pic.interrupt, pic.interrupt); + exit(-1); + return -1; + } - pic.interrupt |= 0x40; /* Mark slave pending. */ + pic.interrupt |= 0x40; /* Mark slave pending. */ } - ret = pic_irq_ack_read(&pic, pic.ack_bytes); + ret = pic_irq_ack_read(&pic, pic.ack_bytes); pic.ack_bytes = (pic.ack_bytes + 1) % (pic_i86_mode(&pic) ? 2 : 3); if (pic.ack_bytes == 0) { - /* Needed for Xi8088. */ - if (pic.interrupt & 0x40) - pic2.interrupt = 0x17; - pic.interrupt = 0x17; - update_pending(); + /* Needed for Xi8088. */ + if (pic.interrupt & 0x40) + pic2.interrupt = 0x17; + pic.interrupt = 0x17; + update_pending(); } return ret; } - int picinterrupt() { int i, ret = -1; if (pic.int_pending) { - if (pic_slave_on(&pic, pic.interrupt)) { - if (!pic.slaves[pic.interrupt]->int_pending) { - /* If we are on AT, IRQ 2 is pending, and we cannot find a pending IRQ on PIC 2, fatal out. */ - fatal("IRQ %i pending on AT without a pending IRQ on PIC %i (normal)\n", pic.interrupt, pic.interrupt); - exit(-1); - return -1; - } + if (pic_slave_on(&pic, pic.interrupt)) { + if (!pic.slaves[pic.interrupt]->int_pending) { + /* If we are on AT, IRQ 2 is pending, and we cannot find a pending IRQ on PIC 2, fatal out. */ + fatal("IRQ %i pending on AT without a pending IRQ on PIC %i (normal)\n", pic.interrupt, pic.interrupt); + exit(-1); + return -1; + } - pic.interrupt |= 0x40; /* Mark slave pending. */ - } + pic.interrupt |= 0x40; /* Mark slave pending. */ + } - if ((pic.interrupt == 0) && (pit_devs[1].data != NULL)) - pit_devs[1].set_gate(pit_devs[1].data, 0, 0); + if ((pic.interrupt == 0) && (pit_devs[1].data != NULL)) + pit_devs[1].set_gate(pit_devs[1].data, 0, 0); - /* Two ACK's - do them in a loop to avoid potential compiler misoptimizations. */ - for (i = 0; i < 2; i++) { - ret = pic_irq_ack_read(&pic, pic.ack_bytes); - pic.ack_bytes = (pic.ack_bytes + 1) % (pic_i86_mode(&pic) ? 2 : 3); + /* Two ACK's - do them in a loop to avoid potential compiler misoptimizations. */ + for (i = 0; i < 2; i++) { + ret = pic_irq_ack_read(&pic, pic.ack_bytes); + pic.ack_bytes = (pic.ack_bytes + 1) % (pic_i86_mode(&pic) ? 2 : 3); - if (pic.ack_bytes == 0) { - if (pic.interrupt & 0x40) - pic2.interrupt = 0x17; - pic.interrupt = 0x17; - update_pending(); - } - } + if (pic.ack_bytes == 0) { + if (pic.interrupt & 0x40) + pic2.interrupt = 0x17; + pic.interrupt = 0x17; + update_pending(); + } + } } return ret; diff --git a/src/pit.c b/src/pit.c index ba71928ca..392701056 100644 --- a/src/pit.c +++ b/src/pit.c @@ -43,91 +43,84 @@ pit_intf_t pit_devs[2]; -double cpuclock, PITCONSTD, - SYSCLK, - isa_timing, - bus_timing, pci_timing, agp_timing, - PCICLK, AGPCLK; +double cpuclock, PITCONSTD, + SYSCLK, + isa_timing, + bus_timing, pci_timing, agp_timing, + PCICLK, AGPCLK; -uint64_t PITCONST, ISACONST, - CGACONST, - MDACONST, HERCCONST, - VGACONST1, VGACONST2, - RTCCONST, ACPICONST; +uint64_t PITCONST, ISACONST, + CGACONST, + MDACONST, HERCCONST, + VGACONST1, VGACONST2, + RTCCONST, ACPICONST; -int refresh_at_enable = 1, - io_delay = 5; +int refresh_at_enable = 1, + io_delay = 5; +int64_t firsttime = 1; -int64_t firsttime = 1; - - -#define PIT_PS2 16 /* The PIT is the PS/2's second PIT. */ -#define PIT_EXT_IO 32 /* The PIT has externally specified port I/O. */ -#define PIT_CUSTOM_CLOCK 64 /* The PIT uses custom clock inputs provided by another provider. */ -#define PIT_SECONDARY 128 /* The PIT is secondary (ports 0048-004B). */ - +#define PIT_PS2 16 /* The PIT is the PS/2's second PIT. */ +#define PIT_EXT_IO 32 /* The PIT has externally specified port I/O. */ +#define PIT_CUSTOM_CLOCK 64 /* The PIT uses custom clock inputs provided by another provider. */ +#define PIT_SECONDARY 128 /* The PIT is secondary (ports 0048-004B). */ #ifdef ENABLE_PIT_LOG int pit_do_log = ENABLE_PIT_LOG; - static void pit_log(const char *fmt, ...) { va_list ap; if (pit_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define pit_log(fmt, ...) +# define pit_log(fmt, ...) #endif - static void ctr_set_out(ctr_t *ctr, int out) { if (ctr == NULL) - return; + return; if (ctr->out_func != NULL) - ctr->out_func(out, ctr->out); + ctr->out_func(out, ctr->out); ctr->out = out; } - static void ctr_decrease_count(ctr_t *ctr) { if (ctr->bcd) { - ctr->units--; - if (ctr->units == -1) { - ctr->units = -7; - ctr->tens--; - if (ctr->tens == -1) { - ctr->tens = -7; - ctr->hundreds--; - if (ctr->hundreds == -1) { - ctr->hundreds = -7; - ctr->thousands--; - if (ctr->thousands == -1) { - ctr->thousands = -7; - ctr->myriads--; - if (ctr->myriads == -1) - ctr->myriads = -7; /* 0 - 1 should wrap around to 9999. */ - } - } - } - } + ctr->units--; + if (ctr->units == -1) { + ctr->units = -7; + ctr->tens--; + if (ctr->tens == -1) { + ctr->tens = -7; + ctr->hundreds--; + if (ctr->hundreds == -1) { + ctr->hundreds = -7; + ctr->thousands--; + if (ctr->thousands == -1) { + ctr->thousands = -7; + ctr->myriads--; + if (ctr->myriads == -1) + ctr->myriads = -7; /* 0 - 1 should wrap around to 9999. */ + } + } + } + } } else - ctr->count = (ctr->count - 1) & 0xffff; + ctr->count = (ctr->count - 1) & 0xffff; } - static void ctr_load_count(ctr_t *ctr) { @@ -136,313 +129,310 @@ ctr_load_count(ctr_t *ctr) ctr->count = l; pit_log("ctr->count = %i\n", l); ctr->null_count = 0; - ctr->newcount = !!(l & 1); + ctr->newcount = !!(l & 1); } - static void ctr_tick(ctr_t *ctr) { uint8_t state = ctr->state; if (state == 1) { - /* This is true for all modes */ - ctr_load_count(ctr); - ctr->state = 2; - if ((ctr->m & 0x07) == 0x01) - ctr_set_out(ctr, 0); - return; + /* This is true for all modes */ + ctr_load_count(ctr); + ctr->state = 2; + if ((ctr->m & 0x07) == 0x01) + ctr_set_out(ctr, 0); + return; } - switch(ctr->m & 0x07) { - case 0: - /* Interrupt on terminal count */ - switch (state) { - case 2: - if (ctr->gate && (ctr->count >= 1)) { - ctr_decrease_count(ctr); - if (ctr->count < 1) { - ctr->state = 3; - ctr_set_out(ctr, 1); - } - } - break; - case 3: - ctr_decrease_count(ctr); - break; - } - break; - case 1: - /* Hardware retriggerable one-shot */ - switch (state) { - case 1: - ctr_load_count(ctr); - ctr->state = 2; - ctr_set_out(ctr, 0); - break; - case 2: - if (ctr->count >= 1) { - ctr_decrease_count(ctr); - if (ctr->count < 1) { - ctr->state = 3; - ctr_set_out(ctr, 1); - } - } - break; - case 3: - ctr_decrease_count(ctr); - break; - } - break; - case 2: case 6: - /* Rate generator */ - switch (state) { - case 3: - ctr_load_count(ctr); - ctr->state = 2; - ctr_set_out(ctr, 1); - break; - case 2: - if (ctr->gate == 0) - break; - else if (ctr->count >= 2) { - ctr_decrease_count(ctr); - if (ctr->count < 2) { - ctr->state = 3; - ctr_set_out(ctr, 0); - } - } - break; - } - break; - case 3: case 7: - /* Square wave mode */ - switch (state) { - case 2: - if (ctr->gate == 0) - break; - else if (ctr->count >= 0) { - if (ctr->bcd) { - ctr_decrease_count(ctr); - if (!ctr->newcount) - ctr_decrease_count(ctr); - } else - ctr->count -= (ctr->newcount ? 1 : 2); - if (ctr->count < 0) { - ctr_load_count(ctr); - ctr->state = 3; - ctr_set_out(ctr, 0); - } else if (ctr->newcount) - ctr->newcount = 0; - } - break; - case 3: - if (ctr->gate == 0) - break; - else if (ctr->count >= 0) { - if (ctr->bcd) { - ctr_decrease_count(ctr); - ctr_decrease_count(ctr); - if (ctr->newcount) - ctr_decrease_count(ctr); - } else - ctr->count -= (ctr->newcount ? 3 : 2); - if (ctr->count < 0) { - ctr_load_count(ctr); - ctr->state = 2; - ctr_set_out(ctr, 1); - } else if (ctr->newcount) - ctr->newcount = 0; - } - break; - } - break; - case 4: case 5: - /* Software triggered strobe */ - /* Hardware triggered strobe */ - if ((ctr->gate != 0) || (ctr->m != 4)) { - switch(state) { - case 0: - ctr_decrease_count(ctr); - break; - case 2: - if (ctr->count >= 1) { - ctr_decrease_count(ctr); - if (ctr->count < 1) { - ctr->state = 3; - ctr_set_out(ctr, 0); - } - } - break; - case 3: - ctr->state = 0; - ctr_set_out(ctr, 1); - break; - } - } - break; - default: - break; + switch (ctr->m & 0x07) { + case 0: + /* Interrupt on terminal count */ + switch (state) { + case 2: + if (ctr->gate && (ctr->count >= 1)) { + ctr_decrease_count(ctr); + if (ctr->count < 1) { + ctr->state = 3; + ctr_set_out(ctr, 1); + } + } + break; + case 3: + ctr_decrease_count(ctr); + break; + } + break; + case 1: + /* Hardware retriggerable one-shot */ + switch (state) { + case 1: + ctr_load_count(ctr); + ctr->state = 2; + ctr_set_out(ctr, 0); + break; + case 2: + if (ctr->count >= 1) { + ctr_decrease_count(ctr); + if (ctr->count < 1) { + ctr->state = 3; + ctr_set_out(ctr, 1); + } + } + break; + case 3: + ctr_decrease_count(ctr); + break; + } + break; + case 2: + case 6: + /* Rate generator */ + switch (state) { + case 3: + ctr_load_count(ctr); + ctr->state = 2; + ctr_set_out(ctr, 1); + break; + case 2: + if (ctr->gate == 0) + break; + else if (ctr->count >= 2) { + ctr_decrease_count(ctr); + if (ctr->count < 2) { + ctr->state = 3; + ctr_set_out(ctr, 0); + } + } + break; + } + break; + case 3: + case 7: + /* Square wave mode */ + switch (state) { + case 2: + if (ctr->gate == 0) + break; + else if (ctr->count >= 0) { + if (ctr->bcd) { + ctr_decrease_count(ctr); + if (!ctr->newcount) + ctr_decrease_count(ctr); + } else + ctr->count -= (ctr->newcount ? 1 : 2); + if (ctr->count < 0) { + ctr_load_count(ctr); + ctr->state = 3; + ctr_set_out(ctr, 0); + } else if (ctr->newcount) + ctr->newcount = 0; + } + break; + case 3: + if (ctr->gate == 0) + break; + else if (ctr->count >= 0) { + if (ctr->bcd) { + ctr_decrease_count(ctr); + ctr_decrease_count(ctr); + if (ctr->newcount) + ctr_decrease_count(ctr); + } else + ctr->count -= (ctr->newcount ? 3 : 2); + if (ctr->count < 0) { + ctr_load_count(ctr); + ctr->state = 2; + ctr_set_out(ctr, 1); + } else if (ctr->newcount) + ctr->newcount = 0; + } + break; + } + break; + case 4: + case 5: + /* Software triggered strobe */ + /* Hardware triggered strobe */ + if ((ctr->gate != 0) || (ctr->m != 4)) { + switch (state) { + case 0: + ctr_decrease_count(ctr); + break; + case 2: + if (ctr->count >= 1) { + ctr_decrease_count(ctr); + if (ctr->count < 1) { + ctr->state = 3; + ctr_set_out(ctr, 0); + } + } + break; + case 3: + ctr->state = 0; + ctr_set_out(ctr, 1); + break; + } + } + break; + default: + break; } } - static void ctr_clock(void *data, int counter_id) { - pit_t *pit = (pit_t *)data; + pit_t *pit = (pit_t *) data; ctr_t *ctr = &pit->counters[counter_id]; - /* FIXME: Is this even needed? */ + /* FIXME: Is this even needed? */ if ((ctr->state == 3) && (ctr->m != 2) && (ctr->m != 3)) - return; + return; if (ctr->using_timer) - return; + return; ctr_tick(ctr); } - static void ctr_set_state_1(ctr_t *ctr) { uint8_t mode = (ctr->m & 0x03); if ((mode == 0) || ((mode > 1) && (ctr->state == 0))) - ctr->state = 1; + ctr->state = 1; } - static void ctr_load(ctr_t *ctr) { if (ctr->l == 1) { - /* Count of 1 is illegal in modes 2 and 3. What happens here was - determined experimentally. */ - if (ctr->m == 2) - ctr->l = 2; - else if (ctr->m == 3) - ctr->l = 0; + /* Count of 1 is illegal in modes 2 and 3. What happens here was + determined experimentally. */ + if (ctr->m == 2) + ctr->l = 2; + else if (ctr->m == 3) + ctr->l = 0; } if (ctr->using_timer) - ctr->latch = 1; + ctr->latch = 1; else - ctr_set_state_1(ctr); + ctr_set_state_1(ctr); if (ctr->load_func != NULL) - ctr->load_func(ctr->m, ctr->l ? ctr->l : 0x10000); + ctr->load_func(ctr->m, ctr->l ? ctr->l : 0x10000); pit_log("Counter loaded, state = %i, gate = %i\n", ctr->state, ctr->gate); } - static __inline void ctr_latch_status(ctr_t *ctr) { - ctr->read_status = (ctr->ctrl & 0x3f) | (ctr->out ? 0x80 : 0) | (ctr->null_count ? 0x40 : 0); + ctr->read_status = (ctr->ctrl & 0x3f) | (ctr->out ? 0x80 : 0) | (ctr->null_count ? 0x40 : 0); ctr->do_read_status = 1; } - static __inline void ctr_latch_count(ctr_t *ctr) { int count = (ctr->latch || (ctr->state == 1)) ? ctr->l : ctr->count; switch (ctr->rm & 0x03) { - case 0x00: - /* This should never happen. */ - break; - case 0x01: - /* Latch bits 0-7 only. */ - ctr->rl = ((count << 8) & 0xff00) | (count & 0xff); - ctr->latched = 1; - break; - case 0x02: - /* Latch bit 8-15 only. */ - ctr->rl = (count & 0xff00) | ((count >> 8) & 0xff); - ctr->latched = 1; - break; - case 0x03: - /* Latch all 16 bits. */ - ctr->rl = count; - ctr->latched = 2; - break; + case 0x00: + /* This should never happen. */ + break; + case 0x01: + /* Latch bits 0-7 only. */ + ctr->rl = ((count << 8) & 0xff00) | (count & 0xff); + ctr->latched = 1; + break; + case 0x02: + /* Latch bit 8-15 only. */ + ctr->rl = (count & 0xff00) | ((count >> 8) & 0xff); + ctr->latched = 1; + break; + case 0x03: + /* Latch all 16 bits. */ + ctr->rl = count; + ctr->latched = 2; + break; } pit_log("latched counter = %04X\n", ctr->rl & 0xffff); } - uint16_t pit_ctr_get_count(void *data, int counter_id) { - pit_t *pit = (pit_t *)data; + pit_t *pit = (pit_t *) data; ctr_t *ctr = &pit->counters[counter_id]; return (uint16_t) ctr->l; } - void pit_ctr_set_load_func(void *data, int counter_id, void (*func)(uint8_t new_m, int new_count)) { if (data == NULL) - return; + return; - pit_t *pit = (pit_t *)data; + pit_t *pit = (pit_t *) data; ctr_t *ctr = &pit->counters[counter_id]; ctr->load_func = func; } - void pit_ctr_set_out_func(void *data, int counter_id, void (*func)(int new_out, int old_out)) { if (data == NULL) - return; + return; - pit_t *pit = (pit_t *)data; + pit_t *pit = (pit_t *) data; ctr_t *ctr = &pit->counters[counter_id]; ctr->out_func = func; } - void pit_ctr_set_gate(void *data, int counter_id, int gate) { - pit_t *pit = (pit_t *)data; + pit_t *pit = (pit_t *) data; ctr_t *ctr = &pit->counters[counter_id]; - int old = ctr->gate; + int old = ctr->gate; uint8_t mode = ctr->m & 3; ctr->gate = gate; switch (mode) { - case 1: case 2: case 3: case 5: case 6: case 7: - if (!old && gate) { - /* Here we handle the rising edges. */ - if (mode & 1) { - if (mode != 1) - ctr_set_out(ctr, 1); - ctr->state = 1; - } else if (mode == 2) - ctr->state = 3; - } else if (old && !gate) { - /* Here we handle the lowering edges. */ - if (mode & 2) - ctr_set_out(ctr, 1); - } - break; - } + case 1: + case 2: + case 3: + case 5: + case 6: + case 7: + if (!old && gate) { + /* Here we handle the rising edges. */ + if (mode & 1) { + if (mode != 1) + ctr_set_out(ctr, 1); + ctr->state = 1; + } else if (mode == 2) + ctr->state = 3; + } else if (old && !gate) { + /* Here we handle the lowering edges. */ + if (mode & 2) + ctr_set_out(ctr, 1); + } + break; + } } - static __inline void pit_ctr_set_clock_common(ctr_t *ctr, int clock) { @@ -451,232 +441,231 @@ pit_ctr_set_clock_common(ctr_t *ctr, int clock) ctr->clock = clock; if (ctr->using_timer && ctr->latch) { - if (old && !ctr->clock) { - ctr_set_state_1(ctr); - ctr->latch = 0; - } + if (old && !ctr->clock) { + ctr_set_state_1(ctr); + ctr->latch = 0; + } } else if (ctr->using_timer && !ctr->latch) { - if (ctr->state == 1) { - if (!old && ctr->clock) - ctr->s1_det = 1; /* Rising edge. */ - else if (old && !ctr->clock) { - ctr->s1_det++; /* Falling edge. */ - if (ctr->s1_det >= 2) { - ctr->s1_det = 0; - ctr_tick(ctr); - } - } - } else if (old && !ctr->clock) - ctr_tick(ctr); + if (ctr->state == 1) { + if (!old && ctr->clock) + ctr->s1_det = 1; /* Rising edge. */ + else if (old && !ctr->clock) { + ctr->s1_det++; /* Falling edge. */ + if (ctr->s1_det >= 2) { + ctr->s1_det = 0; + ctr_tick(ctr); + } + } + } else if (old && !ctr->clock) + ctr_tick(ctr); } } - void pit_ctr_set_clock(ctr_t *ctr, int clock) { pit_ctr_set_clock_common(ctr, clock); } - void pit_ctr_set_using_timer(void *data, int counter_id, int using_timer) { if (tsc > 0) timer_process(); - pit_t *pit = (pit_t *)data; - ctr_t *ctr = &pit->counters[counter_id]; + pit_t *pit = (pit_t *) data; + ctr_t *ctr = &pit->counters[counter_id]; ctr->using_timer = using_timer; } - static void pit_timer_over(void *p) { pit_t *dev = (pit_t *) p; - int i; + int i; dev->clock ^= 1; for (i = 0; i < 3; i++) - pit_ctr_set_clock_common(&dev->counters[i], dev->clock); + pit_ctr_set_clock_common(&dev->counters[i], dev->clock); timer_advance_u64(&dev->callback_timer, PITCONST >> 1ULL); } - static void pit_write(uint16_t addr, uint8_t val, void *priv) { - pit_t *dev = (pit_t *)priv; - int t = (addr & 3); + pit_t *dev = (pit_t *) priv; + int t = (addr & 3); ctr_t *ctr; pit_log("[%04X:%08X] pit_write(%04X, %02X, %08X)\n", CS, cpu_state.pc, addr, val, priv); switch (addr & 3) { - case 3: /* control */ - t = val >> 6; + case 3: /* control */ + t = val >> 6; - if (t == 3) { - if (dev->flags & PIT_8254) { - /* This is 8254-only. */ - if (!(val & 0x20)) { - if (val & 2) - ctr_latch_count(&dev->counters[0]); - if (val & 4) - ctr_latch_count(&dev->counters[1]); - if (val & 8) - ctr_latch_count(&dev->counters[2]); - pit_log("PIT %i: Initiated readback command\n", t); - } - if (!(val & 0x10)) { - if (val & 2) - ctr_latch_status(&dev->counters[0]); - if (val & 4) - ctr_latch_status(&dev->counters[1]); - if (val & 8) - ctr_latch_status(&dev->counters[2]); - } - } - } else { - dev->ctrl = val; - ctr = &dev->counters[t]; + if (t == 3) { + if (dev->flags & PIT_8254) { + /* This is 8254-only. */ + if (!(val & 0x20)) { + if (val & 2) + ctr_latch_count(&dev->counters[0]); + if (val & 4) + ctr_latch_count(&dev->counters[1]); + if (val & 8) + ctr_latch_count(&dev->counters[2]); + pit_log("PIT %i: Initiated readback command\n", t); + } + if (!(val & 0x10)) { + if (val & 2) + ctr_latch_status(&dev->counters[0]); + if (val & 4) + ctr_latch_status(&dev->counters[1]); + if (val & 8) + ctr_latch_status(&dev->counters[2]); + } + } + } else { + dev->ctrl = val; + ctr = &dev->counters[t]; - if (!(dev->ctrl & 0x30)) { - ctr_latch_count(ctr); - pit_log("PIT %i: Initiated latched read, %i bytes latched\n", - t, ctr->latched); - } else { - ctr->ctrl = val; - ctr->rm = ctr->wm = (ctr->ctrl >> 4) & 3; - ctr->m = (val >> 1) & 7; - if (ctr->m > 5) - ctr->m &= 3; - ctr->null_count = 1; - ctr->bcd = (ctr->ctrl & 0x01); - ctr_set_out(ctr, !!ctr->m); - ctr->state = 0; - if (ctr->latched) { - pit_log("PIT %i: Reload while counter is latched\n", t); - ctr->rl--; - } + if (!(dev->ctrl & 0x30)) { + ctr_latch_count(ctr); + pit_log("PIT %i: Initiated latched read, %i bytes latched\n", + t, ctr->latched); + } else { + ctr->ctrl = val; + ctr->rm = ctr->wm = (ctr->ctrl >> 4) & 3; + ctr->m = (val >> 1) & 7; + if (ctr->m > 5) + ctr->m &= 3; + ctr->null_count = 1; + ctr->bcd = (ctr->ctrl & 0x01); + ctr_set_out(ctr, !!ctr->m); + ctr->state = 0; + if (ctr->latched) { + pit_log("PIT %i: Reload while counter is latched\n", t); + ctr->rl--; + } - pit_log("PIT %i: M = %i, RM/WM = %i, State = %i, Out = %i\n", t, ctr->m, ctr->rm, ctr->state, ctr->out); - } - } - break; + pit_log("PIT %i: M = %i, RM/WM = %i, State = %i, Out = %i\n", t, ctr->m, ctr->rm, ctr->state, ctr->out); + } + } + break; - case 0: - case 1: - case 2: /* the actual timers */ - ctr = &dev->counters[t]; + case 0: + case 1: + case 2: /* the actual timers */ + ctr = &dev->counters[t]; - switch (ctr->wm) { - case 0: - /* This should never happen. */ - break; - case 1: - ctr->l = val; - if (ctr->m == 0) - ctr_set_out(ctr, 0); - ctr_load(ctr); - break; - case 2: - ctr->l = (val << 8); - if (ctr->m == 0) - ctr_set_out(ctr, 0); - ctr_load(ctr); - break; - case 3: case 0x83: - if (ctr->wm & 0x80) { - ctr->l = (ctr->l & 0x00ff) | (val << 8); - pit_log("PIT %i: Written high byte %02X, latch now %04X\n", t, val, ctr->l); - ctr_load(ctr); - } else { - ctr->l = (ctr->l & 0xff00) | val; - pit_log("PIT %i: Written low byte %02X, latch now %04X\n", t, val, ctr->l); - if (ctr->m == 0) { - ctr->state = 0; - ctr_set_out(ctr, 0); - } - } + switch (ctr->wm) { + case 0: + /* This should never happen. */ + break; + case 1: + ctr->l = val; + if (ctr->m == 0) + ctr_set_out(ctr, 0); + ctr_load(ctr); + break; + case 2: + ctr->l = (val << 8); + if (ctr->m == 0) + ctr_set_out(ctr, 0); + ctr_load(ctr); + break; + case 3: + case 0x83: + if (ctr->wm & 0x80) { + ctr->l = (ctr->l & 0x00ff) | (val << 8); + pit_log("PIT %i: Written high byte %02X, latch now %04X\n", t, val, ctr->l); + ctr_load(ctr); + } else { + ctr->l = (ctr->l & 0xff00) | val; + pit_log("PIT %i: Written low byte %02X, latch now %04X\n", t, val, ctr->l); + if (ctr->m == 0) { + ctr->state = 0; + ctr_set_out(ctr, 0); + } + } - if (ctr->wm & 0x80) - ctr->wm &= ~0x80; - else - ctr->wm |= 0x80; - break; - } - break; + if (ctr->wm & 0x80) + ctr->wm &= ~0x80; + else + ctr->wm |= 0x80; + break; + } + break; } } - static uint8_t pit_read(uint16_t addr, void *priv) { - pit_t *dev = (pit_t *)priv; + pit_t *dev = (pit_t *) priv; uint8_t ret = 0xff; - int count, t = (addr & 3); - ctr_t *ctr; + int count, t = (addr & 3); + ctr_t *ctr; switch (addr & 3) { - case 3: /* Control. */ - /* This is 8254-only, 8253 returns 0x00. */ - ret = (dev->flags & PIT_8254) ? dev->ctrl : 0x00; - break; + case 3: /* Control. */ + /* This is 8254-only, 8253 returns 0x00. */ + ret = (dev->flags & PIT_8254) ? dev->ctrl : 0x00; + break; - case 0: - case 1: - case 2: /* The actual timers. */ - ctr = &dev->counters[t]; + case 0: + case 1: + case 2: /* The actual timers. */ + ctr = &dev->counters[t]; - if (ctr->do_read_status) { - ctr->do_read_status = 0; - ret = ctr->read_status; - break; - } + if (ctr->do_read_status) { + ctr->do_read_status = 0; + ret = ctr->read_status; + break; + } - count = (ctr->state == 1) ? ctr->l : ctr->count; + count = (ctr->state == 1) ? ctr->l : ctr->count; - if (ctr->latched) { - ret = (ctr->rl) >> ((ctr->rm & 0x80) ? 8 : 0); + if (ctr->latched) { + ret = (ctr->rl) >> ((ctr->rm & 0x80) ? 8 : 0); - if (ctr->rm & 0x80) - ctr->rm &= ~0x80; - else - ctr->rm |= 0x80; + if (ctr->rm & 0x80) + ctr->rm &= ~0x80; + else + ctr->rm |= 0x80; - ctr->latched--; - } else switch (ctr->rm) { - case 0: case 0x80: - ret = 0x00; - break; + ctr->latched--; + } else + switch (ctr->rm) { + case 0: + case 0x80: + ret = 0x00; + break; - case 1: - ret = count & 0xff; - break; + case 1: + ret = count & 0xff; + break; - case 2: - ret = count >> 8; - break; + case 2: + ret = count >> 8; + break; - case 3: case 0x83: - /* Yes, wm is correct here - this is to ensure correct readout while the - count is being written. */ - if (ctr->wm & 0x80) - ret = ~(ctr->l & 0xff); - else - ret = count >> ((ctr->rm & 0x80) ? 8 : 0); + case 3: + case 0x83: + /* Yes, wm is correct here - this is to ensure correct readout while the + count is being written. */ + if (ctr->wm & 0x80) + ret = ~(ctr->l & 0xff); + else + ret = count >> ((ctr->rm & 0x80) ? 8 : 0); - if (ctr->rm & 0x80) - ctr->rm &= ~0x80; - else - ctr->rm |= 0x80; - break; - } - break; + if (ctr->rm & 0x80) + ctr->rm &= ~0x80; + else + ctr->rm |= 0x80; + break; + } + break; } pit_log("[%04X:%08X] pit_read(%04X, %08X) = %02X\n", CS, cpu_state.pc, addr, priv, ret); @@ -684,88 +673,81 @@ pit_read(uint16_t addr, void *priv) return ret; } - void pit_irq0_timer_ps2(int new_out, int old_out) { if (new_out && !old_out) { - picint(1); - pit_devs[1].set_gate(pit_devs[1].data, 0, 1); + picint(1); + pit_devs[1].set_gate(pit_devs[1].data, 0, 1); } if (!new_out) - picintc(1); + picintc(1); if (!new_out && old_out) - pit_devs[1].ctr_clock(pit_devs[1].data, 0); + pit_devs[1].ctr_clock(pit_devs[1].data, 0); } - void pit_refresh_timer_xt(int new_out, int old_out) { if (new_out && !old_out) - dma_channel_read(0); + dma_channel_read(0); } - void pit_refresh_timer_at(int new_out, int old_out) { if (refresh_at_enable && new_out && !old_out) - ppi.pb ^= 0x10; + ppi.pb ^= 0x10; } - void pit_speaker_timer(int new_out, int old_out) { int l; if (cassette != NULL) - pc_cas_set_out(cassette, new_out); + pc_cas_set_out(cassette, new_out); speaker_update(); uint16_t count = pit_devs[0].get_count(pit_devs[0].data, 2); - l = count ? count : 0x10000; + l = count ? count : 0x10000; if (l < 25) - speakon = 0; + speakon = 0; else - speakon = new_out; + speakon = new_out; ppispeakon = new_out; } - void pit_nmi_timer_ps2(int new_out, int old_out) { nmi = new_out; if (nmi) - nmi_auto_clear = 1; + nmi_auto_clear = 1; } - static void ctr_reset(ctr_t *ctr) { - ctr->ctrl = 0; - ctr->m = 0; - ctr->gate = 0; - ctr->l = 0xffff; + ctr->ctrl = 0; + ctr->m = 0; + ctr->gate = 0; + ctr->l = 0xffff; ctr->using_timer = 1; - ctr->state = 0; - ctr->null_count = 1; + ctr->state = 0; + ctr->null_count = 1; ctr->latch = 0; ctr->s1_det = 0; - ctr->l_det = 0; + ctr->l_det = 0; } - void pit_reset(pit_t *dev) { @@ -776,36 +758,33 @@ pit_reset(pit_t *dev) dev->clock = 0; for (i = 0; i < 3; i++) - ctr_reset(&dev->counters[i]); + ctr_reset(&dev->counters[i]); /* Disable speaker gate. */ dev->counters[2].gate = 0; } - void pit_handler(int set, uint16_t base, int size, void *priv) { io_handler(set, base, size, pit_read, NULL, NULL, pit_write, NULL, NULL, priv); } - static void pit_close(void *priv) { pit_t *dev = (pit_t *) priv; if (dev == pit_devs[0].data) - pit_devs[0].data = NULL; + pit_devs[0].data = NULL; if (dev == pit_devs[1].data) - pit_devs[1].data = NULL; + pit_devs[1].data = NULL; if (dev != NULL) - free(dev); + free(dev); } - static void * pit_init(const device_t *info) { @@ -813,124 +792,123 @@ pit_init(const device_t *info) pit_reset(dev); if (!(dev->flags & PIT_PS2) && !(dev->flags & PIT_CUSTOM_CLOCK)) { - timer_add(&dev->callback_timer, pit_timer_over, (void *) dev, 0); - timer_set_delay_u64(&dev->callback_timer, PITCONST >> 1ULL); + timer_add(&dev->callback_timer, pit_timer_over, (void *) dev, 0); + timer_set_delay_u64(&dev->callback_timer, PITCONST >> 1ULL); } dev->flags = info->local; if (!(dev->flags & PIT_EXT_IO)) { - io_sethandler((dev->flags & PIT_SECONDARY) ? 0x0048 : 0x0040, 0x0004, - pit_read, NULL, NULL, pit_write, NULL, NULL, dev); + io_sethandler((dev->flags & PIT_SECONDARY) ? 0x0048 : 0x0040, 0x0004, + pit_read, NULL, NULL, pit_write, NULL, NULL, dev); } return dev; } const device_t i8253_device = { - .name = "Intel 8253/8253-5 Programmable Interval Timer", + .name = "Intel 8253/8253-5 Programmable Interval Timer", .internal_name = "i8253", - .flags = DEVICE_ISA, - .local = PIT_8253, - .init = pit_init, - .close = pit_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8253, + .init = pit_init, + .close = pit_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i8254_device = { - .name = "Intel 8254 Programmable Interval Timer", + .name = "Intel 8254 Programmable Interval Timer", .internal_name = "i8254", - .flags = DEVICE_ISA, - .local = PIT_8254, - .init = pit_init, - .close = pit_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8254, + .init = pit_init, + .close = pit_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i8254_sec_device = { - .name = "Intel 8254 Programmable Interval Timer (Secondary)", + .name = "Intel 8254 Programmable Interval Timer (Secondary)", .internal_name = "i8254_sec", - .flags = DEVICE_ISA, - .local = PIT_8254 | PIT_SECONDARY, - .init = pit_init, - .close = pit_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8254 | PIT_SECONDARY, + .init = pit_init, + .close = pit_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i8254_ext_io_device = { - .name = "Intel 8254 Programmable Interval Timer (External I/O)", + .name = "Intel 8254 Programmable Interval Timer (External I/O)", .internal_name = "i8254_ext_io", - .flags = DEVICE_ISA, - .local = PIT_8254 | PIT_EXT_IO, - .init = pit_init, - .close = pit_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8254 | PIT_EXT_IO, + .init = pit_init, + .close = pit_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i8254_ps2_device = { - .name = "Intel 8254 Programmable Interval Timer (PS/2)", + .name = "Intel 8254 Programmable Interval Timer (PS/2)", .internal_name = "i8254_ps2", - .flags = DEVICE_ISA, - .local = PIT_8254 | PIT_PS2 | PIT_EXT_IO, - .init = pit_init, - .close = pit_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8254 | PIT_PS2 | PIT_EXT_IO, + .init = pit_init, + .close = pit_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; pit_t * pit_common_init(int type, void (*out0)(int new_out, int old_out), void (*out1)(int new_out, int old_out)) { - int i; + int i; void *pit; pit_intf_t *pit_intf = &pit_devs[0]; switch (type) { - case PIT_8253: - default: - pit = device_add(&i8253_device); - *pit_intf = pit_classic_intf; - break; - case PIT_8254: - pit = device_add(&i8254_device); - *pit_intf = pit_classic_intf; - break; - case PIT_8253_FAST: - pit = device_add(&i8253_fast_device); - *pit_intf = pit_fast_intf; - break; - case PIT_8254_FAST: - pit = device_add(&i8254_fast_device); - *pit_intf = pit_fast_intf; - break; - + case PIT_8253: + default: + pit = device_add(&i8253_device); + *pit_intf = pit_classic_intf; + break; + case PIT_8254: + pit = device_add(&i8254_device); + *pit_intf = pit_classic_intf; + break; + case PIT_8253_FAST: + pit = device_add(&i8253_fast_device); + *pit_intf = pit_fast_intf; + break; + case PIT_8254_FAST: + pit = device_add(&i8254_fast_device); + *pit_intf = pit_fast_intf; + break; } pit_intf->data = pit; for (i = 0; i < 3; i++) { - pit_intf->set_gate(pit_intf->data, i, 1); - pit_intf->set_using_timer(pit_intf->data, i, 1); + pit_intf->set_gate(pit_intf->data, i, 1); + pit_intf->set_using_timer(pit_intf->data, i, 1); } pit_intf->set_out_func(pit_intf->data, 0, out0); @@ -943,7 +921,6 @@ pit_common_init(int type, void (*out0)(int new_out, int old_out), void (*out1)(i return pit; } - pit_t * pit_ps2_init(int type) { @@ -954,12 +931,12 @@ pit_ps2_init(int type) switch (type) { case PIT_8254: default: - pit = device_add(&i8254_ps2_device); + pit = device_add(&i8254_ps2_device); *ps2_pit = pit_classic_intf; break; case PIT_8254_FAST: - pit = device_add(&i8254_ps2_fast_device); + pit = device_add(&i8254_ps2_fast_device); *ps2_pit = pit_fast_intf; break; } @@ -980,106 +957,105 @@ pit_ps2_init(int type) return pit; } - void pit_set_clock(int clock) { /* Set default CPU/crystal clock and xt_cpu_multi. */ if (cpu_s->cpu_type >= CPU_286) { - int remainder = (clock % 100000000); - if (remainder == 66666666) - cpuclock = (double) (clock - remainder) + (200000000.0 / 3.0); - else if (remainder == 33333333) - cpuclock = (double) (clock - remainder) + (100000000.0 / 3.0); - else - cpuclock = (double) clock; + int remainder = (clock % 100000000); + if (remainder == 66666666) + cpuclock = (double) (clock - remainder) + (200000000.0 / 3.0); + else if (remainder == 33333333) + cpuclock = (double) (clock - remainder) + (100000000.0 / 3.0); + else + cpuclock = (double) clock; - PITCONSTD = (cpuclock / 1193182.0); - PITCONST = (uint64_t) (PITCONSTD * (double)(1ull << 32)); - CGACONST = (uint64_t) ((cpuclock / (19687503.0/11.0)) * (double)(1ull << 32)); - ISACONST = (uint64_t) ((cpuclock / (double)cpu_isa_speed) * (double)(1ull << 32)); - xt_cpu_multi = 1ULL; + PITCONSTD = (cpuclock / 1193182.0); + PITCONST = (uint64_t) (PITCONSTD * (double) (1ull << 32)); + CGACONST = (uint64_t) ((cpuclock / (19687503.0 / 11.0)) * (double) (1ull << 32)); + ISACONST = (uint64_t) ((cpuclock / (double) cpu_isa_speed) * (double) (1ull << 32)); + xt_cpu_multi = 1ULL; } else { - cpuclock = 14318184.0; - PITCONSTD = 12.0; - PITCONST = (12ULL << 32ULL); - CGACONST = (8ULL << 32ULL); - xt_cpu_multi = 3ULL; + cpuclock = 14318184.0; + PITCONSTD = 12.0; + PITCONST = (12ULL << 32ULL); + CGACONST = (8ULL << 32ULL); + xt_cpu_multi = 3ULL; - switch (cpu_s->rspeed) { - case 7159092: - if (cpu_s->cpu_flags & CPU_ALTERNATE_XTAL) { - cpuclock = 28636368.0; - xt_cpu_multi = 4ULL; - } else - xt_cpu_multi = 2ULL; - break; + switch (cpu_s->rspeed) { + case 7159092: + if (cpu_s->cpu_flags & CPU_ALTERNATE_XTAL) { + cpuclock = 28636368.0; + xt_cpu_multi = 4ULL; + } else + xt_cpu_multi = 2ULL; + break; - case 8000000: - cpuclock = 24000000.0; - break; - case 9545456: - cpuclock = 28636368.0; - break; - case 10000000: - cpuclock = 30000000.0; - break; - case 12000000: - cpuclock = 36000000.0; - break; - case 16000000: - cpuclock = 48000000.0; - break; + case 8000000: + cpuclock = 24000000.0; + break; + case 9545456: + cpuclock = 28636368.0; + break; + case 10000000: + cpuclock = 30000000.0; + break; + case 12000000: + cpuclock = 36000000.0; + break; + case 16000000: + cpuclock = 48000000.0; + break; - default: - if (cpu_s->cpu_flags & CPU_ALTERNATE_XTAL) { - cpuclock = 28636368.0; - xt_cpu_multi = 6ULL; - } - break; - } + default: + if (cpu_s->cpu_flags & CPU_ALTERNATE_XTAL) { + cpuclock = 28636368.0; + xt_cpu_multi = 6ULL; + } + break; + } - if (cpuclock == 28636368.0) { - PITCONSTD = 24.0; - PITCONST = (24ULL << 32LL); - CGACONST = (16ULL << 32LL); - } else if (cpuclock != 14318184.0) { - PITCONSTD = (cpuclock / 1193182.0); - PITCONST = (uint64_t) (PITCONSTD * (double)(1ull << 32)); - CGACONST = (uint64_t) (((cpuclock/(19687503.0/11.0)) * (double)(1ull << 32))); - } + if (cpuclock == 28636368.0) { + PITCONSTD = 24.0; + PITCONST = (24ULL << 32LL); + CGACONST = (16ULL << 32LL); + } else if (cpuclock != 14318184.0) { + PITCONSTD = (cpuclock / 1193182.0); + PITCONST = (uint64_t) (PITCONSTD * (double) (1ull << 32)); + CGACONST = (uint64_t) (((cpuclock / (19687503.0 / 11.0)) * (double) (1ull << 32))); + } - ISACONST = (1ULL << 32ULL); + ISACONST = (1ULL << 32ULL); } xt_cpu_multi <<= 32ULL; /* Delay for empty I/O ports. */ io_delay = (int) round(((double) cpu_s->rspeed) / 3000000.0); - MDACONST = (uint64_t) (cpuclock / 2032125.0 * (double)(1ull << 32)); + MDACONST = (uint64_t) (cpuclock / 2032125.0 * (double) (1ull << 32)); HERCCONST = MDACONST; - VGACONST1 = (uint64_t) (cpuclock / 25175000.0 * (double)(1ull << 32)); - VGACONST2 = (uint64_t) (cpuclock / 28322000.0 * (double)(1ull << 32)); - RTCCONST = (uint64_t) (cpuclock / 32768.0 * (double)(1ull << 32)); + VGACONST1 = (uint64_t) (cpuclock / 25175000.0 * (double) (1ull << 32)); + VGACONST2 = (uint64_t) (cpuclock / 28322000.0 * (double) (1ull << 32)); + RTCCONST = (uint64_t) (cpuclock / 32768.0 * (double) (1ull << 32)); - TIMER_USEC = (uint64_t)((cpuclock / 1000000.0) * (double)(1ull << 32)); + TIMER_USEC = (uint64_t) ((cpuclock / 1000000.0) * (double) (1ull << 32)); - isa_timing = (cpuclock / (double)cpu_isa_speed); + isa_timing = (cpuclock / (double) cpu_isa_speed); if (cpu_64bitbus) - bus_timing = (cpuclock / ((double)cpu_busspeed / 2)); + bus_timing = (cpuclock / ((double) cpu_busspeed / 2)); else - bus_timing = (cpuclock / (double)cpu_busspeed); - pci_timing = (cpuclock / (double)cpu_pci_speed); - agp_timing = (cpuclock / (double)cpu_agp_speed); + bus_timing = (cpuclock / (double) cpu_busspeed); + pci_timing = (cpuclock / (double) cpu_pci_speed); + agp_timing = (cpuclock / (double) cpu_agp_speed); /* PCICLK in us for use with timer_on_auto(). */ PCICLK = pci_timing / (cpuclock / 1000000.0); AGPCLK = agp_timing / (cpuclock / 1000000.0); if (cpu_busspeed >= 30000000) - SYSCLK = bus_timing * 4.0; + SYSCLK = bus_timing * 4.0; else - SYSCLK = bus_timing * 3.0; + SYSCLK = bus_timing * 3.0; video_update_timing(); diff --git a/src/pit_fast.c b/src/pit_fast.c index 758183d5e..d029cf3ee 100644 --- a/src/pit_fast.c +++ b/src/pit_fast.c @@ -41,10 +41,10 @@ #include <86box/snd_speaker.h> #include <86box/video.h> -#define PIT_PS2 16 /* The PIT is the PS/2's second PIT. */ -#define PIT_EXT_IO 32 /* The PIT has externally specified port I/O. */ -#define PIT_CUSTOM_CLOCK 64 /* The PIT uses custom clock inputs provided by another provider. */ -#define PIT_SECONDARY 128 /* The PIT is secondary (ports 0048-004B). */ +#define PIT_PS2 16 /* The PIT is the PS/2's second PIT. */ +#define PIT_EXT_IO 32 /* The PIT has externally specified port I/O. */ +#define PIT_CUSTOM_CLOCK 64 /* The PIT uses custom clock inputs provided by another provider. */ +#define PIT_SECONDARY 128 /* The PIT is secondary (ports 0048-004B). */ #ifdef ENABLE_PIT_LOG int pit_do_log = ENABLE_PIT_LOG; @@ -61,7 +61,7 @@ pit_log(const char *fmt, ...) } } #else -#define pit_log(fmt, ...) +# define pit_log(fmt, ...) #endif static void @@ -81,7 +81,7 @@ pitf_ctr_set_load_func(void *data, int counter_id, void (*func)(uint8_t new_m, i if (data == NULL) return; - pitf_t *pit = (pitf_t *)data; + pitf_t *pit = (pitf_t *) data; ctrf_t *ctr = &pit->counters[counter_id]; ctr->load_func = func; @@ -90,7 +90,7 @@ pitf_ctr_set_load_func(void *data, int counter_id, void (*func)(uint8_t new_m, i static uint16_t pitf_ctr_get_count(void *data, int counter_id) { - pitf_t *pit = (pitf_t *)data; + pitf_t *pit = (pitf_t *) data; ctrf_t *ctr = &pit->counters[counter_id]; return (uint16_t) ctr->l; } @@ -101,7 +101,7 @@ pitf_ctr_set_out_func(void *data, int counter_id, void (*func)(int new_out, int if (data == NULL) return; - pitf_t *pit = (pitf_t *)data; + pitf_t *pit = (pitf_t *) data; ctrf_t *ctr = &pit->counters[counter_id]; ctr->out_func = func; @@ -113,8 +113,8 @@ pitf_ctr_set_using_timer(void *data, int counter_id, int using_timer) if (tsc > 0) timer_process(); - pitf_t *pit = (pitf_t *)data; - ctrf_t *ctr = &pit->counters[counter_id]; + pitf_t *pit = (pitf_t *) data; + ctrf_t *ctr = &pit->counters[counter_id]; ctr->using_timer = using_timer; } @@ -266,7 +266,7 @@ pitf_set_gate_no_timer(ctrf_t *ctr, int gate) ctr->enabled = gate; break; } - ctr->gate = gate; + ctr->gate = gate; ctr->running = ctr->enabled && ctr->using_timer && !ctr->disabled; if (ctr->using_timer && !ctr->running) pitf_dump_and_disable_timer(ctr); @@ -275,7 +275,7 @@ pitf_set_gate_no_timer(ctrf_t *ctr, int gate) static void pitf_ctr_set_gate(void *data, int counter_id, int gate) { - pitf_t *pit = (pitf_t *)data; + pitf_t *pit = (pitf_t *) data; ctrf_t *ctr = &pit->counters[counter_id]; if (ctr->disabled) { @@ -375,7 +375,7 @@ pitf_ctr_latch_count(ctrf_t *ctr) static __inline void pitf_ctr_latch_status(ctrf_t *ctr) { - ctr->read_status = (ctr->ctrl & 0x3f) | (ctr->out ? 0x80 : 0); + ctr->read_status = (ctr->ctrl & 0x3f) | (ctr->out ? 0x80 : 0); ctr->do_read_status = 1; } @@ -383,7 +383,7 @@ static void pitf_write(uint16_t addr, uint8_t val, void *priv) { pitf_t *dev = (pitf_t *) priv; - int t = (addr & 3); + int t = (addr & 3); ctrf_t *ctr; pit_log("[%04X:%08X] pit_write(%04X, %02X, %08X)\n", CS, cpu_state.pc, addr, val, priv); @@ -479,10 +479,10 @@ pitf_write(uint16_t addr, uint8_t val, void *priv) static uint8_t pitf_read(uint16_t addr, void *priv) { - pitf_t *dev = (pitf_t *) priv; + pitf_t *dev = (pitf_t *) priv; uint8_t ret = 0xff; int t = (addr & 3); - ctrf_t *ctr; + ctrf_t *ctr; switch (addr & 3) { case 3: /* Control. */ @@ -548,7 +548,7 @@ pitf_timer_over(void *p) static void pitf_ctr_clock(void *data, int counter_id) { - pitf_t *pit = (pitf_t *)data; + pitf_t *pit = (pitf_t *) data; ctrf_t *ctr = &pit->counters[counter_id]; if (ctr->thit || !ctr->enabled) @@ -565,11 +565,11 @@ pitf_ctr_clock(void *data, int counter_id) static void ctr_reset(ctrf_t *ctr) { - ctr->ctrl = 0; - ctr->m = 0; - ctr->gate = 0; - ctr->l = 0xffff; - ctr->thit = 1; + ctr->ctrl = 0; + ctr->m = 0; + ctr->gate = 0; + ctr->l = 0xffff; + ctr->thit = 1; ctr->using_timer = 1; } @@ -613,7 +613,7 @@ pitf_init(const device_t *info) if (!(dev->flags & PIT_PS2) && !(dev->flags & PIT_CUSTOM_CLOCK)) { for (int i = 0; i < 3; i++) { ctrf_t *ctr = &dev->counters[i]; - timer_add(&ctr->timer, pitf_timer_over, (void *)ctr, 0); + timer_add(&ctr->timer, pitf_timer_over, (void *) ctr, 0); } } @@ -626,73 +626,73 @@ pitf_init(const device_t *info) } const device_t i8253_fast_device = { - .name = "Intel 8253/8253-5 Programmable Interval Timer", + .name = "Intel 8253/8253-5 Programmable Interval Timer", .internal_name = "i8253_fast", - .flags = DEVICE_ISA, - .local = PIT_8253, - .init = pitf_init, - .close = pitf_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8253, + .init = pitf_init, + .close = pitf_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i8254_fast_device = { - .name = "Intel 8254 Programmable Interval Timer", + .name = "Intel 8254 Programmable Interval Timer", .internal_name = "i8254_fast", - .flags = DEVICE_ISA, - .local = PIT_8254, - .init = pitf_init, - .close = pitf_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8254, + .init = pitf_init, + .close = pitf_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i8254_sec_fast_device = { - .name = "Intel 8254 Programmable Interval Timer (Secondary)", + .name = "Intel 8254 Programmable Interval Timer (Secondary)", .internal_name = "i8254_sec_fast", - .flags = DEVICE_ISA, - .local = PIT_8254 | PIT_SECONDARY, - .init = pitf_init, - .close = pitf_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8254 | PIT_SECONDARY, + .init = pitf_init, + .close = pitf_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i8254_ext_io_fast_device = { - .name = "Intel 8254 Programmable Interval Timer (External I/O)", + .name = "Intel 8254 Programmable Interval Timer (External I/O)", .internal_name = "i8254_ext_io_fast", - .flags = DEVICE_ISA, - .local = PIT_8254 | PIT_EXT_IO, - .init = pitf_init, - .close = pitf_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8254 | PIT_EXT_IO, + .init = pitf_init, + .close = pitf_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t i8254_ps2_fast_device = { - .name = "Intel 8254 Programmable Interval Timer (PS/2)", + .name = "Intel 8254 Programmable Interval Timer (PS/2)", .internal_name = "i8254_ps2_fast", - .flags = DEVICE_ISA, - .local = PIT_8254 | PIT_PS2 | PIT_EXT_IO, - .init = pitf_init, - .close = pitf_close, - .reset = NULL, + .flags = DEVICE_ISA, + .local = PIT_8254 | PIT_PS2 | PIT_EXT_IO, + .init = pitf_init, + .close = pitf_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const pit_intf_t pit_fast_intf = { diff --git a/src/port_6x.c b/src/port_6x.c index 0fe168a3c..a825b643c 100644 --- a/src/port_6x.c +++ b/src/port_6x.c @@ -35,14 +35,12 @@ #include <86box/video.h> #include <86box/port_6x.h> +#define PS2_REFRESH_TIME (16 * TIMER_USEC) -#define PS2_REFRESH_TIME (16 * TIMER_USEC) - -#define PORT_6X_TURBO 1 -#define PORT_6X_EXT_REF 2 -#define PORT_6X_MIRROR 4 -#define PORT_6X_SWA 8 - +#define PORT_6X_TURBO 1 +#define PORT_6X_EXT_REF 2 +#define PORT_6X_MIRROR 4 +#define PORT_6X_SWA 8 static void port_6x_write(uint16_t port, uint8_t val, void *priv) @@ -52,22 +50,22 @@ port_6x_write(uint16_t port, uint8_t val, void *priv) port &= 3; if ((port == 3) && (dev->flags & PORT_6X_MIRROR)) - port = 1; + port = 1; switch (port) { - case 1: - ppi.pb = (ppi.pb & 0x10) | (val & 0x0f); + case 1: + ppi.pb = (ppi.pb & 0x10) | (val & 0x0f); - speaker_update(); - speaker_gated = val & 1; - speaker_enable = val & 2; - if (speaker_enable) - was_speaker_enable = 1; - pit_devs[0].set_gate(pit_devs[0].data, 2, val & 1); + speaker_update(); + speaker_gated = val & 1; + speaker_enable = val & 2; + if (speaker_enable) + was_speaker_enable = 1; + pit_devs[0].set_gate(pit_devs[0].data, 2, val & 1); - if (dev->flags & PORT_6X_TURBO) - xi8088_turbo_set(!!(val & 0x04)); - break; + if (dev->flags & PORT_6X_TURBO) + xi8088_turbo_set(!!(val & 0x04)); + break; } } @@ -79,14 +77,14 @@ port_61_read_simple(uint16_t port, void *priv) if (ppispeakon) ret |= 0x20; - return(ret); + return (ret); } static uint8_t port_61_read(uint16_t port, void *priv) { port_6x_t *dev = (port_6x_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; if (dev->flags & PORT_6X_EXT_REF) { ret = ppi.pb & 0x0f; @@ -102,7 +100,7 @@ port_61_read(uint16_t port, void *priv) if (dev->flags & PORT_6X_TURBO) ret = (ret & 0xfb) | (xi8088_turbo_get() ? 0x04 : 0x00); - return(ret); + return (ret); } static uint8_t @@ -138,7 +136,7 @@ port_62_read(uint16_t port, void *priv) ret |= 0x02; } - return(ret); + return (ret); } static void @@ -150,7 +148,6 @@ port_6x_refresh(void *priv) timer_advance_u64(&dev->refresh_timer, PS2_REFRESH_TIME); } - static void port_6x_close(void *priv) { @@ -161,7 +158,6 @@ port_6x_close(void *priv) free(dev); } - void * port_6x_init(const device_t *info) { @@ -173,16 +169,16 @@ port_6x_init(const device_t *info) if (dev->flags & (PORT_6X_TURBO | PORT_6X_EXT_REF)) { io_sethandler(0x0061, 1, port_61_read, NULL, NULL, port_6x_write, NULL, NULL, dev); - if (dev->flags & PORT_6X_EXT_REF) - timer_add(&dev->refresh_timer, port_6x_refresh, dev, 1); + if (dev->flags & PORT_6X_EXT_REF) + timer_add(&dev->refresh_timer, port_6x_refresh, dev, 1); - if (dev->flags & PORT_6X_MIRROR) - io_sethandler(0x0063, 1, port_61_read, NULL, NULL, port_6x_write, NULL, NULL, dev); + if (dev->flags & PORT_6X_MIRROR) + io_sethandler(0x0063, 1, port_61_read, NULL, NULL, port_6x_write, NULL, NULL, dev); } else { io_sethandler(0x0061, 1, port_61_read_simple, NULL, NULL, port_6x_write, NULL, NULL, dev); - if (dev->flags & PORT_6X_MIRROR) - io_sethandler(0x0063, 1, port_61_read_simple, NULL, NULL, port_6x_write, NULL, NULL, dev); + if (dev->flags & PORT_6X_MIRROR) + io_sethandler(0x0063, 1, port_61_read_simple, NULL, NULL, port_6x_write, NULL, NULL, dev); } if (dev->flags & PORT_6X_SWA) @@ -192,57 +188,57 @@ port_6x_init(const device_t *info) } const device_t port_6x_device = { - .name = "Port 6x Registers", + .name = "Port 6x Registers", .internal_name = "port_6x", - .flags = 0, - .local = 0, - .init = port_6x_init, - .close = port_6x_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = port_6x_init, + .close = port_6x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t port_6x_xi8088_device = { - .name = "Port 6x Registers (Xi8088)", + .name = "Port 6x Registers (Xi8088)", .internal_name = "port_6x_xi8088", - .flags = 0, - .local = PORT_6X_TURBO | PORT_6X_EXT_REF | PORT_6X_MIRROR, - .init = port_6x_init, - .close = port_6x_close, - .reset = NULL, + .flags = 0, + .local = PORT_6X_TURBO | PORT_6X_EXT_REF | PORT_6X_MIRROR, + .init = port_6x_init, + .close = port_6x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t port_6x_ps2_device = { - .name = "Port 6x Registers (IBM PS/2)", + .name = "Port 6x Registers (IBM PS/2)", .internal_name = "port_6x_ps2", - .flags = 0, - .local = PORT_6X_EXT_REF, - .init = port_6x_init, - .close = port_6x_close, - .reset = NULL, + .flags = 0, + .local = PORT_6X_EXT_REF, + .init = port_6x_init, + .close = port_6x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t port_6x_olivetti_device = { - .name = "Port 6x Registers (Olivetti)", + .name = "Port 6x Registers (Olivetti)", .internal_name = "port_6x_olivetti", - .flags = 0, - .local = PORT_6X_SWA, - .init = port_6x_init, - .close = port_6x_close, - .reset = NULL, + .flags = 0, + .local = PORT_6X_SWA, + .init = port_6x_init, + .close = port_6x_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/port_92.c b/src/port_92.c index c4c421f53..898f46c98 100644 --- a/src/port_92.c +++ b/src/port_92.c @@ -30,50 +30,45 @@ #include <86box/pit.h> #include <86box/port_92.h> - -#define PORT_92_INV 1 -#define PORT_92_WORD 2 -#define PORT_92_PCI 4 -#define PORT_92_RESET 8 -#define PORT_92_A20 16 - +#define PORT_92_INV 1 +#define PORT_92_WORD 2 +#define PORT_92_PCI 4 +#define PORT_92_RESET 8 +#define PORT_92_A20 16 static uint8_t port_92_readb(uint16_t port, void *priv) { - uint8_t ret = 0x00; + uint8_t ret = 0x00; port_92_t *dev = (port_92_t *) priv; if (port == 0x92) { - /* Return bit 1 directly from mem_a20_alt, so the - pin can be reset independently of the device. */ - ret = (dev->reg & ~0x03) | (mem_a20_alt & 2) | - (cpu_alt_reset & 1); + /* Return bit 1 directly from mem_a20_alt, so the + pin can be reset independently of the device. */ + ret = (dev->reg & ~0x03) | (mem_a20_alt & 2) | (cpu_alt_reset & 1); - if (dev->flags & PORT_92_INV) - ret |= 0xfc; - else if (dev->flags & PORT_92_PCI) - ret |= 0x24; /* Intel SIO datasheet says bits 2 and 5 are always 1. */ + if (dev->flags & PORT_92_INV) + ret |= 0xfc; + else if (dev->flags & PORT_92_PCI) + ret |= 0x24; /* Intel SIO datasheet says bits 2 and 5 are always 1. */ } else if (dev->flags & PORT_92_INV) - ret = 0xff; + ret = 0xff; return ret; } - static uint16_t port_92_readw(uint16_t port, void *priv) { - uint16_t ret = 0xffff; + uint16_t ret = 0xffff; port_92_t *dev = (port_92_t *) priv; if (!(dev->flags & PORT_92_PCI)) - ret = port_92_readb(port, priv); + ret = port_92_readb(port, priv); return ret; } - static void port_92_pulse(void *priv) { @@ -81,44 +76,41 @@ port_92_pulse(void *priv) cpu_set_edx(); } - static void port_92_writeb(uint16_t port, uint8_t val, void *priv) { port_92_t *dev = (port_92_t *) priv; if (port != 0x92) - return; + return; dev->reg = val & 0x03; if ((mem_a20_alt ^ val) & 2) { - mem_a20_alt = (val & 2); - mem_a20_recalc(); + mem_a20_alt = (val & 2); + mem_a20_recalc(); } if ((~cpu_alt_reset & val) & 1) - timer_set_delay_u64(&dev->pulse_timer, dev->pulse_period); + timer_set_delay_u64(&dev->pulse_timer, dev->pulse_period); else if (!(val & 1)) - timer_disable(&dev->pulse_timer); + timer_disable(&dev->pulse_timer); cpu_alt_reset = (val & 1); if (dev->flags & PORT_92_INV) - dev->reg |= 0xfc; + dev->reg |= 0xfc; } - static void port_92_writew(uint16_t port, uint16_t val, void *priv) { port_92_t *dev = (port_92_t *) priv; if (!(dev->flags & PORT_92_PCI)) - port_92_writeb(port, val & 0xff, priv); + port_92_writeb(port, val & 0xff, priv); } - void port_92_set_period(void *priv, uint64_t pulse_period) { @@ -127,7 +119,6 @@ port_92_set_period(void *priv, uint64_t pulse_period) dev->pulse_period = pulse_period; } - void port_92_set_features(void *priv, int reset, int a20) { @@ -136,48 +127,45 @@ port_92_set_features(void *priv, int reset, int a20) dev->flags &= ~(PORT_92_RESET | PORT_92_A20); if (reset) - dev->flags |= PORT_92_RESET; + dev->flags |= PORT_92_RESET; timer_disable(&dev->pulse_timer); if (a20) { - dev->flags |= PORT_92_A20; - mem_a20_alt = (dev->reg & 2); + dev->flags |= PORT_92_A20; + mem_a20_alt = (dev->reg & 2); } else - mem_a20_alt = 0; + mem_a20_alt = 0; mem_a20_recalc(); } - void port_92_add(void *priv) { port_92_t *dev = (port_92_t *) priv; if (dev->flags & (PORT_92_WORD | PORT_92_PCI)) - io_sethandler(0x0092, 2, - port_92_readb, port_92_readw, NULL, port_92_writeb, port_92_writew, NULL, dev); + io_sethandler(0x0092, 2, + port_92_readb, port_92_readw, NULL, port_92_writeb, port_92_writew, NULL, dev); else - io_sethandler(0x0092, 1, - port_92_readb, NULL, NULL, port_92_writeb, NULL, NULL, dev); + io_sethandler(0x0092, 1, + port_92_readb, NULL, NULL, port_92_writeb, NULL, NULL, dev); } - void port_92_remove(void *priv) { port_92_t *dev = (port_92_t *) priv; if (dev->flags & (PORT_92_WORD | PORT_92_PCI)) - io_removehandler(0x0092, 2, - port_92_readb, port_92_readw, NULL, port_92_writeb, port_92_writew, NULL, dev); + io_removehandler(0x0092, 2, + port_92_readb, port_92_readw, NULL, port_92_writeb, port_92_writew, NULL, dev); else - io_removehandler(0x0092, 1, - port_92_readb, NULL, NULL, port_92_writeb, NULL, NULL, dev); + io_removehandler(0x0092, 1, + port_92_readb, NULL, NULL, port_92_writeb, NULL, NULL, dev); } - static void port_92_close(void *priv) { @@ -188,7 +176,6 @@ port_92_close(void *priv) free(dev); } - void * port_92_init(const device_t *info) { @@ -199,7 +186,7 @@ port_92_init(const device_t *info) timer_add(&dev->pulse_timer, port_92_pulse, dev, 0); - dev->reg = 0; + dev->reg = 0; mem_a20_alt = 0; mem_a20_recalc(); @@ -209,7 +196,7 @@ port_92_init(const device_t *info) port_92_add(dev); - dev->pulse_period = (uint64_t) (4.0 * SYSCLK * (double)(1ULL << 32ULL)); + dev->pulse_period = (uint64_t) (4.0 * SYSCLK * (double) (1ULL << 32ULL)); dev->flags |= (PORT_92_RESET | PORT_92_A20); @@ -217,57 +204,57 @@ port_92_init(const device_t *info) } const device_t port_92_device = { - .name = "Port 92 Register", + .name = "Port 92 Register", .internal_name = "port_92", - .flags = 0, - .local = 0, - .init = port_92_init, - .close = port_92_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = port_92_init, + .close = port_92_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t port_92_inv_device = { - .name = "Port 92 Register (inverted bits 2-7)", + .name = "Port 92 Register (inverted bits 2-7)", .internal_name = "port_92_inv", - .flags = 0, - .local = PORT_92_INV, - .init = port_92_init, - .close = port_92_close, - .reset = NULL, + .flags = 0, + .local = PORT_92_INV, + .init = port_92_init, + .close = port_92_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t port_92_word_device = { - .name = "Port 92 Register (16-bit)", + .name = "Port 92 Register (16-bit)", .internal_name = "port_92_word", - .flags = 0, - .local = PORT_92_WORD, - .init = port_92_init, - .close = port_92_close, - .reset = NULL, + .flags = 0, + .local = PORT_92_WORD, + .init = port_92_init, + .close = port_92_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t port_92_pci_device = { - .name = "Port 92 Register (PCI)", + .name = "Port 92 Register (PCI)", .internal_name = "port_92_pci", - .flags = 0, - .local = PORT_92_PCI, - .init = port_92_init, - .close = port_92_close, - .reset = NULL, + .flags = 0, + .local = PORT_92_PCI, + .init = port_92_init, + .close = port_92_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/ppi.c b/src/ppi.c index c70d01ece..54ac8d037 100644 --- a/src/ppi.c +++ b/src/ppi.c @@ -15,11 +15,9 @@ #include <86box/pit.h> #include <86box/ppi.h> - PPI ppi; int ppispeakon; - void ppi_reset(void) { diff --git a/src/random.c b/src/random.c index fb1fead52..9deea1f56 100644 --- a/src/random.c +++ b/src/random.c @@ -18,79 +18,83 @@ #include #include <86box/random.h> -#if !(defined(__i386__) || defined (__x86_64__)) -#include +#if !(defined(__i386__) || defined(__x86_64__)) +# include #endif uint32_t preconst = 0x6ED9EBA1; - -static __inline uint32_t rotl32c (uint32_t x, uint32_t n) +static __inline uint32_t +rotl32c(uint32_t x, uint32_t n) { #if 0 assert (n<32); #endif - return (x<>(-n&31)); + return (x << n) | (x >> (-n & 31)); } -static __inline uint32_t rotr32c (uint32_t x, uint32_t n) +static __inline uint32_t +rotr32c(uint32_t x, uint32_t n) { #if 0 assert (n<32); #endif - return (x>>n) | (x<<(-n&31)); + return (x >> n) | (x << (-n & 31)); } -#define ROTATE_LEFT rotl32c +#define ROTATE_LEFT rotl32c #define ROTATE_RIGHT rotr32c -static __inline unsigned long long rdtsc(void) +static __inline unsigned long long +rdtsc(void) { -#if defined(__i386__) || defined (__x86_64__) +#if defined(__i386__) || defined(__x86_64__) unsigned hi, lo; -#ifdef _MSC_VER +# ifdef _MSC_VER __asm { rdtsc mov hi, edx ; EDX:EAX is already standard return!! mov lo, eax } +# else + __asm__ __volatile__("rdtsc" + : "=a"(lo), "=d"(hi)); +# endif + return ((unsigned long long) lo) | (((unsigned long long) hi) << 32); #else - __asm__ __volatile__ ("rdtsc" : "=a"(lo), "=d"(hi)); -#endif - return ( (unsigned long long)lo)|( ((unsigned long long)hi)<<32 ); -#else - return time(NULL); + return time(NULL); #endif } -static uint32_t RDTSC(void) +static uint32_t +RDTSC(void) { - return (uint32_t) (rdtsc()); + return (uint32_t) (rdtsc()); } - -static void random_twist(uint32_t *val) +static void +random_twist(uint32_t *val) { - *val = ROTATE_LEFT(*val, rand() % 32); - *val ^= 0x5A827999; - *val = ROTATE_RIGHT(*val, rand() % 32); - *val ^= 0x4ED32706; + *val = ROTATE_LEFT(*val, rand() % 32); + *val ^= 0x5A827999; + *val = ROTATE_RIGHT(*val, rand() % 32); + *val ^= 0x4ED32706; } - -uint8_t random_generate(void) +uint8_t +random_generate(void) { - uint16_t r = 0; - r = (RDTSC() ^ ROTATE_LEFT(preconst, rand() % 32)) % 256; - random_twist(&preconst); - return (r & 0xff); + uint16_t r = 0; + r = (RDTSC() ^ ROTATE_LEFT(preconst, rand() % 32)) % 256; + random_twist(&preconst); + return (r & 0xff); } - -void random_init(void) +void +random_init(void) { - uint32_t seed = RDTSC(); - srand(seed); - return; + uint32_t seed = RDTSC(); + srand(seed); + return; } diff --git a/src/thread.cpp b/src/thread.cpp index 67bf8d5e6..1b4311f37 100644 --- a/src/thread.cpp +++ b/src/thread.cpp @@ -5,11 +5,10 @@ #include <86box/plat.h> #include <86box/thread.h> -struct event_cpp11_t -{ +struct event_cpp11_t { std::condition_variable cond; - std::mutex mutex; - bool state = false; + std::mutex mutex; + bool state = false; }; extern "C" { @@ -18,7 +17,7 @@ thread_t * thread_create(void (*thread_rout)(void *param), void *param) { auto thread = new std::thread([thread_rout, param] { - thread_rout(param); + thread_rout(param); }); return thread; } @@ -26,8 +25,9 @@ thread_create(void (*thread_rout)(void *param), void *param) int thread_wait(thread_t *arg) { - if (!arg) return 0; - auto thread = reinterpret_cast(arg); + if (!arg) + return 0; + auto thread = reinterpret_cast(arg); thread->join(); return 0; } @@ -43,9 +43,9 @@ int thread_test_mutex(mutex_t *_mutex) { if (_mutex == nullptr) - return 0; + return 0; - auto mutex = reinterpret_cast(_mutex); + auto mutex = reinterpret_cast(_mutex); return mutex->try_lock() ? 1 : 0; } @@ -53,30 +53,28 @@ int thread_wait_mutex(mutex_t *_mutex) { if (_mutex == nullptr) - return 0; + return 0; - auto mutex = reinterpret_cast(_mutex); + auto mutex = reinterpret_cast(_mutex); mutex->lock(); return 1; } - int thread_release_mutex(mutex_t *_mutex) { if (_mutex == nullptr) - return 0; + return 0; - auto mutex = reinterpret_cast(_mutex); + auto mutex = reinterpret_cast(_mutex); mutex->unlock(); return 1; } - void thread_close_mutex(mutex_t *_mutex) { - auto mutex = reinterpret_cast(_mutex); + auto mutex = reinterpret_cast(_mutex); delete mutex; } @@ -90,13 +88,13 @@ thread_create_event() int thread_wait_event(event_t *handle, int timeout) { - auto event = reinterpret_cast(handle); - auto lock = std::unique_lock(event->mutex); + auto event = reinterpret_cast(handle); + auto lock = std::unique_lock(event->mutex); if (timeout < 0) { event->cond.wait(lock, [event] { return event->state; }); } else { - auto to = std::chrono::system_clock::now() + std::chrono::milliseconds(timeout); + auto to = std::chrono::system_clock::now() + std::chrono::milliseconds(timeout); std::cv_status status; do { @@ -113,9 +111,9 @@ thread_wait_event(event_t *handle, int timeout) void thread_set_event(event_t *handle) { - auto event = reinterpret_cast(handle); + auto event = reinterpret_cast(handle); { - auto lock = std::unique_lock(event->mutex); + auto lock = std::unique_lock(event->mutex); event->state = true; } event->cond.notify_all(); @@ -124,16 +122,15 @@ thread_set_event(event_t *handle) void thread_reset_event(event_t *handle) { - auto event = reinterpret_cast(handle); - auto lock = std::unique_lock(event->mutex); + auto event = reinterpret_cast(handle); + auto lock = std::unique_lock(event->mutex); event->state = false; } void thread_destroy_event(event_t *handle) { - auto event = reinterpret_cast(handle); + auto event = reinterpret_cast(handle); delete event; } - } diff --git a/src/timer.c b/src/timer.c index f8e17be2e..7a6600fc3 100644 --- a/src/timer.c +++ b/src/timer.c @@ -5,7 +5,6 @@ #include <86box/86box.h> #include <86box/timer.h> - uint64_t TIMER_USEC; uint32_t timer_target; @@ -16,29 +15,28 @@ pc_timer_t *timer_head = NULL; /* Are we initialized? */ int timer_inited = 0; - void timer_enable(pc_timer_t *timer) { pc_timer_t *timer_node = timer_head; if (!timer_inited || (timer == NULL)) - return; + return; if (timer->flags & TIMER_ENABLED) - timer_disable(timer); + timer_disable(timer); if (timer->next || timer->prev) - fatal("timer_enable - timer->next\n"); + fatal("timer_enable - timer->next\n"); timer->flags |= TIMER_ENABLED; /*List currently empty - add to head*/ if (!timer_head) { - timer_head = timer; - timer->next = timer->prev = NULL; - timer_target = timer_head->ts.ts32.integer; - return; + timer_head = timer; + timer->next = timer->prev = NULL; + timer_target = timer_head->ts.ts32.integer; + return; } if (TIMER_LESS_THAN(timer, timer_head)) { @@ -57,83 +55,80 @@ timer_enable(pc_timer_t *timer) } pc_timer_t *prev = timer_head; - timer_node = timer_head->next; + timer_node = timer_head->next; - while(1) { - /*Timer expires before timer_node. Add to list in front of timer_node*/ - if (TIMER_LESS_THAN(timer, timer_node)) { - timer->next = timer_node; - timer->prev = prev; - timer_node->prev = timer; - prev->next = timer; - return; - } + while (1) { + /*Timer expires before timer_node. Add to list in front of timer_node*/ + if (TIMER_LESS_THAN(timer, timer_node)) { + timer->next = timer_node; + timer->prev = prev; + timer_node->prev = timer; + prev->next = timer; + return; + } - /*timer_node is last in the list. Add timer to end of list*/ - if (!timer_node->next) { - timer_node->next = timer; - timer->prev = timer_node; - return; - } + /*timer_node is last in the list. Add timer to end of list*/ + if (!timer_node->next) { + timer_node->next = timer; + timer->prev = timer_node; + return; + } - prev = timer_node; - timer_node = timer_node->next; + prev = timer_node; + timer_node = timer_node->next; } } - void timer_disable(pc_timer_t *timer) { if (!timer_inited || (timer == NULL) || !(timer->flags & TIMER_ENABLED)) - return; + return; if (!timer->next && !timer->prev && timer != timer_head) - fatal("timer_disable - !timer->next\n"); + fatal("timer_disable - !timer->next\n"); timer->flags &= ~TIMER_ENABLED; if (timer->prev) - timer->prev->next = timer->next; + timer->prev->next = timer->next; else - timer_head = timer->next; + timer_head = timer->next; if (timer->next) - timer->next->prev = timer->prev; + timer->next->prev = timer->prev; timer->prev = timer->next = NULL; } - void timer_process(void) { pc_timer_t *timer; if (!timer_head) - return; + return; - while(1) { - timer = timer_head; + while (1) { + timer = timer_head; - if (!TIMER_LESS_THAN_VAL(timer, (uint32_t)tsc)) - break; + if (!TIMER_LESS_THAN_VAL(timer, (uint32_t) tsc)) + break; - timer_head = timer->next; - if (timer_head) - timer_head->prev = NULL; + timer_head = timer->next; + if (timer_head) + timer_head->prev = NULL; - timer->next = timer->prev = NULL; - timer->flags &= ~TIMER_ENABLED; + timer->next = timer->prev = NULL; + timer->flags &= ~TIMER_ENABLED; - if (timer->flags & TIMER_SPLIT) - timer_advance_ex(timer, 0); /* We're splitting a > 1 s period into multiple <= 1 s periods. */ - else if (timer->callback != NULL) /* Make sure it's no NULL, so that we can have a NULL callback when no operation is needed. */ - timer->callback(timer->p); + if (timer->flags & TIMER_SPLIT) + timer_advance_ex(timer, 0); /* We're splitting a > 1 s period into multiple <= 1 s periods. */ + else if (timer->callback != NULL) /* Make sure it's no NULL, so that we can have a NULL callback when no operation is needed. */ + timer->callback(timer->p); } timer_target = timer_head->ts.ts32.integer; } - void timer_close(void) { @@ -143,9 +138,9 @@ timer_close(void) timers that are not in malloc'd structs don't keep pointing to timers that may be in malloc'd structs. */ while (t != NULL) { - r = t; - r->prev = r->next = NULL; - t = r->next; + r = t; + r->prev = r->next = NULL; + t = r->next; } timer_head = NULL; @@ -153,97 +148,90 @@ timer_close(void) timer_inited = 0; } - void timer_init(void) { timer_target = 0ULL; - tsc = 0; + tsc = 0; timer_inited = 1; } - void timer_add(pc_timer_t *timer, void (*callback)(void *p), void *p, int start_timer) { memset(timer, 0, sizeof(pc_timer_t)); timer->callback = callback; - timer->p = p; - timer->flags = 0; + timer->p = p; + timer->flags = 0; timer->prev = timer->next = NULL; if (start_timer) - timer_set_delay_u64(timer, 0); + timer_set_delay_u64(timer, 0); } - /* The API for big timer periods starts here. */ void timer_stop(pc_timer_t *timer) { if (!timer_inited || (timer == NULL)) - return; + return; timer->period = 0.0; timer_disable(timer); timer->flags &= ~TIMER_SPLIT; } - static void timer_do_period(pc_timer_t *timer, uint64_t period, int start) { if (!timer_inited || (timer == NULL)) - return; + return; if (start) - timer_set_delay_u64(timer, period); + timer_set_delay_u64(timer, period); else - timer_advance_u64(timer, period); + timer_advance_u64(timer, period); } - void timer_advance_ex(pc_timer_t *timer, int start) { if (!timer_inited || (timer == NULL)) - return; + return; if (timer->period > MAX_USEC) { - timer_do_period(timer, MAX_USEC64 * TIMER_USEC, start); - timer->period -= MAX_USEC; - timer->flags |= TIMER_SPLIT; + timer_do_period(timer, MAX_USEC64 * TIMER_USEC, start); + timer->period -= MAX_USEC; + timer->flags |= TIMER_SPLIT; } else { - if (timer->period > 0.0) - timer_do_period(timer, (uint64_t) (timer->period * ((double) TIMER_USEC)), start); - else - timer_disable(timer); - timer->period = 0.0; - timer->flags &= ~TIMER_SPLIT; + if (timer->period > 0.0) + timer_do_period(timer, (uint64_t) (timer->period * ((double) TIMER_USEC)), start); + else + timer_disable(timer); + timer->period = 0.0; + timer->flags &= ~TIMER_SPLIT; } } - void timer_on(pc_timer_t *timer, double period, int start) { if (!timer_inited || (timer == NULL)) - return; + return; timer->period = period; timer_advance_ex(timer, start); } - void timer_on_auto(pc_timer_t *timer, double period) { if (!timer_inited || (timer == NULL)) - return; + return; if (period > 0.0) - timer_on(timer, period, (timer->period == 0.0)); + timer_on(timer, period, (timer->period == 0.0)); else - timer_stop(timer); + timer_stop(timer); } diff --git a/src/upi42.c b/src/upi42.c index 8b8e4b72e..eb0a46e1c 100644 --- a/src/upi42.c +++ b/src/upi42.c @@ -31,18 +31,16 @@ fflush(stdout); \ } #else -#include -#define HAVE_STDARG_H -#include <86box/86box.h> -#include <86box/device.h> -#include <86box/io.h> -#include <86box/timer.h> +# include +# define HAVE_STDARG_H +# include <86box/86box.h> +# include <86box/device.h> +# include <86box/io.h> +# include <86box/timer.h> - -#ifdef ENABLE_UPI42_LOG +# ifdef ENABLE_UPI42_LOG int upi42_do_log = ENABLE_UPI42_LOG; - void upi42_log(const char *fmt, ...) { @@ -54,9 +52,9 @@ upi42_log(const char *fmt, ...) va_end(ap); } } -#else -#define upi42_log(fmt, ...) -#endif +# else +# define upi42_log(fmt, ...) +# endif #endif #define UPI42_REG(upi42, r, op) ((upi42->psw & 0x10) ? (upi42->ram[24 + ((r) &7)] op) : (upi42->ram[(r) &7] op)) @@ -97,7 +95,7 @@ typedef struct _upi42_ { int cycs; /* cycle counter */ #ifndef UPI42_STANDALONE - uint8_t ram_index; + uint8_t ram_index; uint16_t rom_index; #endif } upi42_t; @@ -1178,275 +1176,273 @@ upi42_write(uint16_t port, uint8_t val, void *priv) int i; switch (port) { - /* Write to data port. */ - case 0x0060: - case 0x0160: - upi42_dbb_write(0, val, upi42); - break; + /* Write to data port. */ + case 0x0060: + case 0x0160: + upi42_dbb_write(0, val, upi42); + break; - /* RAM Index. */ - case 0x0162: - upi42->ram_index = val & upi42->rammask; - break; + /* RAM Index. */ + case 0x0162: + upi42->ram_index = val & upi42->rammask; + break; - /* RAM. */ - case 0x0163: - upi42->ram[upi42->ram_index & upi42->rammask] = val; - break; + /* RAM. */ + case 0x0163: + upi42->ram[upi42->ram_index & upi42->rammask] = val; + break; - /* Write to command port. */ - case 0x0064: - case 0x0164: - upi42_cmd_write(0, val, upi42); - break; + /* Write to command port. */ + case 0x0064: + case 0x0164: + upi42_cmd_write(0, val, upi42); + break; - /* Input ports. */ - case 0x0180 ... 0x0187: - upi42->ports_in[addr & 0x0007] = val; - break; + /* Input ports. */ + case 0x0180 ... 0x0187: + upi42->ports_in[addr & 0x0007] = val; + break; - /* Output ports. */ - case 0x0188 ... 0x018f: - upi42->ports_out[addr & 0x0007] = val; - break; + /* Output ports. */ + case 0x0188 ... 0x018f: + upi42->ports_out[addr & 0x0007] = val; + break; - /* 4 = T0, 5 = T1. */ - case 0x0194: - upi42->t0 = (val >> 4) & 0x01; - upi42->t1 = (val >> 5) & 0x01; - break; + /* 4 = T0, 5 = T1. */ + case 0x0194: + upi42->t0 = (val >> 4) & 0x01; + upi42->t1 = (val >> 5) & 0x01; + break; - /* Program counter. */ - case 0x0196: - upi42->pc = (upi42->pc & 0xff00) | val; - break; - case 0x0197: - upi42->pc = (upi42->pc & 0x00ff) | (val << 8); - break; + /* Program counter. */ + case 0x0196: + upi42->pc = (upi42->pc & 0xff00) | val; + break; + case 0x0197: + upi42->pc = (upi42->pc & 0x00ff) | (val << 8); + break; - /* Input data buffer. */ - case 0x019a: - upi42->dbb_in = val; - break; + /* Input data buffer. */ + case 0x019a: + upi42->dbb_in = val; + break; - /* Output data buffer. */ - case 0x019b: - upi42->dbb_out = val; - break; + /* Output data buffer. */ + case 0x019b: + upi42->dbb_out = val; + break; - /* ROM Index. */ - case 0x01a0: - upi42->rom_index = (upi42->rom_index & 0xff00) | val; - break; - case 0x01a1: - upi42->rom_index = (upi42->rom_index & 0x00ff) | (val << 8); - break; + /* ROM Index. */ + case 0x01a0: + upi42->rom_index = (upi42->rom_index & 0xff00) | val; + break; + case 0x01a1: + upi42->rom_index = (upi42->rom_index & 0x00ff) | (val << 8); + break; - /* Hard reset. */ - case 0x01a2: - temp_type = upi42->type; - temp_rom = upi42->rom; - upi42_do_init(temp_type, temp_rom); - break; + /* Hard reset. */ + case 0x01a2: + temp_type = upi42->type; + temp_rom = upi42->rom; + upi42_do_init(temp_type, temp_rom); + break; - /* Soft reset. */ - case 0x01a3: - upi42_reset(upi42); - break; + /* Soft reset. */ + case 0x01a3: + upi42_reset(upi42); + break; - /* ROM. */ - case 0x01a4: - upi42->rom[upi42->rom_index & upi42->rommask] = val; - break; - case 0x01a5: - upi42->rom[(upi42->rom_index + 1) & upi42->rommask] = val; - break; - case 0x01a6: - upi42->rom[(upi42->rom_index + 2) & upi42->rommask] = val; - break; - case 0x01a7: - upi42->rom[(upi42->rom_index + 3) & upi42->rommask] = val; - break; + /* ROM. */ + case 0x01a4: + upi42->rom[upi42->rom_index & upi42->rommask] = val; + break; + case 0x01a5: + upi42->rom[(upi42->rom_index + 1) & upi42->rommask] = val; + break; + case 0x01a6: + upi42->rom[(upi42->rom_index + 2) & upi42->rommask] = val; + break; + case 0x01a7: + upi42->rom[(upi42->rom_index + 3) & upi42->rommask] = val; + break; - /* Pause. */ - case 0x01a8: - break; + /* Pause. */ + case 0x01a8: + break; - /* Resume. */ - case 0x01a9: - break; + /* Resume. */ + case 0x01a9: + break; - /* Bus master ROM: 0 = direction (0 = to memory, 1 = from memory). */ - case 0x01aa: - if (val & 0x01) { - for (i = 0; i <= upi42->rommask; i += 4) - *(uint32_t *) &(upi42->rom[i]) = mem_readl_phys(upi42->ram_addr + i); - } else { - for (i = 0; i <= upi42->rommask; i += 4) - mem_writel_phys(upi42->ram_addr + i, *(uint32_t *) &(upi42->rom[i])); - } - upi42->bm_stat = (val & 0x01) | 0x02; - break; + /* Bus master ROM: 0 = direction (0 = to memory, 1 = from memory). */ + case 0x01aa: + if (val & 0x01) { + for (i = 0; i <= upi42->rommask; i += 4) + *(uint32_t *) &(upi42->rom[i]) = mem_readl_phys(upi42->ram_addr + i); + } else { + for (i = 0; i <= upi42->rommask; i += 4) + mem_writel_phys(upi42->ram_addr + i, *(uint32_t *) &(upi42->rom[i])); + } + upi42->bm_stat = (val & 0x01) | 0x02; + break; } } - static uint8_t upi42_read(uint16_t port, void *priv) { upi42_t *upi42 = (upi42_t *) priv; - uint8_t ret = 0xff; + uint8_t ret = 0xff; switch (port) { - /* Type. */ - case 0x015c: - ret = upi42->type & 0xff; - break; - case 0x015d: - ret = upi42->type >> 8; - break; - case 0x015e: - ret = upi42->type >> 16; - break; - case 0x015f: - ret = upi42->type >> 24; - break; + /* Type. */ + case 0x015c: + ret = upi42->type & 0xff; + break; + case 0x015d: + ret = upi42->type >> 8; + break; + case 0x015e: + ret = upi42->type >> 16; + break; + case 0x015f: + ret = upi42->type >> 24; + break; - /* Read from data port and reset OBF. */ - case 0x0060: - case 0x0160: - ret = upi42->dbb_out; - upi42->sts &= ~0x01; /* clear OBF */ - break; + /* Read from data port and reset OBF. */ + case 0x0060: + case 0x0160: + ret = upi42->dbb_out; + upi42->sts &= ~0x01; /* clear OBF */ + break; - /* RAM Mask. */ - case 0x0161: - ret = upi42->rammask; - break; + /* RAM Mask. */ + case 0x0161: + ret = upi42->rammask; + break; - /* RAM Index. */ - case 0x0162: - ret = upi42->ram_index; - break; + /* RAM Index. */ + case 0x0162: + ret = upi42->ram_index; + break; - /* RAM. */ - case 0x0163: - ret = upi42->ram[upi42->ram_index & upi42->rammask]; - break; + /* RAM. */ + case 0x0163: + ret = upi42->ram[upi42->ram_index & upi42->rammask]; + break; - /* Read status. */ - case 0x0064: - case 0x0164: - ret = upi42->sts; - break; + /* Read status. */ + case 0x0064: + case 0x0164: + ret = upi42->sts; + break; - /* Input ports. */ - case 0x0180 ... 0x0187: - ret = upi42->ports_in[addr & 0x0007]; - break; + /* Input ports. */ + case 0x0180 ... 0x0187: + ret = upi42->ports_in[addr & 0x0007]; + break; - /* Output ports. */ - case 0x0188 ... 0x018f: - ret = upi42->ports_out[addr & 0x0007]; - break; + /* Output ports. */ + case 0x0188 ... 0x018f: + ret = upi42->ports_out[addr & 0x0007]; + break; - /* Accumulator. */ - case 0x0190: - ret = upi42->a; - break; + /* Accumulator. */ + case 0x0190: + ret = upi42->a; + break; - /* Timer counter. */ - case 0x0191: - ret = upi42->t; - break; + /* Timer counter. */ + case 0x0191: + ret = upi42->t; + break; - /* Program status word. */ - case 0x0192: - ret = upi42->psw; - break; + /* Program status word. */ + case 0x0192: + ret = upi42->psw; + break; - /* 0-4 = Prescaler, 5 = TF, 6 = Skip Timer Inc, 7 = Run Timer. */ - case 0x0193: - ret = (upi42->prescaler & 0x1f) || ((upi42->tf & 0x01) << 5) || ((upi42->skip_timer_inc & 0x01) << 6) || ((upi42->run_timer & 0x01) << 7); - break; + /* 0-4 = Prescaler, 5 = TF, 6 = Skip Timer Inc, 7 = Run Timer. */ + case 0x0193: + ret = (upi42->prescaler & 0x1f) || ((upi42->tf & 0x01) << 5) || ((upi42->skip_timer_inc & 0x01) << 6) || ((upi42->run_timer & 0x01) << 7); + break; - /* 0 = I, 1 = I Raise, 2 = TCNTI Raise, 3 = IRQ Mask, 4 = T0, 5 = T1, 6 = Flags, 7 = DBF. */ - case 0x0194: - ret = (upi42->i & 0x01) || ((upi42->i_raise & 0x01) << 1) || ((upi42->tcnti_raise & 0x01) << 2) || ((upi42->irq_mask & 0x01) << 3) || - ((upi42->t0 & 0x01) << 4) || ((upi42->t1 & 0x01) << 5) || ((upi42->flags & 0x01) << 6) || ((upi42->dbf & 0x01) << 7); - break; + /* 0 = I, 1 = I Raise, 2 = TCNTI Raise, 3 = IRQ Mask, 4 = T0, 5 = T1, 6 = Flags, 7 = DBF. */ + case 0x0194: + ret = (upi42->i & 0x01) || ((upi42->i_raise & 0x01) << 1) || ((upi42->tcnti_raise & 0x01) << 2) || ((upi42->irq_mask & 0x01) << 3) || ((upi42->t0 & 0x01) << 4) || ((upi42->t1 & 0x01) << 5) || ((upi42->flags & 0x01) << 6) || ((upi42->dbf & 0x01) << 7); + break; - /* 0 = Suspend. */ - case 0x0195: - ret = (upi42->suspend & 0x01); - break; + /* 0 = Suspend. */ + case 0x0195: + ret = (upi42->suspend & 0x01); + break; - /* Program counter. */ - case 0x0196: - ret = upi42->pc & 0xff; - break; - case 0x0197: - ret = upi42->pc >> 8; - break; + /* Program counter. */ + case 0x0196: + ret = upi42->pc & 0xff; + break; + case 0x0197: + ret = upi42->pc >> 8; + break; - /* ROM Mask. */ - case 0x0198: - ret = upi42->rommask & 0xff; - break; - case 0x0199: - ret = upi42->rommask >> 8; - break; + /* ROM Mask. */ + case 0x0198: + ret = upi42->rommask & 0xff; + break; + case 0x0199: + ret = upi42->rommask >> 8; + break; - /* Input data buffer. */ - case 0x019a: - ret = upi42->dbb_in; - break; + /* Input data buffer. */ + case 0x019a: + ret = upi42->dbb_in; + break; - /* Output data buffer. */ - case 0x019b: - ret = upi42->dbb_out; - break; + /* Output data buffer. */ + case 0x019b: + ret = upi42->dbb_out; + break; - /* Cycle counter. */ - case 0x019c: - ret = upi42->cycs & 0xff; - break; - case 0x019d: - ret = upi42->cycs >> 8; - break; - case 0x019e: - ret = upi42->cycs >> 16; - break; - case 0x019f: - ret = upi42->cycs >> 24; - break; + /* Cycle counter. */ + case 0x019c: + ret = upi42->cycs & 0xff; + break; + case 0x019d: + ret = upi42->cycs >> 8; + break; + case 0x019e: + ret = upi42->cycs >> 16; + break; + case 0x019f: + ret = upi42->cycs >> 24; + break; - /* ROM Index. */ - case 0x01a0: - ret = upi42->rom_index & 0xff; - break; - case 0x01a1: - ret = upi42->rom_index >> 8; - break; + /* ROM Index. */ + case 0x01a0: + ret = upi42->rom_index & 0xff; + break; + case 0x01a1: + ret = upi42->rom_index >> 8; + break; - /* ROM. */ - case 0x01a4: - ret = upi42->rom[upi42->rom_index & upi42->rommask]; - break; - case 0x01a5: - ret = upi42->rom[(upi42->rom_index + 1) & upi42->rommask]; - break; - case 0x01a6: - ret = upi42->rom[(upi42->rom_index + 2) & upi42->rommask]; - break; - case 0x01a7: - ret = upi42->rom[(upi42->rom_index + 3) & upi42->rommask]; - break; + /* ROM. */ + case 0x01a4: + ret = upi42->rom[upi42->rom_index & upi42->rommask]; + break; + case 0x01a5: + ret = upi42->rom[(upi42->rom_index + 1) & upi42->rommask]; + break; + case 0x01a6: + ret = upi42->rom[(upi42->rom_index + 2) & upi42->rommask]; + break; + case 0x01a7: + ret = upi42->rom[(upi42->rom_index + 3) & upi42->rommask]; + break; - /* Bus master status: 0 = direction, 1 = finished. */ - case 0x01ab: - ret = upi42->bm_stat; - break; + /* Bus master status: 0 = direction, 1 = finished. */ + case 0x01ab: + ret = upi42->bm_stat; + break; } return ret; diff --git a/src/usb.c b/src/usb.c index c70fc2d63..04b22064d 100644 --- a/src/usb.c +++ b/src/usb.c @@ -29,31 +29,28 @@ #include <86box/usb.h> #include "cpu.h" - #ifdef ENABLE_USB_LOG int usb_do_log = ENABLE_USB_LOG; - static void usb_log(const char *fmt, ...) { va_list ap; if (usb_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define usb_log(fmt, ...) +# define usb_log(fmt, ...) #endif - static uint8_t uhci_reg_read(uint16_t addr, void *p) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) p; uint8_t ret, *regs = dev->uhci_io; addr &= 0x0000001f; @@ -63,83 +60,81 @@ uhci_reg_read(uint16_t addr, void *p) return ret; } - static void uhci_reg_write(uint16_t addr, uint8_t val, void *p) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) p; uint8_t *regs = dev->uhci_io; addr &= 0x0000001f; switch (addr) { - case 0x02: - regs[0x02] &= ~(val & 0x3f); - break; - case 0x04: - regs[0x04] = (val & 0x0f); - break; - case 0x09: - regs[0x09] = (val & 0xf0); - break; - case 0x0a: case 0x0b: - regs[addr] = val; - break; - case 0x0c: - regs[0x0c] = (val & 0x7f); - break; + case 0x02: + regs[0x02] &= ~(val & 0x3f); + break; + case 0x04: + regs[0x04] = (val & 0x0f); + break; + case 0x09: + regs[0x09] = (val & 0xf0); + break; + case 0x0a: + case 0x0b: + regs[addr] = val; + break; + case 0x0c: + regs[0x0c] = (val & 0x7f); + break; } } - static void uhci_reg_writew(uint16_t addr, uint16_t val, void *p) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) p; uint16_t *regs = (uint16_t *) dev->uhci_io; addr &= 0x0000001f; switch (addr) { - case 0x00: - if ((val & 0x0001) && !(regs[0x00] & 0x0001)) - regs[0x01] &= ~0x20; - else if (!(val & 0x0001)) - regs[0x01] |= 0x20; - regs[0x00] = (val & 0x00ff); - break; - case 0x06: - regs[0x03] = (val & 0x07ff); - break; - case 0x10: case 0x12: - regs[addr >> 1] = ((regs[addr >> 1] & 0xedbb) | (val & 0x1244)) & ~(val & 0x080a); - break; - default: - uhci_reg_write(addr, val & 0xff, p); - uhci_reg_write(addr + 1, (val >> 8) & 0xff, p); - break; + case 0x00: + if ((val & 0x0001) && !(regs[0x00] & 0x0001)) + regs[0x01] &= ~0x20; + else if (!(val & 0x0001)) + regs[0x01] |= 0x20; + regs[0x00] = (val & 0x00ff); + break; + case 0x06: + regs[0x03] = (val & 0x07ff); + break; + case 0x10: + case 0x12: + regs[addr >> 1] = ((regs[addr >> 1] & 0xedbb) | (val & 0x1244)) & ~(val & 0x080a); + break; + default: + uhci_reg_write(addr, val & 0xff, p); + uhci_reg_write(addr + 1, (val >> 8) & 0xff, p); + break; } } - void uhci_update_io_mapping(usb_t *dev, uint8_t base_l, uint8_t base_h, int enable) { if (dev->uhci_enable && (dev->uhci_io_base != 0x0000)) - io_removehandler(dev->uhci_io_base, 0x20, uhci_reg_read, NULL, NULL, uhci_reg_write, uhci_reg_writew, NULL, dev); + io_removehandler(dev->uhci_io_base, 0x20, uhci_reg_read, NULL, NULL, uhci_reg_write, uhci_reg_writew, NULL, dev); dev->uhci_io_base = base_l | (base_h << 8); - dev->uhci_enable = enable; + dev->uhci_enable = enable; if (dev->uhci_enable && (dev->uhci_io_base != 0x0000)) - io_sethandler(dev->uhci_io_base, 0x20, uhci_reg_read, NULL, NULL, uhci_reg_write, uhci_reg_writew, NULL, dev); + io_sethandler(dev->uhci_io_base, 0x20, uhci_reg_read, NULL, NULL, uhci_reg_write, uhci_reg_writew, NULL, dev); } - static uint8_t ohci_mmio_read(uint32_t addr, void *p) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) p; uint8_t ret = 0x00; addr &= 0x00000fff; @@ -147,210 +142,222 @@ ohci_mmio_read(uint32_t addr, void *p) ret = dev->ohci_mmio[addr]; if (addr == 0x101) - ret = (ret & 0xfe) | (!!mem_a20_key); + ret = (ret & 0xfe) | (!!mem_a20_key); return ret; } - static void ohci_mmio_write(uint32_t addr, uint8_t val, void *p) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) p; uint8_t old; addr &= 0x00000fff; switch (addr) { - case 0x04: - if ((val & 0xc0) == 0x00) { - /* UsbReset */ - dev->ohci_mmio[0x56] = dev->ohci_mmio[0x5a] = 0x16; - } - break; - case 0x08: /* HCCOMMANDSTATUS */ - /* bit OwnershipChangeRequest triggers an ownership change (SMM <-> OS) */ - if (val & 0x08) { - dev->ohci_mmio[0x0f] = 0x40; - if ((dev->ohci_mmio[0x13] & 0xc0) == 0xc0) - smi_raise(); - } + case 0x04: + if ((val & 0xc0) == 0x00) { + /* UsbReset */ + dev->ohci_mmio[0x56] = dev->ohci_mmio[0x5a] = 0x16; + } + break; + case 0x08: /* HCCOMMANDSTATUS */ + /* bit OwnershipChangeRequest triggers an ownership change (SMM <-> OS) */ + if (val & 0x08) { + dev->ohci_mmio[0x0f] = 0x40; + if ((dev->ohci_mmio[0x13] & 0xc0) == 0xc0) + smi_raise(); + } - /* bit HostControllerReset must be cleared for the controller to be seen as initialized */ - if (val & 0x01) { - memset(dev->ohci_mmio, 0x00, 4096); - dev->ohci_mmio[0x00] = 0x10; - dev->ohci_mmio[0x01] = 0x01; - dev->ohci_mmio[0x48] = 0x02; - val &= ~0x01; - } - break; - case 0x0c: - dev->ohci_mmio[addr] &= ~(val & 0x7f); - return; - case 0x0d: case 0x0e: - return; - case 0x0f: - dev->ohci_mmio[addr] &= ~(val & 0x40); - return; - case 0x3b: - dev->ohci_mmio[addr] = (val & 0x80); - return; - case 0x39: case 0x41: - dev->ohci_mmio[addr] = (val & 0x3f); - return; - case 0x45: - dev->ohci_mmio[addr] = (val & 0x0f); - return; - case 0x3a: - case 0x3e: case 0x3f: case 0x42: case 0x43: - case 0x46: case 0x47: case 0x48: case 0x4a: - return; - case 0x49: - dev->ohci_mmio[addr] = (val & 0x1b); - if (val & 0x02) { - dev->ohci_mmio[0x55] |= 0x01; - dev->ohci_mmio[0x59] |= 0x01; - } - return; - case 0x4b: - dev->ohci_mmio[addr] = (val & 0x03); - return; - case 0x4c: case 0x4e: - dev->ohci_mmio[addr] = (val & 0x06); - if ((addr == 0x4c) && !(val & 0x04)) { - if (!(dev->ohci_mmio[0x58] & 0x01)) - dev->ohci_mmio[0x5a] |= 0x01; - dev->ohci_mmio[0x58] |= 0x01; - } if ((addr == 0x4c) && !(val & 0x02)) { - if (!(dev->ohci_mmio[0x54] & 0x01)) - dev->ohci_mmio[0x56] |= 0x01; - dev->ohci_mmio[0x54] |= 0x01; - } - return; - case 0x4d: case 0x4f: - return; - case 0x50: - if (val & 0x01) { - if ((dev->ohci_mmio[0x49] & 0x03) == 0x00) { - dev->ohci_mmio[0x55] &= ~0x01; - dev->ohci_mmio[0x54] &= ~0x17; - dev->ohci_mmio[0x56] &= ~0x17; - dev->ohci_mmio[0x59] &= ~0x01; - dev->ohci_mmio[0x58] &= ~0x17; - dev->ohci_mmio[0x5a] &= ~0x17; - } else if ((dev->ohci_mmio[0x49] & 0x03) == 0x01) { - if (!(dev->ohci_mmio[0x4e] & 0x02)) { - dev->ohci_mmio[0x55] &= ~0x01; - dev->ohci_mmio[0x54] &= ~0x17; - dev->ohci_mmio[0x56] &= ~0x17; - } - if (!(dev->ohci_mmio[0x4e] & 0x04)) { - dev->ohci_mmio[0x59] &= ~0x01; - dev->ohci_mmio[0x58] &= ~0x17; - dev->ohci_mmio[0x5a] &= ~0x17; - } - } - } - return; - case 0x51: - if (val & 0x80) - dev->ohci_mmio[addr] |= 0x80; - return; - case 0x52: - dev->ohci_mmio[addr] &= ~(val & 0x02); - if (val & 0x01) { - if ((dev->ohci_mmio[0x49] & 0x03) == 0x00) { - dev->ohci_mmio[0x55] |= 0x01; - dev->ohci_mmio[0x59] |= 0x01; - } else if ((dev->ohci_mmio[0x49] & 0x03) == 0x01) { - if (!(dev->ohci_mmio[0x4e] & 0x02)) - dev->ohci_mmio[0x55] |= 0x01; - if (!(dev->ohci_mmio[0x4e] & 0x04)) - dev->ohci_mmio[0x59] |= 0x01; - } - } - return; - case 0x53: - if (val & 0x80) - dev->ohci_mmio[0x51] &= ~0x80; - return; - case 0x54: case 0x58: - old = dev->ohci_mmio[addr]; + /* bit HostControllerReset must be cleared for the controller to be seen as initialized */ + if (val & 0x01) { + memset(dev->ohci_mmio, 0x00, 4096); + dev->ohci_mmio[0x00] = 0x10; + dev->ohci_mmio[0x01] = 0x01; + dev->ohci_mmio[0x48] = 0x02; + val &= ~0x01; + } + break; + case 0x0c: + dev->ohci_mmio[addr] &= ~(val & 0x7f); + return; + case 0x0d: + case 0x0e: + return; + case 0x0f: + dev->ohci_mmio[addr] &= ~(val & 0x40); + return; + case 0x3b: + dev->ohci_mmio[addr] = (val & 0x80); + return; + case 0x39: + case 0x41: + dev->ohci_mmio[addr] = (val & 0x3f); + return; + case 0x45: + dev->ohci_mmio[addr] = (val & 0x0f); + return; + case 0x3a: + case 0x3e: + case 0x3f: + case 0x42: + case 0x43: + case 0x46: + case 0x47: + case 0x48: + case 0x4a: + return; + case 0x49: + dev->ohci_mmio[addr] = (val & 0x1b); + if (val & 0x02) { + dev->ohci_mmio[0x55] |= 0x01; + dev->ohci_mmio[0x59] |= 0x01; + } + return; + case 0x4b: + dev->ohci_mmio[addr] = (val & 0x03); + return; + case 0x4c: + case 0x4e: + dev->ohci_mmio[addr] = (val & 0x06); + if ((addr == 0x4c) && !(val & 0x04)) { + if (!(dev->ohci_mmio[0x58] & 0x01)) + dev->ohci_mmio[0x5a] |= 0x01; + dev->ohci_mmio[0x58] |= 0x01; + } + if ((addr == 0x4c) && !(val & 0x02)) { + if (!(dev->ohci_mmio[0x54] & 0x01)) + dev->ohci_mmio[0x56] |= 0x01; + dev->ohci_mmio[0x54] |= 0x01; + } + return; + case 0x4d: + case 0x4f: + return; + case 0x50: + if (val & 0x01) { + if ((dev->ohci_mmio[0x49] & 0x03) == 0x00) { + dev->ohci_mmio[0x55] &= ~0x01; + dev->ohci_mmio[0x54] &= ~0x17; + dev->ohci_mmio[0x56] &= ~0x17; + dev->ohci_mmio[0x59] &= ~0x01; + dev->ohci_mmio[0x58] &= ~0x17; + dev->ohci_mmio[0x5a] &= ~0x17; + } else if ((dev->ohci_mmio[0x49] & 0x03) == 0x01) { + if (!(dev->ohci_mmio[0x4e] & 0x02)) { + dev->ohci_mmio[0x55] &= ~0x01; + dev->ohci_mmio[0x54] &= ~0x17; + dev->ohci_mmio[0x56] &= ~0x17; + } + if (!(dev->ohci_mmio[0x4e] & 0x04)) { + dev->ohci_mmio[0x59] &= ~0x01; + dev->ohci_mmio[0x58] &= ~0x17; + dev->ohci_mmio[0x5a] &= ~0x17; + } + } + } + return; + case 0x51: + if (val & 0x80) + dev->ohci_mmio[addr] |= 0x80; + return; + case 0x52: + dev->ohci_mmio[addr] &= ~(val & 0x02); + if (val & 0x01) { + if ((dev->ohci_mmio[0x49] & 0x03) == 0x00) { + dev->ohci_mmio[0x55] |= 0x01; + dev->ohci_mmio[0x59] |= 0x01; + } else if ((dev->ohci_mmio[0x49] & 0x03) == 0x01) { + if (!(dev->ohci_mmio[0x4e] & 0x02)) + dev->ohci_mmio[0x55] |= 0x01; + if (!(dev->ohci_mmio[0x4e] & 0x04)) + dev->ohci_mmio[0x59] |= 0x01; + } + } + return; + case 0x53: + if (val & 0x80) + dev->ohci_mmio[0x51] &= ~0x80; + return; + case 0x54: + case 0x58: + old = dev->ohci_mmio[addr]; - if (val & 0x10) { - if (old & 0x01) { - dev->ohci_mmio[addr] |= 0x10; - /* TODO: The clear should be on a 10 ms timer. */ - dev->ohci_mmio[addr] &= ~0x10; - dev->ohci_mmio[addr + 2] |= 0x10; - } else - dev->ohci_mmio[addr + 2] |= 0x01; - } - if (val & 0x08) - dev->ohci_mmio[addr] &= ~0x04; - if (val & 0x04) - dev->ohci_mmio[addr] |= 0x04; - if (val & 0x02) { - if (old & 0x01) - dev->ohci_mmio[addr] |= 0x02; - else - dev->ohci_mmio[addr + 2] |= 0x01; - } - if (val & 0x01) { - if (old & 0x01) - dev->ohci_mmio[addr] &= ~0x02; - else - dev->ohci_mmio[addr + 2] |= 0x01; - } + if (val & 0x10) { + if (old & 0x01) { + dev->ohci_mmio[addr] |= 0x10; + /* TODO: The clear should be on a 10 ms timer. */ + dev->ohci_mmio[addr] &= ~0x10; + dev->ohci_mmio[addr + 2] |= 0x10; + } else + dev->ohci_mmio[addr + 2] |= 0x01; + } + if (val & 0x08) + dev->ohci_mmio[addr] &= ~0x04; + if (val & 0x04) + dev->ohci_mmio[addr] |= 0x04; + if (val & 0x02) { + if (old & 0x01) + dev->ohci_mmio[addr] |= 0x02; + else + dev->ohci_mmio[addr + 2] |= 0x01; + } + if (val & 0x01) { + if (old & 0x01) + dev->ohci_mmio[addr] &= ~0x02; + else + dev->ohci_mmio[addr + 2] |= 0x01; + } - if (!(dev->ohci_mmio[addr] & 0x04) && (old & 0x04)) - dev->ohci_mmio[addr + 2] |= 0x04; - /* if (!(dev->ohci_mmio[addr] & 0x02)) - dev->ohci_mmio[addr + 2] |= 0x02; */ - return; - case 0x55: - if ((val & 0x02) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x02)) { - dev->ohci_mmio[addr] &= ~0x01; - dev->ohci_mmio[0x54] &= ~0x17; - dev->ohci_mmio[0x56] &= ~0x17; - } if ((val & 0x01) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x02)) { - dev->ohci_mmio[addr] |= 0x01; - dev->ohci_mmio[0x58] &= ~0x17; - dev->ohci_mmio[0x5a] &= ~0x17; - } - return; - case 0x59: - if ((val & 0x02) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x04)) - dev->ohci_mmio[addr] &= ~0x01; - if ((val & 0x01) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x04)) - dev->ohci_mmio[addr] |= 0x01; - return; - case 0x56: case 0x5a: - dev->ohci_mmio[addr] &= ~(val & 0x1f); - return; - case 0x57: case 0x5b: - return; + if (!(dev->ohci_mmio[addr] & 0x04) && (old & 0x04)) + dev->ohci_mmio[addr + 2] |= 0x04; + /* if (!(dev->ohci_mmio[addr] & 0x02)) + dev->ohci_mmio[addr + 2] |= 0x02; */ + return; + case 0x55: + if ((val & 0x02) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x02)) { + dev->ohci_mmio[addr] &= ~0x01; + dev->ohci_mmio[0x54] &= ~0x17; + dev->ohci_mmio[0x56] &= ~0x17; + } + if ((val & 0x01) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x02)) { + dev->ohci_mmio[addr] |= 0x01; + dev->ohci_mmio[0x58] &= ~0x17; + dev->ohci_mmio[0x5a] &= ~0x17; + } + return; + case 0x59: + if ((val & 0x02) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x04)) + dev->ohci_mmio[addr] &= ~0x01; + if ((val & 0x01) && ((dev->ohci_mmio[0x49] & 0x03) == 0x00) && (dev->ohci_mmio[0x4e] & 0x04)) + dev->ohci_mmio[addr] |= 0x01; + return; + case 0x56: + case 0x5a: + dev->ohci_mmio[addr] &= ~(val & 0x1f); + return; + case 0x57: + case 0x5b: + return; } dev->ohci_mmio[addr] = val; } - void ohci_update_mem_mapping(usb_t *dev, uint8_t base1, uint8_t base2, uint8_t base3, int enable) { if (dev->ohci_enable && (dev->ohci_mem_base != 0x00000000)) - mem_mapping_disable(&dev->ohci_mmio_mapping); + mem_mapping_disable(&dev->ohci_mmio_mapping); dev->ohci_mem_base = ((base1 << 8) | (base2 << 16) | (base3 << 24)) & 0xfffff000; - dev->ohci_enable = enable; + dev->ohci_enable = enable; if (dev->ohci_enable && (dev->ohci_mem_base != 0x00000000)) - mem_mapping_set_addr(&dev->ohci_mmio_mapping, dev->ohci_mem_base, 0x1000); + mem_mapping_set_addr(&dev->ohci_mmio_mapping, dev->ohci_mem_base, 0x1000); } - static void usb_reset(void *priv) { @@ -372,7 +379,6 @@ usb_reset(void *priv) dev->ohci_enable = 0; } - static void usb_close(void *priv) { @@ -381,14 +387,14 @@ usb_close(void *priv) free(dev); } - static void * usb_init(const device_t *info) { usb_t *dev; - dev = (usb_t *)malloc(sizeof(usb_t)); - if (dev == NULL) return(NULL); + dev = (usb_t *) malloc(sizeof(usb_t)); + if (dev == NULL) + return (NULL); memset(dev, 0x00, sizeof(usb_t)); memset(dev->uhci_io, 0x00, 128); @@ -401,24 +407,24 @@ usb_init(const device_t *info) dev->ohci_mmio[0x48] = 0x02; mem_mapping_add(&dev->ohci_mmio_mapping, 0, 0, - ohci_mmio_read, NULL, NULL, - ohci_mmio_write, NULL, NULL, - NULL, MEM_MAPPING_EXTERNAL, dev); + ohci_mmio_read, NULL, NULL, + ohci_mmio_write, NULL, NULL, + NULL, MEM_MAPPING_EXTERNAL, dev); usb_reset(dev); return dev; } const device_t usb_device = { - .name = "Universal Serial Bus", + .name = "Universal Serial Bus", .internal_name = "usb", - .flags = DEVICE_PCI, - .local = 0, - .init = usb_init, - .close = usb_close, - .reset = usb_reset, + .flags = DEVICE_PCI, + .local = 0, + .init = usb_init, + .close = usb_close, + .reset = usb_reset, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/vnc.c b/src/vnc.c index 0cc745883..e7b112be2 100644 --- a/src/vnc.c +++ b/src/vnc.c @@ -32,97 +32,90 @@ #include <86box/ui.h> #include <86box/vnc.h> +#define VNC_MIN_X 320 +#define VNC_MAX_X 2048 +#define VNC_MIN_Y 200 +#define VNC_MAX_Y 2048 -#define VNC_MIN_X 320 -#define VNC_MAX_X 2048 -#define VNC_MIN_Y 200 -#define VNC_MAX_Y 2048 - - -static rfbScreenInfoPtr rfb = NULL; -static int clients; -static int updatingSize; -static int allowedX, - allowedY; -static int ptr_x, ptr_y, ptr_but; - +static rfbScreenInfoPtr rfb = NULL; +static int clients; +static int updatingSize; +static int allowedX, + allowedY; +static int ptr_x, ptr_y, ptr_but; #ifdef ENABLE_VNC_LOG int vnc_do_log = ENABLE_VNC_LOG; - static void vnc_log(const char *fmt, ...) { va_list ap; if (vnc_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); } } #else -#define vnc_log(fmt, ...) +# define vnc_log(fmt, ...) #endif - static void vnc_kbdevent(rfbBool down, rfbKeySym k, rfbClientPtr cl) { - (void)cl; + (void) cl; /* Handle it through the lookup tables. */ - vnc_kbinput(down?1:0, (int)k); + vnc_kbinput(down ? 1 : 0, (int) k); } - static void vnc_ptrevent(int but, int x, int y, rfbClientPtr cl) { - if (x>=0 && x=0 && y= 0 && x < allowedX && y >= 0 && y < allowedY) { + /* VNC uses absolute positions within the window, no deltas. */ + if (x != ptr_x || y != ptr_y) { + mouse_x += (x - ptr_x) / 100; + mouse_y += (y - ptr_y) / 100; + ptr_x = x; + ptr_y = y; + } - if (but != ptr_but) { - mouse_buttons = 0; - if (but & 0x01) - mouse_buttons |= 0x01; - if (but & 0x02) - mouse_buttons |= 0x04; - if (but & 0x04) - mouse_buttons |= 0x02; - ptr_but = but; - } - } + if (but != ptr_but) { + mouse_buttons = 0; + if (but & 0x01) + mouse_buttons |= 0x01; + if (but & 0x02) + mouse_buttons |= 0x04; + if (but & 0x04) + mouse_buttons |= 0x02; + ptr_but = but; + } + } - rfbDefaultPtrAddEvent(but, x, y, cl); + rfbDefaultPtrAddEvent(but, x, y, cl); } - static void vnc_clientgone(rfbClientPtr cl) { vnc_log("VNC: client disconnected: %s\n", cl->host); if (clients > 0) - clients--; + clients--; if (clients == 0) { - /* No more clients, pause the emulator. */ - vnc_log("VNC: no clients, pausing..\n"); + /* No more clients, pause the emulator. */ + vnc_log("VNC: no clients, pausing..\n"); - /* Disable the mouse. */ - plat_mouse_capture(0); + /* Disable the mouse. */ + plat_mouse_capture(0); - plat_pause(1); + plat_pause(1); } } - static enum rfbNewClientAction vnc_newclient(rfbClientPtr cl) { @@ -131,114 +124,111 @@ vnc_newclient(rfbClientPtr cl) vnc_log("VNC: new client: %s\n", cl->host); if (++clients == 1) { - /* Reset the mouse. */ - ptr_x = allowedX/2; - ptr_y = allowedY/2; - mouse_x = mouse_y = mouse_z = 0; - mouse_buttons = 0x00; + /* Reset the mouse. */ + ptr_x = allowedX / 2; + ptr_y = allowedY / 2; + mouse_x = mouse_y = mouse_z = 0; + mouse_buttons = 0x00; - /* We now have clients, un-pause the emulator if needed. */ - vnc_log("VNC: unpausing..\n"); + /* We now have clients, un-pause the emulator if needed. */ + vnc_log("VNC: unpausing..\n"); - /* Enable the mouse. */ - plat_mouse_capture(1); + /* Enable the mouse. */ + plat_mouse_capture(1); - plat_pause(0); + plat_pause(0); } /* For now, we always accept clients. */ - return(RFB_CLIENT_ACCEPT); + return (RFB_CLIENT_ACCEPT); } - static void vnc_display(rfbClientPtr cl) { /* Avoid race condition between resize and update. */ if (!updatingSize && cl->newFBSizePending) { - updatingSize = 1; + updatingSize = 1; } else if (updatingSize && !cl->newFBSizePending) { - updatingSize = 0; + updatingSize = 0; - allowedX = rfb->width; - allowedY = rfb->height; + allowedX = rfb->width; + allowedY = rfb->height; } } - static void vnc_blit(int x, int y, int w, int h, int monitor_index) { uint32_t *p; - int yy; + int yy; if (monitor_index || (x < 0) || (y < 0) || (w <= 0) || (h <= 0) || (w > 2048) || (h > 2048) || (buffer32 == NULL)) { video_blit_complete_monitor(monitor_index); return; } - for (yy=0; yyframeBuffer)[yy*VNC_MAX_X]); + for (yy = 0; yy < h; yy++) { + p = (uint32_t *) &(((uint32_t *) rfb->frameBuffer)[yy * VNC_MAX_X]); - if ((y+yy) >= 0 && (y+yy) < VNC_MAX_Y) - video_copy(p, &(buffer32->line[yy]), w*sizeof(uint32_t)); + if ((y + yy) >= 0 && (y + yy) < VNC_MAX_Y) + video_copy(p, &(buffer32->line[yy]), w * sizeof(uint32_t)); } if (screenshots) - video_screenshot((uint32_t *) rfb->frameBuffer, 0, 0, VNC_MAX_X); + video_screenshot((uint32_t *) rfb->frameBuffer, 0, 0, VNC_MAX_X); video_blit_complete_monitor(monitor_index); - if (! updatingSize) - rfbMarkRectAsModified(rfb, 0,0, allowedX,allowedY); + if (!updatingSize) + rfbMarkRectAsModified(rfb, 0, 0, allowedX, allowedY); } - /* Initialize VNC for operation. */ int vnc_init(UNUSED(void *arg)) { - static char title[128]; + static char title[128]; rfbPixelFormat rpf = { - /* - * Screen format: - * 32bpp; 32 depth; - * little endian; - * true color; - * max 255 R/G/B; - * red shift 16; green shift 8; blue shift 0; - * padding - */ - 32, 32, 0, 1, 255,255,255, 16, 8, 0, 0, 0 + /* + * Screen format: + * 32bpp; 32 depth; + * little endian; + * true color; + * max 255 R/G/B; + * red shift 16; green shift 8; blue shift 0; + * padding + */ + 32, 32, 0, 1, 255, 255, 255, 16, 8, 0, 0, 0 }; plat_pause(1); cgapal_rebuild_monitor(0); if (rfb == NULL) { - wcstombs(title, ui_window_title(NULL), sizeof(title)); - updatingSize = 0; - allowedX = scrnsz_x; - allowedY = scrnsz_y; + wcstombs(title, ui_window_title(NULL), sizeof(title)); + updatingSize = 0; + allowedX = scrnsz_x; + allowedY = scrnsz_y; - rfb = rfbGetScreen(0, NULL, VNC_MAX_X, VNC_MAX_Y, 8, 3, 4); - rfb->desktopName = title; - rfb->frameBuffer = (char *)malloc(VNC_MAX_X*VNC_MAX_Y*4); + rfb = rfbGetScreen(0, NULL, VNC_MAX_X, VNC_MAX_Y, 8, 3, 4); + rfb->desktopName = title; + rfb->frameBuffer = (char *) malloc(VNC_MAX_X * VNC_MAX_Y * 4); - rfb->serverFormat = rpf; - rfb->alwaysShared = TRUE; - rfb->displayHook = vnc_display; - rfb->ptrAddEvent = vnc_ptrevent; - rfb->kbdAddEvent = vnc_kbdevent; - rfb->newClientHook = vnc_newclient; + rfb->serverFormat = rpf; + rfb->alwaysShared = TRUE; + rfb->displayHook = vnc_display; + rfb->ptrAddEvent = vnc_ptrevent; + rfb->kbdAddEvent = vnc_kbdevent; + rfb->newClientHook = vnc_newclient; - /* Set up our current resolution. */ - rfb->width = allowedX; - rfb->height = allowedY; + /* Set up our current resolution. */ + rfb->width = allowedX; + rfb->height = allowedY; - rfbInitServer(rfb); + rfbInitServer(rfb); - rfbRunEventLoop(rfb, -1, TRUE); + rfbRunEventLoop(rfb, -1, TRUE); } /* Set up our BLIT handlers. */ @@ -248,66 +238,63 @@ vnc_init(UNUSED(void *arg)) vnc_log("VNC: init complete.\n"); - return(1); + return (1); } - void vnc_close(void) { video_setblit(NULL); if (rfb != NULL) { - free(rfb->frameBuffer); + free(rfb->frameBuffer); - rfbScreenCleanup(rfb); + rfbScreenCleanup(rfb); - rfb = NULL; + rfb = NULL; } } - void vnc_resize(int x, int y) { rfbClientIteratorPtr iterator; - rfbClientPtr cl; + rfbClientPtr cl; - if (rfb == NULL) return; + if (rfb == NULL) + return; /* TightVNC doesn't like certain sizes.. */ if (x < VNC_MIN_X || x > VNC_MAX_X || y < VNC_MIN_Y || y > VNC_MAX_Y) { - vnc_log("VNC: invalid resoltion %dx%d requested!\n", x, y); - return; + vnc_log("VNC: invalid resoltion %dx%d requested!\n", x, y); + return; } if ((x != rfb->width || y != rfb->height) && x > 160 && y > 0) { - vnc_log("VNC: updating resolution: %dx%d\n", x, y); + vnc_log("VNC: updating resolution: %dx%d\n", x, y); - allowedX = (rfb->width < x) ? rfb->width : x; - allowedY = (rfb->width < y) ? rfb->width : y; + allowedX = (rfb->width < x) ? rfb->width : x; + allowedY = (rfb->width < y) ? rfb->width : y; - rfb->width = x; - rfb->height = y; + rfb->width = x; + rfb->height = y; - iterator = rfbGetClientIterator(rfb); - while ((cl = rfbClientIteratorNext(iterator)) != NULL) { - LOCK(cl->updateMutex); - cl->newFBSizePending = 1; - UNLOCK(cl->updateMutex); - } + iterator = rfbGetClientIterator(rfb); + while ((cl = rfbClientIteratorNext(iterator)) != NULL) { + LOCK(cl->updateMutex); + cl->newFBSizePending = 1; + UNLOCK(cl->updateMutex); + } } } - /* Tell them to pause if we have no clients. */ int vnc_pause(void) { - return((clients > 0) ? 0 : 1); + return ((clients > 0) ? 0 : 1); } - void vnc_take_screenshot(wchar_t *fn) { diff --git a/src/vnc_keymap.c b/src/vnc_keymap.c index fd9769de9..a3c60d398 100644 --- a/src/vnc_keymap.c +++ b/src/vnc_keymap.c @@ -41,9 +41,8 @@ #include <86box/plat.h> #include <86box/vnc.h> - static int keysyms_00[] = { - 0x0000, /* 0x00 */ + 0x0000, /* 0x00 */ 0x0000, 0x0000, 0x0000, @@ -52,7 +51,7 @@ static int keysyms_00[] = { 0x0000, 0x0000, - 0x0000, /* 0x08 */ + 0x0000, /* 0x08 */ 0x0000, 0x0000, 0x0000, @@ -61,7 +60,7 @@ static int keysyms_00[] = { 0x0000, 0x0000, - 0x0000, /* 0x10 */ + 0x0000, /* 0x10 */ 0x0000, 0x0000, 0x0000, @@ -70,7 +69,7 @@ static int keysyms_00[] = { 0x0000, 0x0000, - 0x0000, /* 0x18 */ + 0x0000, /* 0x18 */ 0x0000, 0x0000, 0x0000, @@ -79,115 +78,115 @@ static int keysyms_00[] = { 0x0000, 0x0000, - 0x0039, /* 0x20 (XK_space) */ - 0x2a02, /* 0x21 (XK_exclam) */ - 0x2a28, /* 0x22 (XK_quotedbl) */ - 0x2a04, /* 0x23 (XK_numbersign) */ - 0x2a05, /* 0x24 (XK_dollar) */ - 0x2a06, /* 0x25 (XK_percent) */ - 0x2a08, /* 0x26 (XK_ampersand) */ - 0x0028, /* 0x27 (XK_apostrophe) */ + 0x0039, /* 0x20 (XK_space) */ + 0x2a02, /* 0x21 (XK_exclam) */ + 0x2a28, /* 0x22 (XK_quotedbl) */ + 0x2a04, /* 0x23 (XK_numbersign) */ + 0x2a05, /* 0x24 (XK_dollar) */ + 0x2a06, /* 0x25 (XK_percent) */ + 0x2a08, /* 0x26 (XK_ampersand) */ + 0x0028, /* 0x27 (XK_apostrophe) */ - 0x2a0a, /* 0x28 (XK_parenleft) */ - 0x2a0b, /* 0x29 (XK_parenright) */ - 0x2a09, /* 0x2a (XK_asterisk) */ - 0x2a0d, /* 0x2b (XK_plus) */ - 0x0033, /* 0x2c (XK_comma) */ - 0x000c, /* 0x2d (XK_minus) */ - 0x0034, /* 0x2e (XK_period) */ - 0x0035, /* 0x2f (XK_slash) */ + 0x2a0a, /* 0x28 (XK_parenleft) */ + 0x2a0b, /* 0x29 (XK_parenright) */ + 0x2a09, /* 0x2a (XK_asterisk) */ + 0x2a0d, /* 0x2b (XK_plus) */ + 0x0033, /* 0x2c (XK_comma) */ + 0x000c, /* 0x2d (XK_minus) */ + 0x0034, /* 0x2e (XK_period) */ + 0x0035, /* 0x2f (XK_slash) */ - 0x000b, /* 0x30 (XK_0) */ - 0x0002, /* 0x31 (XK_1) */ - 0x0003, /* 0x32 (XK_2) */ - 0x0004, /* 0x33 (XK_3) */ - 0x0005, /* 0x34 (XK_4) */ - 0x0006, /* 0x35 (XK_5) */ - 0x0007, /* 0x36 (XK_6) */ - 0x0008, /* 0x37 (XK_7) */ + 0x000b, /* 0x30 (XK_0) */ + 0x0002, /* 0x31 (XK_1) */ + 0x0003, /* 0x32 (XK_2) */ + 0x0004, /* 0x33 (XK_3) */ + 0x0005, /* 0x34 (XK_4) */ + 0x0006, /* 0x35 (XK_5) */ + 0x0007, /* 0x36 (XK_6) */ + 0x0008, /* 0x37 (XK_7) */ - 0x0009, /* 0x38 (XK_8) */ - 0x000a, /* 0x39 (XK_9) */ - 0x2a27, /* 0x3a (XK_colon) */ - 0x0027, /* 0x3b (XK_semicolon) */ - 0x2a33, /* 0x3c (XK_less) */ - 0x000d, /* 0x3d (XK_equal) */ - 0x2a34, /* 0x3e (XK_greater) */ - 0x2a35, /* 0x3f (XK_question) */ + 0x0009, /* 0x38 (XK_8) */ + 0x000a, /* 0x39 (XK_9) */ + 0x2a27, /* 0x3a (XK_colon) */ + 0x0027, /* 0x3b (XK_semicolon) */ + 0x2a33, /* 0x3c (XK_less) */ + 0x000d, /* 0x3d (XK_equal) */ + 0x2a34, /* 0x3e (XK_greater) */ + 0x2a35, /* 0x3f (XK_question) */ - 0x2a03, /* 0x40 (XK_at) */ - 0x2a1e, /* 0x41 (XK_A) */ - 0x2a30, /* 0x42 (XK_B) */ - 0x2a2e, /* 0x43 (XK_C) */ - 0x2a20, /* 0x44 (XK_D) */ - 0x2a12, /* 0x45 (XK_E) */ - 0x2a21, /* 0x46 (XK_F) */ - 0x2a22, /* 0x47 (XK_G) */ + 0x2a03, /* 0x40 (XK_at) */ + 0x2a1e, /* 0x41 (XK_A) */ + 0x2a30, /* 0x42 (XK_B) */ + 0x2a2e, /* 0x43 (XK_C) */ + 0x2a20, /* 0x44 (XK_D) */ + 0x2a12, /* 0x45 (XK_E) */ + 0x2a21, /* 0x46 (XK_F) */ + 0x2a22, /* 0x47 (XK_G) */ - 0x2a23, /* 0x48 (XK_H) */ - 0x2a17, /* 0x49 (XK_I) */ - 0x2a24, /* 0x4a (XK_J) */ - 0x2a25, /* 0x4b (XK_K) */ - 0x2a26, /* 0x4c (XK_L) */ - 0x2a32, /* 0x4d (XK_M) */ - 0x2a31, /* 0x4e (XK_N) */ - 0x2a18, /* 0x4f (XK_O) */ + 0x2a23, /* 0x48 (XK_H) */ + 0x2a17, /* 0x49 (XK_I) */ + 0x2a24, /* 0x4a (XK_J) */ + 0x2a25, /* 0x4b (XK_K) */ + 0x2a26, /* 0x4c (XK_L) */ + 0x2a32, /* 0x4d (XK_M) */ + 0x2a31, /* 0x4e (XK_N) */ + 0x2a18, /* 0x4f (XK_O) */ - 0x2a19, /* 0x50 (XK_P) */ - 0x2a10, /* 0x51 (XK_Q) */ - 0x2a13, /* 0x52 (XK_R) */ - 0x2a1f, /* 0x53 (XK_S) */ - 0x2a14, /* 0x54 (XK_T) */ - 0x2a16, /* 0x55 (XK_U) */ - 0x2a2f, /* 0x56 (XK_V) */ - 0x2a11, /* 0x57 (XK_W) */ + 0x2a19, /* 0x50 (XK_P) */ + 0x2a10, /* 0x51 (XK_Q) */ + 0x2a13, /* 0x52 (XK_R) */ + 0x2a1f, /* 0x53 (XK_S) */ + 0x2a14, /* 0x54 (XK_T) */ + 0x2a16, /* 0x55 (XK_U) */ + 0x2a2f, /* 0x56 (XK_V) */ + 0x2a11, /* 0x57 (XK_W) */ - 0x2a2d, /* 0x58 (XK_X) */ - 0x2a15, /* 0x59 (XK_Y) */ - 0x2a2c, /* 0x5a (XK_Z) */ - 0x001a, /* 0x5b (XK_bracketleft) */ - 0x002b, /* 0x5c (XK_backslash) */ - 0x001b, /* 0x5d (XK_bracketright) */ - 0x2a07, /* 0x5e (XK_asciicircum) */ - 0x2a0c, /* 0x5f (XK_underscore) */ + 0x2a2d, /* 0x58 (XK_X) */ + 0x2a15, /* 0x59 (XK_Y) */ + 0x2a2c, /* 0x5a (XK_Z) */ + 0x001a, /* 0x5b (XK_bracketleft) */ + 0x002b, /* 0x5c (XK_backslash) */ + 0x001b, /* 0x5d (XK_bracketright) */ + 0x2a07, /* 0x5e (XK_asciicircum) */ + 0x2a0c, /* 0x5f (XK_underscore) */ - 0x0029, /* 0x60 (XK_grave) */ - 0x001e, /* 0x61 (XK_a) */ - 0x0030, /* 0x62 (XK_b) */ - 0x002e, /* 0x63 (XK_c) */ - 0x0020, /* 0x64 (XK_d) */ - 0x0012, /* 0x65 (XK_e) */ - 0x0021, /* 0x66 (XK_f) */ - 0x0022, /* 0x67 (XK_g) */ + 0x0029, /* 0x60 (XK_grave) */ + 0x001e, /* 0x61 (XK_a) */ + 0x0030, /* 0x62 (XK_b) */ + 0x002e, /* 0x63 (XK_c) */ + 0x0020, /* 0x64 (XK_d) */ + 0x0012, /* 0x65 (XK_e) */ + 0x0021, /* 0x66 (XK_f) */ + 0x0022, /* 0x67 (XK_g) */ - 0x0023, /* 0x68 (XK_h) */ - 0x0017, /* 0x69 (XK_i) */ - 0x0024, /* 0x6a (XK_j) */ - 0x0025, /* 0x6b (XK_k) */ - 0x0026, /* 0x6c (XK_l) */ - 0x0032, /* 0x6d (XK_m) */ - 0x0031, /* 0x6e (XK_n) */ - 0x0018, /* 0x6f (XK_o) */ + 0x0023, /* 0x68 (XK_h) */ + 0x0017, /* 0x69 (XK_i) */ + 0x0024, /* 0x6a (XK_j) */ + 0x0025, /* 0x6b (XK_k) */ + 0x0026, /* 0x6c (XK_l) */ + 0x0032, /* 0x6d (XK_m) */ + 0x0031, /* 0x6e (XK_n) */ + 0x0018, /* 0x6f (XK_o) */ - 0x0019, /* 0x70 (XK_p) */ - 0x0010, /* 0x71 (XK_q) */ - 0x0013, /* 0x72 (XK_r) */ - 0x001f, /* 0x73 (XK_s) */ - 0x0014, /* 0x74 (XK_t) */ - 0x0016, /* 0x75 (XK_u) */ - 0x002f, /* 0x76 (XK_v) */ - 0x0011, /* 0x77 (XK_w) */ + 0x0019, /* 0x70 (XK_p) */ + 0x0010, /* 0x71 (XK_q) */ + 0x0013, /* 0x72 (XK_r) */ + 0x001f, /* 0x73 (XK_s) */ + 0x0014, /* 0x74 (XK_t) */ + 0x0016, /* 0x75 (XK_u) */ + 0x002f, /* 0x76 (XK_v) */ + 0x0011, /* 0x77 (XK_w) */ - 0x002d, /* 0x78 (XK_x) */ - 0x0015, /* 0x79 (XK_y) */ - 0x002c, /* 0x7a (XK_z) */ - 0x2a1a, /* 0x7b (XK_braceleft) */ - 0x2a2b, /* 0x7c (XK_bar) */ - 0x2a1b, /* 0x7d (XK_braceright) */ - 0x2a29, /* 0x7e (XK_asciitilde) */ - 0x0053, /* 0x7f (XK_delete) */ + 0x002d, /* 0x78 (XK_x) */ + 0x0015, /* 0x79 (XK_y) */ + 0x002c, /* 0x7a (XK_z) */ + 0x2a1a, /* 0x7b (XK_braceleft) */ + 0x2a2b, /* 0x7c (XK_bar) */ + 0x2a1b, /* 0x7d (XK_braceright) */ + 0x2a29, /* 0x7e (XK_asciitilde) */ + 0x0053, /* 0x7f (XK_delete) */ - 0x0000, /* 0x80 */ + 0x0000, /* 0x80 */ 0x0000, 0x0000, 0x0000, @@ -196,7 +195,7 @@ static int keysyms_00[] = { 0x0000, 0x0000, - 0x0000, /* 0x88 */ + 0x0000, /* 0x88 */ 0x0000, 0x0000, 0x0000, @@ -205,7 +204,7 @@ static int keysyms_00[] = { 0x0000, 0x0000, - 0x0000, /* 0x90 */ + 0x0000, /* 0x90 */ 0x0000, 0x0000, 0x0000, @@ -214,7 +213,7 @@ static int keysyms_00[] = { 0x0000, 0x0000, - 0x0000, /* 0x98 */ + 0x0000, /* 0x98 */ 0x0000, 0x0000, 0x0000, @@ -223,117 +222,117 @@ static int keysyms_00[] = { 0x0000, 0x0000, - 0x0000, /* 0xa0 (XK_nobreakspace) */ - 0x0000, /* 0xa1 (XK_exclamdown) */ - 0x0000, /* 0xa2 (XK_cent) */ - 0x0000, /* 0xa3 (XK_sterling) */ - 0x0000, /* 0xa4 (XK_currency) */ - 0x0000, /* 0xa5 (XK_yen) */ - 0x0000, /* 0xa6 (XK_brokenbar) */ - 0x0000, /* 0xa7 (XK_section) */ + 0x0000, /* 0xa0 (XK_nobreakspace) */ + 0x0000, /* 0xa1 (XK_exclamdown) */ + 0x0000, /* 0xa2 (XK_cent) */ + 0x0000, /* 0xa3 (XK_sterling) */ + 0x0000, /* 0xa4 (XK_currency) */ + 0x0000, /* 0xa5 (XK_yen) */ + 0x0000, /* 0xa6 (XK_brokenbar) */ + 0x0000, /* 0xa7 (XK_section) */ - 0x0000, /* 0xa8 (XK_diaeresis) */ - 0x0000, /* 0xa9 (XK_copyright) */ - 0x0000, /* 0xaa (XK_ordfeminine) */ - 0x0000, /* 0xab (XK_guillemotleft) */ - 0x0000, /* 0xac (XK_notsign) */ - 0x0000, /* 0xad (XK_hyphen) */ - 0x0000, /* 0xae (XK_registered) */ - 0x0000, /* 0xaf (XK_macron) */ + 0x0000, /* 0xa8 (XK_diaeresis) */ + 0x0000, /* 0xa9 (XK_copyright) */ + 0x0000, /* 0xaa (XK_ordfeminine) */ + 0x0000, /* 0xab (XK_guillemotleft) */ + 0x0000, /* 0xac (XK_notsign) */ + 0x0000, /* 0xad (XK_hyphen) */ + 0x0000, /* 0xae (XK_registered) */ + 0x0000, /* 0xaf (XK_macron) */ - 0x0000, /* 0xb0 (XK_degree) */ - 0x0000, /* 0xb1 (XK_plusminus) */ - 0x0000, /* 0xb2 (XK_twosuperior) */ - 0x0000, /* 0xb3 (XK_threesuperior) */ - 0x0000, /* 0xb4 (XK_acute) */ - 0x0000, /* 0xb5 (XK_mu) */ - 0x0000, /* 0xb6 (XK_paragraph) */ - 0x0000, /* 0xb7 (XK_periodcentered) */ + 0x0000, /* 0xb0 (XK_degree) */ + 0x0000, /* 0xb1 (XK_plusminus) */ + 0x0000, /* 0xb2 (XK_twosuperior) */ + 0x0000, /* 0xb3 (XK_threesuperior) */ + 0x0000, /* 0xb4 (XK_acute) */ + 0x0000, /* 0xb5 (XK_mu) */ + 0x0000, /* 0xb6 (XK_paragraph) */ + 0x0000, /* 0xb7 (XK_periodcentered) */ - 0x0000, /* 0xb8 (XK_cedilla) */ - 0x0000, /* 0xb9 (XK_onesuperior) */ - 0x0000, /* 0xba (XK_masculine) */ - 0x0000, /* 0xbb (XK_guillemotright) */ - 0x0000, /* 0xbc (XK_onequarter) */ - 0x0000, /* 0xbd (XK_onehalf) */ - 0x0000, /* 0xbe (XK_threequarters) */ - 0x0000, /* 0xbf (XK_questiondown) */ + 0x0000, /* 0xb8 (XK_cedilla) */ + 0x0000, /* 0xb9 (XK_onesuperior) */ + 0x0000, /* 0xba (XK_masculine) */ + 0x0000, /* 0xbb (XK_guillemotright) */ + 0x0000, /* 0xbc (XK_onequarter) */ + 0x0000, /* 0xbd (XK_onehalf) */ + 0x0000, /* 0xbe (XK_threequarters) */ + 0x0000, /* 0xbf (XK_questiondown) */ - 0x0000, /* 0xc0 (XK_Agrave) */ - 0x0000, /* 0xc1 (XK_Aacute) */ - 0x0000, /* 0xc2 (XK_Acircumflex) */ - 0x0000, /* 0xc3 (XK_Atilde) */ - 0x0000, /* 0xc4 (XK_Adiaeresis) */ - 0x0000, /* 0xc5 (XK_Aring) */ - 0x0000, /* 0xc6 (XK_AE) */ - 0x0000, /* 0xc7 (XK_Ccedilla) */ + 0x0000, /* 0xc0 (XK_Agrave) */ + 0x0000, /* 0xc1 (XK_Aacute) */ + 0x0000, /* 0xc2 (XK_Acircumflex) */ + 0x0000, /* 0xc3 (XK_Atilde) */ + 0x0000, /* 0xc4 (XK_Adiaeresis) */ + 0x0000, /* 0xc5 (XK_Aring) */ + 0x0000, /* 0xc6 (XK_AE) */ + 0x0000, /* 0xc7 (XK_Ccedilla) */ - 0x0000, /* 0xc8 (XK_Egrave) */ - 0x0000, /* 0xc9 (XK_Eacute) */ - 0x0000, /* 0xca (XK_Ecircumflex) */ - 0x0000, /* 0xcb (XK_Ediaeresis) */ - 0x0000, /* 0xcc (XK_Igrave) */ - 0x0000, /* 0xcd (XK_Iacute) */ - 0x0000, /* 0xce (XK_Icircumflex) */ - 0x0000, /* 0xcf (XK_Idiaeresis) */ + 0x0000, /* 0xc8 (XK_Egrave) */ + 0x0000, /* 0xc9 (XK_Eacute) */ + 0x0000, /* 0xca (XK_Ecircumflex) */ + 0x0000, /* 0xcb (XK_Ediaeresis) */ + 0x0000, /* 0xcc (XK_Igrave) */ + 0x0000, /* 0xcd (XK_Iacute) */ + 0x0000, /* 0xce (XK_Icircumflex) */ + 0x0000, /* 0xcf (XK_Idiaeresis) */ - 0x0000, /* 0xd0 (XK_ETH, also XK_Eth) */ - 0x0000, /* 0xd1 (XK_Ntilde) */ - 0x0000, /* 0xd2 (XK_Ograve) */ - 0x0000, /* 0xd3 (XK_Oacute) */ - 0x0000, /* 0xd4 (XK_Ocircumflex) */ - 0x0000, /* 0xd5 (XK_Otilde) */ - 0x0000, /* 0xd6 (XK_Odiaeresis) */ - 0x0000, /* 0xd7 (XK_multiply) */ + 0x0000, /* 0xd0 (XK_ETH, also XK_Eth) */ + 0x0000, /* 0xd1 (XK_Ntilde) */ + 0x0000, /* 0xd2 (XK_Ograve) */ + 0x0000, /* 0xd3 (XK_Oacute) */ + 0x0000, /* 0xd4 (XK_Ocircumflex) */ + 0x0000, /* 0xd5 (XK_Otilde) */ + 0x0000, /* 0xd6 (XK_Odiaeresis) */ + 0x0000, /* 0xd7 (XK_multiply) */ - 0x0000, /* 0xd8 (XK_Ooblique) */ - 0x0000, /* 0xd9 (XK_Ugrave) */ - 0x0000, /* 0xda (XK_Uacute) */ - 0x0000, /* 0xdb (XK_Ucircumflex) */ - 0x0000, /* 0xdc (XK_Udiaeresis) */ - 0x0000, /* 0xdd (XK_Yacute) */ - 0x0000, /* 0xde (XK_THORN) */ - 0x0000, /* 0xdf (XK_ssharp) */ + 0x0000, /* 0xd8 (XK_Ooblique) */ + 0x0000, /* 0xd9 (XK_Ugrave) */ + 0x0000, /* 0xda (XK_Uacute) */ + 0x0000, /* 0xdb (XK_Ucircumflex) */ + 0x0000, /* 0xdc (XK_Udiaeresis) */ + 0x0000, /* 0xdd (XK_Yacute) */ + 0x0000, /* 0xde (XK_THORN) */ + 0x0000, /* 0xdf (XK_ssharp) */ - 0x0000, /* 0xe0 (XK_agrave) */ - 0x0000, /* 0xe1 (XK_aacute) */ - 0x0000, /* 0xe2 (XK_acircumflex) */ - 0x0000, /* 0xe3 (XK_atilde) */ - 0x0000, /* 0xe4 (XK_adiaeresis) */ - 0x0000, /* 0xe5 (XK_aring) */ - 0x0000, /* 0xe6 (XK_ae) */ - 0x0000, /* 0xe7 (XK_ccedilla) */ + 0x0000, /* 0xe0 (XK_agrave) */ + 0x0000, /* 0xe1 (XK_aacute) */ + 0x0000, /* 0xe2 (XK_acircumflex) */ + 0x0000, /* 0xe3 (XK_atilde) */ + 0x0000, /* 0xe4 (XK_adiaeresis) */ + 0x0000, /* 0xe5 (XK_aring) */ + 0x0000, /* 0xe6 (XK_ae) */ + 0x0000, /* 0xe7 (XK_ccedilla) */ - 0x0000, /* 0xe8 (XK_egrave) */ - 0x0000, /* 0xe9 (XK_eacute) */ - 0x0000, /* 0xea (XK_ecircumflex) */ - 0x0000, /* 0xeb (XK_ediaeresis) */ - 0x0000, /* 0xec (XK_igrave) */ - 0x0000, /* 0xed (XK_iacute) */ - 0x0000, /* 0xee (XK_icircumflex) */ - 0x0000, /* 0xef (XK_idiaeresis) */ + 0x0000, /* 0xe8 (XK_egrave) */ + 0x0000, /* 0xe9 (XK_eacute) */ + 0x0000, /* 0xea (XK_ecircumflex) */ + 0x0000, /* 0xeb (XK_ediaeresis) */ + 0x0000, /* 0xec (XK_igrave) */ + 0x0000, /* 0xed (XK_iacute) */ + 0x0000, /* 0xee (XK_icircumflex) */ + 0x0000, /* 0xef (XK_idiaeresis) */ - 0x0000, /* 0xf0 (XK_eth) */ - 0x0000, /* 0xf1 (XK_ntilde) */ - 0x0000, /* 0xf2 (XK_ograve) */ - 0x0000, /* 0xf3 (XK_oacute) */ - 0x0000, /* 0xf4 (XK_ocircumflex) */ - 0x0000, /* 0xf5 (XK_otilde) */ - 0x0000, /* 0xf6 (XK_odiaeresis) */ - 0x0000, /* 0xf7 (XK_division) */ + 0x0000, /* 0xf0 (XK_eth) */ + 0x0000, /* 0xf1 (XK_ntilde) */ + 0x0000, /* 0xf2 (XK_ograve) */ + 0x0000, /* 0xf3 (XK_oacute) */ + 0x0000, /* 0xf4 (XK_ocircumflex) */ + 0x0000, /* 0xf5 (XK_otilde) */ + 0x0000, /* 0xf6 (XK_odiaeresis) */ + 0x0000, /* 0xf7 (XK_division) */ - 0x0000, /* 0xf8 (XK_oslash) */ - 0x0000, /* 0xf9 (XK_ugrave) */ - 0x0000, /* 0xfa (XK_uacute) */ - 0x0000, /* 0xfb (XK_ucircumflex) */ - 0x0000, /* 0xfc (XK_udiaeresis) */ - 0x0000, /* 0xfd (XK_yacute) */ - 0x0000, /* 0xfe (XK_thorn) */ - 0x0000 /* 0xff (XK_ydiaeresis) */ + 0x0000, /* 0xf8 (XK_oslash) */ + 0x0000, /* 0xf9 (XK_ugrave) */ + 0x0000, /* 0xfa (XK_uacute) */ + 0x0000, /* 0xfb (XK_ucircumflex) */ + 0x0000, /* 0xfc (XK_udiaeresis) */ + 0x0000, /* 0xfd (XK_yacute) */ + 0x0000, /* 0xfe (XK_thorn) */ + 0x0000 /* 0xff (XK_ydiaeresis) */ }; static int keysyms_ff[] = { - 0x0000, /* 0x00 */ + 0x0000, /* 0x00 */ 0x0000, 0x0000, 0x0000, @@ -342,52 +341,52 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0x000e, /* 0x08 (XK_BackSpace) */ - 0x000f, /* 0x09 (XK_Tab) */ - 0x0000, /* 0x0a (XK_Linefeed) */ - 0x004c, /* 0x0b (XK_Clear) */ + 0x000e, /* 0x08 (XK_BackSpace) */ + 0x000f, /* 0x09 (XK_Tab) */ + 0x0000, /* 0x0a (XK_Linefeed) */ + 0x004c, /* 0x0b (XK_Clear) */ 0x0000, - 0x001c, /* 0x0d (XK_Return) */ + 0x001c, /* 0x0d (XK_Return) */ 0x0000, 0x0000, - 0x0000, /* 0x10 */ + 0x0000, /* 0x10 */ 0x0000, 0x0000, - 0xff45, /* 0x13 (XK_Pause) */ - 0x0000, /* 0x14 (XK_Scroll_Lock) */ - 0x0000, /* 0x15 (XK_Sys_Req) */ + 0xff45, /* 0x13 (XK_Pause) */ + 0x0000, /* 0x14 (XK_Scroll_Lock) */ + 0x0000, /* 0x15 (XK_Sys_Req) */ 0x0000, 0x0000, - 0x0000, /* 0x18 */ + 0x0000, /* 0x18 */ 0x0000, 0x0000, - 0x0001, /* 0x1b (XK_Escape) */ + 0x0001, /* 0x1b (XK_Escape) */ 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, /* 0x20 (XK_Multi_key) */ - 0x0000, /* 0x21 (XK_Kanji; Kanji, Kanji convert) */ - 0x0000, /* 0x22 (XK_Muhenkan; Cancel Conversion) */ - 0x0000, /* 0x23 (XK_Henkan_Mode; Start/Stop Conversion) */ - 0x0000, /* 0x24 (XK_Romaji; to Romaji) */ - 0x0000, /* 0x25 (XK_Hiragana; to Hiragana) */ - 0x0000, /* 0x26 (XK_Katakana; to Katakana) */ - 0x0000, /* 0x27 (XK_Hiragana_Katakana; Hiragana/Katakana toggle) */ + 0x0000, /* 0x20 (XK_Multi_key) */ + 0x0000, /* 0x21 (XK_Kanji; Kanji, Kanji convert) */ + 0x0000, /* 0x22 (XK_Muhenkan; Cancel Conversion) */ + 0x0000, /* 0x23 (XK_Henkan_Mode; Start/Stop Conversion) */ + 0x0000, /* 0x24 (XK_Romaji; to Romaji) */ + 0x0000, /* 0x25 (XK_Hiragana; to Hiragana) */ + 0x0000, /* 0x26 (XK_Katakana; to Katakana) */ + 0x0000, /* 0x27 (XK_Hiragana_Katakana; Hiragana/Katakana toggle) */ - 0x0000, /* 0x28 (XK_Zenkaku; to Zenkaku) */ - 0x0000, /* 0x29 (XK_Hankaku; to Hankaku */ - 0x0000, /* 0x2a (XK_Zenkaku_Hankaku; Zenkaku/Hankaku toggle) */ - 0x0000, /* 0x2b (XK_Touroku; Add to Dictionary) */ - 0x0000, /* 0x2c (XK_Massyo; Delete from Dictionary) */ - 0x0000, /* 0x2d (XK_Kana_Lock; Kana Lock) */ - 0x0000, /* 0x2e (XK_Kana_Shift; Kana Shift) */ - 0x0000, /* 0x2f (XK_Eisu_Shift; Alphanumeric Shift) */ + 0x0000, /* 0x28 (XK_Zenkaku; to Zenkaku) */ + 0x0000, /* 0x29 (XK_Hankaku; to Hankaku */ + 0x0000, /* 0x2a (XK_Zenkaku_Hankaku; Zenkaku/Hankaku toggle) */ + 0x0000, /* 0x2b (XK_Touroku; Add to Dictionary) */ + 0x0000, /* 0x2c (XK_Massyo; Delete from Dictionary) */ + 0x0000, /* 0x2d (XK_Kana_Lock; Kana Lock) */ + 0x0000, /* 0x2e (XK_Kana_Shift; Kana Shift) */ + 0x0000, /* 0x2f (XK_Eisu_Shift; Alphanumeric Shift) */ - 0x0000, /* 0x30 (XK_Eisu_toggle; Alphanumeric toggle) */ + 0x0000, /* 0x30 (XK_Eisu_toggle; Alphanumeric toggle) */ 0x0000, 0x0000, 0x0000, @@ -396,16 +395,16 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0x0000, /* 0x38 */ + 0x0000, /* 0x38 */ 0x0000, 0x0000, 0x0000, - 0x0000, /* 0x3c (XK_SingleCandidate) */ - 0x0000, /* 0x3d (XK_MultipleCandidate/XK_Zen_Koho) */ - 0x0000, /* 0x3e (XK_PreviousCandidate/XK_Mae_Koho) */ + 0x0000, /* 0x3c (XK_SingleCandidate) */ + 0x0000, /* 0x3d (XK_MultipleCandidate/XK_Zen_Koho) */ + 0x0000, /* 0x3e (XK_PreviousCandidate/XK_Mae_Koho) */ 0x0000, - 0x0000, /* 0x40 */ + 0x0000, /* 0x40 */ 0x0000, 0x0000, 0x0000, @@ -414,7 +413,7 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0x0000, /* 0x48 */ + 0x0000, /* 0x48 */ 0x0000, 0x0000, 0x0000, @@ -423,16 +422,16 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0xe047, /* 0x50 (XK_Home) */ - 0xe04b, /* 0x51 (XK_Left) */ - 0xe048, /* 0x52 (XK_Up) */ - 0xe04d, /* 0x53 (XK_Right) */ - 0xe050, /* 0x54 (XK_Down) */ - 0xe049, /* 0x55 (XK_Prior, XK_Page_Up) */ - 0xe051, /* 0x56 (XK_Next, XK_Page_Down) */ - 0xe04f, /* 0x57 (XK_End) */ + 0xe047, /* 0x50 (XK_Home) */ + 0xe04b, /* 0x51 (XK_Left) */ + 0xe048, /* 0x52 (XK_Up) */ + 0xe04d, /* 0x53 (XK_Right) */ + 0xe050, /* 0x54 (XK_Down) */ + 0xe049, /* 0x55 (XK_Prior, XK_Page_Up) */ + 0xe051, /* 0x56 (XK_Next, XK_Page_Down) */ + 0xe04f, /* 0x57 (XK_End) */ - 0x0000, /* 0x58 (XK_Begin) */ + 0x0000, /* 0x58 (XK_Begin) */ 0x0000, 0x0000, 0x0000, @@ -441,25 +440,25 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0x0000, /* 0x60 (XK_Select) */ - 0x0000, /* 0x61 (XK_Print) */ - 0x0000, /* 0x62 (XK_Execute) */ - 0xe052, /* 0x63 (XK_Insert) */ + 0x0000, /* 0x60 (XK_Select) */ + 0x0000, /* 0x61 (XK_Print) */ + 0x0000, /* 0x62 (XK_Execute) */ + 0xe052, /* 0x63 (XK_Insert) */ 0x0000, - 0x0000, /* 0x65 (XK_Undo) */ - 0x0000, /* 0x66 (XK_Redo) */ - 0xe05d, /* 0x67 (XK_Menu) */ + 0x0000, /* 0x65 (XK_Undo) */ + 0x0000, /* 0x66 (XK_Redo) */ + 0xe05d, /* 0x67 (XK_Menu) */ - 0x0000, /* 0x68 (XK_Find) */ - 0x0000, /* 0x69 (XK_Cancel) */ - 0x0000, /* 0x6a (XK_Help) */ - 0x0000, /* 0x6b (XK_Break) */ + 0x0000, /* 0x68 (XK_Find) */ + 0x0000, /* 0x69 (XK_Cancel) */ + 0x0000, /* 0x6a (XK_Help) */ + 0x0000, /* 0x6b (XK_Break) */ 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, /* 0x70 */ + 0x0000, /* 0x70 */ 0x0000, 0x0000, 0x0000, @@ -468,16 +467,16 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0x0000, /* 0x78 */ + 0x0000, /* 0x78 */ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0x0000, /* 0x7e (XK_Mode_switch,XK_script_switch) */ - 0x0045, /* 0x7f (XK_Num_Lock) */ + 0x0000, /* 0x7e (XK_Mode_switch,XK_script_switch) */ + 0x0045, /* 0x7f (XK_Num_Lock) */ - 0x0039, /* 0x80 (XK_KP_Space) */ + 0x0039, /* 0x80 (XK_KP_Space) */ 0x0000, 0x0000, 0x0000, @@ -486,34 +485,34 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0x0000, /* 0x88 */ - 0x000f, /* 0x89 (XK_KP_Tab) */ + 0x0000, /* 0x88 */ + 0x000f, /* 0x89 (XK_KP_Tab) */ 0x0000, 0x0000, 0x0000, - 0xe01c, /* 0x8d (XK_KP_Enter) */ + 0xe01c, /* 0x8d (XK_KP_Enter) */ 0x0000, 0x0000, - 0x0000, /* 0x90 */ - 0x0000, /* 0x91 (XK_KP_F1) */ - 0x0000, /* 0x92 (XK_KP_F2) */ - 0x0000, /* 0x93 (XK_KP_F3) */ - 0x0000, /* 0x94 (XK_KP_F4) */ - 0x0047, /* 0x95 (XK_KP_Home) */ - 0x004b, /* 0x96 (XK_KP_Left) */ - 0x0048, /* 0x97 (XK_KP_Up) */ + 0x0000, /* 0x90 */ + 0x0000, /* 0x91 (XK_KP_F1) */ + 0x0000, /* 0x92 (XK_KP_F2) */ + 0x0000, /* 0x93 (XK_KP_F3) */ + 0x0000, /* 0x94 (XK_KP_F4) */ + 0x0047, /* 0x95 (XK_KP_Home) */ + 0x004b, /* 0x96 (XK_KP_Left) */ + 0x0048, /* 0x97 (XK_KP_Up) */ - 0x004d, /* 0x98 (XK_KP_Right) */ - 0x0050, /* 0x99 (XK_KP_Down) */ - 0x0049, /* 0x9a (XK_KP_Prior,XK_KP_Page_Up) */ - 0x0051, /* 0x9b (XK_KP_Next,XK_KP_Page_Down) */ - 0x004f, /* 0x9c (XK_KP_End) */ - 0x0000, /* 0x9d (XK_KP_Begin) */ - 0x0052, /* 0x9e (XK_KP_Insert) */ - 0x0053, /* 0x9f (XK_KP_Delete) */ + 0x004d, /* 0x98 (XK_KP_Right) */ + 0x0050, /* 0x99 (XK_KP_Down) */ + 0x0049, /* 0x9a (XK_KP_Prior,XK_KP_Page_Up) */ + 0x0051, /* 0x9b (XK_KP_Next,XK_KP_Page_Down) */ + 0x004f, /* 0x9c (XK_KP_End) */ + 0x0000, /* 0x9d (XK_KP_Begin) */ + 0x0052, /* 0x9e (XK_KP_Insert) */ + 0x0053, /* 0x9f (XK_KP_Delete) */ - 0x0000, /* 0xa0 */ + 0x0000, /* 0xa0 */ 0x0000, 0x0000, 0x0000, @@ -522,88 +521,88 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0x0000, /* 0xa8 */ + 0x0000, /* 0xa8 */ 0x0000, - 0x0037, /* 0xaa (XK_KP_Multiply) */ - 0x004e, /* 0xab (XK_KP_Add) */ - 0x0000, /* 0xac (XK_KP_Separator) */ - 0x004a, /* 0xad (XK_KP_Subtract) */ - 0x0000, /* 0xae (XK_KP_Decimal) */ - 0x0035, /* 0xaf (XK_KP_Divide) */ + 0x0037, /* 0xaa (XK_KP_Multiply) */ + 0x004e, /* 0xab (XK_KP_Add) */ + 0x0000, /* 0xac (XK_KP_Separator) */ + 0x004a, /* 0xad (XK_KP_Subtract) */ + 0x0000, /* 0xae (XK_KP_Decimal) */ + 0x0035, /* 0xaf (XK_KP_Divide) */ - 0x0052, /* 0xb0 (XK_KP_0) */ - 0x004f, /* 0xb1 (XK_KP_1) */ - 0x0050, /* 0xb2 (XK_KP_2) */ - 0x0051, /* 0xb3 (XK_KP_3) */ - 0x004b, /* 0xb4 (XK_KP_4) */ - 0x004c, /* 0xb5 (XK_KP_5) */ - 0x004d, /* 0xb6 (XK_KP_6) */ - 0x0047, /* 0xb7 (XK_KP_7) */ + 0x0052, /* 0xb0 (XK_KP_0) */ + 0x004f, /* 0xb1 (XK_KP_1) */ + 0x0050, /* 0xb2 (XK_KP_2) */ + 0x0051, /* 0xb3 (XK_KP_3) */ + 0x004b, /* 0xb4 (XK_KP_4) */ + 0x004c, /* 0xb5 (XK_KP_5) */ + 0x004d, /* 0xb6 (XK_KP_6) */ + 0x0047, /* 0xb7 (XK_KP_7) */ - 0x0048, /* 0xb8 (XK_KP_8) */ - 0x0049, /* 0xb9 (XK_KP_9) */ + 0x0048, /* 0xb8 (XK_KP_8) */ + 0x0049, /* 0xb9 (XK_KP_9) */ 0x0000, 0x0000, 0x0000, - 0x000d, /* 0xbd (XK_KP_Equal) */ - 0x003b, /* 0xbe (XK_F1) */ - 0x003c, /* 0xbf (XK_F2) */ + 0x000d, /* 0xbd (XK_KP_Equal) */ + 0x003b, /* 0xbe (XK_F1) */ + 0x003c, /* 0xbf (XK_F2) */ - 0x003d, /* 0xc0 (XK_F3) */ - 0x003e, /* 0xc1 (XK_F4) */ - 0x003f, /* 0xc2 (XK_F5) */ - 0x0040, /* 0xc3 (XK_F6) */ - 0x0041, /* 0xc4 (XK_F7) */ - 0x0042, /* 0xc5 (XK_F8) */ - 0x0043, /* 0xc6 (XK_F9) */ - 0x0044, /* 0xc7 (XK_F10) */ + 0x003d, /* 0xc0 (XK_F3) */ + 0x003e, /* 0xc1 (XK_F4) */ + 0x003f, /* 0xc2 (XK_F5) */ + 0x0040, /* 0xc3 (XK_F6) */ + 0x0041, /* 0xc4 (XK_F7) */ + 0x0042, /* 0xc5 (XK_F8) */ + 0x0043, /* 0xc6 (XK_F9) */ + 0x0044, /* 0xc7 (XK_F10) */ - 0x0057, /* 0xc8 (XK_F11,XK_L1) */ - 0x0058, /* 0xc9 (XK_F12,XK_L2) */ - 0x0000, /* 0xca (XK_F13,XK_L3) */ - 0x0000, /* 0xcb (XK_F14,XK_L4) */ - 0x0000, /* 0xcc (XK_F15,XK_L5) */ - 0x0000, /* 0xcd (XK_F16,XK_L6) */ - 0x0000, /* 0xce (XK_F17,XK_L7) */ - 0x0000, /* 0xcf (XK_F18,XK_L8) */ + 0x0057, /* 0xc8 (XK_F11,XK_L1) */ + 0x0058, /* 0xc9 (XK_F12,XK_L2) */ + 0x0000, /* 0xca (XK_F13,XK_L3) */ + 0x0000, /* 0xcb (XK_F14,XK_L4) */ + 0x0000, /* 0xcc (XK_F15,XK_L5) */ + 0x0000, /* 0xcd (XK_F16,XK_L6) */ + 0x0000, /* 0xce (XK_F17,XK_L7) */ + 0x0000, /* 0xcf (XK_F18,XK_L8) */ - 0x0000, /* 0xd0 (XK_F19,XK_L9) */ - 0x0000, /* 0xd1 (XK_F20,XK_L10) */ - 0x0000, /* 0xd2 (XK_F21,XK_R1) */ - 0x0000, /* 0xd3 (XK_F22,XK_R2) */ - 0x0000, /* 0xd4 (XK_F23,XK_R3) */ - 0x0000, /* 0xd5 (XK_F24,XK_R4) */ - 0x0000, /* 0xd6 (XK_F25,XK_R5) */ - 0x0000, /* 0xd7 (XK_F26,XK_R6) */ + 0x0000, /* 0xd0 (XK_F19,XK_L9) */ + 0x0000, /* 0xd1 (XK_F20,XK_L10) */ + 0x0000, /* 0xd2 (XK_F21,XK_R1) */ + 0x0000, /* 0xd3 (XK_F22,XK_R2) */ + 0x0000, /* 0xd4 (XK_F23,XK_R3) */ + 0x0000, /* 0xd5 (XK_F24,XK_R4) */ + 0x0000, /* 0xd6 (XK_F25,XK_R5) */ + 0x0000, /* 0xd7 (XK_F26,XK_R6) */ - 0x0000, /* 0xd8 (XK_F27,XK_R7) */ - 0x0000, /* 0xd9 (XK_F28,XK_R8) */ - 0x0000, /* 0xda (XK_F29,XK_R9) */ - 0x0000, /* 0xdb (XK_F30,XK_R10) */ - 0x0000, /* 0xdc (XK_F31,XK_R11) */ - 0x0000, /* 0xdd (XK_F32,XK_R12) */ - 0x0000, /* 0xde (XK_F33,XK_R13) */ - 0x0000, /* 0xdf (XK_F34,XK_R14) */ + 0x0000, /* 0xd8 (XK_F27,XK_R7) */ + 0x0000, /* 0xd9 (XK_F28,XK_R8) */ + 0x0000, /* 0xda (XK_F29,XK_R9) */ + 0x0000, /* 0xdb (XK_F30,XK_R10) */ + 0x0000, /* 0xdc (XK_F31,XK_R11) */ + 0x0000, /* 0xdd (XK_F32,XK_R12) */ + 0x0000, /* 0xde (XK_F33,XK_R13) */ + 0x0000, /* 0xdf (XK_F34,XK_R14) */ - 0x0000, /* 0xe0 (XK_F35,XK_R15) */ - 0x002a, /* 0xe1 (XK_Shift_L) */ - 0x0036, /* 0xe2 (XK_Shift_R) */ - 0x001d, /* 0xe3 (XK_Control_L) */ - 0xe01d, /* 0xe4 (XK_Control_R) */ - 0x003a, /* 0xe5 (XK_Caps_Lock) */ - 0x003a, /* 0xe6 (XK_Shift_Lock) */ - 0xe05b, /* 0xe7 (XK_Meta_L) */ + 0x0000, /* 0xe0 (XK_F35,XK_R15) */ + 0x002a, /* 0xe1 (XK_Shift_L) */ + 0x0036, /* 0xe2 (XK_Shift_R) */ + 0x001d, /* 0xe3 (XK_Control_L) */ + 0xe01d, /* 0xe4 (XK_Control_R) */ + 0x003a, /* 0xe5 (XK_Caps_Lock) */ + 0x003a, /* 0xe6 (XK_Shift_Lock) */ + 0xe05b, /* 0xe7 (XK_Meta_L) */ - 0xe05c, /* 0xe8 (XK_Meta_R) */ - 0x0038, /* 0xe9 (XK_Alt_L) */ - 0xe038, /* 0xea (XK_Alt_R) */ - 0x0000, /* 0xeb (XK_Super_L) */ - 0x0000, /* 0xec (XK_Super_R) */ - 0x0000, /* 0xed (XK_Hyper_L) */ - 0x0000, /* 0xee (XK_Hyper_R) */ + 0xe05c, /* 0xe8 (XK_Meta_R) */ + 0x0038, /* 0xe9 (XK_Alt_L) */ + 0xe038, /* 0xea (XK_Alt_R) */ + 0x0000, /* 0xeb (XK_Super_L) */ + 0x0000, /* 0xec (XK_Super_R) */ + 0x0000, /* 0xed (XK_Hyper_L) */ + 0x0000, /* 0xee (XK_Hyper_R) */ 0x0000, - 0x0000, /* 0xf0 */ + 0x0000, /* 0xf0 */ 0x0000, 0x0000, 0x0000, @@ -612,22 +611,20 @@ static int keysyms_ff[] = { 0x0000, 0x0000, - 0x0000, /* 0xf8 */ + 0x0000, /* 0xf8 */ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, - 0xe053 /* 0xff (XK_Delete) */ + 0xe053 /* 0xff (XK_Delete) */ }; - #ifdef ENABLE_VNC_KEYMAP_LOG int vnc_keymap_do_log = ENABLE_VNC_KEYMAP_LOG; #endif - static void vnc_keymap_log(const char *format, ...) { @@ -635,63 +632,62 @@ vnc_keymap_log(const char *format, ...) va_list ap; if (vnc_keymap_do_log) { - va_start(ap, format); - pclog_ex(format, ap); - va_end(ap); + va_start(ap, format); + pclog_ex(format, ap); + va_end(ap); } #endif } - void vnc_kbinput(int down, int k) { uint16_t scan; - switch(k >> 8) { - case 0x00: /* page 00, Latin-1 */ - scan = keysyms_00[k & 0xff]; - break; + switch (k >> 8) { + case 0x00: /* page 00, Latin-1 */ + scan = keysyms_00[k & 0xff]; + break; - case 0xff: /* page FF, Special */ - scan = keysyms_ff[k & 0xff]; - break; + case 0xff: /* page FF, Special */ + scan = keysyms_ff[k & 0xff]; + break; - default: - vnc_keymap_log("VNC: unhandled Xkbd page: %02x\n", k>>8); - return; + default: + vnc_keymap_log("VNC: unhandled Xkbd page: %02x\n", k >> 8); + return; } if (scan == 0x0000) { - vnc_keymap_log("VNC: unhandled Xkbd key: %d (%04x)\n", k, k); - return; + vnc_keymap_log("VNC: unhandled Xkbd key: %d (%04x)\n", k, k); + return; } /* Send this scancode sequence to the PC keyboard. */ switch (scan >> 8) { - case 0x00: - default: - if (scan & 0xff) - keyboard_input(down, scan & 0xff); - break; - case 0x2a: - if (scan & 0xff) { - if (down) { - keyboard_input(down, 0x2a); - keyboard_input(down, scan & 0xff); - } else { - keyboard_input(down, scan & 0xff); - keyboard_input(down, 0x2a); - } - } - break; - case 0xe0: - if (scan & 0xff) - keyboard_input(down, (scan & 0xff) | 0x100); - break; - case 0xe1: - if (scan == 0x1d) - keyboard_input(down, 0x100); - break; + case 0x00: + default: + if (scan & 0xff) + keyboard_input(down, scan & 0xff); + break; + case 0x2a: + if (scan & 0xff) { + if (down) { + keyboard_input(down, 0x2a); + keyboard_input(down, scan & 0xff); + } else { + keyboard_input(down, scan & 0xff); + keyboard_input(down, 0x2a); + } + } + break; + case 0xe0: + if (scan & 0xff) + keyboard_input(down, (scan & 0xff) | 0x100); + break; + case 0xe1: + if (scan == 0x1d) + keyboard_input(down, 0x100); + break; } }