MMU: Fix behavior of 64-bit memory reads (used by FPU and MMX), should no longer waste host cycles on extra unnecessary MMU translations and should also no longer MMU translate already translated addresses which was causing unpredictable results.
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@@ -1533,10 +1533,28 @@ readmemql(uint32_t addr)
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addr = addr64a[0] & rammask;
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map = read_mapping[addr >> MEM_GRANULARITY_BITS];
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if (map && map->read_l)
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return map->read_l(addr, map->priv) | ((uint64_t) map->read_l(addr + 4, map->priv) << 32);
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return readmemll(addr) | ((uint64_t) readmemll(addr + 4) << 32);
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if (map && map->read_l)
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return map->read_l(addr, map->priv) |
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((uint64_t) map->read_l(addr + 4, map->priv) << 32);
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if (map && map->read_w)
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return map->read_w(addr, map->priv) |
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((uint64_t) map->read_w(addr + 2, map->priv) << 16) |
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((uint64_t) map->read_w(addr + 4, map->priv) << 32) |
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((uint64_t) map->read_w(addr + 6, map->priv) << 48);
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if (map && map->read_b)
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return map->read_b(addr, map->priv) |
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((uint64_t) map->read_b(addr + 1, map->priv) << 8) |
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((uint64_t) map->read_b(addr + 2, map->priv) << 16) |
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((uint64_t) map->read_b(addr + 3, map->priv) << 24) |
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((uint64_t) map->read_b(addr + 4, map->priv) << 32) |
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((uint64_t) map->read_b(addr + 5, map->priv) << 40) |
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((uint64_t) map->read_b(addr + 6, map->priv) << 48) |
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((uint64_t) map->read_b(addr + 7, map->priv) << 56);
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return 0xffffffffffffffffULL;
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}
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void
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