claunia/86Box
1
0
Fork 0
Code Issues Pull Requests Actions 3 Packages Projects Releases Wiki Activity

Merge branch 'master' of https://github.com/86Box/86Box

Browse Source
This commit is contained in:
RichardG867
2021-03-07 22:38:16 -03:00
parent 2cd3fc23e4 b0f0c00d86
commit ead6e8f685
71 changed files with 3046 additions and 591 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/video/CMakeLists.txt
View File

@@ -33,10 +33,6 @@ if(NOT MSVC)
target_compile_options(vid PRIVATE "-msse2")
endif()
if(CL5422)
target_compile_definitions(vid PRIVATE USE_CL5422)
endif()
if(MGA)
target_compile_definitions(vid PRIVATE USE_MGA)
target_sources(vid PRIVATE vid_mga.c)

2
src/video/vid_cga.c
View File

@@ -138,7 +138,6 @@ cga_write(uint32_t addr, uint8_t val, void *p)
cga->charbuffer[offset] = cga->vram[addr & 0x3fff];
cga->charbuffer[offset | 1] = cga->vram[addr & 0x3fff];
}
egawrites++;
cga_waitstates(cga);
}
@@ -154,7 +153,6 @@ cga_read(uint32_t addr, void *p)
cga->charbuffer[offset] = cga->vram[addr & 0x3fff];
cga->charbuffer[offset | 1] = cga->vram[addr & 0x3fff];
}
egareads++;
return cga->vram[addr & 0x3fff];
}

2
src/video/vid_colorplus.c
View File

@@ -99,7 +99,6 @@ void colorplus_write(uint32_t addr, uint8_t val, void *p)
colorplus->cga.charbuffer[offset] = colorplus->cga.vram[addr & 0x7fff];
colorplus->cga.charbuffer[offset | 1] = colorplus->cga.vram[addr & 0x7fff];
}
egawrites++;
cycles -= 4;
}
@@ -124,7 +123,6 @@ uint8_t colorplus_read(uint32_t addr, void *p)
colorplus->cga.charbuffer[offset] = colorplus->cga.vram[addr & 0x7fff];
colorplus->cga.charbuffer[offset | 1] = colorplus->cga.vram[addr & 0x7fff];
}
egareads++;
return colorplus->cga.vram[addr & 0x7fff];
}

78
src/video/vid_ega.c
View File

@@ -43,6 +43,7 @@ void ega_doblit(int y1, int y2, int wx, int wy, ega_t *ega);
#define BIOS_SEGA_PATH L"roms/video/ega/lega.vbi"
#define BIOS_ATIEGA_PATH L"roms/video/ega/ATI EGA Wonder 800+ N1.00.BIN"
#define BIOS_ISKRA_PATH L"roms/video/ega/143-02.bin", L"roms/video/ega/143-03.bin"
#define BIOS_TSENG_PATH L"roms/video/ega/EGA ET2000.BIN"
enum {
@@ -50,14 +51,15 @@ enum {
EGA_COMPAQ,
EGA_SUPEREGA,
EGA_ATI,
EGA_ISKRA
EGA_ISKRA,
EGA_TSENG
};
static video_timings_t timing_ega = {VIDEO_ISA, 8, 16, 32, 8, 16, 32};
static uint8_t ega_rotate[8][256];
static uint32_t pallook16[256], pallook64[256];
static int old_overscan_color = 0;
static int ega_type = 0, old_overscan_color = 0;
extern uint8_t edatlookup[4][4];
@@ -256,38 +258,48 @@ uint8_t ega_in(uint16_t addr, void *p)
break;
case 0x3c0:
ret = ega->attraddr | ega->attr_palette_enable;
if (ega_type)
ret = ega->attraddr | ega->attr_palette_enable;
break;
case 0x3c1:
ret = ega->attrregs[ega->attraddr];
if (ega_type)
ret = ega->attrregs[ega->attraddr];
break;
case 0x3c2:
ret = (egaswitches & (8 >> egaswitchread)) ? 0x10 : 0x00;
break;
case 0x3c4:
ret = ega->seqaddr;
if (ega_type)
ret = ega->seqaddr;
break;
case 0x3c5:
ret = ega->seqregs[ega->seqaddr & 0xf];
if (ega_type)
ret = ega->seqregs[ega->seqaddr & 0xf];
break;
case 0x3c8:
ret = 2;
if (ega_type)
ret = 2;
break;
case 0x3cc:
ret = ega->miscout;
if (ega_type)
ret = ega->miscout;
break;
case 0x3ce:
ret = ega->gdcaddr;
if (ega_type)
ret = ega->gdcaddr;
break;
case 0x3cf:
ret = ega->gdcreg[ega->gdcaddr & 0xf];
if (ega_type)
ret = ega->gdcreg[ega->gdcaddr & 0xf];
break;
case 0x3d0: case 0x3d4:
ret = ega->crtcreg;
if (ega_type)
ret = ega->crtcreg;
break;
case 0x3d1:
case 0x3d5:
ret = ega->crtc[ega->crtcreg];
if (ega_type)
ret = ega->crtc[ega->crtcreg];
break;
case 0x3da:
ega->attrff = 0;
@@ -731,7 +743,6 @@ ega_write(uint32_t addr, uint8_t val, void *p)
uint8_t vala, valb, valc, vald;
int writemask2 = ega->writemask;
egawrites++;
cycles -= video_timing_write_b;
if (addr >= 0xB0000) addr &= 0x7fff;
@@ -858,7 +869,6 @@ ega_read(uint32_t addr, void *p)
uint8_t temp, temp2, temp3, temp4;
int readplane = ega->readplane;
egareads++;
cycles -= video_timing_read_b;
if (addr >= 0xb0000) addr &= 0x7fff;
else addr &= 0xffff;
@@ -1021,6 +1031,12 @@ ega_standalone_init(const device_t *info)
ega->x_add = 8;
ega->y_add = 14;
if ((info->local == EGA_IBM) || (info->local == EGA_ISKRA) ||
(info->local == EGA_TSENG))
ega_type = 0;
else
ega_type = 1;
switch(info->local) {
case EGA_IBM:
default:
@@ -1043,6 +1059,10 @@ ega_standalone_init(const device_t *info)
rom_init_interleaved(&ega->bios_rom, BIOS_ISKRA_PATH,
0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
break;
case EGA_TSENG:
rom_init(&ega->bios_rom, BIOS_TSENG_PATH,
0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
break;
}
if ((ega->bios_rom.rom[0x3ffe] == 0xaa) && (ega->bios_rom.rom[0x3fff] == 0x55)) {
@@ -1101,6 +1121,20 @@ atiega_standalone_available(void)
}
static int
iskra_ega_standalone_available(void)
{
return rom_present(L"roms/video/ega/143-02.bin") && rom_present(L"roms/video/ega/143-03.bin");
}
static int
et2000_standalone_available(void)
{
return rom_present(BIOS_TSENG_PATH);
}
static void
ega_close(void *p)
{
@@ -1250,8 +1284,20 @@ const device_t iskra_ega_device =
DEVICE_ISA,
EGA_ISKRA,
ega_standalone_init, ega_close, NULL,
{ ega_standalone_available },
{ iskra_ega_standalone_available },
ega_speed_changed,
NULL,
ega_config
};
};
const device_t et2000_device =
{
"Tseng Labs ET2000",
DEVICE_ISA,
EGA_TSENG,
ega_standalone_init, ega_close, NULL,
{ et2000_standalone_available },
ega_speed_changed,
NULL,
ega_config
};

2
src/video/vid_genius.c
View File

@@ -261,7 +261,6 @@ void
genius_write(uint32_t addr, uint8_t val, void *p)
{
genius_t *genius = (genius_t *)p;
egawrites++;
genius_waitstates();
if (genius->genius_control & 1) {
@@ -288,7 +287,6 @@ genius_read(uint32_t addr, void *p)
{
genius_t *genius = (genius_t *)p;
uint8_t ret;
egareads++;
genius_waitstates();
if (genius->genius_control & 1) {

282
src/video/vid_ht216.c
View File

@@ -53,8 +53,12 @@ typedef struct ht216_t
uint32_t read_banks[2], write_banks[2];
uint8_t bg_latch[8];
uint8_t fg_latch[4];
uint8_t bg_plane_sel, fg_plane_sel;
uint8_t ht_regs[256];
uint8_t pos_regs[8];
} ht216_t;
@@ -94,7 +98,7 @@ uint8_t ht216_in(uint16_t addr, void *p);
#define BIOS_VIDEO7_VGA_1024I_PATH L"roms/video/video7/Video Seven VGA 1024i - BIOS - v2.19 - 435-0062-05 - U17 - 27C256.BIN"
static video_timings_t timing_v7vga_isa = {VIDEO_ISA, 3, 3, 6, 5, 5, 10};
static video_timings_t timing_v7vga_vlb = {VIDEO_ISA, 5, 5, 9, 20, 20, 30};
static video_timings_t timing_v7vga_vlb = {VIDEO_BUS, 5, 5, 9, 20, 20, 30};
#ifdef ENABLE_HT216_LOG
@@ -140,6 +144,10 @@ ht216_out(uint16_t addr, uint8_t val, void *p)
svga_recalctimings(svga);
break;
case 0x3c4:
svga->seqaddr = val;
break;
case 0x3c5:
if (svga->seqaddr == 4) {
svga->chain4 = val & 8;
@@ -152,6 +160,7 @@ ht216_out(uint16_t addr, uint8_t val, void *p)
} else if (svga->seqaddr >= 0x80 && ht216->ext_reg_enable) {
old = ht216->ht_regs[svga->seqaddr & 0xff];
ht216->ht_regs[svga->seqaddr & 0xff] = val;
switch (svga->seqaddr & 0xff) {
case 0x83:
svga->attraddr = val & 0x1f;
@@ -161,6 +170,8 @@ ht216_out(uint16_t addr, uint8_t val, void *p)
case 0x94:
case 0xff:
svga->hwcursor.addr = ((ht216->ht_regs[0x94] << 6) | (3 << 14) | ((ht216->ht_regs[0xff] & 0x60) << 11)) << 2;
if (svga->crtc[0x17] == 0xeb) /*Looks like that 1024x768 mono mode expects 512K of video memory*/
svga->hwcursor.addr += 0x40000;
break;
case 0x9c: case 0x9d:
svga->hwcursor.x = ht216->ht_regs[0x9d] | ((ht216->ht_regs[0x9c] & 7) << 8);
@@ -203,14 +214,41 @@ ht216_out(uint16_t addr, uint8_t val, void *p)
case 0xe9:
ht216_remap(ht216);
break;
case 0xec:
ht216->fg_latch[0] = val;
break;
case 0xed:
ht216->fg_latch[1] = val;
break;
case 0xee:
ht216->fg_latch[2] = val;
break;
case 0xef:
ht216->fg_latch[3] = val;
break;
case 0xf0:
ht216->fg_latch[ht216->fg_plane_sel] = val;
ht216->fg_plane_sel = (ht216->fg_plane_sel + 1) & 3;
break;
case 0xf1:
ht216->bg_plane_sel = val & 3;
ht216->fg_plane_sel = (val & 0x30) >> 4;
break;
case 0xf2:
svga->latch.b[ht216->bg_plane_sel] = val;
ht216->bg_plane_sel = (ht216->bg_plane_sel + 1) & 3;
break;
case 0xf6:
svga->vram_display_mask = (val & 0x40) ? ht216->vram_mask : 0x3ffff;
/*Bits 18 and 19 of the display memory address*/
ht216_log("HT216 reg 0xf6 write = %02x, vram mask = %08x\n", val & 0x40, svga->vram_display_mask);
ht216_log("HT216 reg 0xf6 write = %02x, vram mask = %08x, cr17 = %02x\n", val & 0x40, svga->vram_display_mask, svga->crtc[0x17]);
ht216_remap(ht216);
svga->fullchange = changeframecount;
svga_recalctimings(svga);
svga_recalctimings(svga);
break;
case 0xf9:
@@ -218,10 +256,10 @@ ht216_out(uint16_t addr, uint8_t val, void *p)
ht216_log("HT216 reg 0xf9 write = %02x\n", val & HT_REG_F9_XPSEL);
ht216_remap(ht216);
break;
case 0xfc:
svga->fullchange = changeframecount;
svga_recalctimings(svga);
svga_recalctimings(svga);
break;
}
switch (svga->seqaddr & 0xff) {
@@ -239,14 +277,14 @@ ht216_out(uint16_t addr, uint8_t val, void *p)
}
break;
case 0x3cf:
if (svga->gdcaddr == 6) {
if (val & 8)
svga->banked_mask = 0x7fff;
else
svga->banked_mask = 0xffff;
}
break;
case 0x3cf:
if (svga->gdcaddr == 6) {
if (val & 8)
svga->banked_mask = 0x7fff;
else
svga->banked_mask = 0xffff;
}
break;
case 0x3D4:
svga->crtcreg = val & 0x3f;
@@ -263,7 +301,7 @@ ht216_out(uint16_t addr, uint8_t val, void *p)
if (old != val) {
if (svga->crtcreg < 0xe || svga->crtcreg > 0x10) {
svga->fullchange = changeframecount;
svga_recalctimings(&ht216->svga);
svga_recalctimings(svga);
}
}
break;
@@ -289,6 +327,7 @@ ht216_in(uint16_t addr, void *p)
{
ht216_t *ht216 = (ht216_t *)p;
svga_t *svga = &ht216->svga;
uint8_t ret = 0xff;
if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
addr ^= 0x60;
@@ -296,11 +335,14 @@ ht216_in(uint16_t addr, void *p)
switch (addr) {
case 0x3c2:
break;
case 0x3c4:
return svga->seqaddr;
case 0x3c5:
if (svga->seqaddr == 6)
if (svga->seqaddr == 6) {
return ht216->ext_reg_enable;
if (svga->seqaddr >= 0x80) {
} else if (svga->seqaddr >= 0x80) {
if (ht216->ext_reg_enable) {
switch (svga->seqaddr & 0xff) {
case 0x83:
@@ -319,6 +361,16 @@ ht216_in(uint16_t addr, void *p)
return svga->latch.b[2];
case 0xa3:
return svga->latch.b[3];
case 0xf0:
ret = ht216->fg_latch[ht216->fg_plane_sel];
ht216->fg_plane_sel = 0;
return ret;
case 0xf2:
ret = svga->latch.b[ht216->bg_plane_sel];
ht216->bg_plane_sel = 0;
return ret;
}
return ht216->ht_regs[svga->seqaddr & 0xff];
} else
@@ -326,6 +378,9 @@ ht216_in(uint16_t addr, void *p)
}
break;
case 0x3cc:
return ht216->misc;
case 0x3D4:
return svga->crtcreg;
case 0x3D5:
@@ -406,9 +461,16 @@ ht216_remap(ht216_t *ht216)
} else {
/*One bank used*/
/*Bit 17 of the video memory address*/
if (ht216->misc & HT_MISC_PAGE_SEL) {
ht216->read_bank_reg[0] |= 0x20;
ht216->write_bank_reg[0] |= 0x20;
if ((ht216->misc & HT_MISC_PAGE_SEL)) {
ht216_log("MISC = %02x, lowres = %02x, CR17 = %02x\n", ht216->misc, svga->lowres, svga->crtc[0x17]);
if ((ht216->misc == 0x63 && svga->crtc[0x17] != 0xa3 && ((svga->crtc[0x17] != 0xe3 && !(ht216->ht_regs[0xfc] & HT_REG_FC_ECOLRE)) ||
(ht216->ht_regs[0xfc] & HT_REG_FC_ECOLRE))) || (ht216->misc != 0x63)) {
ht216->read_bank_reg[0] |= 0x20;
ht216->write_bank_reg[0] |= 0x20;
} else {
ht216->read_bank_reg[0] &= ~0x20;
ht216->write_bank_reg[0] &= ~0x20;
}
} else {
ht216->read_bank_reg[0] &= ~0x20;
ht216->write_bank_reg[0] &= ~0x20;
@@ -439,12 +501,12 @@ ht216_remap(ht216_t *ht216)
if (bank & 4)
ht216->read_bank_reg[0] |= 0x40;
else
ht216->read_bank_reg[0] &= ~0x40;
ht216->read_bank_reg[0] &= ~0x40;
if (bank & 8)
ht216->read_bank_reg[0] |= 0x80;
else
ht216->read_bank_reg[0] &= ~0x80;
ht216->read_bank_reg[0] &= ~0x80;
if (svga->chain4) {
/*Bit 16 of the video memory address*/
@@ -456,30 +518,109 @@ ht216_remap(ht216_t *ht216)
ht216->write_bank_reg[0] &= ~0x10;
}
}
if (!svga->chain4) {
/*In linear modes, bits 4 and 5 are ignored*/
ht216->read_bank_reg[0] &= ~0x30;
ht216->write_bank_reg[0] &= ~0x30;
}
if (svga->chain4) {
ht216->read_bank_reg[0] |= ht216->ht_regs[0xe8];
ht216->write_bank_reg[0] |= ht216->ht_regs[0xe8];
}
ht216->read_banks[0] = ht216->read_bank_reg[0] << 12;
ht216->write_banks[0] = ht216->write_bank_reg[0] << 12;
ht216->write_banks[0] = ht216->write_bank_reg[0] << 12;
ht216->read_banks[1] = ht216->read_banks[0] + (svga->chain4 ? 0x8000 : 0x20000);
ht216->write_banks[1] = ht216->write_banks[0] + (svga->chain4 ? 0x8000 : 0x20000);
if (!svga->chain4) {
ht216->read_banks[0] >>= 2;
ht216->read_banks[1] >>= 2;
ht216->write_banks[0] >>= 2;
ht216->write_banks[1] >>= 2;
}
}
}
ht216_log("ReadBank0 = %06x, ReadBank1 = %06x, Misc Page Sel = %02x, F6 reg = %02x, F9 Sel = %02x, FC = %02x, E0 split = %02x, E8 = %02x, E9 = %02x, chain4 = %02x, banked mask = %04x\n", ht216->read_banks[0], ht216->read_banks[1], ht216->misc & HT_MISC_PAGE_SEL, bank, ht216->ht_regs[0xf9] & HT_REG_F9_XPSEL, ht216->ht_regs[0xfc] & (HT_REG_FC_ECOLRE | 2), ht216->ht_regs[0xe0] & HT_REG_E0_SBAE, ht216->ht_regs[0xe8], ht216->ht_regs[0xe9], svga->chain4, svga->banked_mask);
ht216_log("ReadBank0 = %06x, ReadBank1 = %06x, Misc Page Sel = %02x, FF DRAM/VRAM = %02x, F6 reg = %02x, F9 Sel = %02x, FC = %02x, E0 split = %02x, E8 = %02x, E9 = %02x, chain4 = %02x, lowres = %02x, banked mask = %04x\n", ht216->read_banks[0], ht216->read_banks[1], ht216->misc & HT_MISC_PAGE_SEL, ht216->ht_regs[0xff] & 0x10, bank, ht216->ht_regs[0xf9] & HT_REG_F9_XPSEL, ht216->ht_regs[0xfc] & (HT_REG_FC_ECOLRE | 2), ht216->ht_regs[0xe0] & HT_REG_E0_SBAE, ht216->ht_regs[0xe8], ht216->ht_regs[0xe9], svga->chain4, svga->lowres, svga->banked_mask);
}
}
void
ht216_1_2bpp_highres(svga_t *svga)
{
int changed_offset, x;
int oddeven;
uint32_t addr, *p;
uint8_t edat[4];
uint8_t dat;
if ((svga->displine + svga->y_add) < 0)
return;
changed_offset = (svga->ma + (svga->sc & ~svga->crtc[0x17] & 3) * 0x8000) >> 12;
if (svga->changedvram[changed_offset] || svga->changedvram[changed_offset + 1] || svga->fullchange) {
p = &buffer32->line[svga->displine + svga->y_add][svga->x_add];
if (svga->firstline_draw == 2000)
svga->firstline_draw = svga->displine;
svga->lastline_draw = svga->displine;
for (x = 0; x <= (svga->hdisp + svga->scrollcache); x += 8) {
addr = svga->ma;
oddeven = 0;
if (!(svga->crtc[0x17] & 0x40)) {
addr = (addr << 1) & svga->vram_mask;
if (svga->seqregs[1] & 4)
oddeven = (addr & 4) ? 1 : 0;
addr &= ~7;
if ((svga->crtc[0x17] & 0x20) && (svga->ma & 0x20000))
addr |= 4;
if (!(svga->crtc[0x17] & 0x20) && (svga->ma & 0x8000))
addr |= 4;
}
if (!(svga->crtc[0x17] & 0x01))
addr = (addr & ~0x8000) | ((svga->sc & 1) ? 0x8000 : 0);
if (!(svga->crtc[0x17] & 0x02))
addr = (addr & ~0x10000) | ((svga->sc & 2) ? 0x10000 : 0);
if (svga->seqregs[1] & 4) {
edat[0] = svga->vram[addr | oddeven];
edat[2] = svga->vram[addr | oddeven | 0x2];
edat[1] = edat[3] = 0;
} else {
*(uint32_t *)(&edat[0]) = *(uint32_t *)(&svga->vram[addr]);
}
svga->ma += 4;
svga->ma &= svga->vram_mask;
if (svga->crtc[0x17] & 0x80) {
dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2);
p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]];
p[1] = svga->pallook[svga->egapal[dat & svga->plane_mask]];
dat = edatlookup[(edat[0] >> 4) & 3][(edat[1] >> 4) & 3] | (edatlookup[(edat[2] >> 4) & 3][(edat[3] >> 4) & 3] << 2);
p[2] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]];
p[3] = svga->pallook[svga->egapal[dat & svga->plane_mask]];
dat = edatlookup[(edat[0] >> 2) & 3][(edat[1] >> 2) & 3] | (edatlookup[(edat[2] >> 2) & 3][(edat[3] >> 2) & 3] << 2);
p[4] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]];
p[5] = svga->pallook[svga->egapal[dat & svga->plane_mask]];
dat = edatlookup[edat[0] & 3][edat[1] & 3] | (edatlookup[edat[2] & 3][edat[3] & 3] << 2);
p[6] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]];
p[7] = svga->pallook[svga->egapal[dat & svga->plane_mask]];
} else
memset(p, 0x00, 8 * sizeof(uint32_t));
p += 8;
}
}
}
void
ht216_recalctimings(svga_t *svga)
@@ -492,8 +633,7 @@ ht216_recalctimings(svga_t *svga)
case 6: svga->clock = (cpuclock * (double)(1ull << 32)) / 40000000.0; break;
case 10: svga->clock = (cpuclock * (double)(1ull << 32)) / 80000000.0; break;
}
svga->lowres = !(ht216->ht_regs[0xc8] & HT_REG_C8_E256);
svga->ma_latch |= ((ht216->ht_regs[0xf6] & 0x30) << 12);
svga->interlace = ht216->ht_regs[0xe0] & 1;
@@ -504,13 +644,34 @@ ht216_recalctimings(svga_t *svga)
high_res_256 = (svga->htotal * 8) > (svga->vtotal * 2);
ht216->adjust_cursor = 0;
if ((svga->bpp == 8) && (!svga->lowres || high_res_256)) {
if (high_res_256) {
svga->hdisp /= 2;
ht216->adjust_cursor = 1;
}
svga->render = svga_render_8bpp_highres;
if (svga->crtc[0x17] == 0xeb) {
svga->rowoffset <<= 1;
svga->render = ht216_1_2bpp_highres;
}
if (svga->bpp == 8) {
if (((ht216->ht_regs[0xc8] & HT_REG_C8_E256) || (svga->gdcreg[5] & 0x40)) && (!svga->lowres || (ht216->ht_regs[0xf6] & 0x80))) {
if (high_res_256) {
svga->hdisp >>= 1;
ht216->adjust_cursor = 1;
}
svga->render = svga_render_8bpp_highres;
} else if (svga->lowres) {
if (high_res_256) {
svga->hdisp >>= 1;
ht216->adjust_cursor = 1;
svga->render = svga_render_8bpp_highres;
} else {
svga->render = svga_render_8bpp_lowres;
}
}
}
if (svga->crtc[0x17] == 0xeb) /*Looks like that 1024x768 mono mode expects 512K of video memory*/
svga->vram_display_mask = 0x7ffff;
else
svga->vram_display_mask = (ht216->ht_regs[0xf6] & 0x40) ? ht216->vram_mask : 0x3ffff;
}
@@ -581,7 +742,6 @@ extalu(int op, uint8_t input_a, uint8_t input_b)
return val;
}
static void
ht216_dm_write(ht216_t *ht216, uint32_t addr, uint8_t cpu_dat, uint8_t cpu_dat_unexpanded)
{
@@ -603,7 +763,7 @@ ht216_dm_write(ht216_t *ht216, uint32_t addr, uint8_t cpu_dat, uint8_t cpu_dat_u
else if ((svga->chain4 || svga->fb_only) && (svga->writemode < 4)) {
writemask2 = 1 << (addr & 3);
addr &= ~3;
} else if (svga->chain2_write) {
} else if (svga->chain2_write && (svga->crtc[0x17] != 0xeb)) {
writemask2 &= ~0xa;
if (addr & 1)
writemask2 <<= 1;
@@ -651,7 +811,7 @@ ht216_dm_write(ht216_t *ht216, uint32_t addr, uint8_t cpu_dat, uint8_t cpu_dat_u
case 0x08:
case 0x0c:
for (i = 0; i < count; i++)
fg_data[i] = ht216->ht_regs[0xec + i];
fg_data[i] = ht216->fg_latch[i];
break;
}
@@ -805,7 +965,7 @@ ht216_dm_extalu_write(ht216_t *ht216, uint32_t addr, uint8_t cpu_dat, uint8_t bi
input_a = (ht216->ht_regs[0xf5] & (1 << ((addr & 7) ^ 7))) ? ht216->ht_regs[0xfa] : ht216->ht_regs[0xfb];
break;
case 0x08:
input_a = ht216->ht_regs[0xec + (addr & 3)];
input_a = ht216->fg_latch[addr & 3];
break;
case 0x0c:
input_a = ht216->bg_latch[addr & 7];
@@ -904,8 +1064,6 @@ ht216_write_common(ht216_t *ht216, uint32_t addr, uint8_t val)
cycles -= video_timing_write_b;
egawrites++;
addr &= 0xfffff;
val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7))));
@@ -964,13 +1122,17 @@ ht216_write(uint32_t addr, uint8_t val, void *p)
{
ht216_t *ht216 = (ht216_t *)p;
svga_t *svga = &ht216->svga;
uint32_t prev_addr = addr;
addr &= svga->banked_mask;
addr = (addr & 0x7fff) + ht216->write_banks[(addr >> 15) & 1];
if (!ht216->ht_regs[0xcd] && !ht216->ht_regs[0xfe] && !ht216->ht_regs[0xf3])
svga_write_linear(addr, val, svga);
else
if (svga->crtc[0x17] == 0xeb && !(svga->gdcreg[6] & 0xc) && prev_addr >= 0xb0000)
addr += 0x10000;
if (!ht216->ht_regs[0xcd] && !ht216->ht_regs[0xfe] && !ht216->ht_regs[0xf3] && svga->crtc[0x17] != 0xeb) {
svga_write_linear(addr, val, svga);
} else
ht216_write_common(ht216, addr, val);
}
@@ -980,11 +1142,15 @@ ht216_writew(uint32_t addr, uint16_t val, void *p)
{
ht216_t *ht216 = (ht216_t *)p;
svga_t *svga = &ht216->svga;
uint32_t prev_addr = addr;
addr &= svga->banked_mask;
addr = (addr & 0x7fff) + ht216->write_banks[(addr >> 15) & 1];
if (!ht216->ht_regs[0xcd] && !ht216->ht_regs[0xfe] && !ht216->ht_regs[0xf3])
if (svga->crtc[0x17] == 0xeb && !(svga->gdcreg[6] & 0xc) && prev_addr >= 0xb0000)
addr += 0x10000;
if (!ht216->ht_regs[0xcd] && !ht216->ht_regs[0xfe] && !ht216->ht_regs[0xf3] && svga->crtc[0x17] != 0xeb)
svga_writew_linear(addr, val, svga);
else {
ht216_write_common(ht216, addr, val);
@@ -998,11 +1164,15 @@ ht216_writel(uint32_t addr, uint32_t val, void *p)
{
ht216_t *ht216 = (ht216_t *)p;
svga_t *svga = &ht216->svga;
uint32_t prev_addr = addr;
addr &= svga->banked_mask;
addr = (addr & 0x7fff) + ht216->write_banks[(addr >> 15) & 1];
addr = (addr & 0x7fff) + ht216->write_banks[(addr >> 15) & 1];
if (!ht216->ht_regs[0xcd] && !ht216->ht_regs[0xfe] && !ht216->ht_regs[0xf3])
if (svga->crtc[0x17] == 0xeb && !(svga->gdcreg[6] & 0xc) && prev_addr >= 0xb0000)
addr += 0x10000;
if (!ht216->ht_regs[0xcd] && !ht216->ht_regs[0xfe] && !ht216->ht_regs[0xf3] && svga->crtc[0x17] != 0xeb)
svga_writel_linear(addr, val, svga);
else {
ht216_write_common(ht216, addr, val);
@@ -1084,8 +1254,6 @@ ht216_read_common(ht216_t *ht216, uint32_t addr)
cycles -= video_timing_read_b;
egareads++;
addr &= 0xfffff;
count = 2;
@@ -1105,7 +1273,7 @@ ht216_read_common(ht216_t *ht216, uint32_t addr)
for (i = 0; i < 8; i++)
ht216->bg_latch[i] = svga->vram[latch_addr | i];
return svga->vram[addr & svga->vram_mask];
} else if (svga->chain2_read) {
} else if (svga->chain2_read && (svga->crtc[0x17] != 0xeb)) {
readplane = (readplane & 2) | (addr & 1);
addr &= ~1;
addr <<= 2;
@@ -1132,9 +1300,10 @@ ht216_read_common(ht216_t *ht216, uint32_t addr)
or = addr & 4;
svga->latch.d[0] = ht216->bg_latch[0 | or] | (ht216->bg_latch[1 | or] << 8) |
(ht216->bg_latch[2 | or] << 16) | (ht216->bg_latch[3 | or] << 24);
if (svga->readmode) {
temp = 0xff;
for (pixel = 0; pixel < 8; pixel++) {
for (plane = 0; plane < 4; plane++) {
if (svga->colournocare & (1 << plane)) {
@@ -1158,10 +1327,14 @@ ht216_read(uint32_t addr, void *p)
{
ht216_t *ht216 = (ht216_t *)p;
svga_t *svga = &ht216->svga;
uint32_t prev_addr = addr;
addr &= svga->banked_mask;
addr = (addr & 0x7fff) + ht216->read_banks[(addr >> 15) & 1];
if (svga->crtc[0x17] == 0xeb && !(svga->gdcreg[6] & 0xc) && prev_addr >= 0xb0000)
addr += 0x10000;
return ht216_read_common(ht216, addr);
}
@@ -1177,7 +1350,6 @@ ht216_read_linear(uint32_t addr, void *p)
return ht216_read_common(ht216, (addr & 0xffff) | ((addr & 0xc0000) >> 2));
}
void
*ht216_init(const device_t *info, uint32_t mem_size, int has_rom)
{
@@ -1358,7 +1530,7 @@ const device_t g2_gc205_device =
const device_t v7_vga_1024i_device =
{
"Video 7 VGA 1024i",
"Video 7 VGA 1024i (HT208)",
DEVICE_ISA,
0x7140,
v7_vga_1024i_init,

2
src/video/vid_mda.c
View File

@@ -79,14 +79,12 @@ uint8_t mda_in(uint16_t addr, void *p)
void mda_write(uint32_t addr, uint8_t val, void *p)
{
mda_t *mda = (mda_t *)p;
egawrites++;
mda->vram[addr & 0xfff] = val;
}
uint8_t mda_read(uint32_t addr, void *p)
{
mda_t *mda = (mda_t *)p;
egareads++;
return mda->vram[addr & 0xfff];
}

12
src/video/vid_mga.c
View File

@@ -2130,8 +2130,6 @@ mystique_readb_linear(uint32_t addr, void *p)
{
svga_t *svga = (svga_t *)p;
egareads++;
cycles -= video_timing_read_b;
addr &= svga->decode_mask;
@@ -2147,8 +2145,6 @@ mystique_readw_linear(uint32_t addr, void *p)
{
svga_t *svga = (svga_t *)p;
egareads += 2;
cycles -= video_timing_read_w;
addr &= svga->decode_mask;
@@ -2164,8 +2160,6 @@ mystique_readl_linear(uint32_t addr, void *p)
{
svga_t *svga = (svga_t *)p;
egareads += 4;
cycles -= video_timing_read_l;
addr &= svga->decode_mask;
@@ -2181,8 +2175,6 @@ mystique_writeb_linear(uint32_t addr, uint8_t val, void *p)
{
svga_t *svga = (svga_t *)p;
egawrites++;
cycles -= video_timing_write_b;
addr &= svga->decode_mask;
@@ -2199,8 +2191,6 @@ mystique_writew_linear(uint32_t addr, uint16_t val, void *p)
{
svga_t *svga = (svga_t *)p;
egawrites += 2;
cycles -= video_timing_write_w;
addr &= svga->decode_mask;
@@ -2217,8 +2207,6 @@ mystique_writel_linear(uint32_t addr, uint32_t val, void *p)
{
svga_t *svga = (svga_t *)p;
egawrites += 4;
cycles -= video_timing_write_l;
addr &= svga->decode_mask;

2
src/video/vid_nga.c
View File

@@ -118,7 +118,6 @@ nga_write(uint32_t addr, uint8_t val, void *priv)
nga->cga.charbuffer[offset] = nga->cga.vram[addr & 0x7fff];
nga->cga.charbuffer[offset | 1] = nga->cga.vram[addr & 0x7fff];
}
egawrites++;
nga_waitstates(&nga->cga);
}
@@ -144,7 +143,6 @@ nga_read(uint32_t addr, void *priv)
nga->cga.charbuffer[offset | 1] = nga->cga.vram[addr & 0x7fff];
}
egareads++;
return(ret);
}

36
src/video/vid_oak_oti.c
View File

@@ -30,7 +30,9 @@
#include <86box/vid_svga.h>
#define BIOS_037C_PATH L"roms/video/oti/bios.bin"
#define BIOS_067_AMA932J_PATH L"roms/machines/ama932j/oti067.bin"
#define BIOS_067_AMA932J_PATH L"roms/machines/ama932j/oti067.bin"
#define BIOS_067_M300_08_PATH L"roms/machines/olivetti_m300_08/EVC_BIOS.ROM"
#define BIOS_067_M300_15_PATH L"roms/machines/olivetti_m300_15/EVC_BIOS.ROM"
#define BIOS_077_PATH L"roms/video/oti/oti077.vbi"
@@ -38,6 +40,7 @@ enum {
OTI_037C,
OTI_067 = 2,
OTI_067_AMA932J,
OTI_067_M300 = 4,
OTI_077 = 5
};
@@ -362,6 +365,16 @@ oti_init(const device_t *info)
io_sethandler(0x46e8, 1, oti_pos_in, NULL, NULL, oti_pos_out, NULL, NULL, oti);
break;
case OTI_067_M300:
if (rom_present(BIOS_067_M300_15_PATH))
romfn = BIOS_067_M300_15_PATH;
else
romfn = BIOS_067_M300_08_PATH;
oti->vram_size = device_get_config_int("memory");
oti->pos = 0x08; /* Tell the BIOS the I/O ports are already enabled to avoid a double I/O handler mess. */
io_sethandler(0x46e8, 1, oti_pos_in, NULL, NULL, oti_pos_out, NULL, NULL, oti);
break;
case OTI_067:
case OTI_077:
romfn = BIOS_077_PATH;
@@ -439,6 +452,15 @@ oti067_077_available(void)
return(rom_present(BIOS_077_PATH));
}
static int
oti067_m300_available(void)
{
if (rom_present(BIOS_067_M300_15_PATH))
return(rom_present(BIOS_067_M300_15_PATH));
else
return(rom_present(BIOS_067_M300_08_PATH));
}
static const device_config_t oti067_config[] =
{
@@ -531,6 +553,18 @@ const device_t oti067_device =
oti067_config
};
const device_t oti067_m300_device =
{
"Oak OTI-067 (Olivetti M300-08/15)",
DEVICE_ISA,
4,
oti_init, oti_close, NULL,
{ oti067_m300_available },
oti_speed_changed,
oti_force_redraw,
oti067_config
};
const device_t oti067_ama932j_device =
{
"Oak OTI-067 (AMA-932J)",

2
src/video/vid_ogc.c
View File

@@ -166,7 +166,6 @@ ogc_write(uint32_t addr, uint8_t val, void *priv)
ogc->cga.charbuffer[offset] = ogc->cga.vram[addr & 0x7fff];
ogc->cga.charbuffer[offset | 1] = ogc->cga.vram[addr & 0x7fff];
}
egawrites++;
ogc_waitstates(&ogc->cga);
}
@@ -186,7 +185,6 @@ ogc_read(uint32_t addr, void *priv)
ogc->cga.charbuffer[offset | 1] = ogc->cga.vram[addr & 0x7fff];
}
egareads++;
return(ogc->cga.vram[addr & 0x7FFF]);
}

27
src/video/vid_paradise.c
View File

@@ -352,6 +352,16 @@ void *paradise_init(const device_t *info, uint32_t memsize)
return paradise;
}
static void *paradise_pvga1a_ncr3302_init(const device_t *info)
{
paradise_t *paradise = paradise_init(info, 1 << 18);
if (paradise)
rom_init(&paradise->bios_rom, L"roms/machines/ncr_3302/c000-wd_1987-1989-740011-003058-019c.bin", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
return paradise;
}
static void *paradise_pvga1a_pc2086_init(const device_t *info)
{
paradise_t *paradise = paradise_init(info, 1 << 18);
@@ -361,6 +371,7 @@ static void *paradise_pvga1a_pc2086_init(const device_t *info)
return paradise;
}
static void *paradise_pvga1a_pc3086_init(const device_t *info)
{
paradise_t *paradise = paradise_init(info, 1 << 18);
@@ -464,7 +475,6 @@ void paradise_force_redraw(void *p)
paradise->svga.fullchange = changeframecount;
}
const device_t paradise_pvga1a_pc2086_device =
{
"Paradise PVGA1A (Amstrad PC2086)",
@@ -478,6 +488,7 @@ const device_t paradise_pvga1a_pc2086_device =
paradise_force_redraw,
NULL
};
const device_t paradise_pvga1a_pc3086_device =
{
"Paradise PVGA1A (Amstrad PC3086)",
@@ -516,6 +527,20 @@ static const device_config_t paradise_pvga1a_config[] =
}
};
const device_t paradise_pvga1a_ncr3302_device =
{
"Paradise PVGA1A (NCR 3302)",
0,
PVGA1A,
paradise_pvga1a_ncr3302_init,
paradise_close,
NULL,
{ NULL },
paradise_speed_changed,
paradise_force_redraw,
paradise_pvga1a_config
};
const device_t paradise_pvga1a_device =
{
"Paradise PVGA1A",

2
src/video/vid_sigma.c
View File

@@ -343,7 +343,6 @@ sigma_write(uint32_t addr, uint8_t val, void *p)
sigma_t *sigma = (sigma_t *)p;
sigma->vram[sigma->plane * 0x8000 + (addr & 0x7fff)] = val;
egawrites++;
cycles -= 4;
}
@@ -354,7 +353,6 @@ sigma_read(uint32_t addr, void *p)
sigma_t *sigma = (sigma_t *)p;
cycles -= 4;
egareads++;
return sigma->vram[sigma->plane * 0x8000 + (addr & 0x7fff)];
}

1
src/video/vid_table.c
View File

@@ -108,6 +108,7 @@ video_cards[] = {
{ "tvga8900d", &tvga8900d_device },
{ "tvga9000b", &tvga9000b_device },
{ "tgkorvga", &et4000k_isa_device },
{ "et2000", &et2000_device },
{ "et4000ax", &et4000_isa_device },
{ "vga", &vga_device },
{ "v7_vga_1024i", &v7_vga_1024i_device },

9
src/video/vid_vga.c
View File

@@ -69,8 +69,13 @@ void vga_out(uint16_t addr, uint8_t val, void *p)
{
if (svga->crtcreg < 0xe || svga->crtcreg > 0x10)
{
svga->fullchange = changeframecount;
svga_recalctimings(svga);
if ((svga->crtcreg == 0xc) || (svga->crtcreg == 0xd)) {
svga->fullchange = 3;
svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5);
} else {
svga->fullchange = changeframecount;
svga_recalctimings(svga);
}
}
}
break;

9
src/video/vid_voodoo_banshee.c
View File

@@ -1424,7 +1424,6 @@ static uint8_t banshee_read_linear(uint32_t addr, void *p)
if (addr >= svga->vram_max)
return 0xff;
egareads++;
cycles -= video_timing_read_b;
// banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]);
@@ -1457,7 +1456,6 @@ static uint16_t banshee_read_linear_w(uint32_t addr, void *p)
if (addr >= svga->vram_max)
return 0xff;
egareads++;
cycles -= video_timing_read_w;
// banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]);
@@ -1491,7 +1489,6 @@ static uint32_t banshee_read_linear_l(uint32_t addr, void *p)
if (addr >= svga->vram_max)
return 0xff;
egareads++;
cycles -= video_timing_read_l;
// banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]);
@@ -1523,8 +1520,6 @@ static void banshee_write_linear(uint32_t addr, uint8_t val, void *p)
if (addr >= svga->vram_max)
return;
egawrites++;
cycles -= video_timing_write_b;
svga->changedvram[addr >> 12] = changeframecount;
@@ -1561,8 +1556,6 @@ static void banshee_write_linear_w(uint32_t addr, uint16_t val, void *p)
if (addr >= svga->vram_max)
return;
egawrites++;
cycles -= video_timing_write_w;
svga->changedvram[addr >> 12] = changeframecount;
@@ -1607,8 +1600,6 @@ static void banshee_write_linear_l(uint32_t addr, uint32_t val, void *p)
if (addr >= svga->vram_max)
return;
egawrites += 4;
cycles -= video_timing_write_l;
svga->changedvram[addr >> 12] = changeframecount;

6
src/video/vid_voodoo_reg.c
View File

@@ -1071,7 +1071,6 @@ void voodoo_reg_writel(uint32_t addr, uint32_t val, void *p)
}
break;
}
break;
case SST_nccTable0_I2:
if (!(val & (1 << 31)))
{
@@ -1087,7 +1086,6 @@ void voodoo_reg_writel(uint32_t addr, uint32_t val, void *p)
}
break;
}
break;
case SST_nccTable0_Q0:
if (!(val & (1 << 31)))
{
@@ -1103,7 +1101,6 @@ void voodoo_reg_writel(uint32_t addr, uint32_t val, void *p)
}
break;
}
break;
case SST_nccTable0_Q2:
if (!(val & (1 << 31)))
{
@@ -1150,7 +1147,6 @@ void voodoo_reg_writel(uint32_t addr, uint32_t val, void *p)
}
break;
}
break;
case SST_nccTable0_I3:
if (!(val & (1 << 31)))
{
@@ -1166,7 +1162,6 @@ void voodoo_reg_writel(uint32_t addr, uint32_t val, void *p)
}
break;
}
break;
case SST_nccTable0_Q1:
if (!(val & (1 << 31)))
{
@@ -1182,7 +1177,6 @@ void voodoo_reg_writel(uint32_t addr, uint32_t val, void *p)
}
break;
}
break;
case SST_nccTable0_Q3:
if (!(val & (1 << 31)))
{

2
src/video/vid_wy700.c
View File

@@ -459,7 +459,6 @@ void wy700_checkchanges(wy700_t *wy700)
void wy700_write(uint32_t addr, uint8_t val, void *p)
{
wy700_t *wy700 = (wy700_t *)p;
egawrites++;
if (wy700->wy700_mode & 0x80) /* High-res mode. */
{
@@ -483,7 +482,6 @@ void wy700_write(uint32_t addr, uint8_t val, void *p)
uint8_t wy700_read(uint32_t addr, void *p)
{
wy700_t *wy700 = (wy700_t *)p;
egareads++;
if (wy700->wy700_mode & 0x80) /* High-res mode. */
{
addr &= 0xFFFF;

10
src/video/video.c
View File

@@ -70,6 +70,7 @@
#include <86box/video.h>
#include <86box/vid_svga.h>
#include <minitrace/minitrace.h>
volatile int screenshots = 0;
bitmap_t *buffer32 = NULL;
@@ -84,6 +85,7 @@ dbcs_font_t *fontdatksc5601_user = NULL; /* Korean KSC-5601 user defined font */
uint32_t pal_lookup[256];
int xsize = 1,
ysize = 1;
int egareads = 0, egawrites = 0;
int cga_palette = 0,
herc_blend = 0;
uint32_t *video_6to8 = NULL,
@@ -91,9 +93,7 @@ uint32_t *video_6to8 = NULL,
*video_8to32 = NULL,
*video_15to32 = NULL,
*video_16to32 = NULL;
int egareads = 0,
egawrites = 0,
changeframecount = 2;
int changeframecount = 2;
int frames = 0;
int fullchange = 0;
uint8_t edatlookup[4][4];
@@ -285,6 +285,7 @@ void blit_thread(void *param)
while (1) {
thread_wait_event(blit_data.wake_blit_thread, -1);
thread_reset_event(blit_data.wake_blit_thread);
MTR_BEGIN("video", "blit_thread");
if (blit_func)
blit_func(blit_data.x, blit_data.y,
@@ -292,6 +293,7 @@ void blit_thread(void *param)
blit_data.w, blit_data.h);
blit_data.busy = 0;
MTR_END("video", "blit_thread");
thread_set_event(blit_data.blit_complete);
}
}
@@ -448,6 +450,7 @@ void
video_blit_memtoscreen(int x, int y, int y1, int y2, int w, int h)
{
int yy;
MTR_BEGIN("video", "video_blit_memtoscreen");
if (y2 > 0) {
for (yy = y1; yy < y2; yy++) {
@@ -482,6 +485,7 @@ video_blit_memtoscreen(int x, int y, int y1, int y2, int w, int h)
blit_data.h = h;
thread_set_event(blit_data.wake_blit_thread);
MTR_END("video", "video_blit_memtoscreen");
}