Implemented PCI interrupt controller ports 4D0 and 4D1;

Applied more mainline PCem commits;
Repplied the CPU optimization commit alongside the fix commit.
This commit is contained in:
OBattler
2017-06-03 00:45:12 +02:00
parent fbaac7d319
commit ec732312c3
26 changed files with 807 additions and 177 deletions

View File

@@ -265,7 +265,14 @@ uint8_t sb_pro_mixer_read(uint16_t addr, void *p)
if (!(addr & 1))
return mixer->index;
return mixer->regs[mixer->index];
switch (mixer->index)
{
case 0x00: case 0x04: case 0x0a: case 0x0c: case 0x0e:
case 0x22: case 0x26: case 0x28: case 0x2e:
return mixer->regs[mixer->index];
}
return 0xff;
}
void sb_16_mixer_write(uint16_t addr, uint8_t val, void *p)

View File

@@ -514,6 +514,10 @@ void sb_exec_command(sb_dsp_t *dsp)
if (dsp->sb_type < SB16) break;
sb_add_data(dsp, dsp->sb_asp_regs[dsp->sb_data[0]]);
break;
case 0xF8:
if (dsp->sb_type < SB16) break;
sb_add_data(dsp, 0);
break;
case 0xF9:
if (dsp->sb_type < SB16) break;
if (dsp->sb_data[0] == 0x0e) sb_add_data(dsp, 0xff);