Fixed Cacodemon345's OHCI mess and implemented proper OHCI IRQ updating, fixes the Gigabyte GA-5AX POST.

This commit is contained in:
OBattler
2023-05-07 02:53:04 +02:00
parent a9cc8cf898
commit ecb8091d41
11 changed files with 8015 additions and 254 deletions

View File

@@ -875,11 +875,14 @@ stpc_setup(stpc_t *dev)
}
static void
stpc_usb_raise_interrupt(usb_t* usb, void* priv)
stpc_usb_update_interrupt(usb_t* usb, void* priv)
{
stpc_t *dev = (stpc_t *) priv;
pci_set_irq(dev->usb_slot, PCI_INTA);
if (usb->irq_level)
pci_set_irq(dev->usb_slot, PCI_INTA);
else
pci_clear_irq(dev->usb_slot, PCI_INTA);
}
static void
@@ -907,9 +910,9 @@ stpc_init(const device_t *info)
pci_add_card(PCI_ADD_NORTHBRIDGE, stpc_nb_read, stpc_nb_write, dev);
dev->ide_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, stpc_isab_read, stpc_isab_write, dev);
if (dev->local == STPC_ATLAS) {
dev->usb_params.smi_handle = NULL;
dev->usb_params.raise_interrupt = stpc_usb_raise_interrupt;
dev->usb_params.parent_priv = dev;
dev->usb_params.smi_handle = NULL;
dev->usb_params.update_interrupt = stpc_usb_update_interrupt;
dev->usb_params.parent_priv = dev;
dev->ide_slot = pci_add_card(PCI_ADD_SOUTHBRIDGE, stpc_ide_read, stpc_ide_write, dev);
dev->usb = device_add_parameters(&usb_device, &dev->usb_params);