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A dynamic recompiler block's validity is now separate from its starting code address, should fix most of the known recompiler fatals;

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The CD-ROM buffer is now dynamically malloc'd;
Did a lot of bugfixing in cdrom.c and scsi_disk.c, Debian 8's modprobe aha1542 and the NT 3.10.404.1 Trantor 310b driver now work;
Fixed the IDE IRQ/MIRQ mess and ATAPI DMA transfer length;
Fixed the operation of mmutranslate() a bit;
Commented out several instances of excess logging;
Applied the mainline PCem commit prefetch commit;
Readded missing Sound Blaster DSP MIDI behavior and gave it the correct MPU struct;
All non-IBM 486 machines now correctly have the VLB flag set.
This commit is contained in:
OBattler
2017-10-16 06:19:18 +02:00
parent 89a98e34fd
commit ed865610e9
23 changed files with 456 additions and 402 deletions
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307
src/cdrom/cdrom.c
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@@ -716,7 +716,9 @@ uint8_t cdrom_mode_sense_pages_saved[CDROM_NUM][0x40][0x40] =
{ GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0 } } { GPMODE_CAPABILITIES_PAGE, 0x12, 0, 0, 1, 0, 0, 0, 0x02, 0xC2, 0, 2, 0, 0, 0x02, 0xC2, 0, 0, 0, 0 } }
}; };
int cdrom_do_log = 0; #ifdef ENABLE_CDROM_LOG
int cdrom_do_log = ENABLE_CDROM_LOG;
#endif
void cdrom_log(const char *format, ...) void cdrom_log(const char *format, ...)
{ {
@@ -1753,10 +1755,10 @@ void cdrom_update_cdb(uint8_t *cdb, int lba_pos, int number_of_blocks)
} }
} }
#define cdbufferb cdrom[id].buffer
int cdrom_read_data(uint8_t id, int msf, int type, int flags, uint32_t *len) int cdrom_read_data(uint8_t id, int msf, int type, int flags, uint32_t *len)
{ {
uint8_t *cdbufferb = (uint8_t *) cdrom[id].buffer;
int ret = 0; int ret = 0;
int cdsize = 0; int cdsize = 0;
@@ -2255,14 +2257,45 @@ void cdrom_request_sense_for_scsi(uint8_t id, uint8_t *buffer, uint8_t alloc_len
cdrom_request_sense(id, buffer, alloc_length); cdrom_request_sense(id, buffer, alloc_length);
} }
void cdrom_set_buf_len(uint8_t id, int32_t *BufLen, uint32_t *src_len)
{
if (cdrom_drives[id].bus_type == CDROM_BUS_SCSI)
{
if (*BufLen == -1)
{
*BufLen = *src_len;
}
else
{
*BufLen = MIN(*src_len, *BufLen);
*src_len = *BufLen;
}
cdrom_log("CD-ROM %i: Actual transfer length: %i\n", id, *BufLen);
}
}
void cdrom_buf_alloc(uint8_t id, uint32_t len)
{
cdrom_log("CD-ROM %i: Allocated buffer length: %i\n", id, len);
cdbufferb = (uint8_t *) malloc(len);
}
void cdrom_buf_free(uint8_t id)
{
if (cdbufferb) {
cdrom_log("CD-ROM %i: Freeing buffer...\n", id);
free(cdbufferb);
cdbufferb = NULL;
}
}
void cdrom_command(uint8_t id, uint8_t *cdb) void cdrom_command(uint8_t id, uint8_t *cdb)
{ {
uint8_t *cdbufferb = (uint8_t *) cdrom[id].buffer;
uint32_t len; uint32_t len;
int msf; int msf;
int pos=0; int pos=0;
int max_len; uint32_t max_len;
int used_len; uint32_t used_len;
unsigned idx = 0; unsigned idx = 0;
unsigned size_idx; unsigned size_idx;
unsigned preamble_len; unsigned preamble_len;
@@ -2333,6 +2366,8 @@ void cdrom_command(uint8_t id, uint8_t *cdb)
return; return;
} }
cdrom_buf_free(id);
switch (cdb[0]) switch (cdb[0])
{ {
case GPCMD_TEST_UNIT_READY: case GPCMD_TEST_UNIT_READY:
@@ -2354,18 +2389,10 @@ void cdrom_command(uint8_t id, uint8_t *cdb)
/* If there's a unit attention condition and there's a buffered not ready, a standalone REQUEST SENSE /* If there's a unit attention condition and there's a buffered not ready, a standalone REQUEST SENSE
should forget about the not ready, and report unit attention straight away. */ should forget about the not ready, and report unit attention straight away. */
SCSIPhase = SCSI_PHASE_DATA_IN; SCSIPhase = SCSI_PHASE_DATA_IN;
if (cdrom_drives[id].bus_type == CDROM_BUS_SCSI) max_len = cdb[4];
{ cdrom_buf_alloc(id, 256);
if ((*BufLen == -1) || (cdb[4] < *BufLen)) cdrom_set_buf_len(id, BufLen, &max_len);
{ cdrom_request_sense(id, cdbufferb, max_len);
*BufLen = cdb[4];
}
if (*BufLen < cdb[4])
{
cdb[4] = *BufLen;
}
}
cdrom_request_sense(id, cdbufferb, cdb[4]);
cdrom_data_command_finish(id, 18, 18, cdb[4], 0); cdrom_data_command_finish(id, 18, 18, cdb[4], 0);
break; break;
@@ -2377,13 +2404,11 @@ void cdrom_command(uint8_t id, uint8_t *cdb)
case GPCMD_MECHANISM_STATUS: case GPCMD_MECHANISM_STATUS:
SCSIPhase = SCSI_PHASE_DATA_IN; SCSIPhase = SCSI_PHASE_DATA_IN;
len = (cdb[7] << 16) | (cdb[8] << 8) | cdb[9]; len = (cdb[7] << 16) | (cdb[8] << 8) | cdb[9];
if ((*BufLen == -1) || (len < *BufLen)) cdrom_buf_alloc(id, 8);
{
*BufLen = len; cdrom_set_buf_len(id, BufLen, &len);
}
memset(cdbufferb, 0, 8); memset(cdbufferb, 0, 8);
cdbufferb[5] = 1; cdbufferb[5] = 1;
@@ -2400,6 +2425,8 @@ void cdrom_command(uint8_t id, uint8_t *cdb)
max_len <<= 8; max_len <<= 8;
max_len |= cdb[8]; max_len |= cdb[8];
cdrom_buf_alloc(id, 65536);
if (cdrom_drives[id].handler->pass_through) if (cdrom_drives[id].handler->pass_through)
{ {
ret = cdrom_pass_through(id, &len, cdrom[id].current_cdb, cdbufferb); ret = cdrom_pass_through(id, &len, cdrom[id].current_cdb, cdbufferb);
@@ -2409,21 +2436,13 @@ void cdrom_command(uint8_t id, uint8_t *cdb)
cdrom_sense_key = cdrom_asc = cdrom_ascq = 0; cdrom_sense_key = cdrom_asc = cdrom_ascq = 0;
goto cdrom_readtoc_fallback; goto cdrom_readtoc_fallback;
} }
else
{
if ((*BufLen == -1) || (len < *BufLen))
{
*BufLen = len;
}
}
alloc_length = cdbufferb[0]; alloc_length = cdbufferb[0];
alloc_length <<= 8; alloc_length <<= 8;
alloc_length |= cdbufferb[1]; alloc_length |= cdbufferb[1];
alloc_length += 2; alloc_length += 2;
if (alloc_length < len) len = MIN(alloc_length, len);
{
len = alloc_length; cdrom_set_buf_len(id, BufLen, &len);
}
} }
else else
{ {
@@ -2461,10 +2480,7 @@ cdrom_readtoc_fallback:
cdbufferb[1] = (len - 2) & 0xff; cdbufferb[1] = (len - 2) & 0xff;
} }
if ((*BufLen == -1) || (len < *BufLen)) cdrom_set_buf_len(id, BufLen, &len);
{
*BufLen = len;
}
cdrom_data_command_finish(id, len, len, len, 0); cdrom_data_command_finish(id, len, len, len, 0);
/* cdrom_log("CD-ROM %i: READ_TOC_PMA_ATIP format %02X, length %i (%i)\n", id, toc_format, ide->cylinder, cdbufferb[1]); */ /* cdrom_log("CD-ROM %i: READ_TOC_PMA_ATIP format %02X, length %i (%i)\n", id, toc_format, ide->cylinder, cdbufferb[1]); */
@@ -2478,7 +2494,8 @@ cdrom_readtoc_fallback:
case GPCMD_READ_CD: case GPCMD_READ_CD:
case GPCMD_READ_CD_MSF: case GPCMD_READ_CD_MSF:
SCSIPhase = SCSI_PHASE_DATA_IN; SCSIPhase = SCSI_PHASE_DATA_IN;
alloc_length = 2048;
switch(cdb[0]) switch(cdb[0])
{ {
case GPCMD_READ_6: case GPCMD_READ_6:
@@ -2499,6 +2516,7 @@ cdrom_readtoc_fallback:
break; break;
case GPCMD_READ_CD_MSF: case GPCMD_READ_CD_MSF:
/* cdrom_log("CD-ROM %i: Read CD MSF: Start MSF %02X%02X%02X End MSF %02X%02X%02X Flags %02X\n", id, cdb[3], cdb[4], cdb[5], cdb[6], cdb[7], cdb[8], cdb[9]); */ /* cdrom_log("CD-ROM %i: Read CD MSF: Start MSF %02X%02X%02X End MSF %02X%02X%02X Flags %02X\n", id, cdb[3], cdb[4], cdb[5], cdb[6], cdb[7], cdb[8], cdb[9]); */
alloc_length = 2856;
cdrom[id].sector_len = MSFtoLBA(cdb[6], cdb[7], cdb[8]); cdrom[id].sector_len = MSFtoLBA(cdb[6], cdb[7], cdb[8]);
cdrom[id].sector_pos = MSFtoLBA(cdb[3], cdb[4], cdb[5]); cdrom[id].sector_pos = MSFtoLBA(cdb[3], cdb[4], cdb[5]);
@@ -2509,6 +2527,7 @@ cdrom_readtoc_fallback:
case GPCMD_READ_CD_OLD: case GPCMD_READ_CD_OLD:
case GPCMD_READ_CD: case GPCMD_READ_CD:
/* cdrom_log("CD-ROM %i: Read CD: Start LBA %02X%02X%02X%02X Length %02X%02X%02X Flags %02X\n", id, cdb[2], cdb[3], cdb[4], cdb[5], cdb[6], cdb[7], cdb[8], cdb[9]); */ /* cdrom_log("CD-ROM %i: Read CD: Start LBA %02X%02X%02X%02X Length %02X%02X%02X Flags %02X\n", id, cdb[2], cdb[3], cdb[4], cdb[5], cdb[6], cdb[7], cdb[8], cdb[9]); */
alloc_length = 2856;
cdrom[id].sector_len = (cdb[6] << 16) | (cdb[7] << 8) | cdb[8]; cdrom[id].sector_len = (cdb[6] << 16) | (cdb[7] << 8) | cdb[8];
cdrom[id].sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; cdrom[id].sector_pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5];
@@ -2536,18 +2555,17 @@ cdrom_readtoc_fallback:
cdrom[id].requested_blocks = 1; cdrom[id].requested_blocks = 1;
} }
cdrom[id].packet_len = max_len * alloc_length;
cdrom_buf_alloc(id, cdrom[id].packet_len);
ret = cdrom_read_blocks(id, &alloc_length, 1); ret = cdrom_read_blocks(id, &alloc_length, 1);
if (ret <= 0) if (ret <= 0)
{ {
return; return;
} }
cdrom[id].packet_len = max_len * alloc_length; cdrom[id].packet_len = alloc_length;
cdrom_set_buf_len(id, BufLen, &cdrom[id].packet_len);
if ((*BufLen == -1) || (cdrom[id].packet_len < *BufLen))
{
*BufLen = cdrom[id].packet_len;
}
if (cdrom[id].requested_blocks > 1) if (cdrom[id].requested_blocks > 1)
{ {
@@ -2570,7 +2588,10 @@ cdrom_readtoc_fallback:
case GPCMD_READ_HEADER: case GPCMD_READ_HEADER:
SCSIPhase = SCSI_PHASE_DATA_IN; SCSIPhase = SCSI_PHASE_DATA_IN;
alloc_length = ((cdb[7] << 8) | cdb[8]) << 3;
cdrom_buf_alloc(id, 65536);
if (cdrom_drives[id].handler->pass_through) if (cdrom_drives[id].handler->pass_through)
{ {
ret = cdrom_pass_through(id, &len, cdrom[id].current_cdb, cdbufferb); ret = cdrom_pass_through(id, &len, cdrom[id].current_cdb, cdbufferb);
@@ -2578,13 +2599,6 @@ cdrom_readtoc_fallback:
{ {
return; return;
} }
else
{
if ((*BufLen == -1) || (len < *BufLen))
{
*BufLen = len;
}
}
} }
else else
{ {
@@ -2608,14 +2622,13 @@ cdrom_readtoc_fallback:
len = 8; len = 8;
} }
if ((*BufLen == -1) || (len < *BufLen)) len = MIN(len, alloc_length);
{
*BufLen = len; cdrom_set_buf_len(id, BufLen, &len);
}
cdrom_data_command_finish(id, len, len, len, 0); cdrom_data_command_finish(id, len, len, len, 0);
return; return;
case GPCMD_MODE_SENSE_6: case GPCMD_MODE_SENSE_6:
case GPCMD_MODE_SENSE_10: case GPCMD_MODE_SENSE_10:
SCSIPhase = SCSI_PHASE_DATA_IN; SCSIPhase = SCSI_PHASE_DATA_IN;
@@ -2632,10 +2645,12 @@ cdrom_readtoc_fallback:
if (cdb[0] == GPCMD_MODE_SENSE_6) if (cdb[0] == GPCMD_MODE_SENSE_6)
{ {
len = cdb[4]; len = cdb[4];
cdrom_buf_alloc(id, 256);
} }
else else
{ {
len = (cdb[8] | (cdb[7] << 8)); len = (cdb[8] | (cdb[7] << 8));
cdrom_buf_alloc(id, 65536);
} }
cdrom[id].current_page_code = cdb[2] & 0x3F; cdrom[id].current_page_code = cdb[2] & 0x3F;
@@ -2680,19 +2695,10 @@ cdrom_readtoc_fallback:
} }
} }
if (len > alloc_length) len = MIN(len, alloc_length);
{ cdrom_set_buf_len(id, BufLen, &len);
len = alloc_length;
}
else if (len < alloc_length)
{
alloc_length = len;
}
if ((*BufLen == -1) || (alloc_length < *BufLen)) alloc_length = len;
{
*BufLen = alloc_length;
}
cdrom_log("CD-ROM %i: Reading mode page: %02X...\n", id, cdb[2]); cdrom_log("CD-ROM %i: Reading mode page: %02X...\n", id, cdb[2]);
@@ -2706,19 +2712,17 @@ cdrom_readtoc_fallback:
if (cdb[0] == GPCMD_MODE_SELECT_6) if (cdb[0] == GPCMD_MODE_SELECT_6)
{ {
len = cdb[4]; len = cdb[4];
cdrom_buf_alloc(id, 256);
} }
else else
{ {
len = (cdb[7] << 8) | cdb[8]; len = (cdb[7] << 8) | cdb[8];
cdrom_buf_alloc(id, 65536);
} }
if ((*BufLen == -1) || (len < *BufLen)) cdrom_set_buf_len(id, BufLen, &len);
{
*BufLen = len;
}
ret = cdrom_mode_select_init(id, cdb[0], len, cdb[1] & 1); ret = cdrom_mode_select_init(id, cdb[0], len, cdb[1] & 1);
cdrom_data_command_finish(id, len, len, len, 1); cdrom_data_command_finish(id, len, len, len, 1);
return; return;
@@ -2726,8 +2730,7 @@ cdrom_readtoc_fallback:
SCSIPhase = SCSI_PHASE_DATA_IN; SCSIPhase = SCSI_PHASE_DATA_IN;
/* XXX: could result in alignment problems in some architectures */ /* XXX: could result in alignment problems in some architectures */
len = (cdb[7] << 8) | cdb[8]; max_len = (cdb[7] << 8) | cdb[8];
alloc_length = len;
index = 0; index = 0;
@@ -2738,23 +2741,13 @@ cdrom_readtoc_fallback:
return; return;
} }
/* cdrom_buf_alloc(id, 65536);
* XXX: avoid overflow for io_buffer if len is bigger than memset(cdbufferb, 0, max_len);
* the size of that buffer (dimensioned to max number of
* sectors to transfer at once)
*
* Only a problem if the feature/profiles grow.
*/
if (alloc_length > 512) /* XXX: assume 1 sector */
{
alloc_length = 512;
}
memset(cdbufferb, 0, alloc_length);
/* /*
* the number of sectors from the media tells us which profile * the number of sectors from the media tells us which profile
* to use as current. 0 means there is no media * to use as current. 0 means there is no media
*/ */
len = cdrom_drives[id].handler->size(id);
if (len > CD_MAX_SECTORS) if (len > CD_MAX_SECTORS)
{ {
cdbufferb[6] = (MMC_PROFILE_DVD_ROM >> 8) & 0xff; cdbufferb[6] = (MMC_PROFILE_DVD_ROM >> 8) & 0xff;
@@ -2774,16 +2767,17 @@ cdrom_readtoc_fallback:
cdbufferb[2] = ((alloc_length - 4) >> 8) & 0xff; cdbufferb[2] = ((alloc_length - 4) >> 8) & 0xff;
cdbufferb[3] = (alloc_length - 4) & 0xff; cdbufferb[3] = (alloc_length - 4) & 0xff;
if ((*BufLen == -1) || (len < *BufLen)) alloc_length = MIN(alloc_length, max_len);
{
*BufLen = len;
}
cdrom_data_command_finish(id, len, len, alloc_length, 0); cdrom_set_buf_len(id, BufLen, &alloc_length);
cdrom_data_command_finish(id, alloc_length, alloc_length, alloc_length, 0);
break; break;
case GPCMD_GET_EVENT_STATUS_NOTIFICATION: case GPCMD_GET_EVENT_STATUS_NOTIFICATION:
SCSIPhase = SCSI_PHASE_DATA_IN; SCSIPhase = SCSI_PHASE_DATA_IN;
cdrom_buf_alloc(id, 8 + sizeof(gesn_event_header));
gesn_cdb = (void *) cdb; gesn_cdb = (void *) cdb;
gesn_event_header = (void *) cdbufferb; gesn_event_header = (void *) cdbufferb;
@@ -2840,10 +2834,7 @@ cdrom_readtoc_fallback:
memcpy(cdbufferb, gesn_event_header, 4); memcpy(cdbufferb, gesn_event_header, 4);
if ((*BufLen == -1) || (used_len < *BufLen)) cdrom_set_buf_len(id, BufLen, &used_len);
{
*BufLen = used_len;
}
cdrom_data_command_finish(id, used_len, used_len, used_len, 0); cdrom_data_command_finish(id, used_len, used_len, used_len, 0);
break; break;
@@ -2855,6 +2846,8 @@ cdrom_readtoc_fallback:
max_len <<= 8; max_len <<= 8;
max_len |= cdb[8]; max_len |= cdb[8];
cdrom_buf_alloc(id, 65536);
if (cdrom_drives[id].handler->pass_through) if (cdrom_drives[id].handler->pass_through)
{ {
ret = cdrom_pass_through(id, &len, cdrom[id].current_cdb, cdbufferb); ret = cdrom_pass_through(id, &len, cdrom[id].current_cdb, cdbufferb);
@@ -2884,13 +2877,9 @@ cdrom_readtoc_fallback:
len=34; len=34;
} }
if ((*BufLen == -1) || (len < *BufLen)) cdrom_set_buf_len(id, BufLen, &len);
{
*BufLen = len;
}
cdrom_data_command_finish(id, len, len, max_len, 0); cdrom_data_command_finish(id, len, len, len, 0);
SCSIPhase = BUS_IO;
break; break;
case GPCMD_READ_TRACK_INFORMATION: case GPCMD_READ_TRACK_INFORMATION:
@@ -2900,6 +2889,8 @@ cdrom_readtoc_fallback:
max_len <<= 8; max_len <<= 8;
max_len |= cdb[8]; max_len |= cdb[8];
cdrom_buf_alloc(id, 65536);
track = ((uint32_t) cdb[2]) << 24; track = ((uint32_t) cdb[2]) << 24;
track |= ((uint32_t) cdb[3]) << 16; track |= ((uint32_t) cdb[3]) << 16;
track |= ((uint32_t) cdb[4]) << 8; track |= ((uint32_t) cdb[4]) << 8;
@@ -2952,13 +2943,9 @@ cdrom_readtoc_fallback:
} }
} }
if ((*BufLen == -1) || (len < *BufLen)) cdrom_set_buf_len(id, BufLen, &len);
{
*BufLen = len;
}
cdrom_data_command_finish(id, len, len, max_len, 0); cdrom_data_command_finish(id, len, len, max_len, 0);
SCSIPhase = BUS_IO;
break; break;
case GPCMD_PLAY_AUDIO_10: case GPCMD_PLAY_AUDIO_10:
@@ -3020,6 +3007,8 @@ cdrom_readtoc_fallback:
max_len |= cdb[8]; max_len |= cdb[8];
msf = (cdb[1] >> 1) & 1; msf = (cdb[1] >> 1) & 1;
cdrom_buf_alloc(id, 65536);
cdrom_log("CD-ROM %i: Getting page %i (%s)\n", id, cdb[3], msf ? "MSF" : "LBA"); cdrom_log("CD-ROM %i: Getting page %i (%s)\n", id, cdb[3], msf ? "MSF" : "LBA");
if ((cdrom_drives[id].handler->pass_through) && (cdb[3] != 1)) if ((cdrom_drives[id].handler->pass_through) && (cdb[3] != 1))
{ {
@@ -3121,17 +3110,19 @@ cdrom_readtoc_fallback:
} }
} }
if ((*BufLen == -1) || (len < *BufLen)) cdrom_set_buf_len(id, BufLen, &len);
{
*BufLen = len;
}
cdrom_data_command_finish(id, len, len, max_len, 0); cdrom_data_command_finish(id, len, len, len, 0);
break; break;
case GPCMD_READ_DVD_STRUCTURE: case GPCMD_READ_DVD_STRUCTURE:
SCSIPhase = SCSI_PHASE_DATA_IN; SCSIPhase = SCSI_PHASE_DATA_IN;
alloc_length = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]);
alloc_length = MIN(alloc_length, 256 * 512 + 4);
cdrom_buf_alloc(id, alloc_length);
if (cdrom_drives[id].handler->pass_through) if (cdrom_drives[id].handler->pass_through)
{ {
ret = cdrom_pass_through(id, &len, cdrom[id].current_cdb, cdbufferb); ret = cdrom_pass_through(id, &len, cdrom[id].current_cdb, cdbufferb);
@@ -3141,9 +3132,17 @@ cdrom_readtoc_fallback:
} }
else else
{ {
if ((*BufLen == -1) || (len < *BufLen)) if (cdrom_drives[id].bus_type == CDROM_BUS_SCSI)
{ {
*BufLen = len; if (*BufLen == -1)
{
*BufLen = len;
}
else
{
*BufLen = MIN(len, *BufLen);
len = *BufLen;
}
} }
} }
} }
@@ -3152,7 +3151,7 @@ cdrom_readtoc_fallback:
len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]);
alloc_length = len; alloc_length = len;
if (cdb[7] < 0xff) if (cdb[7] < 0xff)
{ {
if (len <= CD_MAX_SECTORS) if (len <= CD_MAX_SECTORS)
{ {
@@ -3166,7 +3165,7 @@ cdrom_readtoc_fallback:
} }
} }
memset(cdbufferb, 0, (alloc_length > 256 * 512 + 4) ? (256 * 512 + 4) : alloc_length); memset(cdbufferb, 0, alloc_length);
switch (cdb[7]) switch (cdb[7])
{ {
@@ -3191,14 +3190,11 @@ cdrom_readtoc_fallback:
{ {
ret = cdrom_read_dvd_structure(id, format, cdb, cdbufferb); ret = cdrom_read_dvd_structure(id, format, cdb, cdbufferb);
if ((*BufLen == -1) || (alloc_length < *BufLen)) cdrom_set_buf_len(id, BufLen, &alloc_length);
{
*BufLen = alloc_length;
}
if (ret) if (ret)
{ {
cdrom_data_command_finish(id, len, len, alloc_length, 0); cdrom_data_command_finish(id, alloc_length, alloc_length, len, 0);
} }
return; return;
} }
@@ -3254,6 +3250,8 @@ cdrom_readtoc_fallback:
max_len <<= 8; max_len <<= 8;
max_len |= cdb[4]; max_len |= cdb[4];
cdrom_buf_alloc(id, 65536);
if (cdb[1] & 1) if (cdb[1] & 1)
{ {
preamble_len = 4; preamble_len = 4;
@@ -3328,10 +3326,7 @@ atapi_out:
cdbufferb[size_idx] = idx - preamble_len; cdbufferb[size_idx] = idx - preamble_len;
len=idx; len=idx;
if ((*BufLen == -1) || (len < *BufLen)) cdrom_set_buf_len(id, BufLen, &len);
{
*BufLen = len;
}
cdrom_data_command_finish(id, len, len, max_len, 0); cdrom_data_command_finish(id, len, len, max_len, 0);
break; break;
@@ -3391,16 +3386,15 @@ atapi_out:
case GPCMD_READ_CDROM_CAPACITY: case GPCMD_READ_CDROM_CAPACITY:
SCSIPhase = SCSI_PHASE_DATA_IN; SCSIPhase = SCSI_PHASE_DATA_IN;
cdrom_buf_alloc(id, 8);
if (cdrom_read_capacity(id, cdrom[id].current_cdb, cdbufferb, &len) == 0) if (cdrom_read_capacity(id, cdrom[id].current_cdb, cdbufferb, &len) == 0)
{ {
return; return;
} }
if ((*BufLen == -1) || (len < *BufLen)) cdrom_set_buf_len(id, BufLen, &len);
{
*BufLen = len;
}
cdrom_data_command_finish(id, len, len, len, 0); cdrom_data_command_finish(id, len, len, len, 0);
break; break;
@@ -3450,6 +3444,7 @@ int cdrom_block_check(uint8_t id)
/* Return value is -1 - there are no further blocks to read. */ /* Return value is -1 - there are no further blocks to read. */
cdrom_log("CD-ROM %i: %i bytes read, no further blocks to read\n", id, cdrom[id].total_read); cdrom_log("CD-ROM %i: %i bytes read, no further blocks to read\n", id, cdrom[id].total_read);
cdrom[id].status = BUSY_STAT; cdrom[id].status = BUSY_STAT;
cdrom_buf_free(id);
return 1; return 1;
} }
else if (ret == 0) else if (ret == 0)
@@ -3457,6 +3452,7 @@ int cdrom_block_check(uint8_t id)
/* Return value is 0 - an error has occurred. */ /* Return value is 0 - an error has occurred. */
cdrom_log("CD-ROM %i: %i bytes read, error while reading blocks\n", id, cdrom[id].total_read); cdrom_log("CD-ROM %i: %i bytes read, error while reading blocks\n", id, cdrom[id].total_read);
cdrom[id].status = BUSY_STAT | (cdrom[id].status & ERR_STAT); cdrom[id].status = BUSY_STAT | (cdrom[id].status & ERR_STAT);
cdrom_buf_free(id);
return 0; return 0;
} }
else else
@@ -3559,12 +3555,8 @@ void cdrom_phase_callback(uint8_t id);
int cdrom_read_from_ide_dma(uint8_t channel) int cdrom_read_from_ide_dma(uint8_t channel)
{ {
uint8_t *cdbufferb;
uint8_t id = atapi_cdrom_drives[channel]; uint8_t id = atapi_cdrom_drives[channel];
cdbufferb = (uint8_t *) cdrom[id].buffer;
if (id > CDROM_NUM) if (id > CDROM_NUM)
{ {
return 0; return 0;
@@ -3572,7 +3564,7 @@ int cdrom_read_from_ide_dma(uint8_t channel)
if (ide_bus_master_write) if (ide_bus_master_write)
{ {
if (ide_bus_master_write(channel >> 1, cdbufferb, cdrom[id].request_length)) if (ide_bus_master_write(channel >> 1, cdbufferb, cdrom[id].packet_len))
{ {
cdrom_data_phase_error(id); cdrom_data_phase_error(id);
cdrom_phase_callback(id); cdrom_phase_callback(id);
@@ -3589,13 +3581,9 @@ int cdrom_read_from_ide_dma(uint8_t channel)
int cdrom_read_from_scsi_dma(uint8_t scsi_id, uint8_t scsi_lun) int cdrom_read_from_scsi_dma(uint8_t scsi_id, uint8_t scsi_lun)
{ {
uint8_t *cdbufferb;
uint8_t id = scsi_cdrom_drives[scsi_id][scsi_lun]; uint8_t id = scsi_cdrom_drives[scsi_id][scsi_lun];
int32_t *BufLen = &SCSIDevices[scsi_id][scsi_lun].BufferLength; int32_t *BufLen = &SCSIDevices[scsi_id][scsi_lun].BufferLength;
cdbufferb = (uint8_t *) cdrom[id].buffer;
if (id > CDROM_NUM) if (id > CDROM_NUM)
{ {
return 0; return 0;
@@ -3608,7 +3596,6 @@ int cdrom_read_from_scsi_dma(uint8_t scsi_id, uint8_t scsi_lun)
int cdrom_read_from_dma(uint8_t id) int cdrom_read_from_dma(uint8_t id)
{ {
uint8_t *cdbufferb = (uint8_t *) cdrom[id].buffer;
int32_t *BufLen = &SCSIDevices[cdrom_drives[id].scsi_device_id][cdrom_drives[id].scsi_device_lun].BufferLength; int32_t *BufLen = &SCSIDevices[cdrom_drives[id].scsi_device_id][cdrom_drives[id].scsi_device_lun].BufferLength;
int i = 0; int i = 0;
@@ -3661,8 +3648,6 @@ int cdrom_read_from_dma(uint8_t id)
int cdrom_write_to_ide_dma(uint8_t channel) int cdrom_write_to_ide_dma(uint8_t channel)
{ {
uint8_t *cdbufferb;
uint8_t id = atapi_cdrom_drives[channel]; uint8_t id = atapi_cdrom_drives[channel];
int transfer_length = 0; int transfer_length = 0;
@@ -3676,15 +3661,13 @@ int cdrom_write_to_ide_dma(uint8_t channel)
return 0; return 0;
} }
cdbufferb = (uint8_t *) cdrom[id].buffer;
transfer_length = cdrom[id].init_length; transfer_length = cdrom[id].init_length;
if (ide_bus_master_read) if (ide_bus_master_read)
{ {
while(transfer_length > 0) while(transfer_length > 0)
{ {
/* pclog("CD-ROM %i: ATAPI DMA on position: %08X...\n", id, cdbufferb + cdbufferb_pos); */ /* cdrom_log("CD-ROM %i: ATAPI DMA on position: %08X...\n", id, cdbufferb + cdbufferb_pos); */
bus_master_len = piix_bus_master_get_count(channel >> 1); bus_master_len = piix_bus_master_get_count(channel >> 1);
ret = piix_bus_master_dma_read_ex(channel >> 1, cdbufferb + cdbufferb_pos); ret = piix_bus_master_dma_read_ex(channel >> 1, cdbufferb + cdbufferb_pos);
if (ret != 0) if (ret != 0)
@@ -3697,14 +3680,14 @@ int cdrom_write_to_ide_dma(uint8_t channel)
if (ret > 0) if (ret > 0)
{ {
/* pclog("CD-ROM %i: ATAPI DMA error\n", id); */ /* cdrom_log("CD-ROM %i: ATAPI DMA error\n", id); */
cdrom_data_phase_error(id); cdrom_data_phase_error(id);
cdrom_phase_callback(id); cdrom_phase_callback(id);
return 0; return 0;
} }
else else
{ {
/* pclog("CD-ROM %i: ATAPI DMA successful\n", id); */ /* cdrom_log("CD-ROM %i: ATAPI DMA successful\n", id); */
return 1; return 1;
} }
} }
@@ -3714,8 +3697,6 @@ int cdrom_write_to_ide_dma(uint8_t channel)
int cdrom_write_to_scsi_dma(uint8_t scsi_id, uint8_t scsi_lun) int cdrom_write_to_scsi_dma(uint8_t scsi_id, uint8_t scsi_lun)
{ {
uint8_t *cdbufferb;
uint8_t id = scsi_cdrom_drives[scsi_id][scsi_lun]; uint8_t id = scsi_cdrom_drives[scsi_id][scsi_lun];
int32_t *BufLen = &SCSIDevices[scsi_id][scsi_lun].BufferLength; int32_t *BufLen = &SCSIDevices[scsi_id][scsi_lun].BufferLength;
@@ -3724,8 +3705,6 @@ int cdrom_write_to_scsi_dma(uint8_t scsi_id, uint8_t scsi_lun)
return 0; return 0;
} }
cdbufferb = (uint8_t *) cdrom[id].buffer;
cdrom_log("Writing to SCSI DMA: SCSI ID %02X, init length %i\n", scsi_id, *BufLen); cdrom_log("Writing to SCSI DMA: SCSI ID %02X, init length %i\n", scsi_id, *BufLen);
memcpy(SCSIDevices[scsi_id][scsi_lun].CmdBuffer, cdbufferb, *BufLen); memcpy(SCSIDevices[scsi_id][scsi_lun].CmdBuffer, cdbufferb, *BufLen);
cdrom_log("CD-ROM %i: Data from CD buffer: %02X %02X %02X %02X %02X %02X %02X %02X\n", id, cdbufferb[0], cdbufferb[1], cdbufferb[2], cdbufferb[3], cdbufferb[4], cdbufferb[5], cdbufferb[6], cdbufferb[7]); cdrom_log("CD-ROM %i: Data from CD buffer: %02X %02X %02X %02X %02X %02X %02X %02X\n", id, cdbufferb[0], cdbufferb[1], cdbufferb[2], cdbufferb[3], cdbufferb[4], cdbufferb[5], cdbufferb[6], cdbufferb[7]);
@@ -3785,6 +3764,7 @@ void cdrom_phase_callback(uint8_t id)
cdrom[id].status = READY_STAT; cdrom[id].status = READY_STAT;
cdrom[id].phase = 3; cdrom[id].phase = 3;
cdrom[id].packet_status = 0xFF; cdrom[id].packet_status = 0xFF;
cdrom_buf_free(id);
ui_sb_update_icon(SB_CDROM | id, 0); ui_sb_update_icon(SB_CDROM | id, 0);
cdrom_irq_raise(id); cdrom_irq_raise(id);
return; return;
@@ -3822,7 +3802,9 @@ void cdrom_phase_callback(uint8_t id)
cdrom_log("CD-ROM %i: CDROM_PHASE_ERROR\n", id); cdrom_log("CD-ROM %i: CDROM_PHASE_ERROR\n", id);
cdrom[id].status = READY_STAT | ERR_STAT; cdrom[id].status = READY_STAT | ERR_STAT;
cdrom[id].phase = 3; cdrom[id].phase = 3;
cdrom_buf_free(id);
cdrom_irq_raise(id); cdrom_irq_raise(id);
ui_sb_update_icon(SB_CDROM | id, 0);
return; return;
} }
} }
@@ -3830,7 +3812,6 @@ void cdrom_phase_callback(uint8_t id)
/* Reimplement as 8-bit due to reimplementation of IDE data read and write. */ /* Reimplement as 8-bit due to reimplementation of IDE data read and write. */
uint32_t cdrom_read(uint8_t channel, int length) uint32_t cdrom_read(uint8_t channel, int length)
{ {
uint8_t *cdbufferb;
uint16_t *cdbufferw; uint16_t *cdbufferw;
uint32_t *cdbufferl; uint32_t *cdbufferl;
@@ -3844,9 +3825,8 @@ uint32_t cdrom_read(uint8_t channel, int length)
return 0; return 0;
} }
cdbufferb = (uint8_t *) cdrom[id].buffer; cdbufferw = (uint16_t *) cdbufferb;
cdbufferw = cdrom[id].buffer; cdbufferl = (uint32_t *) cdbufferb;
cdbufferl = (uint32_t *) cdrom[id].buffer;
switch(length) switch(length)
{ {
@@ -3906,7 +3886,6 @@ uint32_t cdrom_read(uint8_t channel, int length)
void cdrom_write(uint8_t channel, uint32_t val, int length) void cdrom_write(uint8_t channel, uint32_t val, int length)
{ {
uint8_t i = 0; uint8_t i = 0;
uint8_t *cdbufferb;
uint16_t *cdbufferw; uint16_t *cdbufferw;
uint32_t *cdbufferl; uint32_t *cdbufferl;
@@ -3921,9 +3900,8 @@ void cdrom_write(uint8_t channel, uint32_t val, int length)
return; return;
} }
cdbufferb = (uint8_t *) cdrom[id].buffer; cdbufferw = (uint16_t *) cdbufferb;
cdbufferw = cdrom[id].buffer; cdbufferl = (uint32_t *) cdbufferb;
cdbufferl = (uint32_t *) cdrom[id].buffer;
old_pos = cdrom[id].pos; old_pos = cdrom[id].pos;
@@ -3961,6 +3939,7 @@ void cdrom_write(uint8_t channel, uint32_t val, int length)
cdrom[id].pos=0; cdrom[id].pos=0;
cdrom[id].status = BUSY_STAT; cdrom[id].status = BUSY_STAT;
cdrom[id].packet_status = CDROM_PHASE_COMMAND; cdrom[id].packet_status = CDROM_PHASE_COMMAND;
cdrom_buf_free(id);
timer_process(); timer_process();
cdrom_phase_callback(id); cdrom_phase_callback(id);
timer_update_outstanding(); timer_update_outstanding();

2
src/cdrom/cdrom.h
View File

@@ -117,7 +117,7 @@ typedef struct {
int request_pos; int request_pos;
uint16_t buffer[390144]; uint8_t *buffer;
int times; int times;

6
src/cpu/386_dynarec.c
View File

@@ -381,7 +381,7 @@ static void prefetch_flush()
#define PREFETCH_RUN(instr_cycles, bytes, modrm, reads, reads_l, writes, writes_l, ea32) \ #define PREFETCH_RUN(instr_cycles, bytes, modrm, reads, reads_l, writes, writes_l, ea32) \
do { if (cpu_prefetch_cycles) prefetch_run(instr_cycles, bytes, modrm, reads, reads_l, writes, writes_l, ea32); } while (0) do { if (cpu_prefetch_cycles) prefetch_run(instr_cycles, bytes, modrm, reads, reads_l, writes, writes_l, ea32); } while (0)
#define PREFETCH_PREFIX() prefetch_prefixes++ #define PREFETCH_PREFIX() do { if (cpu_prefetch_cycles) prefetch_prefixes++; } while (0)
#define PREFETCH_FLUSH() prefetch_flush() #define PREFETCH_FLUSH() prefetch_flush()
@@ -657,7 +657,7 @@ void exec386_dynarec(int cycs)
{ {
codegen_check_flush(page, page->dirty_mask[(phys_addr >> 10) & 3], phys_addr); codegen_check_flush(page, page->dirty_mask[(phys_addr >> 10) & 3], phys_addr);
page->dirty_mask[(phys_addr >> 10) & 3] = 0; page->dirty_mask[(phys_addr >> 10) & 3] = 0;
if (!block->pc) if (!block->valid)
valid_block = 0; valid_block = 0;
} }
if (valid_block && block->page_mask2) if (valid_block && block->page_mask2)
@@ -678,7 +678,7 @@ void exec386_dynarec(int cycs)
{ {
codegen_check_flush(page_2, page_2->dirty_mask[(phys_addr_2 >> 10) & 3], phys_addr_2); codegen_check_flush(page_2, page_2->dirty_mask[(phys_addr_2 >> 10) & 3], phys_addr_2);
page_2->dirty_mask[(phys_addr_2 >> 10) & 3] = 0; page_2->dirty_mask[(phys_addr_2 >> 10) & 3] = 0;
if (!block->pc) if (!block->valid)
valid_block = 0; valid_block = 0;
} }
} }

4
src/cpu/codegen.h
View File

@@ -55,7 +55,9 @@ typedef struct codeblock_t
int pnt; int pnt;
int ins; int ins;
int valid;
int was_recompiled; int was_recompiled;
int TOP; int TOP;

18
src/cpu/codegen_x86-64.c
View File

@@ -64,9 +64,6 @@ static int last_ssegs;
void codegen_init() void codegen_init()
{ {
#if UNUSED
int c;
#endif
#ifdef __linux__ #ifdef __linux__
void *start; void *start;
size_t len; size_t len;
@@ -127,8 +124,8 @@ static void add_to_block_list(codeblock_t *block)
if (block->next) if (block->next)
{ {
if (!block->next->pc) if (!block->next->valid)
fatal("block->next->pc=0 %p %p %x %x\n", (void *)block->next, (void *)codeblock, block_current, block_pos); fatal("block->next->valid=0 %p %p %x %x\n", (void *)block->next, (void *)codeblock, block_current, block_pos);
} }
if (block->page_mask2) if (block->page_mask2)
@@ -198,9 +195,9 @@ static void delete_block(codeblock_t *block)
if (block == codeblock_hash[HASH(block->phys)]) if (block == codeblock_hash[HASH(block->phys)])
codeblock_hash[HASH(block->phys)] = NULL; codeblock_hash[HASH(block->phys)] = NULL;
if (!block->pc) if (!block->valid)
fatal("Deleting deleted block\n"); fatal("Deleting deleted block\n");
block->pc = 0; block->valid = 0;
codeblock_tree_delete(block); codeblock_tree_delete(block);
remove_from_block_list(block, old_pc); remove_from_block_list(block, old_pc);
@@ -251,7 +248,7 @@ void codegen_block_init(uint32_t phys_addr)
block_current = (block_current + 1) & BLOCK_MASK; block_current = (block_current + 1) & BLOCK_MASK;
block = &codeblock[block_current]; block = &codeblock[block_current];
if (block->pc != 0) if (block->valid != 0)
{ {
delete_block(block); delete_block(block);
cpu_recomp_reuse++; cpu_recomp_reuse++;
@@ -259,6 +256,7 @@ void codegen_block_init(uint32_t phys_addr)
block_num = HASH(phys_addr); block_num = HASH(phys_addr);
codeblock_hash[block_num] = &codeblock[block_current]; codeblock_hash[block_num] = &codeblock[block_current];
block->valid = 1;
block->ins = 0; block->ins = 0;
block->pc = cs + cpu_state.pc; block->pc = cs + cpu_state.pc;
block->_cs = cs; block->_cs = cs;
@@ -442,8 +440,8 @@ void codegen_block_generate_end_mask()
fatal("!page_mask2\n"); fatal("!page_mask2\n");
if (block->next_2) if (block->next_2)
{ {
if (!block->next_2->pc) if (!block->next_2->valid)
fatal("block->next_2->pc=0 %p\n", (void *)block->next_2); fatal("block->next_2->vsalid=0 %p\n", (void *)block->next_2);
} }
block->dirty_mask2 = &page_2->dirty_mask[(block->phys_2 >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK]; block->dirty_mask2 = &page_2->dirty_mask[(block->phys_2 >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK];

15
src/cpu/codegen_x86.c
View File

@@ -1252,8 +1252,8 @@ static void add_to_block_list(codeblock_t *block)
if (block->next) if (block->next)
{ {
if (!block->next->pc) if (!block->next->valid)
fatal("block->next->pc=0 %p %p %x %x\n", (void *)block->next, (void *)codeblock, block_current, block_pos); fatal("block->next->valid=0 %p %p %x %x\n", (void *)block->next, (void *)codeblock, block_current, block_pos);
} }
if (block->page_mask2) if (block->page_mask2)
@@ -1323,9 +1323,9 @@ static void delete_block(codeblock_t *block)
if (block == codeblock_hash[HASH(block->phys)]) if (block == codeblock_hash[HASH(block->phys)])
codeblock_hash[HASH(block->phys)] = NULL; codeblock_hash[HASH(block->phys)] = NULL;
if (!block->pc) if (!block->valid)
fatal("Deleting deleted block\n"); fatal("Deleting deleted block\n");
block->pc = 0; block->valid = 0;
codeblock_tree_delete(block); codeblock_tree_delete(block);
remove_from_block_list(block, old_pc); remove_from_block_list(block, old_pc);
@@ -1373,7 +1373,7 @@ void codegen_block_init(uint32_t phys_addr)
block_current = (block_current + 1) & BLOCK_MASK; block_current = (block_current + 1) & BLOCK_MASK;
block = &codeblock[block_current]; block = &codeblock[block_current];
if (block->pc != 0) if (block->valid != 0)
{ {
delete_block(block); delete_block(block);
cpu_recomp_reuse++; cpu_recomp_reuse++;
@@ -1381,6 +1381,7 @@ void codegen_block_init(uint32_t phys_addr)
block_num = HASH(phys_addr); block_num = HASH(phys_addr);
codeblock_hash[block_num] = &codeblock[block_current]; codeblock_hash[block_num] = &codeblock[block_current];
block->valid = 1;
block->ins = 0; block->ins = 0;
block->pc = cs + cpu_state.pc; block->pc = cs + cpu_state.pc;
block->_cs = cs; block->_cs = cs;
@@ -1534,8 +1535,8 @@ void codegen_block_generate_end_mask()
fatal("!page_mask2\n"); fatal("!page_mask2\n");
if (block->next_2) if (block->next_2)
{ {
if (!block->next_2->pc) if (!block->next_2->valid)
fatal("block->next_2->pc=0 %p\n", (void *)block->next_2); fatal("block->next_2->valid=0 %p\n", (void *)block->next_2);
} }
block->dirty_mask2 = &page_2->dirty_mask[(block->phys_2 >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK]; block->dirty_mask2 = &page_2->dirty_mask[(block->phys_2 >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK];

28
src/disk/hdc_ide.c
View File

@@ -9,7 +9,7 @@
* Implementation of the IDE emulation for hard disks and ATAPI * Implementation of the IDE emulation for hard disks and ATAPI
* CD-ROM devices. * CD-ROM devices.
* *
* Version: @(#)hdc_ide.c 1.0.12 2017/10/11 * Version: @(#)hdc_ide.c 1.0.13 2017/10/16
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -100,7 +100,9 @@ int64_t idecallback[5] = {0LL, 0LL, 0LL, 0LL, 0LL};
int cur_ide[5]; int cur_ide[5];
int ide_do_log = 0; #ifdef ENABLE_IDE_LOG
int ide_do_log = ENABLE_IDE_LOG;
#endif
static void ide_log(const char *format, ...) static void ide_log(const char *format, ...)
{ {
@@ -147,7 +149,7 @@ int ide_irq[5] = { 14, 15, 10, 11, 0 };
void ide_irq_raise(IDE *ide) void ide_irq_raise(IDE *ide)
{ {
/* pclog("Attempting to raise IRQ %i (board %i)\n", ide_irq[ide->board], ide->board); */ /* ide_log("Attempting to raise IRQ %i (board %i)\n", ide_irq[ide->board], ide->board); */
if ((ide->board > 3) || ide->irqstat) if ((ide->board > 3) || ide->irqstat)
{ {
@@ -161,9 +163,9 @@ void ide_irq_raise(IDE *ide)
if (!(ide->fdisk&2)) if (!(ide->fdisk&2))
{ {
if (pci_use_mirq(0) && (ide->board < 2)) if (pci_use_mirq(0) && (ide->board == 1))
{ {
pci_set_mirq(0, ide->board); pci_set_mirq(0);
} }
else else
{ {
@@ -193,9 +195,9 @@ void ide_irq_lower(IDE *ide)
ide_log("Lowering IRQ %i (board %i)\n", ide_irq[ide->board], ide->board); ide_log("Lowering IRQ %i (board %i)\n", ide_irq[ide->board], ide->board);
if (pci_use_mirq(0) && (ide->board < 2)) if (pci_use_mirq(0) && (ide->board == 1))
{ {
pci_clear_mirq(0, ide->board); pci_clear_mirq(0);
} }
else else
{ {
@@ -229,9 +231,9 @@ void ide_irq_update(IDE *ide)
if (ide->irqstat && !pending && !(ide->fdisk & 2)) if (ide->irqstat && !pending && !(ide->fdisk & 2))
{ {
if (pci_use_mirq(0) && (ide->board < 2)) if (pci_use_mirq(0) && (ide->board == 1))
{ {
pci_set_mirq(0, ide->board); pci_set_mirq(0);
} }
else else
{ {
@@ -248,9 +250,9 @@ void ide_irq_update(IDE *ide)
} }
else if (pending) else if (pending)
{ {
if (pci_use_mirq(0) && (ide->board < 2)) if (pci_use_mirq(0) && (ide->board == 1))
{ {
pci_clear_mirq(0, ide->board); pci_clear_mirq(0);
} }
else else
{ {
@@ -637,7 +639,7 @@ void ide_reset(void)
idecallback[2]=idecallback[3]=0LL; idecallback[2]=idecallback[3]=0LL;
idecallback[4]=0LL; idecallback[4]=0LL;
pclog("IDE: loading disks...\n"); ide_log("IDE: loading disks...\n");
c = 0; c = 0;
for (d = 0; d < HDD_NUM; d++) for (d = 0; d < HDD_NUM; d++)
{ {
@@ -654,7 +656,7 @@ void ide_reset(void)
if (++c >= (IDE_NUM+XTIDE_NUM)) break; if (++c >= (IDE_NUM+XTIDE_NUM)) break;
} }
} }
pclog("IDE: done, loaded %d disks.\n", c); ide_log("IDE: done, loaded %d disks.\n", c);
for (d = 0; d < IDE_NUM; d++) for (d = 0; d < IDE_NUM; d++)
{ {

10
src/machine/machine.c
View File

@@ -97,15 +97,15 @@ machine_t machines[] =
{"[386DX MCA] IBM PS/2 model 80", ROM_IBMPS2_M80, "ibmps2_m80", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_PS2_HDD, 1, 12, 1, 63, machine_ps2_model_80_init, NULL }, {"[386DX MCA] IBM PS/2 model 80", ROM_IBMPS2_M80, "ibmps2_m80", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_PS2_HDD, 1, 12, 1, 63, machine_ps2_model_80_init, NULL },
{"[486 ISA] AMI 486 clone", ROM_AMI486, "ami486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HAS_HDC, 1, 64, 1, 127, machine_at_ali1429_init, NULL }, {"[486 ISA] AMI 486 clone", ROM_AMI486, "ami486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HAS_HDC, 1, 64, 1, 127, machine_at_ali1429_init, NULL },
{"[486 ISA] AMI WinBIOS 486", ROM_WIN486, "win486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HAS_HDC, 1, 64, 1, 127, machine_at_ali1429_init, NULL }, {"[486 ISA] AMI WinBIOS 486", ROM_WIN486, "win486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HAS_HDC, 1, 64, 1, 127, machine_at_ali1429_init, NULL },
{"[486 ISA] Award 486 clone", ROM_AWARD486_OPTI495, "award486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HAS_HDC, 1, 64, 1, 127, machine_at_opti495_init, NULL }, {"[486 ISA] Award 486 clone", ROM_AWARD486_OPTI495, "award486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HAS_HDC, 1, 64, 1, 127, machine_at_opti495_init, NULL },
{"[486 ISA] DTK PKM-0038S E-2", ROM_DTK486, "dtk486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HAS_HDC, 1, 128, 1, 127, machine_at_dtk486_init, NULL }, {"[486 ISA] DTK PKM-0038S E-2", ROM_DTK486, "dtk486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HAS_HDC, 1, 128, 1, 127, machine_at_dtk486_init, NULL },
{"[486 ISA] IBM PS/1 machine 2133", ROM_IBMPS1_2133, "ibmps1_2133", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 1, 64, 1, 127, machine_ps1_m2133_init, NULL }, {"[486 ISA] IBM PS/1 machine 2133", ROM_IBMPS1_2133, "ibmps1_2133", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 1, 64, 1, 127, machine_ps1_m2133_init, NULL },
{"[486 MCA] IBM PS/2 model 80-486", ROM_IBMPS2_M80_486, "ibmps2_m80-486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_PS2_HDD, 1, 32, 1, 63, machine_ps2_model_80_486_init, NULL }, {"[486 MCA] IBM PS/2 model 80-486", ROM_IBMPS2_M80_486, "ibmps2_m80-486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_PS2_HDD, 1, 32, 1, 63, machine_ps2_model_80_486_init, NULL },
{"[486 PCI] Rise Computer R418", ROM_R418, "r418", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HAS_HDC, 1, 255, 1, 127, machine_at_r418_init, NULL }, {"[486 PCI] Rise Computer R418", ROM_R418, "r418", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_VLB | MACHINE_AT | MACHINE_HAS_HDC, 1, 255, 1, 127, machine_at_r418_init, NULL },
{"[Socket 4 LX] Intel Premiere/PCI", ROM_REVENGE, "revenge", {{"Intel", cpus_Pentium5V}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 2, 128, 2, 127, machine_at_batman_init, NULL }, {"[Socket 4 LX] Intel Premiere/PCI", ROM_REVENGE, "revenge", {{"Intel", cpus_Pentium5V}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 2, 128, 2, 127, machine_at_batman_init, NULL },

32
src/mem.c
View File

@@ -214,31 +214,33 @@ int mmu_page_fault_check(uint32_t addr, int rw, uint32_t flags, int pde, int is_
uint8_t is_page_fault = 0; uint8_t is_page_fault = 0;
if (mem_cpl3_check()) error_code = 4; /* If CPL = 3 and it's not a PDE check, set US bit. */ if (CPL == 3) error_code = 4; /* If the page fault has occurred at CPL 3, this should be set. */
if (rw) error_code |= 2; /* If writing and it's not a PDE check, set RW bit. */ if (rw) error_code |= 2; /* If the page has occurred during a write, this should be set. */
/* Apparently, this check should not be done on PSE. */
if (!(flags & 1)) if (!(flags & 1))
{ {
is_page_fault = 1; is_page_fault = 1;
} else
error_code |= 1; /* If the page is present, the error must indicate that it is. */
if (!(flags & 4) && mem_cpl3_check())
{
/* The user/supervisor check needs to be checked for the table as well, *before* checking it for the page. */
is_page_fault = 1;
} }
if (!pde) /* Only check the write-protect flag if this is a page directory entry. */
if (pde && rw && !(flags & 2) && ((cr0 & WP_FLAG) || mem_cpl3_check()))
{ {
if (!(flags & 4) && mem_cpl3_check()) is_page_fault = 1;
{
is_page_fault = 1;
}
if (rw && !(flags & 2) && (mem_cpl3_check() || (cr0 & WP_FLAG)))
{
is_page_fault = 1;
}
} }
if (is_page_fault) if (is_page_fault)
{ {
if (is_abrt) if (is_abrt)
{ {
mmu_page_fault(addr, error_code | (flags & 1)); mmu_page_fault(addr, error_code);
} }
return -1; return -1;
} }
@@ -276,7 +278,7 @@ uint32_t mmutranslate(uint32_t addr, int rw, int is_abrt)
if ((table_flags & 0x80) && (cr4 & CR4_PSE)) if ((table_flags & 0x80) && (cr4 & CR4_PSE))
{ {
/* Do a PDE-style page fault check. */ /* Do a PDE-style page fault check. */
if (mmu_page_fault_check(addr, rw, table_flags & 7, 0, is_abrt) == -1) if (mmu_page_fault_check(addr, rw, table_flags & 7, 1, is_abrt) == -1)
{ {
return -1; return -1;
} }
@@ -293,7 +295,7 @@ uint32_t mmutranslate(uint32_t addr, int rw, int is_abrt)
else else
{ {
/* Do a non-PDE-style page fault check. */ /* Do a non-PDE-style page fault check. */
if (mmu_page_fault_check(addr, rw, table_flags & 7, 1, is_abrt) == -1) if (mmu_page_fault_check(addr, rw, table_flags & 7, 0, is_abrt) == -1)
{ {
return -1; return -1;
} }
@@ -305,7 +307,7 @@ uint32_t mmutranslate(uint32_t addr, int rw, int is_abrt)
/* Then check the flags of the page table entry. */ /* Then check the flags of the page table entry. */
page_flags = ((uint32_t *)ram)[page_addr >> 2]; page_flags = ((uint32_t *)ram)[page_addr >> 2];
if (mmu_page_fault_check(addr, rw, page_flags & 7, 0, is_abrt) == -1) if (mmu_page_fault_check(addr, rw, page_flags & 7, 1, is_abrt) == -1)
{ {
return -1; return -1;
} }

66
src/pci.c
View File

@@ -52,7 +52,9 @@ static int trc_reg = 0;
PCI_RESET pci_reset_handler; PCI_RESET pci_reset_handler;
int pci_do_log = 0; #ifdef ENABLE_PCI_LOG
int pci_do_log = ENABLE_PCI_LOG;
#endif
void pci_log(const char *format, ...) void pci_log(const char *format, ...)
{ {
@@ -149,7 +151,7 @@ static void elcr_write(uint16_t port, uint8_t val, void *priv)
} }
elcr[port & 1] = val; elcr[port & 1] = val;
printf("ELCR %i: %c %c %c %c %c %c %c %c\n", port & 1, (val & 1) ? 'L' : 'E', (val & 2) ? 'L' : 'E', (val & 4) ? 'L' : 'E', (val & 8) ? 'L' : 'E', (val & 0x10) ? 'L' : 'E', (val & 0x20) ? 'L' : 'E', (val & 0x40) ? 'L' : 'E', (val & 0x80) ? 'L' : 'E'); pci_log("ELCR %i: %c %c %c %c %c %c %c %c\n", port & 1, (val & 1) ? 'L' : 'E', (val & 2) ? 'L' : 'E', (val & 4) ? 'L' : 'E', (val & 8) ? 'L' : 'E', (val & 0x10) ? 'L' : 'E', (val & 0x20) ? 'L' : 'E', (val & 0x40) ? 'L' : 'E', (val & 0x80) ? 'L' : 'E');
} }
static uint8_t elcr_read(uint16_t port, void *priv) static uint8_t elcr_read(uint16_t port, void *priv)
@@ -288,68 +290,62 @@ uint8_t pci_use_mirq(uint8_t mirq)
#define pci_mirq_log pci_log #define pci_mirq_log pci_log
void pci_set_mirq(uint8_t mirq, uint8_t channel) void pci_set_mirq(uint8_t mirq)
{ {
uint8_t irq_line = 0; uint8_t irq_line = 0;
uint8_t level = 0; uint8_t level = 0;
if (channel > 1)
{
pci_mirq_log("pci_set_mirq(%02X, %02X): Invalid MIRQ\n", mirq, channel);
return;
}
if (!pci_mirqs[mirq].enabled) if (!pci_mirqs[mirq].enabled)
{ {
pci_mirq_log("pci_set_mirq(%02X, %02X): MIRQ0 disabled\n", mirq, channel); pci_mirq_log("pci_set_mirq(%02X): MIRQ0 disabled\n", mirq);
return; return;
} }
if (pci_mirqs[mirq].irq_line > 0x0F) if (pci_mirqs[mirq].irq_line > 0x0F)
{ {
pci_mirq_log("pci_set_mirq(%02X, %02X): IRQ line is disabled\n", mirq, channel); pci_mirq_log("pci_set_mirq(%02X): IRQ line is disabled\n", mirq);
return; return;
} }
else else
{ {
irq_line = pci_mirqs[mirq].irq_line ^ (channel ^ 1); irq_line = pci_mirqs[mirq].irq_line;
pci_mirq_log("pci_set_mirq(%02X, %02X): Using IRQ %i\n", mirq, channel, irq_line); pci_mirq_log("pci_set_mirq(%02X): Using IRQ %i\n", mirq, irq_line);
} }
if (pci_irq_is_level(irq_line) && (pci_irq_hold[irq_line] & (1 << (0x1C + (mirq << 1) + channel)))) if (pci_irq_is_level(irq_line) && (pci_irq_hold[irq_line] & (1 << (0x1E + mirq))))
{ {
/* IRQ already held, do nothing. */ /* IRQ already held, do nothing. */
pci_mirq_log("pci_set_mirq(%02X, %02X): MIRQ is already holding the IRQ\n", mirq, channel); pci_mirq_log("pci_set_mirq(%02X): MIRQ is already holding the IRQ\n", mirq);
return; return;
} }
else else
{ {
pci_mirq_log("pci_set_mirq(%02X, %02X): MIRQ not yet holding the IRQ\n", mirq, channel); pci_mirq_log("pci_set_mirq(%02X): MIRQ not yet holding the IRQ\n", mirq);
} }
level = pci_irq_is_level(irq_line); level = pci_irq_is_level(irq_line);
if (!level || !pci_irq_hold[irq_line]) if (!level || !pci_irq_hold[irq_line])
{ {
pci_mirq_log("pci_set_mirq(%02X, %02X): Issuing %s-triggered IRQ (%sheld)\n", mirq, channel, level ? "level" : "edge", pci_irq_hold[irq_line] ? "" : "not "); pci_mirq_log("pci_set_mirq(%02X): Issuing %s-triggered IRQ (%sheld)\n", mirq, level ? "level" : "edge", pci_irq_hold[irq_line] ? "" : "not ");
/* Only raise the interrupt if it's edge-triggered or level-triggered and not yet being held. */ /* Only raise the interrupt if it's edge-triggered or level-triggered and not yet being held. */
picintlevel(1 << irq_line); picintlevel(1 << irq_line);
} }
else if (level && pci_irq_hold[irq_line]) else if (level && pci_irq_hold[irq_line])
{ {
pci_mirq_log("pci_set_mirq(%02X, %02X): IRQ line already being held\n", mirq, channel); pci_mirq_log("pci_set_mirq(%02X): IRQ line already being held\n", mirq);
} }
/* If the IRQ is level-triggered, mark that this MIRQ is holding it. */ /* If the IRQ is level-triggered, mark that this MIRQ is holding it. */
if (level) if (level)
{ {
pci_mirq_log("pci_set_mirq(%02X, %02X): Marking that this card is holding the IRQ\n", mirq, channel); pci_mirq_log("pci_set_mirq(%02X): Marking that this card is holding the IRQ\n", mirq);
pci_irq_hold[irq_line] |= (1 << (0x1C + (mirq << 1) + channel)); pci_irq_hold[irq_line] |= (1 << (0x1E + mirq));
} }
else else
{ {
pci_mirq_log("pci_set_mirq(%02X, %02X): Edge-triggered interrupt, not marking\n", mirq, channel); pci_mirq_log("pci_set_mirq(%02X): Edge-triggered interrupt, not marking\n", mirq);
} }
} }
@@ -442,7 +438,7 @@ void pci_set_irq(uint8_t card, uint8_t pci_int)
} }
} }
void pci_clear_mirq(uint8_t mirq, uint8_t channel) void pci_clear_mirq(uint8_t mirq)
{ {
uint8_t irq_line = 0; uint8_t irq_line = 0;
uint8_t level = 0; uint8_t level = 0;
@@ -451,31 +447,31 @@ void pci_clear_mirq(uint8_t mirq, uint8_t channel)
if (mirq > 1) if (mirq > 1)
{ {
pci_mirq_log("pci_clear_mirq(%02X %02X): Invalid MIRQ\n", mirq, channel); pci_mirq_log("pci_clear_mirq(%02X): Invalid MIRQ\n", mirq);
return; return;
} }
if (!pci_mirqs[mirq].enabled) if (!pci_mirqs[mirq].enabled)
{ {
pci_mirq_log("pci_clear_mirq(%02X %02X): MIRQ0 disabled\n", mirq, channel); pci_mirq_log("pci_clear_mirq(%02X): MIRQ0 disabled\n", mirq);
return; return;
} }
if (pci_mirqs[mirq].irq_line > 0x0F) if (pci_mirqs[mirq].irq_line > 0x0F)
{ {
pci_mirq_log("pci_clear_mirq(%02X %02X): IRQ line is disabled\n", mirq, channel); pci_mirq_log("pci_clear_mirq(%02X): IRQ line is disabled\n", mirq);
return; return;
} }
else else
{ {
irq_line = pci_mirqs[mirq].irq_line ^ (channel ^ 1); irq_line = pci_mirqs[mirq].irq_line;
pci_mirq_log("pci_clear_mirq(%02X %02X): Using IRQ %i\n", mirq, channel, irq_line); pci_mirq_log("pci_clear_mirq(%02X): Using IRQ %i\n", mirq, irq_line);
} }
if (pci_irq_is_level(irq_line) && !(pci_irq_hold[irq_line] & (1 << (0x1C + (mirq << 1) + channel)))) if (pci_irq_is_level(irq_line) && !(pci_irq_hold[irq_line] & (1 << (0x1E + mirq))))
{ {
/* IRQ not held, do nothing. */ /* IRQ not held, do nothing. */
pci_mirq_log("pci_clear_mirq(%02X %02X): MIRQ is not holding the IRQ\n", mirq, channel); pci_mirq_log("pci_clear_mirq(%02X): MIRQ is not holding the IRQ\n", mirq);
return; return;
} }
@@ -483,22 +479,22 @@ void pci_clear_mirq(uint8_t mirq, uint8_t channel)
if (level) if (level)
{ {
pci_mirq_log("pci_clear_mirq(%02X %02X): Releasing this MIRQ's hold on the IRQ\n", mirq, channel); pci_mirq_log("pci_clear_mirq(%02X): Releasing this MIRQ's hold on the IRQ\n", mirq);
pci_irq_hold[irq_line] &= ~(1 << (0x1C + (mirq << 1) + channel)); pci_irq_hold[irq_line] &= ~(1 << (0x1E + mirq));
if (!pci_irq_hold[irq_line]) if (!pci_irq_hold[irq_line])
{ {
pci_mirq_log("pci_clear_mirq(%02X %02X): IRQ no longer held by any card, clearing it\n", mirq, channel); pci_mirq_log("pci_clear_mirq(%02X): IRQ no longer held by any card, clearing it\n", mirq);
picintc(1 << irq_line); picintc(1 << irq_line);
} }
else else
{ {
pci_mirq_log("pci_clear_mirq(%02X %02X): IRQ is still being held\n", mirq, channel); pci_mirq_log("pci_clear_mirq(%02X): IRQ is still being held\n", mirq);
} }
} }
else else
{ {
pci_mirq_log("pci_clear_mirq(%02X %02X): Clearing edge-triggered interrupt\n", mirq, channel); pci_mirq_log("pci_clear_mirq(%02X): Clearing edge-triggered interrupt\n", mirq);
picintc(1 << irq_line); picintc(1 << irq_line);
} }
} }
@@ -675,7 +671,7 @@ static void trc_reset(uint8_t val)
static void trc_write(uint16_t port, uint8_t val, void *priv) static void trc_write(uint16_t port, uint8_t val, void *priv)
{ {
/* pclog("TRC Write: %02X\n", val); */ /* pci_log("TRC Write: %02X\n", val); */
if (!(trc_reg & 4) && (val & 4)) if (!(trc_reg & 4) && (val & 4))
{ {
trc_reset(val); trc_reset(val);

4
src/pci.h
View File

@@ -7,9 +7,9 @@ uint8_t pci_use_mirq(uint8_t mirq);
int pci_irq_is_level(int irq); int pci_irq_is_level(int irq);
void pci_set_mirq(uint8_t mirq, uint8_t channel); void pci_set_mirq(uint8_t mirq);
void pci_set_irq(uint8_t card, uint8_t pci_int); void pci_set_irq(uint8_t card, uint8_t pci_int);
void pci_clear_mirq(uint8_t mirq, uint8_t channel); void pci_clear_mirq(uint8_t mirq);
void pci_clear_irq(uint8_t card, uint8_t pci_int); void pci_clear_irq(uint8_t card, uint8_t pci_int);
void pci_reset(void); void pci_reset(void);

6
src/pic.c
View File

@@ -139,7 +139,7 @@ void pic_write(uint16_t addr, uint8_t val, void *priv)
break; break;
case 2: /*ICW3*/ case 2: /*ICW3*/
pic.icw3 = val; pic.icw3 = val;
pclog("PIC1 ICW3 now %02X\n", val); /* pclog("PIC1 ICW3 now %02X\n", val); */
if (pic.icw1&1) pic.icw=3; if (pic.icw1&1) pic.icw=3;
else pic.icw=0; else pic.icw=0;
break; break;
@@ -271,13 +271,13 @@ void pic2_write(uint16_t addr, uint8_t val, void *priv)
break; break;
case 1: /*ICW2*/ case 1: /*ICW2*/
pic2.vector=val&0xF8; pic2.vector=val&0xF8;
pclog("PIC2 vector now: %02X\n", pic2.vector); /* pclog("PIC2 vector now: %02X\n", pic2.vector); */
if (pic2.icw1&2) pic2.icw=3; if (pic2.icw1&2) pic2.icw=3;
else pic2.icw=2; else pic2.icw=2;
break; break;
case 2: /*ICW3*/ case 2: /*ICW3*/
pic2.icw3 = val; pic2.icw3 = val;
pclog("PIC2 ICW3 now %02X\n", val); /* pclog("PIC2 ICW3 now %02X\n", val); */
if (pic2.icw1&1) pic2.icw=3; if (pic2.icw1&1) pic2.icw=3;
else pic2.icw=0; else pic2.icw=0;
break; break;

14
src/piix.c
View File

@@ -126,35 +126,35 @@ void piix_write(int func, int addr, uint8_t val, void *priv)
return; return;
case 0x60: case 0x60:
pclog("Set IRQ routing: INT A -> %02X\n", val); /* pclog("Set IRQ routing: INT A -> %02X\n", val); */
if (val & 0x80) if (val & 0x80)
pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED); pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED);
else else
pci_set_irq_routing(PCI_INTA, val & 0xf); pci_set_irq_routing(PCI_INTA, val & 0xf);
break; break;
case 0x61: case 0x61:
pclog("Set IRQ routing: INT B -> %02X\n", val); /* pclog("Set IRQ routing: INT B -> %02X\n", val); */
if (val & 0x80) if (val & 0x80)
pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED); pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED);
else else
pci_set_irq_routing(PCI_INTB, val & 0xf); pci_set_irq_routing(PCI_INTB, val & 0xf);
break; break;
case 0x62: case 0x62:
pclog("Set IRQ routing: INT C -> %02X\n", val); /* pclog("Set IRQ routing: INT C -> %02X\n", val); */
if (val & 0x80) if (val & 0x80)
pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED); pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED);
else else
pci_set_irq_routing(PCI_INTC, val & 0xf); pci_set_irq_routing(PCI_INTC, val & 0xf);
break; break;
case 0x63: case 0x63:
pclog("Set IRQ routing: INT D -> %02X\n", val); /* pclog("Set IRQ routing: INT D -> %02X\n", val); */
if (val & 0x80) if (val & 0x80)
pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED); pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED);
else else
pci_set_irq_routing(PCI_INTD, val & 0xf); pci_set_irq_routing(PCI_INTD, val & 0xf);
break; break;
case 0x70: case 0x70:
pclog("Set MIRQ routing: MIRQ0 -> %02X\n", val); /* pclog("Set MIRQ routing: MIRQ0 -> %02X\n", val); */
if (val & 0x80) if (val & 0x80)
pci_set_mirq_routing(PCI_MIRQ0, PCI_IRQ_DISABLED); pci_set_mirq_routing(PCI_MIRQ0, PCI_IRQ_DISABLED);
else else
@@ -163,16 +163,18 @@ void piix_write(int func, int addr, uint8_t val, void *priv)
case 0x71: case 0x71:
if (piix_type == 1) if (piix_type == 1)
{ {
pclog("Set MIRQ routing: MIRQ1 -> %02X\n", val); /* pclog("Set MIRQ routing: MIRQ1 -> %02X\n", val); */
if (val & 0x80) if (val & 0x80)
pci_set_mirq_routing(PCI_MIRQ1, PCI_IRQ_DISABLED); pci_set_mirq_routing(PCI_MIRQ1, PCI_IRQ_DISABLED);
else else
pci_set_mirq_routing(PCI_MIRQ1, val & 0xf); pci_set_mirq_routing(PCI_MIRQ1, val & 0xf);
} }
#if 0
else else
{ {
pclog("Set unused MIRQ routing: MIRQ1 -> %02X\n", val); pclog("Set unused MIRQ routing: MIRQ1 -> %02X\n", val);
} }
#endif
break; break;
} }
if (addr == 0x4C) if (addr == 0x4C)

21
src/scsi/scsi_bus.c
View File

@@ -38,8 +38,9 @@
uint32_t SCSI_BufferLength; uint32_t SCSI_BufferLength;
int scsi_bus_do_log = 0; #ifdef ENABLE_SCSI_BUS_LOG
int scsi_bus_do_log = ENABLE_SCSI_BUS_LOG;
#endif
void scsi_bus_log(const char *format, ...) void scsi_bus_log(const char *format, ...)
{ {
@@ -161,17 +162,15 @@ int scsi_bus_update(scsi_bus_t *bus, int bus_assert)
dev->BufferLength = -1; dev->BufferLength = -1;
pclog("(%02X:%02X): Command %02X: Buffer length %i\n", bus->dev_id, lun, bus->command[0], dev->BufferLength);
scsi_device_command_phase0(bus->dev_id, lun, get_cmd_len(bus->command[0]), bus->command); scsi_device_command_phase0(bus->dev_id, lun, get_cmd_len(bus->command[0]), bus->command);
pclog("SCSI Phase: %02X\n", SCSIPhase); scsi_bus_log("(%02X:%02X): Command %02X: Buffer Length %i, SCSI Phase %02X\n", bus->dev_id, lun, bus->command[0], dev->BufferLength, SCSIPhase);
if ((SCSIPhase == SCSI_PHASE_DATA_IN) || (SCSIPhase == SCSI_PHASE_DATA_OUT)) if ((SCSIPhase == SCSI_PHASE_DATA_IN) || (SCSIPhase == SCSI_PHASE_DATA_OUT))
{ {
pclog("dev->CmdBuffer = %08X\n", dev->CmdBuffer); scsi_bus_log("dev->CmdBuffer = %08X\n", dev->CmdBuffer);
dev->CmdBuffer = (uint8_t *) malloc(dev->BufferLength); dev->CmdBuffer = (uint8_t *) malloc(dev->BufferLength);
pclog("dev->CmdBuffer = %08X\n", dev->CmdBuffer); scsi_bus_log("dev->CmdBuffer = %08X\n", dev->CmdBuffer);
} }
if (SCSIPhase == SCSI_PHASE_DATA_OUT) if (SCSIPhase == SCSI_PHASE_DATA_OUT)
@@ -249,7 +248,7 @@ int scsi_bus_update(scsi_bus_t *bus, int bus_assert)
if (bus->data_pos >= SCSIDevices[bus->dev_id][lun].BufferLength) if (bus->data_pos >= SCSIDevices[bus->dev_id][lun].BufferLength)
{ {
/* pclog("%04X bytes written (%02X %02X)\n", bus->data_pos, bus->command[0], bus->command[1]); */ /* scsi_bus_log("%04X bytes written (%02X %02X)\n", bus->data_pos, bus->command[0], bus->command[1]); */
scsi_bus_log("Actually executing write command\n"); scsi_bus_log("Actually executing write command\n");
scsi_device_command_phase1(bus->dev_id, lun); scsi_device_command_phase1(bus->dev_id, lun);
free(dev->CmdBuffer); free(dev->CmdBuffer);
@@ -271,7 +270,7 @@ int scsi_bus_update(scsi_bus_t *bus, int bus_assert)
if ((bus_assert & BUS_ACK) && !(bus->bus_in & BUS_ACK)) if ((bus_assert & BUS_ACK) && !(bus->bus_in & BUS_ACK))
{ {
/* pclog("Preparing for message in\n"); */ /* scsi_bus_log("Preparing for message in\n"); */
bus->bus_out &= ~BUS_REQ; bus->bus_out &= ~BUS_REQ;
bus->new_state = SCSI_PHASE_MESSAGE_IN; bus->new_state = SCSI_PHASE_MESSAGE_IN;
bus->change_state_delay = 4; bus->change_state_delay = 4;
@@ -353,12 +352,12 @@ int scsi_bus_read(scsi_bus_t *bus)
bus->state = STATE_STATUS; bus->state = STATE_STATUS;
bus->bus_out |= BUS_REQ; bus->bus_out |= BUS_REQ;
bus->bus_out = (bus->bus_out & ~BUS_DATAMASK) | BUS_SETDATA(SCSIStatus) | BUS_DBP; bus->bus_out = (bus->bus_out & ~BUS_DATAMASK) | BUS_SETDATA(SCSIStatus) | BUS_DBP;
/* pclog("SCSI Status (command %02X): %02X (%08X)\n", bus->command[0], SCSIStatus, bus->bus_out); */ /* scsi_bus_log("SCSI Status (command %02X): %02X (%08X)\n", bus->command[0], SCSIStatus, bus->bus_out); */
break; break;
case SCSI_PHASE_MESSAGE_IN: case SCSI_PHASE_MESSAGE_IN:
scsi_bus_log("Phase message in\n"); scsi_bus_log("Phase message in\n");
/* pclog("Message in\n"); */ /* scsi_bus_log("Message in\n"); */
bus->state = STATE_MESSAGEIN; bus->state = STATE_MESSAGEIN;
bus->bus_out = (bus->bus_out & ~BUS_DATAMASK) | BUS_SETDATA(0) | BUS_DBP; bus->bus_out = (bus->bus_out & ~BUS_DATAMASK) | BUS_SETDATA(0) | BUS_DBP;
break; break;

42
src/scsi/scsi_disk.c
View File

@@ -6,7 +6,7 @@
* *
* Emulation of SCSI fixed and removable disks. * Emulation of SCSI fixed and removable disks.
* *
* Version: @(#)scsi_disk.c 1.0.15 2017/10/14 * Version: @(#)scsi_disk.c 1.0.16 2017/10/16
* *
* Author: Miran Grca, <mgrca8@gmail.com> * Author: Miran Grca, <mgrca8@gmail.com>
* Copyright 2017 Miran Grca. * Copyright 2017 Miran Grca.
@@ -90,7 +90,10 @@ uint8_t scsi_hd_command_flags[0x100] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
IMPLEMENTED | ALLOW_UA, /* 0x12 */ IMPLEMENTED | ALLOW_UA, /* 0x12 */
IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x13 */ IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x13 */
0, 0, 0, 0, 0, 0, 0, 0,
IMPLEMENTED, /* 0x15 */
0, 0, 0, 0,
IMPLEMENTED,
IMPLEMENTED | CHECK_READY, /* 0x1B */ IMPLEMENTED | CHECK_READY, /* 0x1B */
0, 0, 0, 0,
IMPLEMENTED | CHECK_READY, /* 0x1E */ IMPLEMENTED | CHECK_READY, /* 0x1E */
@@ -104,7 +107,11 @@ uint8_t scsi_hd_command_flags[0x100] = {
IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x2F */ IMPLEMENTED | CHECK_READY | NONDATA | SCSI_ONLY, /* 0x2F */
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
IMPLEMENTED, /* 0x55 */
0, 0, 0, 0,
IMPLEMENTED, /* 0x5A */
0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -439,8 +446,9 @@ uint8_t scsi_hd_mode_sense_pages_saved[HDD_NUM][0x40][0x40] =
[0x30] = { 0xB0, 0x16, '8', '6', 'B', 'o', 'x', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ' } } [0x30] = { 0xB0, 0x16, '8', '6', 'B', 'o', 'x', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ' } }
}; };
int scsi_hd_do_log = 0; #ifdef ENABLE_SCSI_HD_LOG
int scsi_hd_do_log = ENABLE_SCSI_HD_LOG;
#endif
void scsi_hd_log(const char *format, ...) void scsi_hd_log(const char *format, ...)
{ {
@@ -656,18 +664,21 @@ uint32_t scsi_hd_mode_sense(uint8_t id, uint8_t *buf, uint32_t pos, uint8_t type
int j = 0; int j = 0;
uint8_t msplen; uint8_t msplen;
int size = 0;
type &= 0x3f; type &= 0x3f;
size = hdd_image_get_last_sector(id);
if (block_descriptor_len) if (block_descriptor_len)
{ {
buf[pos++] = 1; /* Density code. */ buf[pos++] = 1; /* Density code. */
buf[pos++] = 0; /* Number of blocks (0 = all). */ buf[pos++] = (size >> 16) & 0xff; /* Number of blocks (0 = all). */
buf[pos++] = 0; buf[pos++] = (size >> 8) & 0xff;
buf[pos++] = 0; buf[pos++] = size & 0xff;
buf[pos++] = 0; /* Reserved. */ buf[pos++] = 0; /* Reserved. */
buf[pos++] = 0; /* Block length (0x800 = 2048 bytes). */ buf[pos++] = 0; /* Block length (0x200 = 512 bytes). */
buf[pos++] = 8; buf[pos++] = 2;
buf[pos++] = 0; buf[pos++] = 0;
} }
@@ -1640,16 +1651,19 @@ void scsi_hd_command(uint8_t id, uint8_t *cdb)
shdc[id].current_page_code = cdb[2] & 0x3F; shdc[id].current_page_code = cdb[2] & 0x3F;
#if 0
if (!(scsi_hd_mode_sense_page_flags[id] & (1LL << shdc[id].current_page_code))) if (!(scsi_hd_mode_sense_page_flags[id] & (1LL << shdc[id].current_page_code)))
{ {
scsi_hd_invalid_field(id); scsi_hd_invalid_field(id);
return; return;
} }
#endif
memset(hdbufferb, 0, len);
alloc_length = len; alloc_length = len;
shdc[id].temp_buffer = (uint8_t *) malloc(256); shdc[id].temp_buffer = (uint8_t *) malloc(65536);
memset(shdc[id].temp_buffer, 0, 65536);
if (cdb[0] == GPCMD_MODE_SENSE_6) if (cdb[0] == GPCMD_MODE_SENSE_6)
{ {
len = scsi_hd_mode_sense(id, shdc[id].temp_buffer, 4, cdb[2], block_desc); len = scsi_hd_mode_sense(id, shdc[id].temp_buffer, 4, cdb[2], block_desc);
@@ -1661,7 +1675,7 @@ void scsi_hd_command(uint8_t id, uint8_t *cdb)
shdc[id].temp_buffer[1] = 0; shdc[id].temp_buffer[1] = 0;
if (block_desc) if (block_desc)
{ {
hdbufferb[3] = 8; shdc[id].temp_buffer[3] = 8;
} }
} }
else else
@@ -1793,7 +1807,7 @@ void scsi_hd_command(uint8_t id, uint8_t *cdb)
shdc[id].temp_buffer[idx++] = 0x00; shdc[id].temp_buffer[idx++] = 0x00;
shdc[id].temp_buffer[idx++] = 0x00; shdc[id].temp_buffer[idx++] = 0x00;
shdc[id].temp_buffer[idx++] = 20; shdc[id].temp_buffer[idx++] = 20;
ide_padstr8(hdbufferb + idx, 20, "53R141"); /* Serial */ ide_padstr8(shdc[id].temp_buffer + idx, 20, "53R141"); /* Serial */
idx += 20; idx += 20;
if (idx + 72 > cdb[4]) if (idx + 72 > cdb[4])

12
src/scsi/scsi_x54x.c
View File

@@ -11,7 +11,7 @@
* series of SCSI Host Adapters made by Mylex. * series of SCSI Host Adapters made by Mylex.
* These controllers were designed for various buses. * These controllers were designed for various buses.
* *
* Version: @(#)scsi_x54x.c 1.0.0 2017/10/14 * Version: @(#)scsi_x54x.c 1.0.1 2017/10/14
* *
* Authors: TheCollector1995, <mariogplayer@gmail.com> * Authors: TheCollector1995, <mariogplayer@gmail.com>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -1283,9 +1283,9 @@ x54x_do_mail(x54x_t *dev)
if (dev->is_aggressive_mode) { if (dev->is_aggressive_mode) {
aggressive = dev->is_aggressive_mode(dev); aggressive = dev->is_aggressive_mode(dev);
x54x_log("Processing mailboxes in %s mode...\n", aggressive ? "aggressive" : "strict"); x54x_log("Processing mailboxes in %s mode...\n", aggressive ? "aggressive" : "strict");
} else { }/* else {
x54x_log("Defaulting to process mailboxes in %s mode...\n", aggressive ? "aggressive" : "strict"); x54x_log("Defaulting to process mailboxes in %s mode...\n", aggressive ? "aggressive" : "strict");
} }*/
if (!dev->MailboxCount) { if (!dev->MailboxCount) {
x54x_log("x54x_do_mail(): No Mailboxes\n"); x54x_log("x54x_do_mail(): No Mailboxes\n");
@@ -1832,12 +1832,12 @@ void
x54x_io_set(x54x_t *dev, uint32_t base) x54x_io_set(x54x_t *dev, uint32_t base)
{ {
if (dev->bus & DEVICE_PCI) { if (dev->bus & DEVICE_PCI) {
x54x_log("x54x: [PCI] Setting I/O handler at %04X\n", dev->Base); x54x_log("x54x: [PCI] Setting I/O handler at %04X\n", base);
io_sethandler(base, 4, io_sethandler(base, 4,
x54x_in, x54x_inw, x54x_inl, x54x_in, x54x_inw, x54x_inl,
x54x_out, x54x_outw, x54x_outl, dev); x54x_out, x54x_outw, x54x_outl, dev);
} else { } else {
x54x_log("x54x: [ISA] Setting I/O handler at %04X\n", dev->Base); x54x_log("x54x: [ISA] Setting I/O handler at %04X\n", base);
io_sethandler(base, 4, io_sethandler(base, 4,
x54x_in, x54x_inw, NULL, x54x_in, x54x_inw, NULL,
x54x_out, x54x_outw, NULL, dev); x54x_out, x54x_outw, NULL, dev);
@@ -1848,7 +1848,7 @@ x54x_io_set(x54x_t *dev, uint32_t base)
void void
x54x_io_remove(x54x_t *dev, uint32_t base) x54x_io_remove(x54x_t *dev, uint32_t base)
{ {
x54x_log("x54x: Removing I/O handler at %04X\n", dev->Base); x54x_log("x54x: Removing I/O handler at %04X\n", base);
if (dev->bus & DEVICE_PCI) { if (dev->bus & DEVICE_PCI) {
io_removehandler(base, 4, io_removehandler(base, 4,

2
src/scsi/scsi_x54x.h
View File

@@ -416,7 +416,7 @@ typedef struct {
ATBusSpeed; ATBusSpeed;
char *fw_rev; /* The 4 bytes of the revision command information + 2 extra bytes for BusLogic */ char *fw_rev; /* The 4 bytes of the revision command information + 2 extra bytes for BusLogic */
uint8_t bus; /* Basically a copy of device flags */ uint16_t bus; /* Basically a copy of device flags */
uint8_t setup_info_len; uint8_t setup_info_len;
uint8_t max_id; uint8_t max_id;
uint8_t pci_slot; uint8_t pci_slot;

95
src/sound/snd_audiopci.c
View File

@@ -1,3 +1,4 @@
#include <stdarg.h>
#include <stdint.h> #include <stdint.h>
#include <stdlib.h> #include <stdlib.h>
#include <string.h> #include <string.h>
@@ -123,6 +124,24 @@ const int32_t codec_attn[]=
static void es1371_fetch(es1371_t *es1371, int dac_nr); static void es1371_fetch(es1371_t *es1371, int dac_nr);
static void update_legacy(es1371_t *es1371); static void update_legacy(es1371_t *es1371);
#ifdef ENABLE_AUDIOPCI_LOG
int audiopci_do_log = ENABLE_AUDIOPCI_LOG;
#endif
void audiopci_log(const char *format, ...)
{
#ifdef ENABLE_AUDIOPCI_LOG
if (emu8k_audiopci_log)
{
va_list ap;
va_start(ap, format);
vprintf(format, ap);
va_end(ap);
fflush(stdout);
}
#endif
}
static void es1371_update_irqs(es1371_t *es1371) static void es1371_update_irqs(es1371_t *es1371)
{ {
int irq = 0; int irq = 0;
@@ -143,12 +162,12 @@ static void es1371_update_irqs(es1371_t *es1371)
if (irq) if (irq)
{ {
pci_set_irq(es1371->card, PCI_INTA); pci_set_irq(es1371->card, PCI_INTA);
// pclog("Raise IRQ\n"); // audiopci_log("Raise IRQ\n");
} }
else else
{ {
pci_clear_irq(es1371->card, PCI_INTA); pci_clear_irq(es1371->card, PCI_INTA);
// pclog("Drop IRQ\n"); // audiopci_log("Drop IRQ\n");
} }
} }
@@ -215,10 +234,10 @@ static uint8_t es1371_inb(uint16_t port, void *p)
break; break;
default: default:
pclog("Bad es1371_inb: port=%04x\n", port); audiopci_log("Bad es1371_inb: port=%04x\n", port);
} }
// pclog("es1371_inb: port=%04x ret=%02x\n", port, ret); // audiopci_log("es1371_inb: port=%04x ret=%02x\n", port, ret);
// output = 3; // output = 3;
return ret; return ret;
} }
@@ -238,7 +257,7 @@ static uint16_t es1371_inw(uint16_t port, void *p)
case 0x18: case 0x18:
ret = es1371->legacy_ctrl & 0xffff; ret = es1371->legacy_ctrl & 0xffff;
// pclog("Read legacy ctrl %04x\n", ret); // audiopci_log("Read legacy ctrl %04x\n", ret);
break; break;
case 0x26: case 0x26:
@@ -257,7 +276,7 @@ static uint16_t es1371_inw(uint16_t port, void *p)
break; break;
default: default:
pclog("Bad es1371_inw: mem_page=%x port=%04x\n", es1371->mem_page, port); audiopci_log("Bad es1371_inw: mem_page=%x port=%04x\n", es1371->mem_page, port);
} }
break; break;
@@ -269,15 +288,15 @@ static uint16_t es1371_inw(uint16_t port, void *p)
break; break;
default: default:
pclog("Bad es1371_inw: mem_page=%x port=%04x\n", es1371->mem_page, port); audiopci_log("Bad es1371_inw: mem_page=%x port=%04x\n", es1371->mem_page, port);
} }
break; break;
default: default:
pclog("Bad es1371_inw: port=%04x\n", port); audiopci_log("Bad es1371_inw: port=%04x\n", port);
} }
// pclog("es1371_inw: port=%04x ret=%04x %04x:%08x\n", port, ret, CS,cpu_state.pc); // audiopci_log("es1371_inw: port=%04x ret=%04x %04x:%08x\n", port, ret, CS,cpu_state.pc);
return ret; return ret;
} }
static uint32_t es1371_inl(uint16_t port, void *p) static uint32_t es1371_inl(uint16_t port, void *p)
@@ -319,7 +338,7 @@ static uint32_t es1371_inl(uint16_t port, void *p)
break; break;
default: default:
pclog("Bad es1371_inl: mem_page=%x port=%04x\n", es1371->mem_page, port); audiopci_log("Bad es1371_inl: mem_page=%x port=%04x\n", es1371->mem_page, port);
} }
break; break;
@@ -331,15 +350,15 @@ static uint32_t es1371_inl(uint16_t port, void *p)
break; break;
default: default:
pclog("Bad es1371_inl: mem_page=%x port=%04x\n", es1371->mem_page, port); audiopci_log("Bad es1371_inl: mem_page=%x port=%04x\n", es1371->mem_page, port);
} }
break; break;
default: default:
pclog("Bad es1371_inl: port=%04x\n", port); audiopci_log("Bad es1371_inl: port=%04x\n", port);
} }
// pclog("es1371_inl: port=%04x ret=%08x %08x\n", port, ret, cpu_state.pc); // audiopci_log("es1371_inl: port=%04x ret=%08x %08x\n", port, ret, cpu_state.pc);
return ret; return ret;
} }
@@ -347,7 +366,7 @@ static void es1371_outb(uint16_t port, uint8_t val, void *p)
{ {
es1371_t *es1371 = (es1371_t *)p; es1371_t *es1371 = (es1371_t *)p;
// pclog("es1371_outb: port=%04x val=%02x %04x:%08x\n", port, val, cs, cpu_state.pc); // audiopci_log("es1371_outb: port=%04x val=%02x %04x:%08x\n", port, val, cs, cpu_state.pc);
switch (port & 0x3f) switch (port & 0x3f)
{ {
case 0x00: case 0x00:
@@ -416,14 +435,14 @@ static void es1371_outb(uint16_t port, uint8_t val, void *p)
break; break;
default: default:
pclog("Bad es1371_outb: port=%04x val=%02x\n", port, val); audiopci_log("Bad es1371_outb: port=%04x val=%02x\n", port, val);
} }
} }
static void es1371_outw(uint16_t port, uint16_t val, void *p) static void es1371_outw(uint16_t port, uint16_t val, void *p)
{ {
es1371_t *es1371 = (es1371_t *)p; es1371_t *es1371 = (es1371_t *)p;
// pclog("es1371_outw: port=%04x val=%04x\n", port, val); // audiopci_log("es1371_outw: port=%04x val=%04x\n", port, val);
switch (port & 0x3f) switch (port & 0x3f)
{ {
case 0x0c: case 0x0c:
@@ -439,14 +458,14 @@ static void es1371_outw(uint16_t port, uint16_t val, void *p)
break; break;
default: default:
pclog("Bad es1371_outw: port=%04x val=%04x\n", port, val); audiopci_log("Bad es1371_outw: port=%04x val=%04x\n", port, val);
} }
} }
static void es1371_outl(uint16_t port, uint32_t val, void *p) static void es1371_outl(uint16_t port, uint32_t val, void *p)
{ {
es1371_t *es1371 = (es1371_t *)p; es1371_t *es1371 = (es1371_t *)p;
// pclog("es1371_outl: port=%04x val=%08x %04x:%08x\n", port, val, CS, cpu_state.pc); // audiopci_log("es1371_outl: port=%04x val=%08x %04x:%08x\n", port, val, CS, cpu_state.pc);
switch (port & 0x3f) switch (port & 0x3f)
{ {
case 0x04: case 0x04:
@@ -460,7 +479,7 @@ static void es1371_outl(uint16_t port, uint32_t val, void *p)
es1371->sr_cir = val; es1371->sr_cir = val;
if (es1371->sr_cir & SRC_RAM_WE) if (es1371->sr_cir & SRC_RAM_WE)
{ {
// pclog("Write SR RAM %02x %04x\n", es1371->sr_cir >> 25, val & 0xffff); // audiopci_log("Write SR RAM %02x %04x\n", es1371->sr_cir >> 25, val & 0xffff);
es1371->sr_ram[es1371->sr_cir >> 25] = val & 0xffff; es1371->sr_ram[es1371->sr_cir >> 25] = val & 0xffff;
switch (es1371->sr_cir >> 25) switch (es1371->sr_cir >> 25)
{ {
@@ -506,7 +525,7 @@ static void es1371_outl(uint16_t port, uint32_t val, void *p)
es1371->codec_ctrl = val; es1371->codec_ctrl = val;
if (!(val & CODEC_READ)) if (!(val & CODEC_READ))
{ {
// pclog("Write codec %02x %04x\n", (val >> 16) & 0x3f, val & 0xffff); // audiopci_log("Write codec %02x %04x\n", (val >> 16) & 0x3f, val & 0xffff);
es1371->codec_regs[(val >> 16) & 0x3f] = val & 0xffff; es1371->codec_regs[(val >> 16) & 0x3f] = val & 0xffff;
switch ((val >> 16) & 0x3f) switch ((val >> 16) & 0x3f)
{ {
@@ -553,11 +572,11 @@ static void es1371_outl(uint16_t port, uint32_t val, void *p)
case 0xc: case 0xc:
es1371->dac[0].addr_latch = val; es1371->dac[0].addr_latch = val;
// pclog("DAC1 addr %08x\n", val); // audiopci_log("DAC1 addr %08x\n", val);
break; break;
default: default:
pclog("Bad es1371_outl: mem_page=%x port=%04x val=%08x\n", es1371->mem_page, port, val); audiopci_log("Bad es1371_outl: mem_page=%x port=%04x val=%08x\n", es1371->mem_page, port, val);
} }
break; break;
case 0x34: case 0x34:
@@ -581,7 +600,7 @@ static void es1371_outl(uint16_t port, uint32_t val, void *p)
break; break;
default: default:
pclog("Bad es1371_outl: mem_page=%x port=%04x val=%08x\n", es1371->mem_page, port, val); audiopci_log("Bad es1371_outl: mem_page=%x port=%04x val=%08x\n", es1371->mem_page, port, val);
} }
break; break;
case 0x38: case 0x38:
@@ -600,7 +619,7 @@ static void es1371_outl(uint16_t port, uint32_t val, void *p)
break; break;
default: default:
pclog("Bad es1371_outl: mem_page=%x port=%04x val=%08x\n", es1371->mem_page, port, val); audiopci_log("Bad es1371_outl: mem_page=%x port=%04x val=%08x\n", es1371->mem_page, port, val);
} }
break; break;
case 0x3c: case 0x3c:
@@ -617,12 +636,12 @@ static void es1371_outl(uint16_t port, uint32_t val, void *p)
break; break;
default: default:
pclog("Bad es1371_outl: mem_page=%x port=%04x val=%08x\n", es1371->mem_page, port, val); audiopci_log("Bad es1371_outl: mem_page=%x port=%04x val=%08x\n", es1371->mem_page, port, val);
} }
break; break;
default: default:
pclog("Bad es1371_outl: port=%04x val=%08x\n", port, val); audiopci_log("Bad es1371_outl: port=%04x val=%08x\n", port, val);
} }
} }
@@ -637,7 +656,7 @@ static void capture_event(es1371_t *es1371, int type, int rw, uint16_t port)
es1371->legacy_ctrl |= ((port << LEGACY_EVENT_ADDR_SHIFT) & LEGACY_EVENT_ADDR_MASK); es1371->legacy_ctrl |= ((port << LEGACY_EVENT_ADDR_SHIFT) & LEGACY_EVENT_ADDR_MASK);
es1371->legacy_ctrl &= ~LEGACY_INT; es1371->legacy_ctrl &= ~LEGACY_INT;
nmi = 1; nmi = 1;
// pclog("Event! %s %04x\n", rw ? "write" : "read", port); // audiopci_log("Event! %s %04x\n", rw ? "write" : "read", port);
} }
static void capture_write_sscape(uint16_t port, uint8_t val, void *p) static void capture_write_sscape(uint16_t port, uint8_t val, void *p)
@@ -781,7 +800,7 @@ static uint8_t es1371_pci_read(int func, int addr, void *p)
if (func) if (func)
return 0; return 0;
//pclog("ES1371 PCI read %08X PC=%08x\n", addr, cpu_state.pc); //audiopci_log("ES1371 PCI read %08X PC=%08x\n", addr, cpu_state.pc);
switch (addr) switch (addr)
{ {
@@ -838,7 +857,7 @@ static void es1371_pci_write(int func, int addr, uint8_t val, void *p)
if (func) if (func)
return; return;
// pclog("ES1371 PCI write %04X %02X PC=%08x\n", addr, val, cpu_state.pc); // audiopci_log("ES1371 PCI write %04X %02X PC=%08x\n", addr, val, cpu_state.pc);
switch (addr) switch (addr)
{ {
@@ -885,7 +904,7 @@ static void es1371_pci_write(int func, int addr, uint8_t val, void *p)
es1371->pmcsr = (es1371->pmcsr & 0x00ff) | ((val & 0x01) << 8); es1371->pmcsr = (es1371->pmcsr & 0x00ff) | ((val & 0x01) << 8);
break; break;
} }
// pclog("es1371->base_addr %08x\n", es1371->base_addr); // audiopci_log("es1371->base_addr %08x\n", es1371->base_addr);
} }
static void es1371_fetch(es1371_t *es1371, int dac_nr) static void es1371_fetch(es1371_t *es1371, int dac_nr)
@@ -894,7 +913,7 @@ static void es1371_fetch(es1371_t *es1371, int dac_nr)
int pos = es1371->dac[dac_nr].buffer_pos & 63; int pos = es1371->dac[dac_nr].buffer_pos & 63;
int c; int c;
//pclog("Fetch format=%i %08x %08x %08x %08x %08x\n", format, es1371->dac[dac_nr].count, es1371->dac[dac_nr].size, es1371->dac[dac_nr].curr_samp_ct,es1371->dac[dac_nr].samp_ct, es1371->dac[dac_nr].addr); //audiopci_log("Fetch format=%i %08x %08x %08x %08x %08x\n", format, es1371->dac[dac_nr].count, es1371->dac[dac_nr].size, es1371->dac[dac_nr].curr_samp_ct,es1371->dac[dac_nr].samp_ct, es1371->dac[dac_nr].addr);
switch (format) switch (format)
{ {
case FORMAT_MONO_8: case FORMAT_MONO_8:
@@ -957,7 +976,7 @@ static void es1371_fetch(es1371_t *es1371, int dac_nr)
{ {
es1371->dac[dac_nr].buffer_l[(pos+c) & 63] = mem_readw_phys(es1371->dac[dac_nr].addr); es1371->dac[dac_nr].buffer_l[(pos+c) & 63] = mem_readw_phys(es1371->dac[dac_nr].addr);
es1371->dac[dac_nr].buffer_r[(pos+c) & 63] = mem_readw_phys(es1371->dac[dac_nr].addr + 2); es1371->dac[dac_nr].buffer_r[(pos+c) & 63] = mem_readw_phys(es1371->dac[dac_nr].addr + 2);
// pclog("Fetch %02x %08x %04x %04x\n", (pos+c) & 63, es1371->dac[dac_nr].addr, es1371->dac[dac_nr].buffer_l[(pos+c) & 63], es1371->dac[dac_nr].buffer_r[(pos+c) & 63]); // audiopci_log("Fetch %02x %08x %04x %04x\n", (pos+c) & 63, es1371->dac[dac_nr].addr, es1371->dac[dac_nr].buffer_l[(pos+c) & 63], es1371->dac[dac_nr].buffer_r[(pos+c) & 63]);
es1371->dac[dac_nr].addr += 4; es1371->dac[dac_nr].addr += 4;
es1371->dac[dac_nr].buffer_pos_end++; es1371->dac[dac_nr].buffer_pos_end++;
@@ -982,10 +1001,10 @@ static void es1371_next_sample(es1371_t *es1371, int dac_nr)
es1371->dac[dac_nr].out_l = es1371->dac[dac_nr].buffer_l[es1371->dac[dac_nr].buffer_pos & 63]; es1371->dac[dac_nr].out_l = es1371->dac[dac_nr].buffer_l[es1371->dac[dac_nr].buffer_pos & 63];
es1371->dac[dac_nr].out_r = es1371->dac[dac_nr].buffer_r[es1371->dac[dac_nr].buffer_pos & 63]; es1371->dac[dac_nr].out_r = es1371->dac[dac_nr].buffer_r[es1371->dac[dac_nr].buffer_pos & 63];
// pclog("Use %02x %04x %04x\n", es1371->dac[dac_nr].buffer_pos & 63, es1371->dac[dac_nr].out_l, es1371->dac[dac_nr].out_r); // audiopci_log("Use %02x %04x %04x\n", es1371->dac[dac_nr].buffer_pos & 63, es1371->dac[dac_nr].out_l, es1371->dac[dac_nr].out_r);
es1371->dac[dac_nr].buffer_pos++; es1371->dac[dac_nr].buffer_pos++;
// pclog("Next sample %08x %08x %08x\n", es1371->dac[dac_nr].buffer_pos, es1371->dac[dac_nr].buffer_pos_end, es1371->dac[dac_nr].curr_samp_ct); // audiopci_log("Next sample %08x %08x %08x\n", es1371->dac[dac_nr].buffer_pos, es1371->dac[dac_nr].buffer_pos_end, es1371->dac[dac_nr].curr_samp_ct);
} }
//static FILE *es1371_f;//,*es1371_f2; //static FILE *es1371_f;//,*es1371_f2;
@@ -997,7 +1016,7 @@ static void es1371_poll(void *p)
if (es1371->int_ctrl & INT_DAC1_EN) if (es1371->int_ctrl & INT_DAC1_EN)
{ {
// pclog("1Samp %i %i %08x\n", es1371->dac[0].curr_samp_ct, es1371->dac[0].samp_ct, es1371->dac[0].ac); // audiopci_log("1Samp %i %i %08x\n", es1371->dac[0].curr_samp_ct, es1371->dac[0].samp_ct, es1371->dac[0].ac);
es1371->dac[0].ac += es1371->dac[0].vf; es1371->dac[0].ac += es1371->dac[0].vf;
if (es1371->dac[0].ac & (~0 << (15+4))) if (es1371->dac[0].ac & (~0 << (15+4)))
{ {
@@ -1007,7 +1026,7 @@ static void es1371_poll(void *p)
es1371->dac[0].curr_samp_ct++; es1371->dac[0].curr_samp_ct++;
if (es1371->dac[0].curr_samp_ct == es1371->dac[0].samp_ct) if (es1371->dac[0].curr_samp_ct == es1371->dac[0].samp_ct)
{ {
// pclog("DAC1 IRQ\n"); // audiopci_log("DAC1 IRQ\n");
es1371->int_status |= INT_STATUS_DAC1; es1371->int_status |= INT_STATUS_DAC1;
es1371_update_irqs(es1371); es1371_update_irqs(es1371);
} }
@@ -1020,7 +1039,7 @@ static void es1371_poll(void *p)
if (es1371->int_ctrl & INT_DAC2_EN) if (es1371->int_ctrl & INT_DAC2_EN)
{ {
// pclog("2Samp %i %i %08x\n", es1371->dac[1].curr_samp_ct, es1371->dac[1].samp_ct, es1371->dac[1].ac); // audiopci_log("2Samp %i %i %08x\n", es1371->dac[1].curr_samp_ct, es1371->dac[1].samp_ct, es1371->dac[1].ac);
es1371->dac[1].ac += es1371->dac[1].vf; es1371->dac[1].ac += es1371->dac[1].vf;
if (es1371->dac[1].ac & (~0 << (15+4))) if (es1371->dac[1].ac & (~0 << (15+4)))
{ {
@@ -1031,7 +1050,7 @@ static void es1371_poll(void *p)
if (es1371->dac[1].curr_samp_ct > es1371->dac[1].samp_ct) if (es1371->dac[1].curr_samp_ct > es1371->dac[1].samp_ct)
{ {
es1371->dac[1].curr_samp_ct = 0; es1371->dac[1].curr_samp_ct = 0;
// pclog("DAC2 IRQ\n"); // audiopci_log("DAC2 IRQ\n");
es1371->int_status |= INT_STATUS_DAC2; es1371->int_status |= INT_STATUS_DAC2;
es1371_update_irqs(es1371); es1371_update_irqs(es1371);
} }

83
src/sound/snd_emu8k.c
View File

@@ -1,4 +1,5 @@
#include <inttypes.h> #include <inttypes.h>
#include <stdarg.h>
#include <stdio.h> #include <stdio.h>
#include <stdint.h> #include <stdint.h>
#include <string.h> #include <string.h>
@@ -252,11 +253,11 @@ uint32_t rep_count_w = 0;
} \ } \
if (name == 0) \ if (name == 0) \
{ \ { \
/*pclog("EMU8K READ %04X-%02X(%d): %04X\n",addr,(emu8k->cur_reg)<<5|emu8k->cur_voice, emu8k->cur_voice,ret);*/ \ /*emu8k_log("EMU8K READ %04X-%02X(%d): %04X\n",addr,(emu8k->cur_reg)<<5|emu8k->cur_voice, emu8k->cur_voice,ret);*/ \
} \ } \
else \ else \
{ \ { \
pclog("EMU8K READ %s(%d) (%d): %04X\n",name, (addr&0x2), emu8k->cur_voice, ret); \ emu8k_log("EMU8K READ %s(%d) (%d): %04X\n",name, (addr&0x2), emu8k->cur_voice, ret); \
}\ }\
} }
# define WRITE16(addr, var, val) WRITE16_SWITCH(addr, var, val) \ # define WRITE16(addr, var, val) WRITE16_SWITCH(addr, var, val) \
@@ -276,11 +277,11 @@ uint32_t rep_count_w = 0;
} \ } \
if (name == 0) \ if (name == 0) \
{ \ { \
/*pclog("EMU8K WRITE %04X-%02X(%d): %04X\n",addr,(emu8k->cur_reg)<<5|emu8k->cur_voice,emu8k->cur_voice, val);*/ \ /*emu8k_log("EMU8K WRITE %04X-%02X(%d): %04X\n",addr,(emu8k->cur_reg)<<5|emu8k->cur_voice,emu8k->cur_voice, val);*/ \
} \ } \
else \ else \
{ \ { \
pclog("EMU8K WRITE %s(%d) (%d): %04X\n",name, (addr&0x2), emu8k->cur_voice,val); \ emu8k_log("EMU8K WRITE %s(%d) (%d): %04X\n",name, (addr&0x2), emu8k->cur_voice,val); \
}\ }\
} }
@@ -290,6 +291,24 @@ uint32_t rep_count_w = 0;
#endif //EMU8K_DEBUG_REGISTERS #endif //EMU8K_DEBUG_REGISTERS
#ifdef ENABLE_EMU8K_LOG
int emu8k_do_log = ENABLE_EMU8K_LOG;
#endif
void emu8k_log(const char *format, ...)
{
#ifdef ENABLE_EMU8K_LOG
if (emu8k_do_log)
{
va_list ap;
va_start(ap, format);
vprintf(format, ap);
va_end(ap);
fflush(stdout);
}
#endif
}
static inline int16_t EMU8K_READ(emu8k_t *emu8k, uint32_t addr) static inline int16_t EMU8K_READ(emu8k_t *emu8k, uint32_t addr)
{ {
const register emu8k_mem_pointers_t addrmem = {{addr}}; const register emu8k_mem_pointers_t addrmem = {{addr}};
@@ -360,7 +379,7 @@ uint16_t emu8k_inw(uint16_t addr, void *p)
#ifdef EMU8K_DEBUG_REGISTERS #ifdef EMU8K_DEBUG_REGISTERS
if (addr == 0xE22) if (addr == 0xE22)
{ {
pclog("EMU8K READ POINTER: %d\n", emu8k_log("EMU8K READ POINTER: %d\n",
((0x80 | ((random_helper + 1) & 0x1F)) << 8) | (emu8k->cur_reg << 5) | emu8k->cur_voice); ((0x80 | ((random_helper + 1) & 0x1F)) << 8) | (emu8k->cur_reg << 5) | emu8k->cur_voice);
} }
else if ((addr&0xF00) == 0x600) else if ((addr&0xF00) == 0x600)
@@ -368,7 +387,7 @@ uint16_t emu8k_inw(uint16_t addr, void *p)
/* These are automatically reported by READ16 */ /* These are automatically reported by READ16 */
if (rep_count_r>1) if (rep_count_r>1)
{ {
pclog("EMU8K ...... for %d times\n", rep_count_r); emu8k_log("EMU8K ...... for %d times\n", rep_count_r);
rep_count_r=0; rep_count_r=0;
} }
last_read=0; last_read=0;
@@ -378,7 +397,7 @@ uint16_t emu8k_inw(uint16_t addr, void *p)
/* These are automatically reported by READ16 */ /* These are automatically reported by READ16 */
if (rep_count_r>1) if (rep_count_r>1)
{ {
pclog("EMU8K ...... for %d times\n", rep_count_r); emu8k_log("EMU8K ...... for %d times\n", rep_count_r);
rep_count_r=0; rep_count_r=0;
} }
last_read=0; last_read=0;
@@ -390,13 +409,13 @@ uint16_t emu8k_inw(uint16_t addr, void *p)
{ {
if (rep_count_r>1) if (rep_count_r>1)
{ {
pclog("EMU8K ...... for %d times\n", rep_count_r); emu8k_log("EMU8K ...... for %d times\n", rep_count_r);
rep_count_r=0; rep_count_r=0;
} }
last_read=tmpz; last_read=tmpz;
pclog("EMU8K READ RAM I/O or configuration or clock \n"); emu8k_log("EMU8K READ RAM I/O or configuration or clock \n");
} }
//pclog("EMU8K READ %04X-%02X(%d/%d)\n",addr,(emu8k->cur_reg)<<5|emu8k->cur_voice, emu8k->cur_reg, emu8k->cur_voice); //emu8k_log("EMU8K READ %04X-%02X(%d/%d)\n",addr,(emu8k->cur_reg)<<5|emu8k->cur_voice, emu8k->cur_reg, emu8k->cur_voice);
} }
else if ((addr&0xF00) == 0xA00 && (emu8k->cur_reg == 2 || emu8k->cur_reg == 3)) else if ((addr&0xF00) == 0xA00 && (emu8k->cur_reg == 2 || emu8k->cur_reg == 3))
{ {
@@ -405,13 +424,13 @@ uint16_t emu8k_inw(uint16_t addr, void *p)
{ {
if (rep_count_r>1) if (rep_count_r>1)
{ {
pclog("EMU8K ...... for %d times\n", rep_count_r); emu8k_log("EMU8K ...... for %d times\n", rep_count_r);
rep_count_r=0; rep_count_r=0;
} }
last_read=tmpz; last_read=tmpz;
pclog("EMU8K READ INIT \n"); emu8k_log("EMU8K READ INIT \n");
} }
//pclog("EMU8K READ %04X-%02X(%d/%d)\n",addr,(emu8k->cur_reg)<<5|emu8k->cur_voice, emu8k->cur_reg, emu8k->cur_voice); //emu8k_log("EMU8K READ %04X-%02X(%d/%d)\n",addr,(emu8k->cur_reg)<<5|emu8k->cur_voice, emu8k->cur_reg, emu8k->cur_voice);
} }
else else
{ {
@@ -463,15 +482,15 @@ uint16_t emu8k_inw(uint16_t addr, void *p)
} }
if (rep_count_r>1) if (rep_count_r>1)
{ {
pclog("EMU8K ...... for %d times\n", rep_count_r); emu8k_log("EMU8K ...... for %d times\n", rep_count_r);
} }
if (name == 0) if (name == 0)
{ {
pclog("EMU8K READ %04X-%02X(%d/%d): %04X\n",addr,(emu8k->cur_reg)<<5|emu8k->cur_voice, emu8k->cur_reg, emu8k->cur_voice,val); emu8k_log("EMU8K READ %04X-%02X(%d/%d): %04X\n",addr,(emu8k->cur_reg)<<5|emu8k->cur_voice, emu8k->cur_reg, emu8k->cur_voice,val);
} }
else else
{ {
pclog("EMU8K READ %s (%d): %04X\n",name,emu8k->cur_voice, val); emu8k_log("EMU8K READ %s (%d): %04X\n",name,emu8k->cur_voice, val);
} }
rep_count_r=0; rep_count_r=0;
@@ -716,7 +735,7 @@ uint16_t emu8k_inw(uint16_t addr, void *p)
random_helper = (random_helper + 1) & 0x1F; random_helper = (random_helper + 1) & 0x1F;
return ((0x80 | random_helper) << 8) | (emu8k->cur_reg << 5) | emu8k->cur_voice; return ((0x80 | random_helper) << 8) | (emu8k->cur_reg << 5) | emu8k->cur_voice;
} }
pclog("EMU8K READ : Unknown register read: %04X-%02X(%d/%d) \n", addr, (emu8k->cur_reg << 5) | emu8k->cur_voice, emu8k->cur_reg, emu8k->cur_voice); emu8k_log("EMU8K READ : Unknown register read: %04X-%02X(%d/%d) \n", addr, (emu8k->cur_reg << 5) | emu8k->cur_voice, emu8k->cur_reg, emu8k->cur_voice);
return 0xffff; return 0xffff;
} }
@@ -731,14 +750,14 @@ void emu8k_outw(uint16_t addr, uint16_t val, void *p)
#ifdef EMU8K_DEBUG_REGISTERS #ifdef EMU8K_DEBUG_REGISTERS
if (addr == 0xE22) if (addr == 0xE22)
{ {
//pclog("EMU8K WRITE POINTER: %d\n", val); //emu8k_log("EMU8K WRITE POINTER: %d\n", val);
} }
else if ((addr&0xF00) == 0x600) else if ((addr&0xF00) == 0x600)
{ {
/* These are automatically reported by WRITE16 */ /* These are automatically reported by WRITE16 */
if (rep_count_w>1) if (rep_count_w>1)
{ {
pclog("EMU8K ...... for %d times\n", rep_count_w); emu8k_log("EMU8K ...... for %d times\n", rep_count_w);
rep_count_w=0; rep_count_w=0;
} }
last_write=0; last_write=0;
@@ -748,7 +767,7 @@ void emu8k_outw(uint16_t addr, uint16_t val, void *p)
/* These are automatically reported by WRITE16 */ /* These are automatically reported by WRITE16 */
if (rep_count_w>1) if (rep_count_w>1)
{ {
pclog("EMU8K ...... for %d times\n", rep_count_w); emu8k_log("EMU8K ...... for %d times\n", rep_count_w);
rep_count_w=0; rep_count_w=0;
} }
last_write=0; last_write=0;
@@ -760,13 +779,13 @@ void emu8k_outw(uint16_t addr, uint16_t val, void *p)
{ {
if (rep_count_w>1) if (rep_count_w>1)
{ {
pclog("EMU8K ...... for %d times\n", rep_count_w); emu8k_log("EMU8K ...... for %d times\n", rep_count_w);
rep_count_w=0; rep_count_w=0;
} }
last_write=tmpz; last_write=tmpz;
pclog("EMU8K WRITE RAM I/O or configuration \n"); emu8k_log("EMU8K WRITE RAM I/O or configuration \n");
} }
//pclog("EMU8K WRITE %04X-%02X(%d/%d): %04X\n",addr,(emu8k->cur_reg)<<5|emu8k->cur_voice,emu8k->cur_reg,emu8k->cur_voice, val); //emu8k_log("EMU8K WRITE %04X-%02X(%d/%d): %04X\n",addr,(emu8k->cur_reg)<<5|emu8k->cur_voice,emu8k->cur_reg,emu8k->cur_voice, val);
} }
else if ((addr&0xF00) == 0xA00 && (emu8k->cur_reg == 2 || emu8k->cur_reg == 3)) else if ((addr&0xF00) == 0xA00 && (emu8k->cur_reg == 2 || emu8k->cur_reg == 3))
{ {
@@ -775,13 +794,13 @@ void emu8k_outw(uint16_t addr, uint16_t val, void *p)
{ {
if (rep_count_w>1) if (rep_count_w>1)
{ {
pclog("EMU8K ...... for %d times\n", rep_count_w); emu8k_log("EMU8K ...... for %d times\n", rep_count_w);
rep_count_w=0; rep_count_w=0;
} }
last_write=tmpz; last_write=tmpz;
pclog("EMU8K WRITE INIT \n"); emu8k_log("EMU8K WRITE INIT \n");
} }
//pclog("EMU8K WRITE %04X-%02X(%d/%d): %04X\n",addr,(emu8k->cur_reg)<<5|emu8k->cur_voice,emu8k->cur_reg,emu8k->cur_voice, val); //emu8k_log("EMU8K WRITE %04X-%02X(%d/%d): %04X\n",addr,(emu8k->cur_reg)<<5|emu8k->cur_voice,emu8k->cur_reg,emu8k->cur_voice, val);
} }
else if (addr != 0xE22) else if (addr != 0xE22)
{ {
@@ -805,15 +824,15 @@ void emu8k_outw(uint16_t addr, uint16_t val, void *p)
if (rep_count_w>1) if (rep_count_w>1)
{ {
pclog("EMU8K ...... for %d times\n", rep_count_w); emu8k_log("EMU8K ...... for %d times\n", rep_count_w);
} }
if (name == 0) if (name == 0)
{ {
pclog("EMU8K WRITE %04X-%02X(%d/%d): %04X\n",addr,(emu8k->cur_reg)<<5|emu8k->cur_voice,emu8k->cur_reg,emu8k->cur_voice, val); emu8k_log("EMU8K WRITE %04X-%02X(%d/%d): %04X\n",addr,(emu8k->cur_reg)<<5|emu8k->cur_voice,emu8k->cur_reg,emu8k->cur_voice, val);
} }
else else
{ {
pclog("EMU8K WRITE %s (%d): %04X\n",name,emu8k->cur_voice, val); emu8k_log("EMU8K WRITE %s (%d): %04X\n",name,emu8k->cur_voice, val);
} }
rep_count_w=0; rep_count_w=0;
@@ -1481,7 +1500,7 @@ void emu8k_outw(uint16_t addr, uint16_t val, void *p)
emu8k->cur_reg = ((val >> 5) & 7); emu8k->cur_reg = ((val >> 5) & 7);
return; return;
} }
pclog("EMU8K WRITE: Unknown register write: %04X-%02X(%d/%d): %04X \n", addr, (emu8k->cur_reg)<<5|emu8k->cur_voice, emu8k_log("EMU8K WRITE: Unknown register write: %04X-%02X(%d/%d): %04X \n", addr, (emu8k->cur_reg)<<5|emu8k->cur_voice,
emu8k->cur_reg,emu8k->cur_voice, val); emu8k->cur_reg,emu8k->cur_voice, val);
} }
@@ -2072,10 +2091,10 @@ I've recopilated these sentences to get an idea of how to loop
emu_voice->cpf_curr_frac_addr = emu_voice->addr.fract_address; emu_voice->cpf_curr_frac_addr = emu_voice->addr.fract_address;
//if ( emu_voice->cvcf_curr_volume != old_vol[c]) { //if ( emu_voice->cvcf_curr_volume != old_vol[c]) {
// pclog("EMUVOL (%d):%d\n", c, emu_voice->cvcf_curr_volume); // emu8k_log("EMUVOL (%d):%d\n", c, emu_voice->cvcf_curr_volume);
// old_vol[c]=emu_voice->cvcf_curr_volume; // old_vol[c]=emu_voice->cvcf_curr_volume;
//} //}
//pclog("EMUFILT :%d\n", emu_voice->cvcf_curr_filt_ctoff); //emu8k_log("EMUFILT :%d\n", emu_voice->cvcf_curr_filt_ctoff);
} }

33
src/sound/snd_sb.c
View File

@@ -473,7 +473,7 @@ void sb_ct1335_mixer_write(uint16_t addr, uint8_t val, void *p)
break; break;
default: default:
pclog("sb_ct1335: Unknown register WRITE: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]); /* pclog("sb_ct1335: Unknown register WRITE: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]); */
break; break;
} }
} }
@@ -500,7 +500,7 @@ uint8_t sb_ct1335_mixer_read(uint16_t addr, void *p)
case 0x00: case 0x02: case 0x06: case 0x08: case 0x0A: case 0x00: case 0x02: case 0x06: case 0x08: case 0x0A:
return mixer->regs[mixer->index]; return mixer->regs[mixer->index];
default: default:
pclog("sb_ct1335: Unknown register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]); /* pclog("sb_ct1335: Unknown register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]); */
break; break;
} }
@@ -564,7 +564,7 @@ void sb_ct1345_mixer_write(uint16_t addr, uint8_t val, void *p)
default: default:
pclog("sb_ct1345: Unknown register WRITE: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]); /* pclog("sb_ct1345: Unknown register WRITE: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]); */
break; break;
} }
} }
@@ -624,7 +624,7 @@ uint8_t sb_ct1345_mixer_read(uint16_t addr, void *p)
return mixer->regs[mixer->index]; return mixer->regs[mixer->index];
default: default:
pclog("sb_ct1345: Unknown register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]); /* pclog("sb_ct1345: Unknown register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]); */
break; break;
} }
@@ -850,7 +850,7 @@ uint8_t sb_ct1745_mixer_read(uint16_t addr, void *p)
default: default:
pclog("sb_ct1745: Unknown register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]); /* pclog("sb_ct1745: Unknown register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]); */
break; break;
} }
@@ -869,8 +869,8 @@ static uint16_t sb_mcv_addr[8] = {0x200, 0x210, 0x220, 0x230, 0x240, 0x250, 0x26
uint8_t sb_mcv_read(int port, void *p) uint8_t sb_mcv_read(int port, void *p)
{ {
sb_t *sb = (sb_t *)p; sb_t *sb = (sb_t *)p;
pclog("sb_mcv_read: port=%04x\n", port); /* pclog("sb_mcv_read: port=%04x\n", port); */
return sb->pos_regs[port & 7]; return sb->pos_regs[port & 7];
} }
@@ -883,7 +883,7 @@ void sb_mcv_write(int port, uint8_t val, void *p)
if (port < 0x102) if (port < 0x102)
return; return;
pclog("sb_mcv_write: port=%04x val=%02x\n", port, val); /* pclog("sb_mcv_write: port=%04x val=%02x\n", port, val); */
addr = sb_mcv_addr[sb->pos_regs[4] & 7]; addr = sb_mcv_addr[sb->pos_regs[4] & 7];
io_removehandler(addr+8, 0x0002, opl2_read, NULL, NULL, opl2_write, NULL, NULL, &sb->opl); io_removehandler(addr+8, 0x0002, opl2_read, NULL, NULL, opl2_write, NULL, NULL, &sb->opl);
@@ -909,8 +909,8 @@ static int sb_pro_mcv_irqs[4] = {7, 5, 3, 3};
uint8_t sb_pro_mcv_read(int port, void *p) uint8_t sb_pro_mcv_read(int port, void *p)
{ {
sb_t *sb = (sb_t *)p; sb_t *sb = (sb_t *)p;
pclog("sb_pro_mcv_read: port=%04x\n", port); /* pclog("sb_pro_mcv_read: port=%04x\n", port); */
return sb->pos_regs[port & 7]; return sb->pos_regs[port & 7];
} }
@@ -922,8 +922,8 @@ void sb_pro_mcv_write(int port, uint8_t val, void *p)
if (port < 0x102) if (port < 0x102)
return; return;
pclog("sb_pro_mcv_write: port=%04x val=%02x\n", port, val); /* pclog("sb_pro_mcv_write: port=%04x val=%02x\n", port, val); */
addr = (sb->pos_regs[2] & 0x20) ? 0x220 : 0x240; addr = (sb->pos_regs[2] & 0x20) ? 0x220 : 0x240;
io_removehandler(addr+0, 0x0004, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &sb->opl); io_removehandler(addr+0, 0x0004, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &sb->opl);
@@ -965,6 +965,7 @@ void *sb_1_init()
sb_dsp_setaddr(&sb->dsp, addr); sb_dsp_setaddr(&sb->dsp, addr);
sb_dsp_setirq(&sb->dsp, device_get_config_int("irq")); sb_dsp_setirq(&sb->dsp, device_get_config_int("irq"));
sb_dsp_setdma8(&sb->dsp, device_get_config_int("dma")); sb_dsp_setdma8(&sb->dsp, device_get_config_int("dma"));
sb_dsp_set_mpu(&sb->mpu);
/* CMS I/O handler is activated on the dedicated sound_cms module /* CMS I/O handler is activated on the dedicated sound_cms module
DSP I/O handler is activated in sb_dsp_setaddr */ DSP I/O handler is activated in sb_dsp_setaddr */
io_sethandler(addr+8, 0x0002, opl2_read, NULL, NULL, opl2_write, NULL, NULL, &sb->opl); io_sethandler(addr+8, 0x0002, opl2_read, NULL, NULL, opl2_write, NULL, NULL, &sb->opl);
@@ -1008,6 +1009,7 @@ void *sb_mcv_init()
sb_dsp_setaddr(&sb->dsp, 0);//addr); sb_dsp_setaddr(&sb->dsp, 0);//addr);
sb_dsp_setirq(&sb->dsp, device_get_config_int("irq")); sb_dsp_setirq(&sb->dsp, device_get_config_int("irq"));
sb_dsp_setdma8(&sb->dsp, device_get_config_int("dma")); sb_dsp_setdma8(&sb->dsp, device_get_config_int("dma"));
sb_dsp_set_mpu(&sb->mpu);
sound_add_handler(sb_get_buffer_sb2, sb); sound_add_handler(sb_get_buffer_sb2, sb);
/* I/O handlers activated in sb_mcv_write */ /* I/O handlers activated in sb_mcv_write */
mca_add(sb_mcv_read, sb_mcv_write, sb); mca_add(sb_mcv_read, sb_mcv_write, sb);
@@ -1033,6 +1035,7 @@ void *sb_2_init()
sb_dsp_setaddr(&sb->dsp, addr); sb_dsp_setaddr(&sb->dsp, addr);
sb_dsp_setirq(&sb->dsp, device_get_config_int("irq")); sb_dsp_setirq(&sb->dsp, device_get_config_int("irq"));
sb_dsp_setdma8(&sb->dsp, device_get_config_int("dma")); sb_dsp_setdma8(&sb->dsp, device_get_config_int("dma"));
sb_dsp_set_mpu(&sb->mpu);
sb_ct1335_mixer_reset(sb); sb_ct1335_mixer_reset(sb);
/* CMS I/O handler is activated on the dedicated sound_cms module /* CMS I/O handler is activated on the dedicated sound_cms module
DSP I/O handler is activated in sb_dsp_setaddr */ DSP I/O handler is activated in sb_dsp_setaddr */
@@ -1068,6 +1071,7 @@ void *sb_pro_v1_init()
sb_dsp_setaddr(&sb->dsp, addr); sb_dsp_setaddr(&sb->dsp, addr);
sb_dsp_setirq(&sb->dsp, device_get_config_int("irq")); sb_dsp_setirq(&sb->dsp, device_get_config_int("irq"));
sb_dsp_setdma8(&sb->dsp, device_get_config_int("dma")); sb_dsp_setdma8(&sb->dsp, device_get_config_int("dma"));
sb_dsp_set_mpu(&sb->mpu);
sb_ct1345_mixer_reset(sb); sb_ct1345_mixer_reset(sb);
/* DSP I/O handler is activated in sb_dsp_setaddr */ /* DSP I/O handler is activated in sb_dsp_setaddr */
io_sethandler(addr+0, 0x0002, opl2_l_read, NULL, NULL, opl2_l_write, NULL, NULL, &sb->opl); io_sethandler(addr+0, 0x0002, opl2_l_read, NULL, NULL, opl2_l_write, NULL, NULL, &sb->opl);
@@ -1097,6 +1101,7 @@ void *sb_pro_v2_init()
sb_dsp_setaddr(&sb->dsp, addr); sb_dsp_setaddr(&sb->dsp, addr);
sb_dsp_setirq(&sb->dsp, device_get_config_int("irq")); sb_dsp_setirq(&sb->dsp, device_get_config_int("irq"));
sb_dsp_setdma8(&sb->dsp, device_get_config_int("dma")); sb_dsp_setdma8(&sb->dsp, device_get_config_int("dma"));
sb_dsp_set_mpu(&sb->mpu);
sb_ct1345_mixer_reset(sb); sb_ct1345_mixer_reset(sb);
/* DSP I/O handler is activated in sb_dsp_setaddr */ /* DSP I/O handler is activated in sb_dsp_setaddr */
io_sethandler(addr+0, 0x0004, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &sb->opl); io_sethandler(addr+0, 0x0004, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &sb->opl);
@@ -1151,7 +1156,7 @@ void *sb_16_init()
io_sethandler(addr+4, 0x0002, sb_ct1745_mixer_read, NULL, NULL, sb_ct1745_mixer_write, NULL, NULL, sb); io_sethandler(addr+4, 0x0002, sb_ct1745_mixer_read, NULL, NULL, sb_ct1745_mixer_write, NULL, NULL, sb);
sound_add_handler(sb_get_buffer_sb16, sb); sound_add_handler(sb_get_buffer_sb16, sb);
mpu401_init(&sb->mpu, device_get_config_hex16("base401"), device_get_config_int("irq401"), device_get_config_int("mode401")); mpu401_init(&sb->mpu, device_get_config_hex16("base401"), device_get_config_int("irq401"), device_get_config_int("mode401"));
sb_dsp_set_mpu(&sb->mpu);
return sb; return sb;
} }
@@ -1176,6 +1181,7 @@ void *sb_awe32_init()
sb_dsp_setirq(&sb->dsp, device_get_config_int("irq")); sb_dsp_setirq(&sb->dsp, device_get_config_int("irq"));
sb_dsp_setdma8(&sb->dsp, device_get_config_int("dma")); sb_dsp_setdma8(&sb->dsp, device_get_config_int("dma"));
sb_dsp_setdma16(&sb->dsp, device_get_config_int("dma16")); sb_dsp_setdma16(&sb->dsp, device_get_config_int("dma16"));
sb_dsp_set_mpu(&sb->mpu);
sb_ct1745_mixer_reset(sb); sb_ct1745_mixer_reset(sb);
io_sethandler(addr, 0x0004, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &sb->opl); io_sethandler(addr, 0x0004, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &sb->opl);
io_sethandler(addr+8, 0x0002, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &sb->opl); io_sethandler(addr+8, 0x0002, opl3_read, NULL, NULL, opl3_write, NULL, NULL, &sb->opl);
@@ -1183,6 +1189,7 @@ void *sb_awe32_init()
io_sethandler(addr+4, 0x0002, sb_ct1745_mixer_read, NULL, NULL, sb_ct1745_mixer_write, NULL, NULL, sb); io_sethandler(addr+4, 0x0002, sb_ct1745_mixer_read, NULL, NULL, sb_ct1745_mixer_write, NULL, NULL, sb);
sound_add_handler(sb_get_buffer_emu8k, sb); sound_add_handler(sb_get_buffer_emu8k, sb);
mpu401_init(&sb->mpu, device_get_config_hex16("base401"), device_get_config_int("irq401"), device_get_config_int("mode401")); mpu401_init(&sb->mpu, device_get_config_hex16("base401"), device_get_config_int("irq401"), device_get_config_int("mode401"));
sb_dsp_set_mpu(&sb->mpu);
emu8k_init(&sb->emu8k, emu_addr, onboard_ram); emu8k_init(&sb->emu8k, emu_addr, onboard_ram);
return sb; return sb;

53
src/sound/snd_sb_dsp.c
View File

@@ -44,6 +44,8 @@ static int sbe2dat[4][9] = {
{ 0x01, -0x02, 0x04, -0x08, -0x10, 0x20, -0x40, 0x80, 90 } { 0x01, -0x02, 0x04, -0x08, -0x10, 0x20, -0x40, 0x80, 90 }
}; };
static mpu_t *mpu;
static int sb_commands[256]= static int sb_commands[256]=
{ {
-1, 2,-1,-1, 1, 2,-1, 0, 1,-1,-1,-1,-1,-1, 2, 1, -1, 2,-1,-1, 1, 2,-1, 0, 1,-1,-1,-1,-1,-1, 2, 1,
@@ -142,7 +144,7 @@ void sb_dsp_reset(sb_dsp_t *dsp)
dsp->sb_read_wp = dsp->sb_read_rp = 0; dsp->sb_read_wp = dsp->sb_read_rp = 0;
dsp->sb_data_stat = -1; dsp->sb_data_stat = -1;
dsp->sb_speaker = 0; dsp->sb_speaker = 0;
dsp->sb_pausetime = -1; dsp->sb_pausetime = -1LL;
dsp->sbe2 = 0xAA; dsp->sbe2 = 0xAA;
dsp->sbe2count = 0; dsp->sbe2count = 0;
@@ -182,15 +184,15 @@ void sb_doreset(sb_dsp_t *dsp)
void sb_dsp_speed_changed(sb_dsp_t *dsp) void sb_dsp_speed_changed(sb_dsp_t *dsp)
{ {
if (dsp->sb_timeo < 256) if (dsp->sb_timeo < 256LL)
dsp->sblatcho = TIMER_USEC * (256 - dsp->sb_timeo); dsp->sblatcho = TIMER_USEC * (256LL - dsp->sb_timeo);
else else
dsp->sblatcho = (int)(TIMER_USEC * (1000000.0f / (float)(dsp->sb_timeo - 256))); dsp->sblatcho = (int)(TIMER_USEC * (1000000.0f / (float)(dsp->sb_timeo - 256LL)));
if (dsp->sb_timei < 256) if (dsp->sb_timei < 256LL)
dsp->sblatchi = TIMER_USEC * (256 - dsp->sb_timei); dsp->sblatchi = TIMER_USEC * (256LL - dsp->sb_timei);
else else
dsp->sblatchi = (int)(TIMER_USEC * (1000000.0f / (float)(dsp->sb_timei - 256))); dsp->sblatchi = (int)(TIMER_USEC * (1000000.0f / (float)(dsp->sb_timei - 256LL)));
} }
void sb_add_data(sb_dsp_t *dsp, uint8_t v) void sb_add_data(sb_dsp_t *dsp, uint8_t v)
@@ -205,7 +207,7 @@ void sb_add_data(sb_dsp_t *dsp, uint8_t v)
void sb_start_dma(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len) void sb_start_dma(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len)
{ {
dsp->sb_pausetime = -1; dsp->sb_pausetime = -1LL;
if (dma8) if (dma8)
{ {
dsp->sb_8_length = len; dsp->sb_8_length = len;
@@ -379,8 +381,8 @@ void sb_exec_command(sb_dsp_t *dsp)
* mode does not imply such samplerate. Position is increased in sb_poll_i*/ * mode does not imply such samplerate. Position is increased in sb_poll_i*/
if (dsp->sb_enable_i==0) if (dsp->sb_enable_i==0)
{ {
dsp->sb_timei = 256 - 22; dsp->sb_timei = 256LL - 22LL;
dsp->sblatchi = TIMER_USEC * 22; dsp->sblatchi = TIMER_USEC * 22LL;
temp = 1000000 / 22; temp = 1000000 / 22;
dsp->sb_freq = temp; dsp->sb_freq = temp;
timer_process(); timer_process();
@@ -426,7 +428,7 @@ void sb_exec_command(sb_dsp_t *dsp)
dsp->sblatcho = (int)(TIMER_USEC * (1000000.0f / (float)(dsp->sb_data[1] + (dsp->sb_data[0] << 8)))); dsp->sblatcho = (int)(TIMER_USEC * (1000000.0f / (float)(dsp->sb_data[1] + (dsp->sb_data[0] << 8))));
// pclog("Sample rate - %ihz (%i)\n",dsp->sb_data[1]+(dsp->sb_data[0]<<8), dsp->sblatcho); // pclog("Sample rate - %ihz (%i)\n",dsp->sb_data[1]+(dsp->sb_data[0]<<8), dsp->sblatcho);
dsp->sb_freq = dsp->sb_data[1] + (dsp->sb_data[0] << 8); dsp->sb_freq = dsp->sb_data[1] + (dsp->sb_data[0] << 8);
dsp->sb_timeo = 256 + dsp->sb_freq; dsp->sb_timeo = 256LL + dsp->sb_freq;
dsp->sblatchi = dsp->sblatcho; dsp->sblatchi = dsp->sblatcho;
dsp->sb_timei = dsp->sb_timeo; dsp->sb_timei = dsp->sb_timeo;
break; break;
@@ -659,8 +661,8 @@ void sb_write(uint16_t a, uint8_t v, void *priv)
return; return;
case 0xC: /*Command/data write*/ case 0xC: /*Command/data write*/
timer_process(); timer_process();
dsp->wb_time = TIMER_USEC * 1; dsp->wb_time = TIMER_USEC * 1LL;
dsp->wb_full = 1; dsp->wb_full = 1LL;
timer_update_outstanding(); timer_update_outstanding();
if (dsp->asp_data_len) if (dsp->asp_data_len)
{ {
@@ -697,6 +699,10 @@ uint8_t sb_read(uint16_t a, void *priv)
switch (a & 0xf) switch (a & 0xf)
{ {
case 0xA: /*Read data*/ case 0xA: /*Read data*/
if (dsp->uart_midi)
{
return MPU401_ReadData(mpu);
}
dsp->sbreaddat = dsp->sb_read_data[dsp->sb_read_rp]; dsp->sbreaddat = dsp->sb_read_data[dsp->sb_read_rp];
if (dsp->sb_read_rp != dsp->sb_read_wp) if (dsp->sb_read_rp != dsp->sb_read_wp)
{ {
@@ -728,7 +734,12 @@ static void sb_wb_clear(void *p)
{ {
sb_dsp_t *dsp = (sb_dsp_t *)p; sb_dsp_t *dsp = (sb_dsp_t *)p;
dsp->wb_time = 0; dsp->wb_time = 0LL;
}
void sb_dsp_set_mpu(mpu_t *src_mpu)
{
mpu = src_mpu;
} }
void sb_dsp_init(sb_dsp_t *dsp, int type) void sb_dsp_init(sb_dsp_t *dsp, int type)
@@ -939,7 +950,7 @@ void pollsb(void *p)
sb_irq(dsp, 1); sb_irq(dsp, 1);
} }
} }
if (dsp->sb_16_enable && !dsp->sb_16_pause && dsp->sb_pausetime < 0 && dsp->sb_16_output) if (dsp->sb_16_enable && !dsp->sb_16_pause && dsp->sb_pausetime < 0LL && dsp->sb_16_output)
{ {
sb_dsp_update(dsp); sb_dsp_update(dsp);
@@ -975,10 +986,10 @@ void pollsb(void *p)
sb_irq(dsp, 0); sb_irq(dsp, 0);
} }
} }
if (dsp->sb_pausetime > -1) if (dsp->sb_pausetime > -1LL)
{ {
dsp->sb_pausetime--; dsp->sb_pausetime--;
if (dsp->sb_pausetime < 0) if (dsp->sb_pausetime < 0LL)
{ {
sb_irq(dsp, 1); sb_irq(dsp, 1);
dsp->sbenable = dsp->sb_8_enable; dsp->sbenable = dsp->sb_8_enable;
@@ -1054,7 +1065,7 @@ void sb_poll_i(void *p)
} }
processed=1; processed=1;
} }
if (dsp->sb_16_enable && !dsp->sb_16_pause && dsp->sb_pausetime < 0 && !dsp->sb_16_output) if (dsp->sb_16_enable && !dsp->sb_16_pause && dsp->sb_pausetime < 0LL && !dsp->sb_16_output)
{ {
switch (dsp->sb_16_format) switch (dsp->sb_16_format)
{ {
@@ -1159,10 +1170,10 @@ void sb_dsp_add_status_info(char *s, int max_len, sb_dsp_t *dsp)
char temps[128]; char temps[128];
int freq; int freq;
if (dsp->sb_timeo < 256) if (dsp->sb_timeo < 256LL)
freq = 1000000 / (256 - dsp->sb_timeo); freq = 1000000 / (256LL - dsp->sb_timeo);
else else
freq = dsp->sb_timeo - 256; freq = dsp->sb_timeo - 256LL;
if (dsp->sb_8_enable && dsp->sb_8_output) if (dsp->sb_8_enable && dsp->sb_8_output)
{ {

4
src/sound/snd_sb_dsp.h
View File

@@ -6,7 +6,7 @@ typedef struct sb_dsp_t
int sb_8_dmanum; int sb_8_dmanum;
int sb_16_length, sb_16_format, sb_16_autoinit, sb_16_pause, sb_16_enable, sb_16_autolen, sb_16_output; int sb_16_length, sb_16_format, sb_16_autoinit, sb_16_pause, sb_16_enable, sb_16_autolen, sb_16_output;
int sb_16_dmanum; int sb_16_dmanum;
int sb_pausetime; int64_t sb_pausetime;
uint8_t sb_read_data[256]; uint8_t sb_read_data[256];
int sb_read_wp, sb_read_rp; int sb_read_wp, sb_read_rp;
@@ -69,6 +69,8 @@ typedef struct sb_dsp_t
int pos; int pos;
} sb_dsp_t; } sb_dsp_t;
void sb_dsp_set_mpu(mpu_t *src_mpu);
void sb_dsp_init(sb_dsp_t *dsp, int type); void sb_dsp_init(sb_dsp_t *dsp, int type);
void sb_dsp_close(sb_dsp_t *dsp); void sb_dsp_close(sb_dsp_t *dsp);

1
src/sound/sound.c
View File

@@ -32,6 +32,7 @@
#include "snd_adlib.h" #include "snd_adlib.h"
#include "snd_adlibgold.h" #include "snd_adlibgold.h"
#include "snd_audiopci.h" #include "snd_audiopci.h"
#include "snd_mpu401.h"
#if defined(DEV_BRANCH) && defined(USE_PAS16) #if defined(DEV_BRANCH) && defined(USE_PAS16)
# include "snd_pas16.h" # include "snd_pas16.h"
#endif #endif