claunia/86Box
1
0
Fork 0
Code Issues Pull Requests Actions 3 Packages Projects Releases Wiki Activity

More CPU changes.

Browse Source
This commit is contained in:
OBattler
2021-08-10 15:45:49 +02:00
parent 80b75ee433
commit ee4b86065f
3 changed files with 6 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
src/cpu/386_common.c
View File

@@ -306,6 +306,7 @@ enum SMMRAM_Fields_AMD_K {
}; };
#define ENABLE_386_COMMON_LOG 1
#ifdef ENABLE_386_COMMON_LOG #ifdef ENABLE_386_COMMON_LOG
int x386_common_do_log = ENABLE_386_COMMON_LOG; int x386_common_do_log = ENABLE_386_COMMON_LOG;

7
src/cpu/cpu.c
View File

@@ -375,7 +375,7 @@ cpu_set(void)
is_am486dxl = (cpu_s->cpu_type == CPU_Am486DXL); is_am486dxl = (cpu_s->cpu_type == CPU_Am486DXL);
cpu_isintel = !strcmp(cpu_f->manufacturer, "Intel"); cpu_isintel = !strcmp(cpu_f->manufacturer, "Intel");
cpu_iscyrix = !strcmp(cpu_f->manufacturer, "Cyrix"); cpu_iscyrix = !strcmp(cpu_f->manufacturer, "Cyrix") || !strcmp(cpu_f->manufacturer, "ST");
/* SL-Enhanced Intel 486s have the same SMM save state table layout as Pentiums, /* SL-Enhanced Intel 486s have the same SMM save state table layout as Pentiums,
and the WinChip datasheet claims those are Pentium-compatible as well. AMD Am486DXL/DXL2 also has compatible SMM, or would if not for it's different SMBase*/ and the WinChip datasheet claims those are Pentium-compatible as well. AMD Am486DXL/DXL2 also has compatible SMM, or would if not for it's different SMBase*/
@@ -385,7 +385,8 @@ cpu_set(void)
is_k6 = (cpu_s->cpu_type >= CPU_K6) && !strcmp(cpu_f->manufacturer, "AMD"); is_k6 = (cpu_s->cpu_type >= CPU_K6) && !strcmp(cpu_f->manufacturer, "AMD");
/* The Samuel 2 datasheet claims it's Celeron-compatible. */ /* The Samuel 2 datasheet claims it's Celeron-compatible. */
is_p6 = (cpu_isintel && (cpu_s->cpu_type >= CPU_PENTIUMPRO)) || !strcmp(cpu_f->manufacturer, "VIA"); is_p6 = (cpu_isintel && (cpu_s->cpu_type >= CPU_PENTIUMPRO)) || !strcmp(cpu_f->manufacturer, "VIA");
is_cxsmm = !strcmp(cpu_f->manufacturer, "Cyrix") && (cpu_s->cpu_type >= CPU_Cx486S); is_cxsmm = (!strcmp(cpu_f->manufacturer, "Cyrix") || !strcmp(cpu_f->manufacturer, "ST")) &&
(cpu_s->cpu_type >= CPU_Cx486S);
hasfpu = (fpu_type != FPU_NONE); hasfpu = (fpu_type != FPU_NONE);
hascache = (cpu_s->cpu_type >= CPU_486SLC) || (cpu_s->cpu_type == CPU_IBM386SLC) || hascache = (cpu_s->cpu_type >= CPU_486SLC) || (cpu_s->cpu_type == CPU_IBM386SLC) ||
@@ -2962,7 +2963,7 @@ cpu_read(uint16_t addr, void *priv)
if ((cyrix_addr & 0xf0) == 0xc0) if ((cyrix_addr & 0xf0) == 0xc0)
return 0xff; return 0xff;
if (cyrix_addr == 0x20 && cpu_s->cpu_type == CPU_Cx5x86) if (cyrix_addr == 0x20 && (cpu_s->cpu_type == CPU_Cx5x86))
return 0xff; return 0xff;
} }