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More sonarlint work

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This commit is contained in:
Jasmine Iwanek
2023-06-09 23:46:54 -04:00
parent 0d1d069af4
commit ee695e71f9
218 changed files with 6282 additions and 3845 deletions
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8
src/chipset/82c100.c
View File

@@ -286,7 +286,7 @@ mem_read_emsb(uint32_t addr, void *priv)
addr = addr - page->virt + page->phys;
if (addr < ((uint32_t) mem_size << 10))
if (addr < (mem_size << 10))
ret = ram[addr];
ct_82c100_log("mem_read_emsb(%08X = %08X): %02X\n", old_addr, addr, ret);
@@ -305,7 +305,7 @@ mem_read_emsw(uint32_t addr, void *priv)
addr = addr - page->virt + page->phys;
if (addr < ((uint32_t) mem_size << 10))
if (addr < (mem_size << 10))
ret = *(uint16_t *) &ram[addr];
ct_82c100_log("mem_read_emsw(%08X = %08X): %04X\n", old_addr, addr, ret);
@@ -323,7 +323,7 @@ mem_write_emsb(uint32_t addr, uint8_t val, void *priv)
addr = addr - page->virt + page->phys;
if (addr < ((uint32_t) mem_size << 10))
if (addr < (mem_size << 10))
ram[addr] = val;
ct_82c100_log("mem_write_emsb(%08X = %08X, %02X)\n", old_addr, addr, val);
@@ -339,7 +339,7 @@ mem_write_emsw(uint32_t addr, uint16_t val, void *priv)
addr = addr - page->virt + page->phys;
if (addr < ((uint32_t) mem_size << 10))
if (addr < (mem_size << 10))
*(uint16_t *) &ram[addr] = val;
ct_82c100_log("mem_write_emsw(%08X = %08X, %04X)\n", old_addr, addr, val);

4
src/chipset/ali1621.c
View File

@@ -108,7 +108,7 @@ ali1621_smram_recalc(uint8_t val, ali1621_t *dev)
switch (val & 0x30) {
case 0x10: /* Open. */
access_normal = ACCESS_SMRAM_RX;
/* FALLTHROUGH */
[[fallthrough]];
case 0x30: /* Protect. */
access_smm |= ACCESS_SMRAM_R;
break;
@@ -121,7 +121,7 @@ ali1621_smram_recalc(uint8_t val, ali1621_t *dev)
switch (val & 0x30) {
case 0x10: /* Open. */
access_normal |= ACCESS_SMRAM_W;
/* FALLTHROUGH */
[[fallthrough]];
case 0x30: /* Protect. */
access_smm |= ACCESS_SMRAM_W;
break;

2
src/chipset/ali6117.c
View File

@@ -233,7 +233,7 @@ ali6117_reg_write(uint16_t addr, uint8_t val, void *priv)
case 0x12:
val &= 0xf7;
/* FALL-THROUGH */
[[fallthrough]];
case 0x14:
case 0x15:

18
src/chipset/headland.c
View File

@@ -165,7 +165,7 @@ get_addr(headland_t *dev, uint32_t addr, headland_mr_t *mr)
static void
hl_ems_disable(headland_t *dev, uint8_t mar, uint32_t base_addr, uint8_t indx)
{
if (base_addr < ((uint32_t) mem_size << 10))
if (base_addr < (mem_size << 10))
mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], ram + base_addr);
else
mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], NULL);
@@ -197,7 +197,7 @@ hl_ems_update(headland_t *dev, uint8_t mar)
dev->ems_mr[mar & 0x3f].virt_base = virt_addr;
if (indx < 24)
mem_mapping_disable(&dev->upper_mapping[indx]);
if (virt_addr < ((uint32_t) mem_size << 10))
if (virt_addr < (mem_size << 10))
mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], ram + virt_addr);
else
mem_mapping_set_exec(&dev->ems_mapping[mar & 0x3f], NULL);
@@ -244,7 +244,7 @@ memmap_state_update(headland_t *dev)
for (uint8_t i = 0; i < 24; i++) {
addr = get_addr(dev, 0x40000 + (i << 14), NULL);
mem_mapping_set_exec(&dev->upper_mapping[i], addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL);
mem_mapping_set_exec(&dev->upper_mapping[i], addr < (mem_size << 10) ? ram + addr : NULL);
}
memmap_state_default(dev, ht_romcs);
@@ -513,7 +513,7 @@ mem_read_b(uint32_t addr, void *priv)
uint8_t ret = 0xff;
addr = get_addr(dev, addr, mr);
if (addr < ((uint32_t) mem_size << 10))
if (addr < (mem_size << 10))
ret = ram[addr];
return ret;
@@ -527,7 +527,7 @@ mem_read_w(uint32_t addr, void *priv)
uint16_t ret = 0xffff;
addr = get_addr(dev, addr, mr);
if (addr < ((uint32_t) mem_size << 10))
if (addr < (mem_size << 10))
ret = *(uint16_t *) &ram[addr];
return ret;
@@ -541,7 +541,7 @@ mem_read_l(uint32_t addr, void *priv)
uint32_t ret = 0xffffffff;
addr = get_addr(dev, addr, mr);
if (addr < ((uint32_t) mem_size << 10))
if (addr < (mem_size << 10))
ret = *(uint32_t *) &ram[addr];
return ret;
@@ -554,7 +554,7 @@ mem_write_b(uint32_t addr, uint8_t val, void *priv)
headland_t *dev = mr->headland;
addr = get_addr(dev, addr, mr);
if (addr < ((uint32_t) mem_size << 10))
if (addr < (mem_size << 10))
ram[addr] = val;
}
@@ -565,7 +565,7 @@ mem_write_w(uint32_t addr, uint16_t val, void *priv)
headland_t *dev = mr->headland;
addr = get_addr(dev, addr, mr);
if (addr < ((uint32_t) mem_size << 10))
if (addr < (mem_size << 10))
*(uint16_t *) &ram[addr] = val;
}
@@ -576,7 +576,7 @@ mem_write_l(uint32_t addr, uint32_t val, void *priv)
headland_t *dev = mr->headland;
addr = get_addr(dev, addr, mr);
if (addr < ((uint32_t) mem_size << 10))
if (addr < (mem_size << 10))
*(uint32_t *) &ram[addr] = val;
}

9
src/chipset/intel_420ex.c
View File

@@ -165,15 +165,14 @@ i420ex_smram_handler_phase1(i420ex_t *dev)
static void
i420ex_drb_recalc(i420ex_t *dev)
{
int i;
uint32_t boundary;
for (i = 4; i >= 0; i--)
for (uint8_t i = 4; i >= 0; i--)
row_disable(i);
for (i = 0; i <= 4; i++) {
boundary = ((uint32_t) dev->regs[0x60 + i]) & 0xff;
row_set_boundary(i, boundary);
for (uint8_t i = 0; i <= 4; i++) {
boundary = ((uint32_t) dev->regs[0x60 + i]) & 0xff;
row_set_boundary(i, boundary);
}
flushmmucache();

4
src/chipset/intel_4x0.c
View File

@@ -1068,6 +1068,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
case INTEL_440ZX:
case INTEL_440GX:
regs[addr] = val;
break;
default:
break;
}
@@ -1077,6 +1079,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
case INTEL_440BX:
case INTEL_440ZX:
regs[0x77] = val & 0x03;
break;
default:
break;
}

2
src/chipset/opti283.c
View File

@@ -228,7 +228,7 @@ opti283_write(uint16_t addr, uint8_t val, void *priv)
case 0x14:
reset_on_hlt = !!(val & 0x40);
/* FALLTHROUGH */
[[fallthrough]];
case 0x11:
case 0x12:
case 0x13:

1
src/chipset/sis_5571.c
View File

@@ -638,6 +638,7 @@ pci_isa_bridge_write(int func, int addr, uint8_t val, void *priv)
break;
}
sis_5571_log("SiS5571-USB: dev->pci_conf[%02x] = %02x\n", addr, val);
break;
default:
break;

2
src/chipset/via_pipc.c
View File

@@ -1474,7 +1474,7 @@ pipc_write(int func, int addr, uint8_t val, void *priv)
case 0xd2:
if (dev->local == VIA_PIPC_686B)
smbus_piix4_setclock(dev->smbus, (val & 0x04) ? 65536 : 16384);
/* fall-through */
[[fallthrough]];
case 0x90:
case 0x91: