More sonarlint work
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@@ -38,6 +38,7 @@
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#include <86box/snd_sb.h>
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#include <86box/mem.h>
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#include <86box/rom.h>
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#include <86box/plat_unused.h>
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static int optimc_wss_dma[4] = { 0, 0, 1, 3 };
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static int optimc_wss_irq[8] = { 5, 7, 9, 10, 11, 12, 14, 15 };
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@@ -48,14 +49,21 @@ enum optimc_local_flags {
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};
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typedef struct optimc_t {
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uint8_t type, fm_type;
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uint8_t type;
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uint8_t fm_type;
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uint8_t wss_config, reg_enabled;
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uint8_t wss_config;
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uint8_t reg_enabled;
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uint16_t cur_addr, cur_wss_addr, cur_mpu401_addr;
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uint16_t cur_addr;
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uint16_t cur_wss_addr;
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uint16_t cur_mpu401_addr;
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int cur_irq, cur_dma;
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int cur_wss_enabled, cur_wss_irq, cur_wss_dma;
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int cur_irq;
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int cur_dma;
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int cur_wss_enabled;
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int cur_wss_irq;
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int cur_wss_dma;
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int cur_mpu401_irq;
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int cur_mpu401_enabled;
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void *gameport;
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@@ -82,9 +90,9 @@ optimc_filter_opl(void *priv, double *out_l, double *out_r)
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}
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static uint8_t
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optimc_wss_read(uint16_t addr, void *priv)
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optimc_wss_read(UNUSED(uint16_t addr), void *priv)
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{
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optimc_t *optimc = (optimc_t *) priv;
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const optimc_t *optimc = (optimc_t *) priv;
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if (!(optimc->regs[4] & 0x10) && optimc->cur_mode == 0)
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return 0xFF;
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@@ -93,7 +101,7 @@ optimc_wss_read(uint16_t addr, void *priv)
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}
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static void
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optimc_wss_write(uint16_t addr, uint8_t val, void *priv)
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optimc_wss_write(UNUSED(uint16_t addr), uint8_t val, void *priv)
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{
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optimc_t *optimc = (optimc_t *) priv;
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@@ -105,9 +113,9 @@ optimc_wss_write(uint16_t addr, uint8_t val, void *priv)
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}
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static void
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optimc_get_buffer(int32_t *buffer, int len, void *p)
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optimc_get_buffer(int32_t *buffer, int len, void *priv)
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{
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optimc_t *optimc = (optimc_t *) p;
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optimc_t *optimc = (optimc_t *) priv;
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if (optimc->regs[3] & 0x4)
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return;
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@@ -141,9 +149,9 @@ optimc_add_opl(optimc_t *optimc)
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}
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static void
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optimc_reg_write(uint16_t addr, uint8_t val, void *p)
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optimc_reg_write(uint16_t addr, uint8_t val, void *priv)
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{
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optimc_t *optimc = (optimc_t *) p;
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optimc_t *optimc = (optimc_t *) priv;
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uint16_t idx = addr - 0xF8D;
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uint8_t old = optimc->regs[idx];
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static uint8_t reg_enable_phase = 0;
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@@ -176,6 +184,9 @@ optimc_reg_write(uint16_t addr, uint8_t val, void *p)
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case 3: /* WSBase = 0x604 */
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optimc->cur_wss_addr = 0x604;
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break;
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default:
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break;
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}
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io_sethandler(optimc->cur_wss_addr, 0x0004, optimc_wss_read, NULL, NULL, optimc_wss_write, NULL, NULL, optimc);
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io_sethandler(optimc->cur_wss_addr + 0x0004, 0x0004, ad1848_read, NULL, NULL, ad1848_write, NULL, NULL, &optimc->ad1848);
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@@ -247,6 +258,9 @@ optimc_reg_write(uint16_t addr, uint8_t val, void *p)
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case 3:
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optimc->cur_mpu401_irq = 7;
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break;
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default:
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break;
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}
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switch ((val >> 5) & 0x3) {
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case 0:
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@@ -261,11 +275,17 @@ optimc_reg_write(uint16_t addr, uint8_t val, void *p)
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case 3:
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optimc->cur_mpu401_addr = 0x300;
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break;
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default:
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break;
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}
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mpu401_change_addr(optimc->mpu, optimc->cur_mpu401_addr);
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mpu401_setirq(optimc->mpu, optimc->cur_mpu401_irq);
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}
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break;
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default:
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break;
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}
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}
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if (optimc->reg_enabled)
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@@ -291,6 +311,9 @@ optimc_reg_write(uint16_t addr, uint8_t val, void *p)
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reg_enable_phase = 1;
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}
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break;
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default:
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break;
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}
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} else
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reg_enable_phase = 1;
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@@ -299,9 +322,9 @@ optimc_reg_write(uint16_t addr, uint8_t val, void *p)
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}
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static uint8_t
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optimc_reg_read(uint16_t addr, void *p)
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optimc_reg_read(uint16_t addr, void *priv)
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{
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optimc_t *optimc = (optimc_t *) p;
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optimc_t *optimc = (optimc_t *) priv;
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uint8_t temp = 0xFF;
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if (optimc->reg_enabled) {
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@@ -316,6 +339,9 @@ optimc_reg_read(uint16_t addr, void *p)
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case 2: /* MC3 */
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temp = (optimc->regs[2] & ~0x3) | 0x2;
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break;
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default:
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break;
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}
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optimc->reg_enabled = 0;
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}
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@@ -398,19 +424,19 @@ optimc_init(const device_t *info)
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}
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static void
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optimc_close(void *p)
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optimc_close(void *priv)
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{
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optimc_t *optimc = (optimc_t *) p;
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optimc_t *optimc = (optimc_t *) priv;
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sb_close(optimc->sb);
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free(optimc->mpu);
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free(p);
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free(priv);
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}
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static void
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optimc_speed_changed(void *p)
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optimc_speed_changed(void *priv)
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{
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optimc_t *optimc = (optimc_t *) p;
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optimc_t *optimc = (optimc_t *) priv;
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ad1848_speed_changed(&optimc->ad1848);
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sb_speed_changed(optimc->sb);
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