claunia/86Box
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Fixed the "minor bug fix" in the AT / PS/2 keyboard controller, reworked PS/2 keyboard controller IRQ latches, and correctly disabled memory top remaps if there's more than (16 MB - remap size) RAM (fixes segmentation faults on some machines with 16+ MB of RAM).

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This commit is contained in:
OBattler
2023-04-11 23:21:52 +02:00
parent 5da3e78fc1
commit ef17003f1b
17 changed files with 194 additions and 107 deletions
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10
src/chipset/intel_420ex.c
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@@ -31,6 +31,7 @@
#include <86box/mem.h>
#include <86box/smram.h>
#include <86box/pci.h>
#include <86box/pic.h>
#include <86box/timer.h>
#include <86box/pit.h>
#include <86box/port_92.h>
@@ -217,6 +218,7 @@ i420ex_write(int func, int addr, uint8_t val, void *priv)
break;
case 0x4e:
dev->regs[addr] = (val & 0xf7);
pic_mouse_latch(!!(val & 0x10));
break;
case 0x50:
dev->regs[addr] = (val & 0x0f);
@@ -387,7 +389,8 @@ i420ex_reset_hard(void *priv)
dev->regs[0x4c] = 0x4d;
dev->regs[0x4e] = 0x03;
/* Bits 2:1 of register 50h are 00 is 25 MHz, and 01 if 33 MHz, 10 and 11 are reserved. */
pic_mouse_latch(0x00);
/* Bits 2:1 of register 50h are 00 is 25 MHz, and 01 if 33 MHz, 10 and 11 are reserved. */
if (cpu_busspeed >= 33333333)
dev->regs[0x50] |= 0x02;
dev->regs[0x51] = 0x80;
@@ -436,6 +439,9 @@ i420ex_reset(void *p)
i420ex_write(0, 0x48, 0x00, p);
/* Disable the PIC mouse latch. */
i420ex_write(0, 0x4e, 0x03, p);
for (i = 0; i < 7; i++)
i420ex_write(0, 0x59 + i, 0x00, p);
@@ -520,6 +526,8 @@ i420ex_init(const device_t *info)
i420ex_reset_hard(dev);
pic_kbd_latch(0x01);
return dev;
}