Added the NCR 53C810 PCI SCSI controller;
Fixed the behavior of the CD-ROM GET CONFIGURATION command when unimplemented features are requested; Fixed the behavior of the CD-ROM READ DVD STRUCTURE command in some situations and made it correctly report 05/30/02 for incompatible format; Reworked the PS/2 Model 80 Type 2 memory handling a bit; The emulator now allocates the few MB of space needed for pages for the entire 4 GB RAM space at the startup and only memset's it to 0 on hard reset - should make sure DMA page reads from/writes to memory-mapped devices no longer crash the emulator on invalidating the memory range; Applied app applicable PCem patches; The PS/1 Model 2133 now also applies PS/2-style NMI mask handling - fixes the 486 recompiler on this machine; Added the missing #include of "cpu/cpu.h" in io.c, fixes compiling when I/O tracing is enabled.
This commit is contained in:
@@ -9,7 +9,7 @@
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* Implementation of the CD-ROM drive with SCSI(-like)
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* commands, for both ATAPI and SCSI usage.
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*
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* Version: @(#)cdrom.c 1.0.24 2017/12/09
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* Version: @(#)cdrom.c 1.0.25 2017/12/10
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*
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* Author: Miran Grca, <mgrca8@gmail.com>
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*
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@@ -21,7 +21,6 @@
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#include <stdlib.h>
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#include <stdarg.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include "../86box.h"
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#include "../config.h"
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#include "../timer.h"
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@@ -724,15 +723,15 @@ int cdrom_do_log = ENABLE_CDROM_LOG;
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static void
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cdrom_log(const char *fmt, ...)
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cdrom_log(const char *format, ...)
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{
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#ifdef ENABLE_CDROM_LOG
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va_list ap;
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if (cdrom_do_log)
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{
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_start(ap, format);
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pclog_ex(format, ap);
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va_end(ap);
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}
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#endif
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@@ -1502,7 +1501,7 @@ static void cdrom_incompatible_format(uint8_t id)
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{
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cdrom_sense_key = SENSE_ILLEGAL_REQUEST;
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cdrom_asc = ASC_INCOMPATIBLE_FORMAT;
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cdrom_ascq = 0;
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cdrom_ascq = 2;
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cdrom_cmd_error(id);
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}
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@@ -1717,22 +1716,6 @@ int cdrom_read_blocks(uint8_t id, uint32_t *len, int first_batch)
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}
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/*SCSI Get Configuration*/
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uint8_t cdrom_set_profile(uint8_t *buf, uint8_t *index, uint16_t profile)
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{
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uint8_t *buf_profile = buf + 12; /* start of profiles */
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buf_profile += ((*index) * 4); /* start of indexed profile */
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buf_profile[0] = (profile >> 8) & 0xff;
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buf_profile[1] = profile & 0xff;
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buf_profile[2] = ((buf_profile[0] == buf[6]) && (buf_profile[1] == buf[7]));
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/* each profile adds 4 bytes to the response */
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(*index)++;
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buf[11] += 4; /* Additional Length */
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return 4;
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}
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/*SCSI Read DVD Structure*/
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static int cdrom_read_dvd_structure(uint8_t id, int format, const uint8_t *packet, uint8_t *buf)
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{
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@@ -2085,13 +2068,13 @@ void cdrom_command(uint8_t id, uint8_t *cdb)
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int msf;
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int pos=0;
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uint32_t max_len;
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uint32_t feature;
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uint32_t used_len;
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unsigned idx = 0;
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unsigned size_idx;
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unsigned preamble_len;
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int toc_format;
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uint32_t alloc_length;
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uint8_t index = 0;
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int block_desc = 0;
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int format = 0;
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int ret;
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@@ -2101,8 +2084,11 @@ void cdrom_command(uint8_t id, uint8_t *cdb)
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char device_identify_ex[15] = { '8', '6', 'B', '_', 'C', 'D', '0', '0', ' ', 'v', '1', '.', '0', '0', 0 };
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int32_t blen = 0;
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int32_t *BufLen;
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uint8_t *b;
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uint32_t profiles[2] = { MMC_PROFILE_CD_ROM, MMC_PROFILE_DVD_ROM };
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uint32_t i = 0;
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#if 1
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#if 0
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int CdbLength;
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#endif
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if (cdrom_drives[id].bus_type == CDROM_BUS_SCSI) {
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@@ -2133,9 +2119,10 @@ void cdrom_command(uint8_t id, uint8_t *cdb)
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cdrom_log("CD-ROM %i: Command 0x%02X, Sense Key %02X, Asc %02X, Ascq %02X, Unit attention: %i\n", id, cdb[0], cdrom_sense_key, cdrom_asc, cdrom_ascq, cdrom[id].unit_attention);
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cdrom_log("CD-ROM %i: Request length: %04X\n", id, cdrom[id].request_length);
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#if 1
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#if 0
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for (CdbLength = 1; CdbLength < cdrom[id].cdb_len; CdbLength++)
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cdrom_log("CD-ROM %i: CDB[%d] = %d\n", id, CdbLength, cdb[CdbLength]);
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pclog("cdblog CD-ROM %i: CDB[%d] = %d\n", id, CdbLength, cdb[CdbLength]);
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// cdrom_log("CD-ROM %i: CDB[%d] = %d\n", id, CdbLength, cdb[CdbLength]);
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#endif
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}
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@@ -2449,34 +2436,86 @@ cdrom_readtoc_fallback:
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SCSIPhase = SCSI_PHASE_DATA_IN;
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/* XXX: could result in alignment problems in some architectures */
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feature = (cdb[2] << 8) | cdb[3];
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max_len = (cdb[7] << 8) | cdb[8];
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index = 0;
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/* only feature 0 is supported */
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if (cdb[2] != 0 || cdb[3] != 0) {
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if ((cdb[2] != 0) || (cdb[3] > 2)) {
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cdrom_invalid_field(id);
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return;
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}
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cdrom_buf_alloc(id, 65536);
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memset(cdbufferb, 0, max_len);
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alloc_length = 0;
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b = cdbufferb;
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/*
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* the number of sectors from the media tells us which profile
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* to use as current. 0 means there is no media
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*/
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if (cdrom_drives[id].handler->ready(id)) {
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len = cdrom_drives[id].handler->size(id);
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if (len > CD_MAX_SECTORS) {
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cdbufferb[6] = (MMC_PROFILE_DVD_ROM >> 8) & 0xff;
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cdbufferb[7] = MMC_PROFILE_DVD_ROM & 0xff;
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b[6] = (MMC_PROFILE_DVD_ROM >> 8) & 0xff;
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b[7] = MMC_PROFILE_DVD_ROM & 0xff;
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ret = 1;
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} else if (len <= CD_MAX_SECTORS) {
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cdbufferb[6] = (MMC_PROFILE_CD_ROM >> 8) & 0xff;
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cdbufferb[7] = MMC_PROFILE_CD_ROM & 0xff;
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b[6] = (MMC_PROFILE_CD_ROM >> 8) & 0xff;
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b[7] = MMC_PROFILE_CD_ROM & 0xff;
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ret = 0;
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}
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cdbufferb[10] = 0x02 | 0x01; /* persistent and current */
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alloc_length = 12; /* headers: 8 + 4 */
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alloc_length += cdrom_set_profile(cdbufferb, &index, MMC_PROFILE_DVD_ROM);
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alloc_length += cdrom_set_profile(cdbufferb, &index, MMC_PROFILE_CD_ROM);
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} else {
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ret = 2;
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}
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alloc_length = 8;
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b += 8;
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if ((feature == 0) || ((cdb[1] & 3) < 2)) {
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b[2] = (0 << 2) | 0x02 | 0x01; /* persistent and current */
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b[3] = 8;
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alloc_length += 4;
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b += 4;
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for (i = 0; i < 2; i++) {
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b[0] = (profiles[i] >> 8) & 0xff;
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b[1] = profiles[i] & 0xff;
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if (ret == i)
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b[2] |= 1;
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alloc_length += 4;
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b += 4;
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}
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}
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if ((feature == 1) || ((cdb[1] & 3) < 2)) {
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b[1] = 1;
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b[2] = (2 << 2) | 0x02 | 0x01; /* persistent and current */
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b[3] = 8;
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if (cdrom_drives[id].bus_type == CDROM_BUS_SCSI)
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b[7] = 1;
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else
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b[7] = 2;
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b[8] = 1;
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alloc_length += 12;
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b += 12;
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}
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if ((feature == 2) || ((cdb[1] & 3) < 2)) {
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b[1] = 2;
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b[2] = (1 << 2) | 0x02 | 0x01; /* persistent and current */
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b[3] = 4;
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b[4] = 2;
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alloc_length += 8;
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b += 8;
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}
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cdbufferb[0] = ((alloc_length - 4) >> 24) & 0xff;
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cdbufferb[1] = ((alloc_length - 4) >> 16) & 0xff;
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cdbufferb[2] = ((alloc_length - 4) >> 8) & 0xff;
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@@ -2580,7 +2619,6 @@ cdrom_readtoc_fallback:
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}
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len = MIN(len, max_len);
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pclog("READ_DISC_INFORMATION: len = %i\n", len);
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cdrom_set_buf_len(id, BufLen, &len);
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@@ -2789,16 +2827,15 @@ cdrom_readtoc_fallback:
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case GPCMD_READ_DVD_STRUCTURE:
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SCSIPhase = SCSI_PHASE_DATA_IN;
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alloc_length = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]);
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alloc_length = MIN(alloc_length, 256 * 512 + 4);
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alloc_length = (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]);
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cdrom_buf_alloc(id, alloc_length);
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if (cdrom_drives[id].handler->pass_through) {
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ret = cdrom_pass_through(id, &len, cdrom[id].current_cdb, cdbufferb);
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if (!ret)
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if (!ret) {
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return;
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else {
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} else {
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if (cdrom_drives[id].bus_type == CDROM_BUS_SCSI) {
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if (*BufLen == -1)
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*BufLen = len;
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@@ -2809,16 +2846,12 @@ cdrom_readtoc_fallback:
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}
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}
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} else {
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len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]);
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alloc_length = len;
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len = cdrom_drives[id].handler->size(id);
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if (cdb[7] < 0xff) {
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if (cdb[7] < 0xc0) {
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if (len <= CD_MAX_SECTORS) {
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cdrom_incompatible_format(id);
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return;
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} else {
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cdrom_invalid_field(id);
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return;
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}
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}
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@@ -2954,19 +2987,29 @@ cdrom_readtoc_fallback:
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cdbufferb[0] = 5; /*CD-ROM*/
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cdbufferb[1] = 0x80; /*Removable*/
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cdbufferb[2] = (cdrom_drives[id].bus_type == CDROM_BUS_SCSI) ? 0x02 : 0x00; /*SCSI-2 compliant*/
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cdbufferb[3] = (cdrom_drives[id].bus_type == CDROM_BUS_SCSI) ? 0x02 : 0x21;
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cdbufferb[3] = (cdrom_drives[id].bus_type == CDROM_BUS_SCSI) ? 0x12 : 0x21;
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cdbufferb[4] = 31;
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if (cdrom_drives[id].bus_type == CDROM_BUS_SCSI) {
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cdbufferb[6] = 1; /* 16-bit transfers supported */
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cdbufferb[7] = 0x20; /* Wide bus supported */
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}
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ide_padstr8(cdbufferb + 8, 8, EMU_NAME); /* Vendor */
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ide_padstr8(cdbufferb + 16, 16, device_identify); /* Product */
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ide_padstr8(cdbufferb + 32, 4, EMU_VERSION); /* Revision */
|
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idx = 36;
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if (max_len == 96) {
|
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cdbufferb[4] = 91;
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idx = 96;
|
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}
|
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}
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atapi_out:
|
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cdbufferb[size_idx] = idx - preamble_len;
|
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len=idx;
|
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|
||||
len = MIN(len, max_len);
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cdrom_set_buf_len(id, BufLen, &len);
|
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|
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cdrom_data_command_finish(id, len, len, max_len, 0);
|
||||
|
||||
21
src/config.c
21
src/config.c
@@ -8,7 +8,7 @@
|
||||
*
|
||||
* Configuration file handler.
|
||||
*
|
||||
* Version: @(#)config.c 1.0.33 2017/12/03
|
||||
* Version: @(#)config.c 1.0.34 2017/12/09
|
||||
*
|
||||
* Authors: Sarah Walker,
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
@@ -446,6 +446,10 @@ load_general(void)
|
||||
window_w = window_h = window_x = window_y = 0;
|
||||
}
|
||||
|
||||
sound_gain[0] = config_get_int(cat, "sound_gain_main", 0);
|
||||
sound_gain[1] = config_get_int(cat, "sound_gain_cd", 0);
|
||||
sound_gain[2] = config_get_int(cat, "sound_gain_midi", 0);
|
||||
|
||||
#ifdef USE_LANGUAGE
|
||||
/*
|
||||
* Currently, 86Box is English (US) only, but in the future
|
||||
@@ -1232,6 +1236,21 @@ save_general(void)
|
||||
config_delete_var(cat, "window_coordinates");
|
||||
}
|
||||
|
||||
if (sound_gain[0] != 0)
|
||||
config_set_int(cat, "sound_gain_main", sound_gain[0]);
|
||||
else
|
||||
config_delete_var(cat, "sound_gain_main");
|
||||
|
||||
if (sound_gain[1] != 0)
|
||||
config_set_int(cat, "sound_gain_cd", sound_gain[1]);
|
||||
else
|
||||
config_delete_var(cat, "sound_gain_cd");
|
||||
|
||||
if (sound_gain[2] != 0)
|
||||
config_set_int(cat, "sound_gain_midi", sound_gain[2]);
|
||||
else
|
||||
config_delete_var(cat, "sound_gain_midi");
|
||||
|
||||
#ifdef USE_LANGUAGE
|
||||
if (plat_langid == 0x0409)
|
||||
config_delete_var(cat, "language");
|
||||
|
||||
@@ -32,6 +32,8 @@
|
||||
#include "../mem.h"
|
||||
#include "../pic.h"
|
||||
#include "../rom.h"
|
||||
#include "../cpu/cpu.h"
|
||||
#include "../machine/machine.h"
|
||||
#include "../timer.h"
|
||||
#include "../plat.h"
|
||||
#include "../ui.h"
|
||||
@@ -206,7 +208,7 @@ esdi_writew(uint16_t port, uint16_t val, void *priv)
|
||||
if (esdi->pos >= 512) {
|
||||
esdi->pos = 0;
|
||||
esdi->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
esdi->callback = 6LL*HDC_TIME;
|
||||
timer_update_outstanding();
|
||||
}
|
||||
@@ -269,7 +271,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
|
||||
case CMD_RESTORE:
|
||||
esdi->command &= ~0x0f; /*mask off step rate*/
|
||||
esdi->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
esdi->callback = 200LL*HDC_TIME;
|
||||
timer_update_outstanding();
|
||||
break;
|
||||
@@ -277,7 +279,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
|
||||
case CMD_SEEK:
|
||||
esdi->command &= ~0x0f; /*mask off step rate*/
|
||||
esdi->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
esdi->callback = 200LL*HDC_TIME;
|
||||
timer_update_outstanding();
|
||||
break;
|
||||
@@ -286,7 +288,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
|
||||
switch (val) {
|
||||
case CMD_NOP:
|
||||
esdi->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
esdi->callback = 200LL*HDC_TIME;
|
||||
timer_update_outstanding();
|
||||
break;
|
||||
@@ -301,7 +303,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
|
||||
|
||||
case 0xa0:
|
||||
esdi->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
esdi->callback = 200LL*HDC_TIME;
|
||||
timer_update_outstanding();
|
||||
break;
|
||||
@@ -321,7 +323,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
|
||||
case CMD_VERIFY+1:
|
||||
esdi->command &= ~0x01;
|
||||
esdi->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
esdi->callback = 200LL*HDC_TIME;
|
||||
timer_update_outstanding();
|
||||
break;
|
||||
@@ -333,14 +335,14 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
|
||||
|
||||
case CMD_SET_PARAMETERS: /* Initialize Drive Parameters */
|
||||
esdi->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
esdi->callback = 30LL*HDC_TIME;
|
||||
timer_update_outstanding();
|
||||
break;
|
||||
|
||||
case CMD_DIAGNOSE: /* Execute Drive Diagnostics */
|
||||
esdi->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
esdi->callback = 200LL*HDC_TIME;
|
||||
timer_update_outstanding();
|
||||
break;
|
||||
@@ -348,7 +350,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
|
||||
case 0xe0: /*???*/
|
||||
case CMD_READ_PARAMETERS:
|
||||
esdi->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
esdi->callback = 200LL*HDC_TIME;
|
||||
timer_update_outstanding();
|
||||
break;
|
||||
@@ -357,7 +359,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
|
||||
pclog("WD1007: bad command %02X\n", val);
|
||||
case 0xe8: /*???*/
|
||||
esdi->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
esdi->callback = 200LL*HDC_TIME;
|
||||
timer_update_outstanding();
|
||||
break;
|
||||
@@ -367,7 +369,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
|
||||
|
||||
case 0x3f6: /* Device control */
|
||||
if ((esdi->fdisk & 0x04) && !(val & 0x04)) {
|
||||
timer_process();
|
||||
timer_clock();
|
||||
esdi->callback = 500LL*HDC_TIME;
|
||||
timer_update_outstanding();
|
||||
esdi->reset = 1;
|
||||
@@ -376,7 +378,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
|
||||
|
||||
if (val & 0x04) {
|
||||
/*Drive held in reset*/
|
||||
timer_process();
|
||||
timer_clock();
|
||||
esdi->callback = 0LL;
|
||||
timer_update_outstanding();
|
||||
esdi->status = STAT_BUSY;
|
||||
@@ -404,7 +406,7 @@ esdi_readw(uint16_t port, void *priv)
|
||||
if (esdi->secount) {
|
||||
next_sector(esdi);
|
||||
esdi->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
esdi->callback = 6LL*HDC_TIME;
|
||||
timer_update_outstanding();
|
||||
} else {
|
||||
|
||||
@@ -185,6 +185,7 @@ typedef struct esdi {
|
||||
#define CMD_READ_VERIFY 0x03
|
||||
#define CMD_WRITE_VERIFY 0x04
|
||||
#define CMD_SEEK 0x05
|
||||
#define CMD_GET_DEV_STATUS 0x08
|
||||
#define CMD_GET_DEV_CONFIG 0x09
|
||||
#define CMD_GET_POS_INFO 0x0a
|
||||
|
||||
@@ -249,6 +250,25 @@ device_not_present(esdi_t *dev)
|
||||
set_irq(dev);
|
||||
}
|
||||
|
||||
static void rba_out_of_range(esdi_t *dev)
|
||||
{
|
||||
dev->status_len = 9;
|
||||
dev->status_data[0] = dev->command | STATUS_LEN(9) | dev->cmd_dev;
|
||||
dev->status_data[1] = 0x0e01; /*Command block error, invalid parameter*/
|
||||
dev->status_data[2] = 0x0007; /*RBA out of range*/
|
||||
dev->status_data[3] = 0;
|
||||
dev->status_data[4] = 0;
|
||||
dev->status_data[5] = 0;
|
||||
dev->status_data[6] = 0;
|
||||
dev->status_data[7] = 0;
|
||||
dev->status_data[8] = 0;
|
||||
|
||||
dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL;
|
||||
dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_FAILURE;
|
||||
dev->irq_in_progress = 1;
|
||||
set_irq(dev);
|
||||
}
|
||||
|
||||
#define ESDI_ADAPTER_ONLY() do \
|
||||
{ \
|
||||
if (dev->cmd_dev != ATTN_HOST_ADAPTER) \
|
||||
@@ -306,6 +326,11 @@ esdi_callback(void *priv)
|
||||
dev->sector_pos = 0;
|
||||
dev->sector_count = dev->cmd_data[1];
|
||||
|
||||
if ((dev->rba + dev->sector_count) > hdd_image_get_last_sector(drive->hdd_num)) {
|
||||
rba_out_of_range(dev);
|
||||
return;
|
||||
}
|
||||
|
||||
dev->status = STATUS_IRQ | STATUS_CMD_IN_PROGRESS | STATUS_TRANSFER_REQ;
|
||||
dev->irq_status = dev->cmd_dev | IRQ_DATA_TRANSFER_READY;
|
||||
dev->irq_in_progress = 1;
|
||||
@@ -375,6 +400,11 @@ esdi_callback(void *priv)
|
||||
dev->sector_pos = 0;
|
||||
dev->sector_count = dev->cmd_data[1];
|
||||
|
||||
if ((dev->rba + dev->sector_count) > hdd_image_get_last_sector(drive->hdd_num)) {
|
||||
rba_out_of_range(dev);
|
||||
return;
|
||||
}
|
||||
|
||||
dev->status = STATUS_IRQ | STATUS_CMD_IN_PROGRESS | STATUS_TRANSFER_REQ;
|
||||
dev->irq_status = dev->cmd_dev | IRQ_DATA_TRANSFER_READY;
|
||||
dev->irq_in_progress = 1;
|
||||
@@ -436,6 +466,11 @@ esdi_callback(void *priv)
|
||||
return;
|
||||
}
|
||||
|
||||
if ((dev->rba + dev->sector_count) > hdd_image_get_last_sector(drive->hdd_num)) {
|
||||
rba_out_of_range(dev);
|
||||
return;
|
||||
}
|
||||
|
||||
dev->status = STATUS_IRQ;
|
||||
dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS;
|
||||
dev->irq_in_progress = 1;
|
||||
@@ -456,6 +491,36 @@ esdi_callback(void *priv)
|
||||
set_irq(dev);
|
||||
break;
|
||||
|
||||
case CMD_GET_DEV_STATUS:
|
||||
ESDI_DRIVE_ONLY();
|
||||
|
||||
if (! drive->present) {
|
||||
device_not_present(dev);
|
||||
return;
|
||||
}
|
||||
|
||||
if (dev->status_pos)
|
||||
fatal("Status send in progress\n");
|
||||
if ((dev->status & STATUS_IRQ) || dev->irq_in_progress)
|
||||
fatal("IRQ in progress %02x %i\n", dev->status, dev->irq_in_progress);
|
||||
|
||||
dev->status_len = 9;
|
||||
dev->status_data[0] = CMD_GET_DEV_STATUS | STATUS_LEN(9) | STATUS_DEVICE_HOST_ADAPTER;
|
||||
dev->status_data[1] = 0x0000; /*Error bits*/
|
||||
dev->status_data[2] = 0x1900; /*Device status*/
|
||||
dev->status_data[3] = 0; /*ESDI Standard Status*/
|
||||
dev->status_data[4] = 0; /*ESDI Vendor Unique Status*/
|
||||
dev->status_data[5] = 0;
|
||||
dev->status_data[6] = 0;
|
||||
dev->status_data[7] = 0;
|
||||
dev->status_data[8] = 0;
|
||||
|
||||
dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL;
|
||||
dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_SUCCESS;
|
||||
dev->irq_in_progress = 1;
|
||||
set_irq(dev);
|
||||
break;
|
||||
|
||||
case CMD_GET_DEV_CONFIG:
|
||||
ESDI_DRIVE_ONLY();
|
||||
|
||||
@@ -470,7 +535,7 @@ esdi_callback(void *priv)
|
||||
fatal("IRQ in progress %02x %i\n", dev->status, dev->irq_in_progress);
|
||||
|
||||
dev->status_len = 6;
|
||||
dev->status_data[0] = CMD_GET_POS_INFO | STATUS_LEN(6) | STATUS_DEVICE_HOST_ADAPTER;
|
||||
dev->status_data[0] = CMD_GET_DEV_CONFIG | STATUS_LEN(6) | STATUS_DEVICE_HOST_ADAPTER;
|
||||
dev->status_data[1] = 0x10; /*Zero defect*/
|
||||
dev->status_data[2] = drive->sectors & 0xffff;
|
||||
dev->status_data[3] = drive->sectors >> 16;
|
||||
|
||||
@@ -32,6 +32,8 @@
|
||||
#include "../device.h"
|
||||
#include "../io.h"
|
||||
#include "../pic.h"
|
||||
#include "../cpu/cpu.h"
|
||||
#include "../machine/machine.h"
|
||||
#include "../timer.h"
|
||||
#include "../plat.h"
|
||||
#include "../ui.h"
|
||||
@@ -223,7 +225,7 @@ mfm_cmd(mfm_t *mfm, uint8_t val)
|
||||
mfm->drvsel, val);
|
||||
mfm->command = 0xff;
|
||||
mfm->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
mfm->callback = 200LL*MFM_TIME;
|
||||
timer_update_outstanding();
|
||||
|
||||
@@ -250,7 +252,7 @@ mfm_cmd(mfm_t *mfm, uint8_t val)
|
||||
drive->steprate = (val & 0x0f);
|
||||
mfm->command = (val & 0xf0);
|
||||
mfm->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
mfm->callback = 200LL*MFM_TIME;
|
||||
timer_update_outstanding();
|
||||
break;
|
||||
@@ -269,7 +271,7 @@ mfm_cmd(mfm_t *mfm, uint8_t val)
|
||||
if (val & 2)
|
||||
fatal("WD1003: READ with ECC\n");
|
||||
mfm->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
mfm->callback = 200LL*MFM_TIME;
|
||||
timer_update_outstanding();
|
||||
break;
|
||||
@@ -293,7 +295,7 @@ mfm_cmd(mfm_t *mfm, uint8_t val)
|
||||
case CMD_VERIFY+1:
|
||||
mfm->command = (val & 0xfe);
|
||||
mfm->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
mfm->callback = 200LL*MFM_TIME;
|
||||
timer_update_outstanding();
|
||||
break;
|
||||
@@ -307,7 +309,7 @@ mfm_cmd(mfm_t *mfm, uint8_t val)
|
||||
case CMD_DIAGNOSE:
|
||||
mfm->command = val;
|
||||
mfm->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
mfm->callback = 200LL*MFM_TIME;
|
||||
timer_update_outstanding();
|
||||
break;
|
||||
@@ -350,7 +352,7 @@ mfm_cmd(mfm_t *mfm, uint8_t val)
|
||||
default:
|
||||
pclog("WD1003: bad command %02X\n", val);
|
||||
mfm->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
mfm->callback = 200LL*MFM_TIME;
|
||||
timer_update_outstanding();
|
||||
break;
|
||||
@@ -370,7 +372,7 @@ mfm_writew(uint16_t port, uint16_t val, void *priv)
|
||||
if (mfm->pos >= 512) {
|
||||
mfm->pos = 0;
|
||||
mfm->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
mfm->callback = 6LL*MFM_TIME;
|
||||
timer_update_outstanding();
|
||||
}
|
||||
@@ -428,7 +430,7 @@ mfm_write(uint16_t port, uint8_t val, void *priv)
|
||||
if ((mfm->fdisk & 0x04) && !(val & 0x04)) {
|
||||
mfm->status = STAT_BUSY;
|
||||
mfm->reset = 1;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
mfm->callback = 500LL*MFM_TIME;
|
||||
timer_update_outstanding();
|
||||
}
|
||||
@@ -437,7 +439,7 @@ mfm_write(uint16_t port, uint8_t val, void *priv)
|
||||
/* Drive held in reset. */
|
||||
mfm->status = STAT_BUSY;
|
||||
mfm->callback = 0LL;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
timer_update_outstanding();
|
||||
}
|
||||
mfm->fdisk = val;
|
||||
@@ -462,7 +464,7 @@ mfm_readw(uint16_t port, void *priv)
|
||||
if (mfm->secount) {
|
||||
next_sector(mfm);
|
||||
mfm->status = STAT_BUSY;
|
||||
timer_process();
|
||||
timer_clock();
|
||||
mfm->callback = 6LL*MFM_TIME;
|
||||
timer_update_outstanding();
|
||||
} else {
|
||||
|
||||
35
src/dma.c
35
src/dma.c
@@ -194,6 +194,21 @@ static uint8_t dma_ps2_read(uint16_t addr, void *priv)
|
||||
temp = (dma.xfr_channel & 4) ? (dma16.cc[dma.xfr_channel & 3] & 0xff) : (dma.cc[dma.xfr_channel] & 0xff);
|
||||
dma.byte_ptr = (dma.byte_ptr + 1) & 1;
|
||||
break;
|
||||
case 6: /*Read DMA status*/
|
||||
if (dma.byte_ptr)
|
||||
{
|
||||
temp = dma16.stat_rq | (dma16.stat << 4);
|
||||
dma16.stat = 0;
|
||||
dma16.stat_rq = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
temp = dma.stat_rq | (dma.stat << 4);
|
||||
dma.stat = 0;
|
||||
dma.stat_rq = 0;
|
||||
}
|
||||
dma.byte_ptr = (dma.byte_ptr + 1) & 1;
|
||||
break;
|
||||
case 7: /*Mode*/
|
||||
temp = (dma.xfr_channel & 4) ? dma16.ps2_mode[dma.xfr_channel & 3] : dma.ps2_mode[dma.xfr_channel];
|
||||
break;
|
||||
@@ -551,6 +566,7 @@ int dma_channel_read(int channel)
|
||||
return DMA_NODATA;
|
||||
|
||||
temp = _dma_read(dma.ac[channel]);
|
||||
dma.stat_rq |= (1 << channel);
|
||||
|
||||
if (dma.mode[channel] & 0x20)
|
||||
{
|
||||
@@ -594,6 +610,7 @@ int dma_channel_read(int channel)
|
||||
|
||||
temp = _dma_read(dma16.ac[channel]) |
|
||||
(_dma_read(dma16.ac[channel] + 1) << 8);
|
||||
dma16.stat_rq |= (1 << channel);
|
||||
|
||||
if (dma16.mode[channel] & 0x20)
|
||||
{
|
||||
@@ -646,6 +663,7 @@ int dma_channel_write(int channel, uint16_t val)
|
||||
return DMA_NODATA;
|
||||
|
||||
_dma_write(dma.ac[channel], val);
|
||||
dma.stat_rq |= (1 << channel);
|
||||
|
||||
if (dma.mode[channel] & 0x20)
|
||||
{
|
||||
@@ -688,6 +706,7 @@ int dma_channel_write(int channel, uint16_t val)
|
||||
|
||||
_dma_write(dma16.ac[channel], val);
|
||||
_dma_write(dma16.ac[channel] + 1, val >> 8);
|
||||
dma16.stat_rq |= (1 << channel);
|
||||
|
||||
if (dma16.mode[channel] & 0x20)
|
||||
{
|
||||
@@ -738,11 +757,23 @@ int dma_mode(int channel)
|
||||
/* DMA Bus Master Page Read/Write */
|
||||
void DMAPageRead(uint32_t PhysAddress, char *DataRead, uint32_t TotalSize)
|
||||
{
|
||||
memcpy(DataRead, &ram[PhysAddress], TotalSize);
|
||||
int i = 0;
|
||||
|
||||
// memcpy(DataRead, &ram[PhysAddress], TotalSize);
|
||||
|
||||
for (i = 0; i < TotalSize; i++)
|
||||
DataRead[i] = mem_readb_phys(PhysAddress + i);
|
||||
}
|
||||
|
||||
void DMAPageWrite(uint32_t PhysAddress, const char *DataWrite, uint32_t TotalSize)
|
||||
{
|
||||
int i = 0;
|
||||
|
||||
// mem_invalidate_range(PhysAddress, PhysAddress + TotalSize - 1);
|
||||
// memcpy(&ram[PhysAddress], DataWrite, TotalSize);
|
||||
|
||||
for (i = 0; i < TotalSize; i++)
|
||||
mem_writeb_phys(PhysAddress + i, DataWrite[i]);
|
||||
|
||||
mem_invalidate_range(PhysAddress, PhysAddress + TotalSize - 1);
|
||||
memcpy(&ram[PhysAddress], DataWrite, TotalSize);
|
||||
}
|
||||
|
||||
@@ -34,7 +34,8 @@ typedef struct DMA {
|
||||
uint8_t m,
|
||||
mode[4];
|
||||
uint8_t page[4];
|
||||
uint8_t stat;
|
||||
uint8_t stat,
|
||||
stat_rq;
|
||||
uint8_t command;
|
||||
uint8_t request;
|
||||
|
||||
|
||||
1
src/io.c
1
src/io.c
@@ -7,6 +7,7 @@
|
||||
#include <wchar.h>
|
||||
#include "86box.h"
|
||||
#include "io.h"
|
||||
#include "cpu/cpu.h"
|
||||
|
||||
|
||||
uint8_t (*port_inb[0x10000][2])(uint16_t addr, void *priv);
|
||||
|
||||
@@ -50,6 +50,7 @@
|
||||
#include "../pic.h"
|
||||
#include "../pit.h"
|
||||
#include "../mem.h"
|
||||
#include "../nmi.h"
|
||||
#include "../rom.h"
|
||||
#include "../timer.h"
|
||||
#include "../device.h"
|
||||
@@ -590,4 +591,6 @@ machine_ps1_m2133_init(machine_t *model)
|
||||
ps1_common_init(model);
|
||||
|
||||
ps1_setup(2133);
|
||||
|
||||
nmi_mask = 0x80;
|
||||
}
|
||||
|
||||
@@ -11,6 +11,7 @@
|
||||
#include "../pit.h"
|
||||
#include "../mca.h"
|
||||
#include "../mem.h"
|
||||
#include "../nmi.h"
|
||||
#include "../rom.h"
|
||||
#include "../device.h"
|
||||
#include "../nvr.h"
|
||||
@@ -38,6 +39,7 @@ static struct
|
||||
|
||||
mem_mapping_t shadow_mapping;
|
||||
mem_mapping_t split_mapping;
|
||||
mem_mapping_t split_mapping_2;
|
||||
mem_mapping_t expansion_mapping;
|
||||
|
||||
uint8_t (*planar_read)(uint16_t port);
|
||||
@@ -84,30 +86,61 @@ static void ps2_write_shadow_raml(uint32_t addr, uint32_t val, void *priv)
|
||||
|
||||
static uint8_t ps2_read_split_ram(uint32_t addr, void *priv)
|
||||
{
|
||||
addr = (addr & 0x3ffff) + 0xa0000;
|
||||
addr = (addr & 0x1ffff) + 0x80000;
|
||||
return mem_read_ram(addr, priv);
|
||||
}
|
||||
static uint16_t ps2_read_split_ramw(uint32_t addr, void *priv)
|
||||
{
|
||||
addr = (addr & 0x3ffff) + 0xa0000;
|
||||
addr = (addr & 0x1ffff) + 0x80000;
|
||||
return mem_read_ramw(addr, priv);
|
||||
}
|
||||
static uint32_t ps2_read_split_raml(uint32_t addr, void *priv)
|
||||
{
|
||||
addr = (addr & 0x3ffff) + 0xa0000;
|
||||
addr = (addr & 0x1ffff) + 0x80000;
|
||||
return mem_read_raml(addr, priv);
|
||||
}
|
||||
static void ps2_write_split_ram(uint32_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
addr = (addr & 0x3ffff) + 0xa0000;
|
||||
addr = (addr & 0x1ffff) + 0x80000;
|
||||
mem_write_ram(addr, val, priv);
|
||||
}
|
||||
static void ps2_write_split_ramw(uint32_t addr, uint16_t val, void *priv)
|
||||
{
|
||||
addr = (addr & 0x3ffff) + 0xa0000;
|
||||
addr = (addr & 0x1ffff) + 0x80000;
|
||||
mem_write_ramw(addr, val, priv);
|
||||
}
|
||||
static void ps2_write_split_raml(uint32_t addr, uint32_t val, void *priv)
|
||||
{
|
||||
addr = (addr & 0x1ffff) + 0x80000;
|
||||
mem_write_raml(addr, val, priv);
|
||||
}
|
||||
|
||||
static uint8_t ps2_read_split_2_ram(uint32_t addr, void *priv)
|
||||
{
|
||||
addr = (addr & 0x3ffff) + 0xa0000;
|
||||
return mem_read_ram(addr, priv);
|
||||
}
|
||||
static uint16_t ps2_read_split_2_ramw(uint32_t addr, void *priv)
|
||||
{
|
||||
addr = (addr & 0x3ffff) + 0xa0000;
|
||||
return mem_read_ramw(addr, priv);
|
||||
}
|
||||
static uint32_t ps2_read_split_2_raml(uint32_t addr, void *priv)
|
||||
{
|
||||
addr = (addr & 0x3ffff) + 0xa0000;
|
||||
return mem_read_raml(addr, priv);
|
||||
}
|
||||
static void ps2_write_split_2_ram(uint32_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
addr = (addr & 0x3ffff) + 0xa0000;
|
||||
mem_write_ram(addr, val, priv);
|
||||
}
|
||||
static void ps2_write_split_2_ramw(uint32_t addr, uint16_t val, void *priv)
|
||||
{
|
||||
addr = (addr & 0x3ffff) + 0xa0000;
|
||||
mem_write_ramw(addr, val, priv);
|
||||
}
|
||||
static void ps2_write_split_2_raml(uint32_t addr, uint32_t val, void *priv)
|
||||
{
|
||||
addr = (addr & 0x3ffff) + 0xa0000;
|
||||
mem_write_raml(addr, val, priv);
|
||||
@@ -645,20 +678,38 @@ static void ps2_mca_board_model_55sx_init()
|
||||
|
||||
static void mem_encoding_update()
|
||||
{
|
||||
if (ps2.split_addr >= mem_size*1024)
|
||||
mem_mapping_disable(&ps2.split_mapping);
|
||||
mem_mapping_disable(&ps2.split_mapping_2);
|
||||
|
||||
ps2.split_addr = (ps2.mem_regs[0] & 0xf) << 20;
|
||||
ps2.split_addr = ((uint32_t) (ps2.mem_regs[0] & 0xf)) << 20;
|
||||
|
||||
if (ps2.mem_regs[1] & 2)
|
||||
if (ps2.mem_regs[1] & 2) {
|
||||
mem_set_mem_state(0xe0000, 0x20000, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
|
||||
else
|
||||
pclog("PS/2 Model 80-111: ROM space enabled\n");
|
||||
} else {
|
||||
mem_set_mem_state(0xe0000, 0x20000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED);
|
||||
pclog("PS/2 Model 80-111: ROM space disabled\n");
|
||||
}
|
||||
|
||||
if (ps2.mem_regs[1] & 4) {
|
||||
mem_mapping_set_addr(&ram_low_mapping, 0x00000, 0x80000);
|
||||
pclog("PS/2 Model 80-111: 00080000- 0009FFFF disabled\n");
|
||||
} else {
|
||||
mem_mapping_set_addr(&ram_low_mapping, 0x00000, 0xa0000);
|
||||
pclog("PS/2 Model 80-111: 00080000- 0009FFFF enabled\n");
|
||||
}
|
||||
|
||||
if (!(ps2.mem_regs[1] & 8))
|
||||
{
|
||||
if (ps2.split_addr >= mem_size*1024)
|
||||
mem_mapping_set_addr(&ps2.split_mapping, ps2.split_addr, 256*1024);
|
||||
if (ps2.mem_regs[1] & 4) {
|
||||
mem_mapping_set_addr(&ps2.split_mapping, ps2.split_addr, 128*1024);
|
||||
mem_mapping_set_addr(&ps2.split_mapping_2, ps2.split_addr+(128*1024), 256*1024);
|
||||
} else
|
||||
mem_mapping_set_addr(&ps2.split_mapping_2, ps2.split_addr, 256*1024);
|
||||
|
||||
pclog("PS/2 Model 80-111: Split memory block enabled at %08X\n", ps2.split_addr);
|
||||
} else {
|
||||
pclog("PS/2 Model 80-111: Split memory block disabled\n");
|
||||
}
|
||||
}
|
||||
|
||||
@@ -711,7 +762,7 @@ static void ps2_mca_board_model_80_type2_init(int is486)
|
||||
|
||||
mem_remap_top_256k();
|
||||
ps2.split_addr = mem_size * 1024;
|
||||
mca_init(24);
|
||||
mca_init(8);
|
||||
|
||||
ps2.planar_read = model_80_read;
|
||||
ps2.planar_write = model_80_write;
|
||||
@@ -722,41 +773,68 @@ static void ps2_mca_board_model_80_type2_init(int is486)
|
||||
|
||||
ps2.mem_regs[1] = 2;
|
||||
|
||||
/* Note by Kotori: I rewrote this because the original code was using
|
||||
Model 80 Type 1-style 1 MB memory card settings, which are *NOT*
|
||||
supported by Model 80 Type 2. */
|
||||
switch (mem_size/1024)
|
||||
{
|
||||
case 1:
|
||||
ps2.option[1] = 0x0c;
|
||||
ps2.option[1] = 0x0e; /* 11 10 = 0 2 */
|
||||
ps2.mem_regs[1] = 0xd2; /* 01 = 1 (first) */
|
||||
ps2.mem_regs[0] = 0xf0; /* 11 = invalid */
|
||||
break;
|
||||
case 2:
|
||||
ps2.option[1] = 0x0e;
|
||||
ps2.option[1] = 0x0e; /* 11 10 = 0 2 */
|
||||
ps2.mem_regs[1] = 0xc2; /* 00 = 2 */
|
||||
ps2.mem_regs[0] = 0xf0; /* 11 = invalid */
|
||||
break;
|
||||
case 3:
|
||||
ps2.option[1] = 0x02;
|
||||
ps2.option[1] = 0x0a; /* 10 10 = 2 2 */
|
||||
ps2.mem_regs[1] = 0xc2; /* 00 = 2 */
|
||||
ps2.mem_regs[0] = 0xd0; /* 01 = 1 (first) */
|
||||
break;
|
||||
case 4:
|
||||
default:
|
||||
ps2.option[1] = 0x0a;
|
||||
ps2.option[1] = 0x0a; /* 10 10 = 2 2 */
|
||||
ps2.mem_regs[1] = 0xc2; /* 00 = 2 */
|
||||
ps2.mem_regs[0] = 0xc0; /* 00 = 2 */
|
||||
break;
|
||||
}
|
||||
|
||||
ps2.mem_regs[0] |= ((mem_size/1024) & 0x0f);
|
||||
|
||||
mem_mapping_add(&ps2.split_mapping,
|
||||
(mem_size+256) * 1024,
|
||||
256*1024,
|
||||
128*1024,
|
||||
ps2_read_split_ram,
|
||||
ps2_read_split_ramw,
|
||||
ps2_read_split_raml,
|
||||
ps2_write_split_ram,
|
||||
ps2_write_split_ramw,
|
||||
ps2_write_split_raml,
|
||||
&ram[0xa0000],
|
||||
&ram[0x80000],
|
||||
MEM_MAPPING_INTERNAL,
|
||||
NULL);
|
||||
mem_mapping_disable(&ps2.split_mapping);
|
||||
|
||||
mem_mapping_add(&ps2.split_mapping_2,
|
||||
(mem_size+384) * 1024,
|
||||
256*1024,
|
||||
ps2_read_split_2_ram,
|
||||
ps2_read_split_2_ramw,
|
||||
ps2_read_split_2_raml,
|
||||
ps2_write_split_2_ram,
|
||||
ps2_write_split_2_ramw,
|
||||
ps2_write_split_2_raml,
|
||||
&ram[0xa0000],
|
||||
MEM_MAPPING_INTERNAL,
|
||||
NULL);
|
||||
mem_mapping_disable(&ps2.split_mapping_2);
|
||||
|
||||
if ((mem_size > 4096) && !is486)
|
||||
{
|
||||
/* Only 4 MB supported on planar, create a memory expansion card for the rest */
|
||||
mem_mapping_set_addr(&ram_high_mapping, 0x100000, 0x400000);
|
||||
mem_mapping_set_addr(&ram_high_mapping, 0x100000, 0x300000);
|
||||
|
||||
ps2.mem_pos_regs[0] = 0xff;
|
||||
ps2.mem_pos_regs[1] = 0xfc;
|
||||
@@ -764,31 +842,33 @@ static void ps2_mca_board_model_80_type2_init(int is486)
|
||||
switch (mem_size/1024)
|
||||
{
|
||||
case 5:
|
||||
ps2.mem_pos_regs[4] = 0xfc;
|
||||
ps2.mem_pos_regs[4] = 0xfc; /* 11 11 11 00 = 0 0 0 1 */
|
||||
break;
|
||||
case 6:
|
||||
ps2.mem_pos_regs[4] = 0xfe;
|
||||
ps2.mem_pos_regs[4] = 0xfe; /* 11 11 11 10 = 0 0 0 2 */
|
||||
break;
|
||||
case 7:
|
||||
ps2.mem_pos_regs[4] = 0xf2;
|
||||
ps2.mem_pos_regs[4] = 0xf2; /* 11 11 00 10 = 0 0 1 2 */
|
||||
break;
|
||||
case 8:
|
||||
ps2.mem_pos_regs[4] = 0xfa;
|
||||
ps2.mem_pos_regs[4] = 0xfa; /* 11 11 10 10 = 0 0 2 2 */
|
||||
break;
|
||||
case 9:
|
||||
ps2.mem_pos_regs[4] = 0xca;
|
||||
ps2.mem_pos_regs[4] = 0xca; /* 11 00 10 10 = 0 1 2 2 */
|
||||
break;
|
||||
case 10:
|
||||
ps2.mem_pos_regs[4] = 0xea;
|
||||
ps2.mem_pos_regs[4] = 0xea; /* 11 10 10 10 = 0 2 2 2 */
|
||||
break;
|
||||
case 11:
|
||||
ps2.mem_pos_regs[4] = 0x2a;
|
||||
ps2.mem_pos_regs[4] = 0x2a; /* 00 10 10 10 = 1 2 2 2 */
|
||||
break;
|
||||
case 12:
|
||||
ps2.mem_pos_regs[4] = 0xaa;
|
||||
ps2.mem_pos_regs[4] = 0xaa; /* 10 10 10 10 = 2 2 2 2 */
|
||||
break;
|
||||
}
|
||||
|
||||
pclog("ps2.mem_pos_regs[4] = %08X\n", ps2.mem_pos_regs[4]);
|
||||
|
||||
mca_add(ps2_mem_expansion_read, ps2_mem_expansion_write, NULL);
|
||||
mem_mapping_add(&ps2.expansion_mapping,
|
||||
0x400000,
|
||||
@@ -821,6 +901,8 @@ machine_ps2_common_init(machine_t *model)
|
||||
pic2_init();
|
||||
|
||||
pit_ps2_init();
|
||||
|
||||
nmi_mask = 0x80;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -96,7 +96,7 @@ machine_t machines[] = {
|
||||
{ "[486 ISA] AMI WinBIOS 486", ROM_WIN486, "win486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_ali1429_init, NULL, nvr_at_close },
|
||||
{ "[486 ISA] Award 486 clone", ROM_AWARD486_OPTI495, "award486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_opti495_init, NULL, nvr_at_close },
|
||||
{ "[486 ISA] DTK PKM-0038S E-2", ROM_DTK486, "dtk486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 128, 1, 127, machine_at_dtk486_init, NULL, nvr_at_close },
|
||||
{ "[486 ISA] IBM PS/1 machine 2133", ROM_IBMPS1_2133, "ibmps1_2133", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 1, 64, 1, 127, machine_ps1_m2133_init, NULL, nvr_at_close },
|
||||
{ "[486 ISA] IBM PS/1 model 2133", ROM_IBMPS1_2133, "ibmps1_2133", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 1, 64, 1, 127, machine_ps1_m2133_init, NULL, nvr_at_close },
|
||||
|
||||
#ifdef WALTJE
|
||||
{ "[486 MCA] IBM PS/2 model 80-486", ROM_IBMPS2_M80_486, "ibmps2_m80-486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 1, 32, 1, 63, machine_ps2_model_80_486_init, NULL, nvr_at_close },
|
||||
|
||||
12
src/mem.c
12
src/mem.c
@@ -1358,17 +1358,17 @@ void mem_init(void)
|
||||
writelookup2 = malloc(1024 * 1024 * sizeof(uintptr_t));
|
||||
rom = NULL;
|
||||
biosmask = 0xffff;
|
||||
pages = malloc((((mem_size + 384) * 1024) >> 12) * sizeof(page_t));
|
||||
pages = malloc((1 << 20) * sizeof(page_t));
|
||||
page_lookup = malloc((1 << 20) * sizeof(page_t *));
|
||||
|
||||
memset(ram, 0, mem_size * 1024);
|
||||
memset(pages, 0, (((mem_size + 384) * 1024) >> 12) * sizeof(page_t));
|
||||
memset(pages, 0, (1 << 20) * sizeof(page_t));
|
||||
|
||||
memset(page_lookup, 0, (1 << 20) * sizeof(page_t *));
|
||||
|
||||
memset(ram_mapped_addr, 0, 64 * sizeof(uint32_t));
|
||||
|
||||
for (c = 0; c < (((mem_size + 384) * 1024) >> 12); c++)
|
||||
for (c = 0; c < (1 << 20); c++)
|
||||
{
|
||||
pages[c].mem = &ram[c << 12];
|
||||
pages[c].write_b = mem_write_ramb_page;
|
||||
@@ -1461,10 +1461,8 @@ void mem_resize()
|
||||
ram = malloc(mem_size * 1024);
|
||||
memset(ram, 0, mem_size * 1024);
|
||||
|
||||
free(pages);
|
||||
pages = malloc((((mem_size + 384) * 1024) >> 12) * sizeof(page_t));
|
||||
memset(pages, 0, (((mem_size + 384) * 1024) >> 12) * sizeof(page_t));
|
||||
for (c = 0; c < (((mem_size + 384) * 1024) >> 12); c++)
|
||||
memset(pages, 0, (1 << 20) * sizeof(page_t));
|
||||
for (c = 0; c < (1 << 20); c++)
|
||||
{
|
||||
pages[c].mem = &ram[c << 12];
|
||||
pages[c].write_b = mem_write_ramb_page;
|
||||
|
||||
@@ -31,8 +31,10 @@
|
||||
#include "io.h"
|
||||
#include "device.h"
|
||||
#include "machine/machine.h"
|
||||
#include "mem.h"
|
||||
#include "nmi.h"
|
||||
#include "nvr.h"
|
||||
#include "rom.h"
|
||||
|
||||
|
||||
static nvr_t *nvrp;
|
||||
@@ -45,6 +47,7 @@ nvr_write(uint16_t addr, uint8_t val, void *priv)
|
||||
|
||||
if (! (addr & 1)) {
|
||||
nvr->addr = (val & nvr->mask);
|
||||
if (!(machines[machine].flags & MACHINE_MCA) && (romset != ROM_IBMPS1_2133))
|
||||
nmi_mask = (~val & 0x80);
|
||||
|
||||
return;
|
||||
|
||||
@@ -34,6 +34,7 @@
|
||||
#include "scsi_aha154x.h"
|
||||
#include "scsi_buslogic.h"
|
||||
#include "scsi_ncr5380.h"
|
||||
#include "scsi_ncr53c810.h"
|
||||
#include "scsi_x54x.h"
|
||||
|
||||
|
||||
@@ -73,6 +74,7 @@ static SCSI_CARD scsi_cards[] = {
|
||||
{ "[MCA] Adaptec AHA-1640", "aha1640", &aha1640_device, x54x_device_reset },
|
||||
{ "[MCA] BusLogic BT-640A", "bt640a", &buslogic_640a_device,BuslogicDeviceReset },
|
||||
{ "[PCI] BusLogic BT-958D", "bt958d", &buslogic_pci_device, BuslogicDeviceReset },
|
||||
{ "[PCI] NCR 53C810", "ncr53c810", &ncr53c810_pci_device,NULL },
|
||||
{ "[VLB] BusLogic BT-445S", "bt445s", &buslogic_445s_device,BuslogicDeviceReset },
|
||||
{ "", "", NULL, NULL },
|
||||
};
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
* 1 - BT-545S ISA;
|
||||
* 2 - BT-958D PCI
|
||||
*
|
||||
* Version: @(#)scsi_buslogic.c 1.0.30 2017/12/09
|
||||
* Version: @(#)scsi_buslogic.c 1.0.31 2017/12/10
|
||||
*
|
||||
* Authors: TheCollector1995, <mariogplayer@gmail.com>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
@@ -1215,7 +1215,7 @@ BuslogicPCIWrite(int func, int addr, uint8_t val, void *p)
|
||||
}
|
||||
if (valxor & PCI_COMMAND_MEM) {
|
||||
x54x_mem_disable(dev);
|
||||
if ((bl->MMIOBase != 0) & (val & PCI_COMMAND_MEM)) {
|
||||
if ((bl->MMIOBase != 0) && (val & PCI_COMMAND_MEM)) {
|
||||
x54x_mem_set_addr(dev, bl->MMIOBase);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1927,11 +1927,18 @@ void scsi_hd_command(uint8_t id, uint8_t *cdb)
|
||||
shdc[id].temp_buffer[2] = 0x02; /*SCSI-2 compliant*/
|
||||
shdc[id].temp_buffer[3] = 0x02;
|
||||
shdc[id].temp_buffer[4] = 31;
|
||||
shdc[id].temp_buffer[6] = 1; /* 16-bit transfers supported */
|
||||
shdc[id].temp_buffer[7] = 0x20; /* Wide bus supported */
|
||||
|
||||
ide_padstr8(shdc[id].temp_buffer + 8, 8, EMU_NAME); /* Vendor */
|
||||
ide_padstr8(shdc[id].temp_buffer + 16, 16, device_identify); /* Product */
|
||||
ide_padstr8(shdc[id].temp_buffer + 32, 4, EMU_VERSION); /* Revision */
|
||||
idx = 36;
|
||||
|
||||
if (max_len == 96) {
|
||||
shdc[id].temp_buffer[4] = 91;
|
||||
idx = 96;
|
||||
}
|
||||
}
|
||||
|
||||
atapi_out:
|
||||
|
||||
@@ -1,3 +1,4 @@
|
||||
#include <math.h>
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
@@ -205,6 +206,7 @@ void givealbuffer_common(void *buf, uint8_t src, int size, int freq)
|
||||
int processed;
|
||||
int state;
|
||||
ALuint buffer;
|
||||
double gain;
|
||||
|
||||
alGetSourcei(source[src], AL_SOURCE_STATE, &state);
|
||||
|
||||
@@ -216,6 +218,10 @@ void givealbuffer_common(void *buf, uint8_t src, int size, int freq)
|
||||
|
||||
if (processed>=1)
|
||||
{
|
||||
gain = pow(10.0, (double)sound_gain[src] / 20.0);
|
||||
|
||||
// alSourcef(source[src], AL_GAIN, gain);
|
||||
|
||||
alSourceUnqueueBuffers(source[src], 1, &buffer);
|
||||
|
||||
if (sound_is_float)
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
*
|
||||
* Sound emulation core.
|
||||
*
|
||||
* Version: @(#)sound.c 1.0.9 2017/12/05
|
||||
* Version: @(#)sound.c 1.0.10 2017/12/09
|
||||
*
|
||||
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
@@ -52,6 +52,7 @@ typedef struct {
|
||||
int sound_card_current = 0;
|
||||
int sound_pos_global = 0;
|
||||
int soundon = 1;
|
||||
int sound_gain[3] = { 0, 0, 0 };
|
||||
|
||||
|
||||
static int sound_card_last = 0;
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
*
|
||||
* Sound emulation core.
|
||||
*
|
||||
* Version: @(#)sound.h 1.0.2 2017/10/04
|
||||
* Version: @(#)sound.h 1.0.3 2017/12/09
|
||||
*
|
||||
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
@@ -20,6 +20,8 @@
|
||||
# define EMU_SOUND_H
|
||||
|
||||
|
||||
extern int sound_gain[3];
|
||||
|
||||
#define SOUNDBUFLEN (48000/50)
|
||||
|
||||
#define CD_FREQ 44100
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
#
|
||||
# Makefile for Win32 (MinGW32) environment.
|
||||
#
|
||||
# Version: @(#)Makefile.mingw 1.0.82 2017/12/04
|
||||
# Version: @(#)Makefile.mingw 1.0.83 2017/12/06
|
||||
#
|
||||
# Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
# Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
@@ -29,7 +29,7 @@ ifndef AUTODEP
|
||||
AUTODEP := n
|
||||
endif
|
||||
ifndef CRASHDUMP
|
||||
CRASHCUMP := n
|
||||
CRASHDUMP := n
|
||||
endif
|
||||
ifndef DEBUG
|
||||
DEBUG := n
|
||||
@@ -389,8 +389,8 @@ SCSIOBJ := scsi.o \
|
||||
scsi_bus.o scsi_device.o \
|
||||
scsi_disk.o \
|
||||
scsi_x54x.o \
|
||||
scsi_buslogic.o scsi_aha154x.o \
|
||||
scsi_ncr5380.o
|
||||
scsi_aha154x.o scsi_buslogic.o \
|
||||
scsi_ncr5380.o scsi_ncr53c810.o
|
||||
|
||||
NETOBJ := network.o \
|
||||
net_pcap.o \
|
||||
|
||||
Reference in New Issue
Block a user