Removed excess memset()'s from hdd_image.c and did a few other optimizations there, also fixed incorrect zero'ing of the buffer in hdd_image_write_ex();
Did a tweak to mmutranslate() in mem.c, should increase performance again; Added the ATi VGA Wonder and ATi VGA-88, made the ATi VGA Edge-16 use the correct BIOS.
This commit is contained in:
80
src/mem.c
80
src/mem.c
@@ -196,7 +196,7 @@ int pctrans=0;
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extern uint32_t testr[9];
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int mem_cpl3_check(void)
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static __inline__ int mem_cpl3_check(void)
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{
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if ((CPL == 3) && !cpl_override)
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{
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@@ -205,14 +205,14 @@ int mem_cpl3_check(void)
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return 0;
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}
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void mmu_page_fault(uint32_t addr, uint32_t error_code)
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static __inline__ void mmu_page_fault(uint32_t addr, uint32_t error_code)
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{
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cr2 = addr;
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cpu_state.abrt = ABRT_PF;
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abrt_error = error_code;
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}
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int mmu_page_fault_check(uint32_t addr, int rw, uint32_t flags, int pde, int is_abrt)
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static __inline__ int mmu_page_fault_check(uint32_t addr, int rw, uint32_t flags, int pde, int is_abrt)
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{
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uint8_t error_code = 0;
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@@ -223,29 +223,22 @@ int mmu_page_fault_check(uint32_t addr, int rw, uint32_t flags, int pde, int is_
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/* Apparently, this check should not be done on PSE. */
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if (!(flags & 1))
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{
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is_page_fault = 1;
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} else
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else
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error_code |= 1; /* If the page is present, the error must indicate that it is. */
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if (!(flags & 4) && mem_cpl3_check())
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{
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if (!(flags & 4) && mem_cpl3_check()) {
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/* The user/supervisor check needs to be checked for the table as well, *before* checking it for the page. */
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is_page_fault = 1;
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}
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/* Only check the write-protect flag if this is a page directory entry. */
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if (pde && rw && !(flags & 2) && ((cr0 & WP_FLAG) || mem_cpl3_check()))
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{
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is_page_fault = 1;
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}
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if (is_page_fault)
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{
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if (is_page_fault) {
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if (is_abrt)
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{
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mmu_page_fault(addr, error_code);
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}
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return -1;
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}
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@@ -256,36 +249,6 @@ int mmu_page_fault_check(uint32_t addr, int rw, uint32_t flags, int pde, int is_
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#define PAGE_DIRTY 0x40
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#define PAGE_ACCESSED 0x20
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/* This is needed so that mmutranslate reads things from the correct place
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if it has to read something from a remapped mapping. */
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uint32_t mem_readl_phys(uint32_t addr)
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{
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uint8_t i, temp[4];
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uint32_t ta, *tv;
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for (i = 0; i < 4; i++) {
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ta = addr + i;
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temp[i] = _mem_exec[ta >> 14][ta & 0x3fff];
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}
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tv = (uint32_t *) temp;
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return *tv;
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}
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void mem_writel_phys(uint32_t addr, uint32_t val)
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{
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uint8_t i, temp[4];
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uint32_t ta, *tv;
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tv = (uint32_t *) temp;
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*tv = val;
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for (i = 0; i < 4; i++) {
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ta = addr + i;
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_mem_exec[ta >> 14][ta & 0x3fff] = temp[i];
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}
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}
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/* rw means 0 = read, 1 = write */
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uint32_t mmutranslate(uint32_t addr, int rw, int is_abrt)
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{
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@@ -299,58 +262,45 @@ uint32_t mmutranslate(uint32_t addr, int rw, int is_abrt)
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uint32_t page_flags = 0;
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if (cpu_state.abrt)
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{
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return -1;
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}
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dir_base = cr3 & ~0xfff;
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table_addr = dir_base + ((addr >> 20) & 0xffc);
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/* First check the flags of the page directory entry. */
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table_flags = mem_readl_phys(table_addr);
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table_flags = *(uint32_t *) &_mem_exec[table_addr >> 14][table_addr & 0x3fff];
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if ((table_flags & 0x80) && (cr4 & CR4_PSE))
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{
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if ((table_flags & 0x80) && (cr4 & CR4_PSE)) {
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/* Do a PDE-style page fault check. */
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if (mmu_page_fault_check(addr, rw, table_flags & 7, 1, is_abrt) == -1)
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{
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return -1;
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}
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/* Since PSE is not enabled, there is no page table, so we do a slightly modified skip to the end. */
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if (is_abrt)
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{
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if (is_abrt) {
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mmu_perm = table_flags & 4;
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mem_writel_phys(table_addr, table_flags | (rw ? PAGE_DIRTY_AND_ACCESSED : PAGE_ACCESSED));
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*(uint32_t *) &_mem_exec[table_addr >> 14][table_addr & 0x3fff] = table_flags | (rw ? PAGE_DIRTY_AND_ACCESSED : PAGE_ACCESSED);
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}
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return (table_flags & ~0x3FFFFF) + (addr & 0x3FFFFF);
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}
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else
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{
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} else {
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/* Do a non-PDE-style page fault check. */
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if (mmu_page_fault_check(addr, rw, table_flags & 7, 0, is_abrt) == -1)
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{
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return -1;
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}
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}
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page_addr = table_flags & ~0xfff;
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page_addr += ((addr >> 10) & 0xffc);
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/* Then check the flags of the page table entry. */
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page_flags = mem_readl_phys(page_addr);
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page_flags = *(uint32_t *) &_mem_exec[page_addr >> 14][page_addr & 0x3fff];
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if (mmu_page_fault_check(addr, rw, page_flags & 7, 1, is_abrt) == -1)
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{
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return -1;
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}
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if (is_abrt)
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{
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if (is_abrt) {
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mmu_perm = page_flags & 4;
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mem_writel_phys(table_addr, table_flags | PAGE_ACCESSED);
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mem_writel_phys(page_addr, page_flags | (rw ? PAGE_DIRTY_AND_ACCESSED : PAGE_ACCESSED));
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*(uint32_t *) &_mem_exec[table_addr >> 14][table_addr & 0x3fff] = table_flags | PAGE_ACCESSED;
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*(uint32_t *) &_mem_exec[page_addr >> 14][page_addr & 0x3fff] = page_flags | (rw ? PAGE_DIRTY_AND_ACCESSED : PAGE_ACCESSED);
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}
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return (page_flags & ~0xFFF) + (addr & 0xFFF);
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