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Revert "Merge branch 'feature/machine_and_kb' into master"

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This reverts commit 6604a29d7e, reversing
changes made to 1d7fca0abd.
This commit is contained in:
Daniel Gurney
2021-07-04 18:22:52 +03:00
parent 6604a29d7e
commit f2cd3756dd
77 changed files with 3483 additions and 11882 deletions
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41
src/mem/mem.c
View File

@@ -1794,7 +1794,7 @@ mem_read_ram(uint32_t addr, void *priv)
mem_log("Read B %02X from %08X\n", ram[addr], addr);
#endif
if (is286 || AT)
if (AT)
addreadlookup(mem_logical_addr, addr);
return ram[addr];
@@ -1809,7 +1809,7 @@ mem_read_ramw(uint32_t addr, void *priv)
mem_log("Read W %04X from %08X\n", *(uint16_t *)&ram[addr], addr);
#endif
if (is286 || AT)
if (AT)
addreadlookup(mem_logical_addr, addr);
return *(uint16_t *)&ram[addr];
@@ -1824,7 +1824,7 @@ mem_read_raml(uint32_t addr, void *priv)
mem_log("Read L %08X from %08X\n", *(uint32_t *)&ram[addr], addr);
#endif
if (is286 || AT)
if (AT)
addreadlookup(mem_logical_addr, addr);
return *(uint32_t *)&ram[addr];
@@ -2068,7 +2068,7 @@ mem_write_ram(uint32_t addr, uint8_t val, void *priv)
if ((addr >= 0xa0000) && (addr <= 0xbffff))
mem_log("Write B %02X to %08X\n", val, addr);
#endif
if (is286 || AT) {
if (AT) {
addwritelookup(mem_logical_addr, addr);
mem_write_ramb_page(addr, val, &pages[addr >> 12]);
} else
@@ -2083,7 +2083,7 @@ mem_write_ramw(uint32_t addr, uint16_t val, void *priv)
if ((addr >= 0xa0000) && (addr <= 0xbffff))
mem_log("Write W %04X to %08X\n", val, addr);
#endif
if (is286 || AT) {
if (AT) {
addwritelookup(mem_logical_addr, addr);
mem_write_ramw_page(addr, val, &pages[addr >> 12]);
} else
@@ -2098,7 +2098,7 @@ mem_write_raml(uint32_t addr, uint32_t val, void *priv)
if ((addr >= 0xa0000) && (addr <= 0xbffff))
mem_log("Write L %08X to %08X\n", val, addr);
#endif
if (is286 || AT) {
if (AT) {
addwritelookup(mem_logical_addr, addr);
mem_write_raml_page(addr, val, &pages[addr >> 12]);
} else
@@ -2110,7 +2110,7 @@ static uint8_t
mem_read_remapped(uint32_t addr, void *priv)
{
addr = 0xA0000 + (addr - remap_start_addr);
if (is286 || AT)
if (AT)
addreadlookup(mem_logical_addr, addr);
return ram[addr];
}
@@ -2120,7 +2120,7 @@ static uint16_t
mem_read_remappedw(uint32_t addr, void *priv)
{
addr = 0xA0000 + (addr - remap_start_addr);
if (is286 || AT)
if (AT)
addreadlookup(mem_logical_addr, addr);
return *(uint16_t *)&ram[addr];
}
@@ -2130,7 +2130,7 @@ static uint32_t
mem_read_remappedl(uint32_t addr, void *priv)
{
addr = 0xA0000 + (addr - remap_start_addr);
if (is286 || AT)
if (AT)
addreadlookup(mem_logical_addr, addr);
return *(uint32_t *)&ram[addr];
}
@@ -2141,7 +2141,7 @@ mem_write_remapped(uint32_t addr, uint8_t val, void *priv)
{
uint32_t oldaddr = addr;
addr = 0xA0000 + (addr - remap_start_addr);
if (is286 || AT) {
if (AT) {
addwritelookup(mem_logical_addr, addr);
mem_write_ramb_page(addr, val, &pages[oldaddr >> 12]);
} else
@@ -2154,7 +2154,7 @@ mem_write_remappedw(uint32_t addr, uint16_t val, void *priv)
{
uint32_t oldaddr = addr;
addr = 0xA0000 + (addr - remap_start_addr);
if (is286 || AT) {
if (AT) {
addwritelookup(mem_logical_addr, addr);
mem_write_ramw_page(addr, val, &pages[oldaddr >> 12]);
} else
@@ -2167,7 +2167,7 @@ mem_write_remappedl(uint32_t addr, uint32_t val, void *priv)
{
uint32_t oldaddr = addr;
addr = 0xA0000 + (addr - remap_start_addr);
if (is286 || AT) {
if (AT) {
addwritelookup(mem_logical_addr, addr);
mem_write_raml_page(addr, val, &pages[oldaddr >> 12]);
} else
@@ -2536,7 +2536,7 @@ mem_a20_init(void)
flushmmucache();
mem_a20_state = mem_a20_key | mem_a20_alt;
} else {
rammask = is286 ? 0xffffff : 0xfffff;
rammask = 0xfffff;
flushmmucache();
mem_a20_key = mem_a20_alt = mem_a20_state = 0;
}
@@ -2662,20 +2662,15 @@ mem_reset(void)
*/
if (AT) {
if (cpu_16bitbus) {
/* 80286/386SX; maximum address space is 16MB. */
/* 80186/286; maximum address space is 16MB. */
m = 4096;
} else {
/* 80386DX+; maximum address space is 4GB. */
/* 80386+; maximum address space is 4GB. */
m = 1048576;
}
} else {
if (is286) {
/* 80286; maximum address space is 16MB. */
m = 4096;
} else {
/* 8088/86; maximum address space is 1MB. */
m = 256;
}
/* 8088/86; maximum address space is 1MB. */
m = 256;
}
/*
@@ -2869,7 +2864,7 @@ mem_a20_recalc(void)
int state;
if (! AT) {
rammask = is286 ? 0xffffff : 0xfffff;
rammask = 0xfffff;
flushmmucache();
mem_a20_key = mem_a20_alt = mem_a20_state = 0;

6
src/mem/rom.c
View File

@@ -392,12 +392,10 @@ static void
bios_add(void)
{
int temp_cpu_type, temp_cpu_16bitbus = 1;
int temp_is286 = 0;
if (/*AT && */cpu_s) {
if (AT && cpu_s) {
temp_cpu_type = cpu_s->cpu_type;
temp_cpu_16bitbus = (temp_cpu_type == CPU_286 || temp_cpu_type == CPU_386SX || temp_cpu_type == CPU_486SLC || temp_cpu_type == CPU_IBM386SLC || temp_cpu_type == CPU_IBM486SLC );
temp_is286 = (temp_cpu_type == CPU_286);
}
if (biosmask > 0x1ffff) {
@@ -419,7 +417,7 @@ bios_add(void)
MEM_READ_ROMCS | MEM_WRITE_ROMCS);
}
if (temp_is286 || AT) {
if (AT) {
mem_mapping_add(&bios_high_mapping, biosaddr | (temp_cpu_16bitbus ? 0x00f00000 : 0xfff00000), biosmask + 1,
bios_read,bios_readw,bios_readl,
NULL,NULL,NULL,

56
src/mem/spd.c
View File

@@ -384,62 +384,6 @@ spd_write_drbs(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit
}
void
spd_write_drbs_interleaved(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit)
{
uint8_t row, dimm, drb, apollo = 0;
uint16_t size, rows[SPD_MAX_SLOTS];
/* Special case for VIA Apollo Pro family, which jumps from 5F to 56. */
if (reg_max < reg_min) {
apollo = reg_max;
reg_max = reg_min + 7;
}
/* No SPD: split SIMMs into pairs as if they were "DIMM"s. */
if (!spd_present) {
dimm = ((reg_max - reg_min) + 1) >> 2; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */
spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].max_ram >> 10) / dimm)), 0);
}
/* Write DRBs for each row. */
spd_log("SPD: Writing DRBs... regs=[%02X:%02X] unit=%d\n", reg_min, reg_max, drb_unit);
for (row = 0; row <= (reg_max - reg_min); row += 2) {
dimm = (row >> 2);
size = 0;
if (spd_present) {
/* SPD enabled: use SPD info for this slot, if present. */
if (spd_modules[dimm]) {
if (spd_modules[dimm]->row1 < drb_unit) /* hack within a hack: turn a double-sided DIMM that is too small into a single-sided one */
size = ((row >> 1) & 1) ? 0 : drb_unit;
else
size = ((row >> 1) & 1) ? spd_modules[dimm]->row2 : spd_modules[dimm]->row1;
}
} else {
/* No SPD: use the values calculated above. */
size = (rows[dimm] >> 1);
}
/* Determine the DRB register to write. */
drb = reg_min + row;
if (apollo && ((drb & 0xf) < 0xa))
drb = apollo + (drb & 0xf);
/* Write DRB register, adding the previous DRB's value. */
if (row == 0)
regs[drb] = 0;
else if ((apollo) && (drb == apollo))
regs[drb] = regs[drb | 0xf]; /* 5F comes before 56 */
else
regs[drb] = regs[drb - 1];
if (size)
regs[drb] += size / drb_unit; /* this will intentionally overflow on 440GX with 2 GB */
spd_log("SPD: DRB[%d] = %d MB (%02Xh raw)\n", row >> 1, size, regs[drb]);
}
}
static const device_t spd_device = {
"Serial Presence Detect ROMs",
DEVICE_ISA,