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Vastly overhauled the UI, there's now a completely new Settings dialog as well as a status bar with disk activity icons and removable drive menus;

Browse Source 
Thoroughly clean up the code to vastly reduce the number of compiler warnings and found and fixed several bugs in the process;
Applied all mainline PCem commits;
Added SCSI hard disk emulation;
Commented out all unfinished machines and graphics cards;
Added the AOpen AP53 and ASUS P/I-P55T2 machines as well as another Tyan 440FX machine, all three with AMI WinBIOS (patch from TheCollector1995);
Added the Diamond Stealth 3D 3000 (S3 ViRGE/VX) graphics card (patch from TheCollector1995);
Added the PS/2 XT IDE (AccuLogic) HDD Controller (patch from TheCollector1995);
Added Microsoft/Logitech Bus Mouse emulation (patch from waltje);
Overhauled the makefiles (patch from waltje);
Added the Adaptec AHA-1542CF SCSI controller (patch from waltje);
Added preliminary (but still unfinished) Adaptec AHA-154x SCSI controller BIOS support (patch from waltje);
Added an ISABugger debugging device (patch from waltje);
Added sanity checks to the Direct3D code.
This commit is contained in:
OBattler
2017-05-05 01:49:42 +02:00
parent d07d53962c
commit f6ef1f833c
346 changed files with 24292 additions and 18058 deletions
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280
src/fdc37c665.c
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@@ -6,6 +6,7 @@
#include "disc.h"
#include "fdc.h"
#include "fdd.h"
#include "ide.h"
#include "io.h"
#include "lpt.h"
#include "serial.h"
@@ -14,6 +15,7 @@
static uint8_t fdc37c665_lock[2];
static int fdc37c665_curreg;
static uint8_t fdc37c665_regs[16];
static int com3_addr, com4_addr;
static void write_lock(uint8_t val)
{
@@ -26,9 +28,127 @@ static void write_lock(uint8_t val)
fdc37c665_lock[1] = val;
}
static void ide_handler()
{
uint16_t or_value = 0;
if (romset == ROM_440FX)
{
return;
}
ide_pri_disable();
if (fdc37c665_regs[0] & 1)
{
if (fdc37c665_regs[5] & 2)
{
or_value = 0;
}
else
{
or_value = 0x800;
}
ide_set_base(0, 0x170 | or_value);
ide_set_side(0, 0x376 | or_value);
ide_pri_enable_ex();
}
else
{
pclog("Disabling IDE...\n");
}
}
static void set_com34_addr()
{
switch (fdc37c665_regs[1] & 0x60)
{
case 0x00:
com3_addr = 0x338;
com4_addr = 0x238;
break;
case 0x20:
com3_addr = 0x3e8;
com4_addr = 0x2e8;
break;
case 0x40:
com3_addr = 0x3e8;
com4_addr = 0x2e0;
break;
case 0x60:
com3_addr = 0x220;
com4_addr = 0x228;
break;
}
}
void set_serial1_addr()
{
if (fdc37c665_regs[2] & 4)
{
switch (fdc37c665_regs[2] & 3)
{
case 0:
serial1_set(0x3f8, 4);
break;
case 1:
serial1_set(0x2f8, 3);
break;
case 2:
serial1_set(com3_addr, 4);
break;
case 3:
serial1_set(com4_addr, 3);
break;
}
}
}
void set_serial2_addr()
{
if (fdc37c665_regs[2] & 0x40)
{
switch (fdc37c665_regs[2] & 0x30)
{
case 0:
serial2_set(0x3f8, 4);
break;
case 1:
serial2_set(0x2f8, 3);
break;
case 2:
serial2_set(com3_addr, 4);
break;
case 3:
serial2_set(com4_addr, 3);
break;
}
}
}
static void lpt1_handler()
{
lpt1_remove();
switch (fdc37c665_regs[1] & 3)
{
case 1:
lpt1_init(0x3bc);
break;
case 2:
lpt1_init(0x378);
break;
case 3:
lpt1_init(0x278);
break;
}
}
void fdc37c665_write(uint16_t port, uint8_t val, void *priv)
{
// pclog("Write SuperIO %04x %02x\n", port, val);
uint8_t valxor = 0;
if (fdc37c665_lock[0] == 0x55 && fdc37c665_lock[1] == 0x55)
{
if (port == 0x3f0)
@@ -36,89 +156,75 @@ void fdc37c665_write(uint16_t port, uint8_t val, void *priv)
if (val == 0xaa)
write_lock(val);
else
fdc37c665_curreg = val & 0xf;
if (fdc37c665_curreg != 0)
{
fdc37c665_curreg = val & 0xf;
}
else
{
/* Hardcode the IDE to AT type. */
fdc37c665_curreg = (val & 0xf) | 2;
}
}
else
{
uint16_t com3_addr, com4_addr;
valxor = val ^ fdc37c665_regs[fdc37c665_curreg];
fdc37c665_regs[fdc37c665_curreg] = val;
// pclog("Write superIO %02x %02x %04x(%08x):%08x\n", fdc37c665_curreg, val, CS, cs, pc);
switch (fdc37c665_regs[1] & 0x60)
{
case 0x00:
com3_addr = 0x338;
com4_addr = 0x238;
break;
case 0x20:
com3_addr = 0x3e8;
com4_addr = 0x2e8;
break;
case 0x40:
com3_addr = 0x3e8;
com4_addr = 0x2e0;
break;
case 0x60:
com3_addr = 0x220;
com4_addr = 0x228;
break;
switch(fdc37c665_curreg)
{
case 0:
if (valxor & 1)
{
ide_handler();
}
break;
case 1:
if (valxor & 3)
{
lpt1_handler();
}
if (valxor & 0x60)
{
serial1_remove();
set_com34_addr();
set_serial1_addr();
set_serial2_addr();
}
break;
case 2:
if (valxor & 7)
{
serial1_remove();
set_serial1_addr();
}
if (valxor & 0x70)
{
serial2_remove();
set_serial2_addr();
}
break;
case 3:
if (valxor & 2)
{
fdc_update_enh_mode((fdc37c665_regs[3] & 2) ? 1 : 0);
}
break;
case 5:
if (valxor & 2)
{
ide_handler();
}
if (valxor & 0x18)
{
fdc_update_densel_force((fdc37c665_regs[5] & 0x18) >> 3);
}
if (valxor & 0x20)
{
fdd_swap = ((fdc37c665_regs[5] & 0x20) >> 5);
}
break;
}
if (!(fdc37c665_regs[2] & 4))
serial1_remove();
else switch (fdc37c665_regs[2] & 3)
{
case 0:
serial1_set(0x3f8, 4);
break;
case 1:
serial1_set(0x2f8, 4);
break;
case 2:
serial1_set(com3_addr, 4);
break;
case 3:
serial1_set(com4_addr, 4);
break;
}
if (!(fdc37c665_regs[2] & 0x40))
serial2_remove();
else switch (fdc37c665_regs[2] & 0x30)
{
case 0x00:
serial2_set(0x3f8, 3);
break;
case 0x10:
serial2_set(0x2f8, 3);
break;
case 0x20:
serial2_set(com3_addr, 3);
break;
case 0x30:
serial2_set(com4_addr, 3);
break;
}
lpt1_remove();
lpt2_remove();
switch (fdc37c665_regs[1] & 3)
{
case 1:
lpt1_init(0x3bc);
break;
case 2:
lpt1_init(0x378);
break;
case 3:
lpt1_init(0x278);
break;
}
fdc_update_enh_mode((fdc37c665_regs[3] & 2) ? 1 : 0);
fdc_update_densel_force((fdc37c665_regs[5] & 0x18) >> 3);
fdd_swap = ((fdc37c665_regs[5] & 0x20) >> 5);
}
}
else
@@ -130,7 +236,6 @@ void fdc37c665_write(uint16_t port, uint8_t val, void *priv)
uint8_t fdc37c665_read(uint16_t port, void *priv)
{
// pclog("Read SuperIO %04x %02x\n", port, fdc37c665_curreg);
if (fdc37c665_lock[0] == 0x55 && fdc37c665_lock[1] == 0x55)
{
if (port == 0x3f1)
@@ -141,8 +246,25 @@ uint8_t fdc37c665_read(uint16_t port, void *priv)
void fdc37c665_reset(void)
{
com3_addr = 0x338;
com4_addr = 0x238;
fdc_remove();
fdc_add_for_superio();
fdc_update_is_nsc(0);
serial1_remove();
serial1_set(0x3f8, 4);
serial2_remove();
serial2_set(0x2f8, 3);
lpt2_remove();
lpt1_remove();
lpt1_init(0x378);
memset(fdc37c665_lock, 0, 2);
memset(fdc37c665_regs, 0, 16);
fdc37c665_regs[0x0] = 0x3b;