diff --git a/src/chipset/ali1489.c b/src/chipset/ali1489.c
index 9738baed3..921c7d082 100644
--- a/src/chipset/ali1489.c
+++ b/src/chipset/ali1489.c
@@ -318,7 +318,7 @@ ali1489_write(uint16_t addr, uint8_t val, void *priv)
 					if (((val & 0x14) == 0x14) && !(old & 0x08) && (val & 0x08)) {
 						switch (dev->regs[0x35] & 0x30) {
 							case 0x00:
-								smi_line = 1;
+								smi_raise();
 								break;
 							case 0x10:
 								nmi_raise();
diff --git a/src/chipset/contaq_82c59x.c b/src/chipset/contaq_82c59x.c
index 6763202d0..97c8716eb 100644
--- a/src/chipset/contaq_82c59x.c
+++ b/src/chipset/contaq_82c59x.c
@@ -242,7 +242,7 @@ contaq_82c59x_write(uint16_t addr, uint8_t val, void *priv)
 				dev->regs[dev->index] = val;
 				if (val & 0x80) {
 					if (dev->regs[0x65] & 0x80)
-						smi_line = 1;
+						smi_raise();
 					dev->smi_status[0] |= 0x10;
 				}
 				break;
diff --git a/src/chipset/ims8848.c b/src/chipset/ims8848.c
index 10e87b530..35b1ef62b 100644
--- a/src/chipset/ims8848.c
+++ b/src/chipset/ims8848.c
@@ -230,7 +230,7 @@ ims8848_write(uint16_t addr, uint8_t val, void *priv)
 					if (dev->idx == 0x1b) {
 						ims8848_smram(dev);
 						if (!(old & 0x10) && (val & 0x10))
-							smi_line = 1;
+							smi_raise();
 					} else if (dev->idx == 0x1c)
 						pci_set_irq_routing(PCI_INTA, (val >> 4) ? (val >> 4) : PCI_IRQ_DISABLED);
 					break;
diff --git a/src/chipset/intel_420ex.c b/src/chipset/intel_420ex.c
index 187e6f636..8c8603efc 100644
--- a/src/chipset/intel_420ex.c
+++ b/src/chipset/intel_420ex.c
@@ -423,7 +423,7 @@ i420ex_fast_off_count(void *priv)
     cpu_fast_off_count--;
 
     if (cpu_fast_off_count == 0) {
-	smi_line = 1;
+	smi_raise();
 	dev->regs[0xaa] |= 0x20;
 	cpu_fast_off_count = dev->regs[0xa8] + 1;
     }
diff --git a/src/chipset/intel_piix.c b/src/chipset/intel_piix.c
index 025862c44..55002405f 100644
--- a/src/chipset/intel_piix.c
+++ b/src/chipset/intel_piix.c
@@ -1334,7 +1334,7 @@ piix_fast_off_count(void *priv)
     cpu_fast_off_count--;
 
     if (cpu_fast_off_count == 0) {
-	smi_line = 1;
+	smi_raise();
 	dev->regs[0][0xaa] |= 0x20;
 	cpu_fast_off_count = dev->regs[0][0xa8] + 1;
     }
diff --git a/src/chipset/intel_sio.c b/src/chipset/intel_sio.c
index ab535cb65..75aef516c 100644
--- a/src/chipset/intel_sio.c
+++ b/src/chipset/intel_sio.c
@@ -432,7 +432,7 @@ sio_fast_off_count(void *priv)
     cpu_fast_off_count--;
 
     if (cpu_fast_off_count == 0) {
-	smi_line = 1;
+	smi_raise();
 	dev->regs[0xaa] |= 0x20;
 	cpu_fast_off_count = dev->regs[0xa8] + 1;
     }
diff --git a/src/chipset/opti895.c b/src/chipset/opti895.c
index 8efddb96d..9eb360e02 100644
--- a/src/chipset/opti895.c
+++ b/src/chipset/opti895.c
@@ -175,7 +175,7 @@ opti895_write(uint16_t addr, uint8_t val, void *priv)
 
 				case 0xe1:
 					if ((val & 0x08) && (dev->regs[0xe0] & 0x01)) {
-						smi_line = 1;
+						smi_raise();
 						dev->forced_green = 1;
 						break;
 					}
diff --git a/src/chipset/sis_5511.c b/src/chipset/sis_5511.c
index 63950d47a..d0900629d 100644
--- a/src/chipset/sis_5511.c
+++ b/src/chipset/sis_5511.c
@@ -225,7 +225,7 @@ sis_5511_write(int func, int addr, uint8_t val, void *priv)
 	case 0x60:
 		dev->pci_conf[addr] = val & 0x3e;
 		if ((dev->pci_conf[0x68] & 1) && (val & 2)) {
-			smi_line = 1;
+			smi_raise();
 			dev->pci_conf[0x69] |= 1;
 		}
 		break;
diff --git a/src/chipset/sis_5571.c b/src/chipset/sis_5571.c
index 3f678d87b..2d9d92c8d 100644
--- a/src/chipset/sis_5571.c
+++ b/src/chipset/sis_5571.c
@@ -288,7 +288,7 @@ memory_pci_bridge_write(int func, int addr, uint8_t val, void *priv)
 
 		if ((dev->pci_conf[0x9b] & 1) && !!(val & 2))
 		{
-			smi_line = 1;
+			smi_raise();
 			dev->pci_conf[0x9d] |= 1;
 		}
 		break;
diff --git a/src/chipset/sis_85c496.c b/src/chipset/sis_85c496.c
index b900d4443..36d1f2030 100644
--- a/src/chipset/sis_85c496.c
+++ b/src/chipset/sis_85c496.c
@@ -390,7 +390,7 @@ sis_85c49x_pci_write(int func, int addr, uint8_t val, void *priv)
 			if (dev->pci_conf[0x80] & 0x10)
 				picint(1 << smm_irq[dev->pci_conf[0x81] & 0x03]);
 			else
-				smi_line = 1;
+				smi_raise();
 			smi_block = 1;
 			dev->pci_conf[0xa0] |= 0x10;
 		}
diff --git a/src/chipset/sis_85c4xx.c b/src/chipset/sis_85c4xx.c
index b705eb32e..508f653e2 100644
--- a/src/chipset/sis_85c4xx.c
+++ b/src/chipset/sis_85c4xx.c
@@ -104,7 +104,7 @@ sis_85c4xx_sw_smi_out(uint16_t port, uint8_t val, void *priv)
 
     if (dev->regs[0x18] & 0x02) {
 	if (dev->regs[0x0b] & 0x10)
-		smi_line = 1;
+		smi_raise();
 	else
 		picint(1 << ((dev->regs[0x0b] & 0x08) ? 15 : 12));
 	soft_reset_mask = 1;
diff --git a/src/chipset/sis_85c50x.c b/src/chipset/sis_85c50x.c
index 9d5dddebd..1c46074b1 100644
--- a/src/chipset/sis_85c50x.c
+++ b/src/chipset/sis_85c50x.c
@@ -176,7 +176,7 @@ sis_85c50x_write(int func, int addr, uint8_t val, void *priv)
 	case 0x60:	/* SMI */
 		if ((dev->pci_conf[0x68] & 0x01) && !(dev->pci_conf[addr] & 0x02) && (val & 0x02)) {
 			dev->pci_conf[0x69] |= 0x01;
-			smi_line = 1;
+			smi_raise();
 		}
 		dev->pci_conf[addr] = val & 0x3e;
 		break;
diff --git a/src/chipset/umc_8886.c b/src/chipset/umc_8886.c
index 72dc8778b..ba11ba829 100644
--- a/src/chipset/umc_8886.c
+++ b/src/chipset/umc_8886.c
@@ -232,7 +232,7 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv)
 					if (dev->pci_conf_sb[0][0x46] & 0x40)
 						picint(1 << ((dev->pci_conf_sb[0][0x46] & 0x80) ? 15 : 10));
 					else
-						smi_line = 1;
+						smi_raise();
 					dev->pci_conf_sb[0][0xa3] |= 0x04;
 				}
 
diff --git a/src/chipset/via_pipc.c b/src/chipset/via_pipc.c
index a415daa6f..720ad7561 100644
--- a/src/chipset/via_pipc.c
+++ b/src/chipset/via_pipc.c
@@ -790,7 +790,7 @@ pipc_fm_write(uint16_t addr, uint8_t val, void *priv)
 	/* Fire NMI/SMI if enabled. */
 	if (dev->ac97_regs[0][0x48] & 0x01) {
 		if (dev->ac97_regs[0][0x48] & 0x04)
-			smi_line = 1;
+			smi_raise();
 		else
 			nmi_raise();
 	}
diff --git a/src/chipset/via_vt82c49x.c b/src/chipset/via_vt82c49x.c
index 7efa76d01..f951741e7 100644
--- a/src/chipset/via_vt82c49x.c
+++ b/src/chipset/via_vt82c49x.c
@@ -234,7 +234,7 @@ vt82c49x_write(uint16_t addr, uint8_t val, void *priv)
 			case 0x54:
 				if ((dev->regs[0x5b] & 0x80) && (valxor & 0x01) && (val & 0x01)) {
 					if (dev->regs[0x5b] & 0x20)
-						smi_line = 1;
+						smi_raise();
 					else
 						picint(1 << 15);
 					dev->regs[0x55] = 0x01;