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Added the OPTi 82c602, on-board CL-GD 5430, and also gave the PC87306 Super I/O chip its full NVR capabilities, fixes #2877.

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This commit is contained in:
OBattler
2023-08-15 06:45:02 +02:00
parent 1345dbd975
commit f7b5a566cb
14 changed files with 115 additions and 46 deletions
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8
src/chipset/CMakeLists.txt
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@@ -17,10 +17,10 @@ add_library(chipset OBJECT 82c100.c acc2168.c cs8230.c ali1429.c ali1435.c ali14
ali1531.c ali1541.c ali1543.c ali1621.c ali6117.c headland.c ims8848.c intel_82335.c
compaq_386.c contaq_82c59x.c cs4031.c intel_420ex.c intel_4x0.c intel_i450kx.c
intel_sio.c intel_piix.c ../ioapic.c neat.c opti283.c opti291.c opti391.c opti495.c
opti822.c opti895.c opti5x7.c scamp.c scat.c sis_85c310.c sis_85c4xx.c sis_85c496.c
sis_85c50x.c sis_5511.c sis_5571.c via_vt82c49x.c via_vt82c505.c sis_85c310.c
sis_85c4xx.c sis_85c496.c sis_85c50x.c gc100.c stpc.c umc_8886.c umc_hb4.c
via_apollo.c via_pipc.c vl82c480.c wd76c10.c)
opti602.c opti822.c opti895.c opti5x7.c scamp.c scat.c sis_85c310.c sis_85c4xx.c
sis_85c496.c sis_85c50x.c sis_5511.c sis_5571.c via_vt82c49x.c via_vt82c505.c
sis_85c310.c sis_85c4xx.c sis_85c496.c sis_85c50x.c gc100.c stpc.c umc_8886.c
umc_hb4.c via_apollo.c via_pipc.c vl82c480.c wd76c10.c)
if(OLIVETTI)
target_sources(chipset PRIVATE olivetti_eva.c)

4
src/chipset/opti895.c
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@@ -140,6 +140,8 @@ opti895_write(uint16_t addr, uint8_t val, void *priv)
{
opti895_t *dev = (opti895_t *) priv;
opti895_log("opti895_write(%04X, %08X)\n", addr, val);
switch (addr) {
case 0x22:
dev->idx = val;
@@ -231,6 +233,8 @@ opti895_read(uint16_t addr, void *priv)
break;
}
opti895_log("opti895_read(%04X) = %02X\n", addr, ret);
return ret;
}

2
src/include/86box/chipset.h
View File

@@ -111,6 +111,8 @@ extern const device_t opti283_device;
extern const device_t opti291_device;
extern const device_t opti493_device;
extern const device_t opti495_device;
extern const device_t opti601_device;
extern const device_t opti602_device;
extern const device_t opti802g_device;
extern const device_t opti802g_pci_device;
extern const device_t opti822_device;

1
src/include/86box/nvr.h
View File

@@ -85,6 +85,7 @@ extern int nvr_dosave;
#ifdef EMU_DEVICE_H
extern const device_t at_nvr_old_device;
extern const device_t at_nvr_device;
extern const device_t at_mb_nvr_device;
extern const device_t ps_nvr_device;
extern const device_t amstrad_nvr_device;
extern const device_t amstrad_megapc_nvr_device;

1
src/include/86box/video.h
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@@ -352,6 +352,7 @@ extern const device_t gd5429_vlb_device;
extern const device_t gd5430_diamond_speedstar_pro_se_a8_vlb_device;
extern const device_t gd5430_vlb_device;
extern const device_t gd5430_pci_device;
extern const device_t gd5430_onboard_pci_device;
extern const device_t gd5434_isa_device;
extern const device_t gd5434_diamond_speedstar_64_a3_isa_device;
extern const device_t gd5434_onboard_pci_device;

20
src/machine/m_at_386dx_486.c
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@@ -630,16 +630,24 @@ machine_at_pc330_6573_init(const machine_t *model) /* doesn't like every CPU oth
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
machine_at_common_init_ex(model, 2);
device_add(&ide_vlb_2ch_device);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x10, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x11, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x10, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 5, 6, 7, 8);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 9, 10, 11, 12);
/* This is a guess because the BIOS always gives it a video BIOS
and never gives it an IRQ, so it is impossible to known for
certain until we obtain PCI readouts from the real machine. */
pci_register_slot(0x0E, PCI_CARD_VIDEO, 13, 14, 15, 16);
device_add(&opti802g_pci_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(&gd5430_onboard_pci_device);
device_add(&opti602_device);
device_add(&opti802g_device);
device_add(&opti822_device);
device_add(&keyboard_ps2_ami_device);
device_add(&fdc37c665_ide_device);

2
src/machine/m_at_socket5.c
View File

@@ -170,7 +170,7 @@ machine_at_zappa_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);

10
src/machine/m_at_socket7.c
View File

@@ -186,7 +186,7 @@ machine_at_tc430hx_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -221,7 +221,7 @@ machine_at_infinia7200_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -257,7 +257,7 @@ machine_at_equium5200_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -291,7 +291,7 @@ machine_at_pcv90_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -547,7 +547,7 @@ machine_at_pb680_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);

11
src/machine/m_at_socket7_3v.c
View File

@@ -44,7 +44,7 @@
static void
machine_at_thor_common_init(const machine_t *model, int mr)
{
machine_at_common_init_ex(model, mr);
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -58,9 +58,6 @@ machine_at_thor_common_init(const machine_t *model, int mr)
if (gfxcard[0] == VID_INTERNAL)
device_add(&s3_phoenix_trio64vplus_onboard_pci_device);
#if 0
device_add(&keyboard_ps2_ami_pci_device);
#endif
device_add(&keyboard_ps2_intel_ami_pci_device);
device_add(&i430fx_device);
device_add(&piix_device);
@@ -210,7 +207,7 @@ machine_at_endeavor_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -273,7 +270,7 @@ machine_at_pb640_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -455,7 +452,7 @@ machine_at_p55t2s_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);

26
src/machine/machine_table.c
View File

@@ -6483,17 +6483,17 @@ const machine_t machines[] = {
.max_multi = 3.0
},
.bus_flags = MACHINE_PS2_PCI,
.flags = MACHINE_IDE | MACHINE_APM,
.flags = MACHINE_IDE | MACHINE_VIDEO | MACHINE_APM,
.ram = {
.min = 1024,
.max = 65536,
.step = 1024
},
.nvrmask = 127,
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0,
.gpio = 0,
.device = NULL,
.device = &gd5430_onboard_pci_device,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
@@ -8281,7 +8281,7 @@ const machine_t machines[] = {
.max = 131072,
.step = 8192
},
.nvrmask = 127,
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0,
.gpio = 0,
@@ -8722,7 +8722,7 @@ const machine_t machines[] = {
.max = 131072,
.step = 8192
},
.nvrmask = 127,
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0,
.gpio = 0,
@@ -8803,7 +8803,7 @@ const machine_t machines[] = {
.max = 131072,
.step = 8192
},
.nvrmask = 127,
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0,
.gpio = 0,
@@ -8844,7 +8844,7 @@ const machine_t machines[] = {
.max = 131072,
.step = 8192
},
.nvrmask = 127,
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0,
.gpio = 0,
@@ -8885,7 +8885,7 @@ const machine_t machines[] = {
.max = 131072,
.step = 8192
},
.nvrmask = 127,
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0,
.gpio = 0,
@@ -8964,7 +8964,7 @@ const machine_t machines[] = {
.max = 131072,
.step = 8192
},
.nvrmask = 127,
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0,
.gpio = 0,
@@ -9203,7 +9203,7 @@ const machine_t machines[] = {
.max = 786432,
.step = 8192
},
.nvrmask = 127,
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0,
.gpio = 0,
@@ -9607,7 +9607,7 @@ const machine_t machines[] = {
.max = 196608,
.step = 8192
},
.nvrmask = 127,
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0,
.gpio = 0,
@@ -9649,7 +9649,7 @@ const machine_t machines[] = {
.max = 196608,
.step = 8192
},
.nvrmask = 127,
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0,
.gpio = 0,
@@ -10045,7 +10045,7 @@ const machine_t machines[] = {
.max = 131072,
.step = 8192
},
.nvrmask = 127,
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0,
.gpio = 0,

32
src/nvr_at.c
View File

@@ -295,6 +295,7 @@
#define FLAG_AMI_1995_HACK 0x08
#define FLAG_P6RP4_HACK 0x10
#define FLAG_PIIX4 0x20
#define FLAG_MULTI_BANK 0x40
typedef struct local_t {
int8_t stat;
@@ -559,6 +560,8 @@ timer_tick(nvr_t *nvr)
static void
nvr_reg_common_write(uint16_t reg, uint8_t val, nvr_t *nvr, local_t *local)
{
if (local->lock[reg])
return;
if ((reg == 0x2c) && (local->flags & FLAG_AMI_1994_HACK))
nvr->is_new = 0;
if ((reg == 0x2d) && (local->flags & FLAG_AMI_1992_HACK))
@@ -569,8 +572,6 @@ nvr_reg_common_write(uint16_t reg, uint8_t val, nvr_t *nvr, local_t *local)
return;
if ((reg >= 0xb8) && (reg <= 0xbf) && local->wp[1])
return;
if (local->lock[reg])
return;
if (nvr->regs[reg] != val) {
nvr->regs[reg] = val;
nvr_dosave = 1;
@@ -664,9 +665,12 @@ nvr_write(uint16_t addr, uint8_t val, void *priv)
} else {
local->addr[addr_id] = (val & (nvr->size - 1));
/* Some chipsets use a 256 byte NVRAM but ports 70h and 71h always access only 128 bytes. */
if (addr_id == 0x0)
if (addr_id == 0x0) {
local->addr[addr_id] &= 0x7f;
else if ((addr_id == 0x1) && (local->flags & FLAG_PIIX4))
/* Needed for OPTi 82C601/82C602 and NSC PC87306. */
if (local->flags & FLAG_MULTI_BANK)
local->addr[addr_id] |= (0x80 * local->bank[addr_id]);
} else if ((addr_id == 0x1) && (local->flags & FLAG_PIIX4))
local->addr[addr_id] = (local->addr[addr_id] & 0x7f) | 0x80;
if (local->bank[addr_id] > 0)
local->addr[addr_id] = (local->addr[addr_id] & 0x7f) | (0x80 * local->bank[addr_id]);
@@ -1080,6 +1084,12 @@ nvr_at_init(const device_t *info)
break;
}
if (info->local & 0x20)
local->def = 0x00;
if (info->local & 0x40)
local->flags |= FLAG_MULTI_BANK;
local->read_addr = 1;
/* Set up any local handlers here. */
@@ -1174,6 +1184,20 @@ const device_t at_nvr_device = {
.config = NULL
};
const device_t at_mb_nvr_device = {
.name = "PC/AT NVRAM",
.internal_name = "at_nvr",
.flags = DEVICE_ISA | DEVICE_AT,
.local = 0x40 | 0x20 | 1,
.init = nvr_at_init,
.close = nvr_at_close,
.reset = nvr_at_reset,
{ .available = NULL },
.speed_changed = nvr_at_speed_changed,
.force_redraw = NULL,
.config = NULL
};
const device_t ps_nvr_device = {
.name = "PS/1 or PS/2 NVRAM",
.internal_name = "ps_nvr",

24
src/sio/sio_pc87306.c
View File

@@ -297,6 +297,16 @@ pc87306_write(uint16_t port, uint8_t val, void *priv)
lpt1_handler(dev);
}
break;
case 4:
if (valxor & 0x80)
nvr_lock_set(0x00, 256, !!(val & 0x80), dev->nvr);
break;
case 5:
if (valxor & 0x08)
nvr_at_handler(!!(val & 0x08), 0x0070, dev->nvr);
if (valxor & 0x20)
nvr_bank_set(0, !!(val & 0x20), dev->nvr);
break;
case 9:
if (valxor & 0x44) {
fdc_update_enh_mode(dev->fdc, (val & 4) ? 1 : 0);
@@ -308,6 +318,8 @@ pc87306_write(uint16_t port, uint8_t val, void *priv)
pc87306_gpio_init(dev);
break;
case 0x12:
if (valxor & 0x01)
nvr_wp_set(!!(val & 0x01), 0, dev->nvr);
if (valxor & 0x30)
pc87306_gpio_init(dev);
break;
@@ -368,8 +380,10 @@ pc87306_read(uint16_t port, void *priv)
}
void
pc87306_reset(pc87306_t *dev)
pc87306_reset(void *priv)
{
pc87306_t *dev = (pc87306_t *) priv;
memset(dev->regs, 0, 29);
dev->regs[0x00] = 0x0B;
@@ -398,6 +412,10 @@ pc87306_reset(pc87306_t *dev)
serial_handler(dev, 1);
fdc_reset(dev->fdc);
pc87306_gpio_init(dev);
nvr_lock_set(0x00, 256, 0, dev->nvr);
nvr_at_handler(1, 0x0070, dev->nvr);
nvr_bank_set(0, 0, dev->nvr);
nvr_wp_set(0, 0, dev->nvr);
}
static void
@@ -419,7 +437,7 @@ pc87306_init(UNUSED(const device_t *info))
dev->uart[0] = device_add_inst(&ns16550_device, 1);
dev->uart[1] = device_add_inst(&ns16550_device, 2);
// dev->nvr = device_add(&piix4_nvr_device);
dev->nvr = device_add(&at_mb_nvr_device);
pc87306_reset(dev);
@@ -436,7 +454,7 @@ const device_t pc87306_device = {
.local = 0,
.init = pc87306_init,
.close = pc87306_close,
.reset = NULL,
.reset = pc87306_reset,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,

18
src/video/vid_cl54xx.c
View File

@@ -4067,9 +4067,9 @@ gd54xx_init(const device_t *info)
if (info->local & 0x200) {
romfn = NULL;
gd54xx->has_bios = 0;
} else if (gd54xx->pci) {
} else if (gd54xx->pci)
romfn = BIOS_GD5430_PATH;
} else if ((gd54xx->vlb) && (info->local & 0x100))
else if ((gd54xx->vlb) && (info->local & 0x100))
romfn = BIOS_GD5430_ORCHID_VLB_PATH;
else
romfn = BIOS_GD5430_DIAMOND_A8_VLB_PATH;
@@ -4952,6 +4952,20 @@ const device_t gd5430_pci_device = {
.config = gd5429_config
};
const device_t gd5430_onboard_pci_device = {
.name = "Cirrus Logic GD5430 (PCI) (On-Board)",
.internal_name = "cl_gd5430_onboard_pci",
.flags = DEVICE_PCI,
.local = CIRRUS_ID_CLGD5430 | 0x200,
.init = gd54xx_init,
.close = gd54xx_close,
.reset = gd54xx_reset,
{ .available = gd5430_available },
.speed_changed = gd54xx_speed_changed,
.force_redraw = gd54xx_force_redraw,
.config = gd5429_config
};
const device_t gd5434_isa_device = {
.name = "Cirrus Logic GD5434 (ISA)",
.internal_name = "cl_gd5434_isa",

2
src/win/Makefile.mingw
View File

@@ -590,7 +590,7 @@ CHIPSETOBJ := 82c100.o acc2168.o \
ims8848.o intel_82335.o intel_420ex.o intel_4x0.o intel_i450kx.o intel_sio.o intel_piix.o \
ioapic.o \
neat.o \
opti283.o opti291.o opti391.o opti495.o opti822.o opti895.o opti5x7.o \
opti283.o opti291.o opti391.o opti495.o opti602.o opti822.o opti895.o opti5x7.o \
scamp.o scat.o \
stpc.o \
wd76c10.o vl82c480.o \