CD-ROM images are now working correctly again;

Fixed all the reported bugs regarding the Settings dialog;
MIDI out device is now no longer reset to 0 after hard reset;
Removed all vestiges of the old disk activity flash;
The configuration file is no longer saved when it shouldn't be;
Redone the status bar icon updating so it is only done in win.c;
Made sure all variables in ibm.h are extern;
A lot of other bugfixes;
Added Mouse Systems Mouse emulation (patch from TheCollector1995);
Added IBM PS/1 Model 2133 (486) emulation (patch from TheCollector1995);
Tweaked the CPU dynamic recompiler cycle periods - 486SX 33 and 486DX 33 now work;
Increased compatibility with configuration files from before the previous commit.

src/CPU/386.c

@@ -28,6 +28,13 @@ uint32_t oldpc2;
 
 int trap;
 
+uint16_t flags,eflags;
+uint32_t oldds,oldss,olddslimit,oldsslimit,olddslimitw,oldsslimitw;
+
+x86seg gdt,ldt,idt,tr;
+x86seg _cs,_ds,_es,_ss,_fs,_gs;
+x86seg _oldds;
+
 
 
 extern int cpl_override;
@@ -40,6 +47,8 @@ uint16_t ea_rseg;
 int is486;
 int cgate32;
 
+uint32_t cr2, cr3, cr4;
+uint32_t dr[8];
 
 
 uint8_t romext[32768];

src/CPU/386_dynarec.c

@@ -1280,6 +1280,39 @@ int dontprint=0;
 
 #define CACHE_ON() (!(cr0 & (1 << 30)) /*&& (cr0 & 1)*/ && !(flags & T_FLAG))
 
+static int cpu_cycle_period(void)
+{
+	switch(cpu_pci_speed)
+	{
+		case 16000000:
+	                return 800;
+			break;
+		case 20000000:
+		case 40000000:
+	                return 1000;
+			break;
+		case 25000000:
+		default:
+	                return 1000;
+			break;
+		case 27500000:
+	                return 1100;
+			break;
+		case 30000000:
+	                return 1200;
+			break;
+		case 333333333:
+	                return 1333;
+			break;
+		case 37500000:
+	                return 1500;
+			break;
+		case 41666667:
+	                return 1041;
+			break;
+	}
+}
+
 static int cycles_main = 0;
 void exec386_dynarec(int cycs)
 {
@@ -1294,8 +1327,42 @@ void exec386_dynarec(int cycs)
         while (cycles_main > 0)
         {
                 int cycles_start;
-                
-                cycles += 1000;
+
+#if 0
+		switch(cpu_pci_speed)
+		{
+			case 16000000:
+		                cycles += 640;
+				break;
+			case 20000000:
+		                cycles += 800;
+				break;
+			case 25000000:
+			default:
+		                cycles += 1000;
+				break;
+			case 27500000:
+		                cycles += 1100;
+				break;
+			case 30000000:
+		                cycles += 1200;
+				break;
+			case 333333333:
+		                cycles += 1333;
+				break;
+			case 37500000:
+		                cycles += 1500;
+				break;
+			case 40000000:
+		                cycles += 1600;
+				break;
+			case 41666667:
+		                cycles += 1666;
+				break;
+		}
+#endif
+		cycles += cpu_cycle_period();
+
                 cycles_start = cycles;
 
                 timer_start_period(cycles << TIMER_SHIFT);

src/CPU/cpu.c

@@ -75,12 +75,15 @@ int cpu_hasMMX, cpu_hasMSR;
 int cpu_hasCR4;
 int cpu_use_dynarec;
 
+int hasfpu;
+
 uint64_t cpu_CR4_mask;
 
 int cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_write_l;
 int cpu_prefetch_cycles, cpu_prefetch_width;
 int cpu_waitstates;
 int cpu_cache_int_enabled, cpu_cache_ext_enabled;
+int cpu_pci_speed;
 
 int is286, is386;
 int israpidcad, is_pentium;
@@ -405,7 +408,7 @@ CPU cpus_Cx486[] =
           {"6x86MX-PR300",  CPU_Cx6x86MX, 18, 233333333, 3, 33333333, 0x600, 0x600, 0x0454, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,7,7},
           {"6x86MX-PR333",  CPU_Cx6x86MX, 18, 250000000, 3, 41666667, 0x600, 0x600, 0x0453, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 20,20,9,9},
           {"6x86MX-PR366",  CPU_Cx6x86MX, 18, 250000000, 3, 33333333, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12},
-          {"6x86MX-PR400",  CPU_Cx6x86MX, 18, 285000000, 3, 31666667, 0x600, 0x600, 0x0453, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
+          {"6x86MX-PR400",  CPU_Cx6x86MX, 18, 285000000, 3, 41666667, 0x600, 0x600, 0x0453, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
           {"",             -1,        0, 0, 0}
  };
  
@@ -617,11 +620,6 @@ void cpu_set()
 		if (enable_external_fpu)
 		{
 			hasfpu = 1;
-			if (cpu_s->cpu_type == CPU_i486SX)
-			{
-				/* The 487SX is a full implementation of the 486DX and takes over the entire CPU's operation. */
-				cpu_s->cpu_type = CPU_i486DX;
-			}
 		}
 	}
 

src/CPU/cpu.h

@@ -138,6 +138,7 @@ extern int cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_writ
 extern int cpu_prefetch_cycles, cpu_prefetch_width;
 extern int cpu_waitstates;
 extern int cpu_cache_int_enabled, cpu_cache_ext_enabled;
+extern int cpu_pci_speed;
 
 extern uint64_t tsc;