Added AMD K6-2+ and K6-III+ 3DNow! DSP Extensions.
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@@ -68,7 +68,8 @@ enum {
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};
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/*Addition flags returned by CPUID function 0x80000001*/
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#define CPUID_3DNOW (1UL << 31UL)
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#define CPUID_3DNOW (1UL << 31UL)
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#define CPUID_3DNOWE (1UL << 30UL)
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/* Make sure this is as low as possible. */
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cpu_state_t cpu_state;
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@@ -1167,6 +1168,11 @@ cpu_set(void)
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# endif
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#endif
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if ((cpu_s->cpu_type == CPU_K6_2P) || (cpu_s->cpu_type == CPU_K6_3P)) {
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x86_opcodes_3DNOW = ops_3DNOWE;
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x86_dynarec_opcodes_3DNOW = dynarec_ops_3DNOWE;
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}
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timing_rr = 1; /* register dest - register src */
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timing_rm = 2; /* register dest - memory src */
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timing_mr = 3; /* memory dest - register src */
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@@ -1202,6 +1208,8 @@ cpu_set(void)
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cpu_features = CPU_FEATURE_RDTSC | CPU_FEATURE_MSR | CPU_FEATURE_CR4 | CPU_FEATURE_VME | CPU_FEATURE_MMX;
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if (cpu_s->cpu_type >= CPU_K6_2)
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cpu_features |= CPU_FEATURE_3DNOW;
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if ((cpu_s->cpu_type == CPU_K6_2P) || (cpu_s->cpu_type == CPU_K6_3P))
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cpu_features |= CPU_FEATURE_3DNOWE;
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msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
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#if defined(DEV_BRANCH) && defined(USE_AMD_K5)
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cpu_CR4_mask = CR4_TSD | CR4_DE | CR4_MCE;
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@@ -1831,7 +1839,7 @@ cpu_CPUID(void)
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case 0x80000001:
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EAX = CPUID + 0x100;
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EBX = ECX = 0;
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EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW;
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EDX = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_AMDSEP | CPUID_MMX | CPUID_3DNOW | CPUID_3DNOWE;
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break;
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case 0x80000002: /* Processor name string */
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EAX = 0x2d444d41; /* AMD-K6(tm)-III P */
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