clang-format in src/machine

This commit is contained in:
Jasmine Iwanek
2022-07-27 15:17:53 -04:00
parent fe98b05da3
commit ff39a77afc
36 changed files with 8750 additions and 9405 deletions

View File

@@ -64,208 +64,198 @@
#include <86box/machine.h>
#include <86box/sound.h>
typedef struct {
int model;
int model;
rom_t mid_rom, high_rom;
rom_t mid_rom, high_rom;
uint8_t ps1_91,
ps1_92,
ps1_94,
ps1_102,
ps1_103,
ps1_104,
ps1_105,
ps1_190;
int ps1_e0_addr;
uint8_t ps1_e0_regs[256];
uint8_t ps1_91,
ps1_92,
ps1_94,
ps1_102,
ps1_103,
ps1_104,
ps1_105,
ps1_190;
int ps1_e0_addr;
uint8_t ps1_e0_regs[256];
serial_t *uart;
serial_t *uart;
} ps1_t;
static void
recalc_memory(ps1_t *ps)
{
/* Enable first 512K */
mem_set_mem_state(0x00000, 0x80000,
(ps->ps1_e0_regs[0] & 0x01) ?
(MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) :
(MEM_READ_EXTANY | MEM_WRITE_EXTANY));
(ps->ps1_e0_regs[0] & 0x01) ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY));
/* Enable 512-640K */
mem_set_mem_state(0x80000, 0x20000,
(ps->ps1_e0_regs[1] & 0x01) ?
(MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) :
(MEM_READ_EXTANY | MEM_WRITE_EXTANY));
(ps->ps1_e0_regs[1] & 0x01) ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY));
}
static void
ps1_write(uint16_t port, uint8_t val, void *priv)
{
ps1_t *ps = (ps1_t *)priv;
ps1_t *ps = (ps1_t *) priv;
switch (port) {
case 0x0092:
if (ps->model != 2011) {
if (val & 1) {
softresetx86();
cpu_set_edx();
}
ps->ps1_92 = val & ~1;
} else {
ps->ps1_92 = val;
}
mem_a20_alt = val & 2;
mem_a20_recalc();
break;
case 0x0092:
if (ps->model != 2011) {
if (val & 1) {
softresetx86();
cpu_set_edx();
}
ps->ps1_92 = val & ~1;
} else {
ps->ps1_92 = val;
}
mem_a20_alt = val & 2;
mem_a20_recalc();
break;
case 0x0094:
ps->ps1_94 = val;
break;
case 0x0094:
ps->ps1_94 = val;
break;
case 0x00e0:
if (ps->model != 2011) {
ps->ps1_e0_addr = val;
}
break;
case 0x00e0:
if (ps->model != 2011) {
ps->ps1_e0_addr = val;
}
break;
case 0x00e1:
if (ps->model != 2011) {
ps->ps1_e0_regs[ps->ps1_e0_addr] = val;
recalc_memory(ps);
}
break;
case 0x00e1:
if (ps->model != 2011) {
ps->ps1_e0_regs[ps->ps1_e0_addr] = val;
recalc_memory(ps);
}
break;
case 0x0102:
if (!(ps->ps1_94 & 0x80)) {
lpt1_remove();
serial_remove(ps->uart);
if (val & 0x04) {
if (val & 0x08)
serial_setup(ps->uart, COM1_ADDR, COM1_IRQ);
else
serial_setup(ps->uart, COM2_ADDR, COM2_IRQ);
}
if (val & 0x10) {
switch ((val >> 5) & 3)
{
case 0:
lpt1_init(LPT_MDA_ADDR);
break;
case 1:
lpt1_init(LPT1_ADDR);
break;
case 2:
lpt1_init(LPT2_ADDR);
break;
}
}
ps->ps1_102 = val;
}
break;
case 0x0102:
if (!(ps->ps1_94 & 0x80)) {
lpt1_remove();
serial_remove(ps->uart);
if (val & 0x04) {
if (val & 0x08)
serial_setup(ps->uart, COM1_ADDR, COM1_IRQ);
else
serial_setup(ps->uart, COM2_ADDR, COM2_IRQ);
}
if (val & 0x10) {
switch ((val >> 5) & 3) {
case 0:
lpt1_init(LPT_MDA_ADDR);
break;
case 1:
lpt1_init(LPT1_ADDR);
break;
case 2:
lpt1_init(LPT2_ADDR);
break;
}
}
ps->ps1_102 = val;
}
break;
case 0x0103:
ps->ps1_103 = val;
break;
case 0x0103:
ps->ps1_103 = val;
break;
case 0x0104:
ps->ps1_104 = val;
break;
case 0x0104:
ps->ps1_104 = val;
break;
case 0x0105:
ps->ps1_105 = val;
break;
case 0x0105:
ps->ps1_105 = val;
break;
case 0x0190:
ps->ps1_190 = val;
break;
case 0x0190:
ps->ps1_190 = val;
break;
}
}
static uint8_t
ps1_read(uint16_t port, void *priv)
{
ps1_t *ps = (ps1_t *)priv;
ps1_t *ps = (ps1_t *) priv;
uint8_t ret = 0xff;
switch (port) {
case 0x0091:
ret = ps->ps1_91;
ps->ps1_91 = 0;
break;
case 0x0091:
ret = ps->ps1_91;
ps->ps1_91 = 0;
break;
case 0x0092:
ret = ps->ps1_92;
break;
case 0x0092:
ret = ps->ps1_92;
break;
case 0x0094:
ret = ps->ps1_94;
break;
case 0x0094:
ret = ps->ps1_94;
break;
case 0x00e1:
if (ps->model != 2011) {
ret = ps->ps1_e0_regs[ps->ps1_e0_addr];
}
break;
case 0x00e1:
if (ps->model != 2011) {
ret = ps->ps1_e0_regs[ps->ps1_e0_addr];
}
break;
case 0x0102:
if (ps->model == 2011)
ret = ps->ps1_102 | 0x08;
else
ret = ps->ps1_102;
break;
case 0x0102:
if (ps->model == 2011)
ret = ps->ps1_102 | 0x08;
else
ret = ps->ps1_102;
break;
case 0x0103:
ret = ps->ps1_103;
break;
case 0x0103:
ret = ps->ps1_103;
break;
case 0x0104:
ret = ps->ps1_104;
break;
case 0x0104:
ret = ps->ps1_104;
break;
case 0x0105:
if (ps->model == 2011)
ret = ps->ps1_105;
else
ret = ps->ps1_105 | 0x80;
break;
case 0x0105:
if (ps->model == 2011)
ret = ps->ps1_105;
else
ret = ps->ps1_105 | 0x80;
break;
case 0x0190:
ret = ps->ps1_190;
break;
case 0x0190:
ret = ps->ps1_190;
break;
default:
break;
default:
break;
}
return(ret);
return (ret);
}
static void
ps1_setup(int model)
{
ps1_t *ps;
void *priv;
void *priv;
ps = (ps1_t *)malloc(sizeof(ps1_t));
ps = (ps1_t *) malloc(sizeof(ps1_t));
memset(ps, 0x00, sizeof(ps1_t));
ps->model = model;
io_sethandler(0x0091, 1,
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
io_sethandler(0x0092, 1,
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
io_sethandler(0x0094, 1,
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
io_sethandler(0x0102, 4,
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
io_sethandler(0x0190, 1,
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
ps->uart = device_add_inst(&ns16450_device, 1);
@@ -277,47 +267,47 @@ ps1_setup(int model)
device_add(&ps_nvr_device);
if (model == 2011) {
rom_init(&ps->high_rom,
"roms/machines/ibmps1es/f80000.bin",
0xf80000, 0x80000, 0x7ffff, 0, MEM_MAPPING_EXTERNAL);
rom_init(&ps->high_rom,
"roms/machines/ibmps1es/f80000.bin",
0xf80000, 0x80000, 0x7ffff, 0, MEM_MAPPING_EXTERNAL);
lpt2_remove();
lpt2_remove();
device_add(&ps1snd_device);
device_add(&ps1snd_device);
device_add(&fdc_at_ps1_device);
device_add(&fdc_at_ps1_device);
/* Enable the builtin HDC. */
if (hdc_current == 1) {
priv = device_add(&ps1_hdc_device);
/* Enable the builtin HDC. */
if (hdc_current == 1) {
priv = device_add(&ps1_hdc_device);
ps1_hdc_inform(priv, &ps->ps1_91);
}
ps1_hdc_inform(priv, &ps->ps1_91);
}
/* Enable the PS/1 VGA controller. */
device_add(&ps1vga_device);
/* Enable the PS/1 VGA controller. */
device_add(&ps1vga_device);
} else if (model == 2121) {
io_sethandler(0x00e0, 2,
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
io_sethandler(0x00e0, 2,
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
if (rom_present("roms/machines/ibmps1_2121/F80000.BIN")) {
rom_init(&ps->mid_rom,
"roms/machines/ibmps1_2121/F80000.BIN",
0xf80000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL);
}
rom_init(&ps->high_rom,
"roms/machines/ibmps1_2121/FC0000.BIN",
0xfc0000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL);
if (rom_present("roms/machines/ibmps1_2121/F80000.BIN")) {
rom_init(&ps->mid_rom,
"roms/machines/ibmps1_2121/F80000.BIN",
0xf80000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL);
}
rom_init(&ps->high_rom,
"roms/machines/ibmps1_2121/FC0000.BIN",
0xfc0000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL);
/* Initialize the video controller. */
if (gfxcard == VID_INTERNAL)
device_add(&ibm_ps1_2121_device);
/* Initialize the video controller. */
if (gfxcard == VID_INTERNAL)
device_add(&ibm_ps1_2121_device);
device_add(&fdc_at_ps1_device);
device_add(&fdc_at_ps1_device);
device_add(&ide_isa_device);
device_add(&ide_isa_device);
device_add(&ps1snd_device);
device_add(&ps1snd_device);
}
}
@@ -339,17 +329,16 @@ ps1_common_init(const machine_t *model)
standalone_gameport_type = &gameport_201_device;
}
int
machine_ps1_m2011_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ibmps1es/f80000.bin",
0x000e0000, 131072, 0x60000);
0x000e0000, 131072, 0x60000);
if (bios_only || !ret)
return ret;
return ret;
ps1_common_init(model);
@@ -358,17 +347,16 @@ machine_ps1_m2011_init(const machine_t *model)
return ret;
}
int
machine_ps1_m2121_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ibmps1_2121/FC0000.BIN",
0x000e0000, 131072, 0x20000);
0x000e0000, 131072, 0x20000);
if (bios_only || !ret)
return ret;
return ret;
ps1_common_init(model);